MSI MS-7069 Schematics

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MSI

MS-7071 Ver:0A

4 4

CPU:

Intel Prescott LGA775 -Mainstream CPU

System Chipset:

North Bridg e : VIA P4M800
South Bridge : VIA VT8237

On Board Chipset:

LPC Super I/O -- W83627THF REV:E
LAN -- Realtek PHY 8201CL
AC'97 Codec --Realtek ALC655
BIOS --LPC FLASH ROM

3 3

CLOCK Chip :

CLOCK Generator --

ICS 950917

Main Memory:

DDR * 2 (Max 2GB)

Expansion Slots:

PCI2.3 SLOT * 2

PWM:

Controller--RichTek RT8800BPS
Driver--RichTek RT9602PS

2 2

CHIPSET P4M800 + VT8237

TITLE

Cover Sheet

Block Diagram
PWR map/CLOCK map
GPIO/MEMORY/PCI/H W STRPPING

PROCESSOR ( Intel LGA775)
NORTH BRIDGE P4M800
DIMM1 / DIMM2
DDR TERMINATIONS
AGP SLOT
VGA Connector & CNR

Clock generator

SOUTH BRIDGE (VT8237)
PCI SLOTS
Realtek 8201CL

SIO & H/ W monitor & FAN 83627TH F-E
Realtek ALC655
IDE & KB/MS & IrDA

USB CONNECTORS

COM1/COM2/LPT

MS7 ACPI controller
RichTek RT8800

ATX & F-Panel & BIOS
PCB Components & EMI

SHEET

1

2

3

4

5,6,7

8,9,10,11

12

13

14

15

16

17,18,19

20

21

22

23

24

25

26

27

28

29

30

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MICRO-STAR INt'L CO., LTD.

MSI

Title

Size Document Number Rev

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B

C

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Date: Sheet

COVER SHEET

Monday, August 09, 2004

MS-7071

E

0A

of

131

VRM 10.1
Richtek
2-Phase PWM

Block Diagram

Intel Prescott Processor-LGA775

FSB

mainstream
TDP=84W

Iccmax=78A
Icctdc=68A

1

AGP 1.5V
Connector

IDE Primary

IDE Secondary

A A

USB Port 0

USB Port 1

USB Port 2

2X/4X/8X

UltraDMA 33/66/ 100

USB

P4M800

VCORE= +2.5VNB
VDIMM= +2.5VDIMM
VDDQ= +1.5VAGP
VLINK= +2.5V

VT8237

VCC25= +2.5V
VCC33= +3.3V

V-Link/8bits/S533M

LPC Bus

64bit DDR

MII

2 DDR
DIMM
Modules

PCI CNTRL

PCI ADDR/DATA

LAN

Realtek

8201CL

PCI Slot 2

PCI Slot 3

USB Port 3

USB Port 4

LPC SIO

USB Port 5

Winbond
83627THF-E

USB Port 6

USB Port 7

AC'97 Codec

AC'97 Link

SATA prot1 and
port2

FWH FLASH
ROM

KEYBOARD

MOUSE

FDD

1

Parallel

Serial

X2

MSI

Title

Size Document Number Re v

Date: Sheet

MICRO-STAR INt'L CO., LTD.

BLOCK DIAGRAM

Monday, August 09, 2004

MS-7071

of

231

0A

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2

1

P4M800 PLATFORM CLOCK GENERATOR MAP

3.3V 5V 5VSB 12V

P4M800 PLATFORM POWER DELIVERY MAP

PROCESSOR VCCP 1.2V~1.425V

D D

VRM

PROCESSOR 1.2V

Intel LGA775 Processor

CPU HOST
CLK

GUICK

DCLKO
DCLKI

NB
P4M800

GCLK_NB 66MHz

CLOCK GENERATOR

MEM CLK
0~5/CLK#0~5

C C

14.318MHZ

33MHz

48MHZ

2 DDR DIMM

SB14MHz

APIC

USB

Modules

VT8237

VCLK

1.2V VREG

2.5V VREG

1.5V VREG

3VSB VREG

DDR 2.5V
VREG

2.5V VREG

VTT 1.25V
VREG

SPCLK

2.5VSB

FWH_CLK

PCI CLK 1~2

FWH

PCI Slot 2~3

VREG

AGP SLOT 1.5V

NORTH BRIDGE VCCP
NORTH BRIDGE VCC_AGP
NORTH BRIDGE +2.5V

NORTH BRIDGE SYSEM MEMORY
VCC_DDR

DDR DIMM1 / DIMM2 / DIMM3 2.5V
DDR VTT 1.25V

550mA

SOUTH BRIDGE +2.5V
SOUTH BRIDGE VCC3

Vlink=70mA

150mA

SOUTH BRIDGE RESUME 2.5V_SB
SOUTH BRIDGE RESUME VCC3_SB
SOUTH BRIDGE RTC 3.3V

LAN-PHY VCC3_SB

10mA

120mA

B B

25MHZ from Crystal

SIOPCLK

SIO48MHZ

8201BL

LPC SIO
Winbond
83627THF-E

FWH 3.3V

LPC SUPER I/O 3.3V
LPC SUPER I/O VCC5

AC97XIN

AGP CLK

A A

8

7

ALC655

AGP SLOT

6

AC97 VDD5
VREG

Title

Size Document Number Rev

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4

3

Date: Sheet

CK-409 3.3V

AC97 VDD5

MSI

MICRO-STAR INt'L CO., LTD.

PWR AND CLOCK MAP

Monday, August 09, 2004

2

MS-7071

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VT8237 GPIO Function Define

PIN NAME Function define

GPO0 (VDDS)

GPO1(VDDS)
GPO2/SUSA#

(VDDS)
GPO3/SUSST#(VDDS)

GPO4/SUSCLK(VDDS)

GPO5/CPUSTP#

GPO6/PCISTP#

GPO7/GNT5

GPO8/GPI8/VGATE

*

GPO9/GPI9/UDPWREN

*

GPO10/GPI10/PICD0

*

GPO11/GPI11/PICD1

*

*

GPO12/GPI12/INTE#

*

GPO13/GPI13/INTF#

*

GPO14/GPI14/INTG#

*

GPO15/GPI15/INTH#
GPO20/GPI20

/ACSDIN2/PCS0#
GPO21/GPI21/ACSDIN3

/PCS1#/SLPBTN#

A A

GPO22/GPI22/GHI#

GPO23/GPI23/DPSLP

/GPIOAGPO24/GPI24

GPO25/GPI25
GPO26/GPI26/SMBDT2

(VDDS)
GPO27/GPI27/SMBCK2

(VDDS)

GPO28/GPI28/VIDSEL

GPO29/GPI29/VRDSLP

GPO30/GPI30

GPO31/GPI31

/GPIOB

/GPIOC

/GPIOD

Default
Function

GPO0

GPO1 4.7K ohm Pull up to VCC3_SB

SUSA#

SUSST#

SUSCLK

CPUSTP#

PCISTP#

GPO7

GPI8

UDPWREN

GPI10

GPI11

GPI12

GPI13

GPI14

GPI15
GPI20/ACSDIN2

GPI21/ACSDIN3

GPI22

GPI23

GPI24

GPI25

SMBDT2

SMBCK2
GPO28

/VIDSEL

GPO29

/VRDSLP

GPI30

GPI31

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3

4.7K ohm Pull up to VCC3

ohm Pull up to VCC3

8.2K

4.7K ohm Pull up to VCC3

NC

1K ohm Pull up to VCC3

1K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

4.7K ohm Pull down

4.7K ohm Pull down

4.7K ohm Pull up to VCC3

4.7K ohm Pull up to VCC3

BSEL1

4.7K ohm Pull down

ohm Pull up to VCC3_SB

2.7K

ohm Pull up to VCC3_SB

2.7K

SATA_LED

4.7K ohm Pull down

BSEL0

4.7K ohm Pull down

PIN NAME Function define
GPI0

(VBAT)
GPI1

(VSUS3)
GPI2/EXTSMI#

(VSUS3)
GPI3/RING#

(VSUS3)
GPI4/LID#

(VSUS3)
GPI5/BATLOW# (VDDS)

GPI6/AGPBZ

GPI7/REQ5

GPI8/VGATE

*

GPI9/UDPWREN

*

GPI10/PICD0

*

GPI11/PICD1

*

GPI12/INTE#

*

GPI13/INTF#

*

GPI14/INTG#

*

GPI15/INTH# GPI15

*

GPI16/INTRUDER#
(VBAT)

GPI17/CPUMISS

GPI18/AOLGP1/THRM#

GPI19/APICCLK

PCI Config.

DEVICE

PCI Slot 1 PCIREQ#1 AD18 PCI_CLK1

PCI Slot 2 PCIREQ#2 AD19

Default
Function

GPI0

GPI1

EXTSMI#

RING#

LID#

BATLOW#

AGPBZ

GPI7

GPI8

UDPWREN

GPI10

GPI11

GPI12

GPI13

GPI14

INTRUDER#

CPUMISS

AOLGP1

APICCLK

PIRQ#C
PIRQ#D
PIRQ#A
PIRQ#B
PIRQ#D
PIRQ#A
PIRQ#B
PIRQ#C

ohm Pull up to VBAT

1M

ATADET0=>Detect IDE1 ATA100/66

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3_SB

RING#

ATADET1=>Detect IDE2 ATA100/66

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

4.7K ohm Pull up to VCC3

NC

1K ohm Pull up to VCC3

1K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

8.2K ohm Pull up to VCC3

1M ohm Pull up to VBAT

4.7K ohm Pull up to VCC3_SB

4.7K ohm Pull up to

APICCLK

IDSEL

PCIGNT#1

PCIGNT#2

VCC3_SB

PCI_CLK2

USB

Rear

Front

Port DATA +/-

I1394_USB1

LAN_USB1

JUSB1

JUSB2

USB1­USB1+
USB0­USB0+

USB2­USB2+
USB3­USB3+

USB4­USB4+
USB6­USB6+

USB5­USB5+
USB7­USB7+

OC#

OC#1

( OC#0~3 )

OC#4

( OC#4~7 )

PCI RESET DEVICE

Signals Target
PCIRST#1
PCIRST#2
HD_RST#

PCI slot 2-3
NB , Super I/O , FWH
Primary, Sco n dary IDE

DDR DIMM Config.

DEVICE

DIMM 1

DIMM 2

1010000B

1010001B

CLOCKREQ#/GNT# CLK GEN PIN OUTMCP1 INT Pin

14

15

CLOCKADDRESS

DCLKA0/MDCLKA#0
DCLKA1/MDCLKA#1
DCLKA2/MDCLKA#2
DCLKA3/MDCLKA#3
DCLKA4/MDCLKA#4
DCLKA5/MDCLKA#5

MSI

Title

Size Document Number Re v

1

Date: Sheet

MICRO-STAR INt'L CO., LTD.

General Purpose Spec

Monday, August 09, 2004

MS-7071

0A

of

431

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1

CPU SIGNAL BLOCK

VID0

VID3

VID2

VID1

AL6

AM3

AL5

AM2

VID3#

VID2#

VID1#

VID0#

BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#

PCREQ#

REQ4#
REQ3#
REQ2#
REQ1#
REQ0#

TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0

RSVD
RSVD

BCLK1#
BCLK0#

RS2#
RS1#
RS0#

AP1#
AP0#

BR0#
COMP5
COMP4
COMP3
COMP2
COMP1
COMP0

DP3#

DP2#

DP1#

DP0#

ZIF-SOCK775-15u

B4

HD#0

VID[0..5] 28

AN7

CPU_GTLREF

H1
H2
H29

H_BPM#5

AG3

H_BPM#4

AF2

H_BPM#3

AG2

H_BPM#2

AD2

H_BPM#1

AJ1

H_BPM#0

AJ2
G5

HREQ#4

J6

HREQ#3

K6

HREQ#2

M6

HREQ#1

J5

HREQ#0

K4

H_TESTHI12

W2

H_TESTHI11

P1

H_TESTHI10

H5

H_TESTHI9

G4

H_TESTHI8

G3
F24
G24
G26
G27
G25

H_TESTHI2_7

F25

H_TESTHI1

W3

H_TESTHI0

F26

RSVD_AK6

AK6

RSVD_G6

G6
G28

F28

HRS#2

A3

HRS#1

F5

HRS#0

B3
U3

U2
F3
T2
J2

H_COMP3

R1

H_COMP2

G2

H_COMP1

T1

H_COMP0

A13
J17

H16
H15
J16

AD5
R6
C17
G19
E12
B9
A16
G20
G12
C8
L1
K1

RN2

X_8P4R-680R

VID3

1

VID1

3

VID4

5

VID2

7

VID0

R33

VID5

R36

CPU_GTLREF 6

RN4A

TP8

HREQ#[0..4] 8

1 2
3 4
7 8
5 6

R72 62R
R46 62R
R73 62R
R39 X_62R
R61 X_62R

CPUCLK# 16
CPUCLK 16A20M#19

12
34

8P4R-51R

78

8P4R-51R

56

8P4R-51R

34

8P4R-51R

56

8P4R-62R
8P4R-62R
8P4R-62R
8P4R-62R

RN5B 8P4R-51R
RN5D
RN7C
RN4B
RN4C

R45 62R
RN11A
RN11B
RN11D
RN11C

HRS#[0..2] 8

TP1
TP2

R47 X_60.4R1%
R56 X_60.4R1%
R50 100R1%
R63 100R1%
R51 60.4R1%
R74 60.4R1%

PLACE RESISTORS OUTSIDE SOCKET

TP5

CAVITY IF NO ROOM FOR VARIABLE

TP6

RESISTOR DON'T PLACE

TP3
TP4

HADSTB#1 8
HADSTB#0 8
HDSTBP#3 8
HDSTBP#2 8
HDSTBP#1 8
HDSTBP#0 8
HDSTBN#3 8
HDSTBN#2 8
HDSTBN#1 8
HDSTBN#0 8
NMI_SB 19
INTR 19

3

VTT_OUT_RIGHT

VTT_OUT_RIGHT

2
4
6
8

X_680R
X_680R

X_CD1U25V3Y5V

C29

C25
X_CD1U25V3Y5V

VTT_OUT_RIGHT

VTT_OUT_LEFT

V_FSB_VTT

VTT_OUT_RIGHT

HBR#0 6,8

VTT_OUT_LEFT

C17
X_CD1U25V3Y5V

SMI#
HINIT#
IGNNE#
STPCLK#
NMI_SB
SLP#
A20M#
INTR

MSI

Title

Size Document Number Re v

Date: Sheet

MICRO-STAR INt'L CO., LTD.

Monday, August 09, 2004

2

Intel LGA775 - Signals

MS-7071

RN9

1

5

1

5

2

2

3

3

4

4

6

6

7

7

8

8

9

10

9

10

10P8R-150R

531

1

VCCP

of

0A

D D

HA#19

HA#20

HA#21

HA#22

A23#

D36#

HD#35

AD6

G18

AA4

A22#

D35#

E16

HD#34

A21#

A20#Y4A19#Y6A18#W6A17#

D34#

D33#

E15

G16

HD#32

HD#33

HA#18

D32#

HD#31

HA#16

HA#17

AB6

D31#

D30#

F15

G15

G14

HD#30

HD#29

HA#14

HA#13

HA#15

A16#W5A15#V4A14#V5A13#U4A12#U5A11#T4A10#

D29#

D28#

D27#

F14

E13

G13

HD#28

HD#26

HD#27

HA#25

HA#30

HA#31

HA#26

HA#29

HA#23

HA#27

A31#

D44#

HD#43

HA#24

AG4

AG6

AF4

AF5

AB4

AC5

AB5

AA5

A30#

A29#

A28#

A27#

A26#

A25#

A24#

D43#

D42#

D41#

D40#

D39#

D38#

D37#

F21

F20

F18

F17

E21

E19

E18

G17

HD#39

HD#42

HD#41 HA#28

HD#38

HD#40

HD#36

HD#37

HA#32

HA#33

AJ6

AJ5

AH5

AH4

HDBI#[0..3]8

TP12

FERR#6,19

STPCLK#19

HDBI#0
HDBI#1
HDBI#2
HDBI#3

-EDRDY
IERR#

IERR#6

HINIT#19

HDBSY#8

HDRDY#8

HTRDY#8

HADS#8

HLOCK#8

RN7B
RN5A
RN7A
RN5C
RN7D

THERMTRIP#6,29
CPUMISS18

CPU_TMPA22

VTIN_GND22

PROCHOT#6

SMI#19

HBNR#8

HIT#8
HITM#8
HBPRI#8

HDEFER#8

3 4
1 2
1 2
5 6
7 8

IGNNE#19

8P4R-51R
8P4R-51R
8P4R-51R
8P4R-51R
8P4R-51R

C C

VTT_OUT_RIGHT

SLP#19

C19 X_CD1U25V3Y5V

VTT_OUT_RIGHT

B B

don't support willameter

R49

X_1K

CPU_BOOT

H_BSL06,16,18
H_BSL16,16,18
H_BSL26

CPU_GD6,27

CPURST#6,8

HD#[0..63]8

A A

VCCP

R37

4.7KR

H_TDI
H_TDO
H_TMS
H_TRST#
H_TCK

HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54

G11

AD3

AD1
AC1

AG1

AH2

G10

G29
G30

G23

A8

D19
C20

F2
AB2
AB3

R3

M3

P3

H4

B2

C1

E3

D2
C3
C2
D4

E4

G8
G7

AF1

AE1
AL1
AK1

M2
AE8
AL2

N2

P2
K3
L2

N5
AE6

C9
D16

A20

Y1
V2

AA2

H30

N1

B22
A22
A19
B19
B21
C21
B18
A17
B16
C18

DBI0#
DBI1#
DBI2#
DBI3#

EDRDY#
IERR#
MCERR#
FERR#/PBE#
STPCLK#
BINIT#
INIT#
RSP#

DBSY#
DRDY#
TRDY#

ADS#
LOCK#
BNR#
HIT#
HITM#
BPRI#
DEFER#

TDI
TDO
TMS
TRST#
TCK
THERMDA
THERMDC
THERMTRIP#
GND/SKTOCC#
PROCHOT#
IGNNE#
SMI#
A20M#
SLP#

RSVD
RESERVED0
RESERVED1
RESERVED2
RESERVED3
RESERVED4
RESERVED5

BOOTSELECT
LL_ID0
LL_ID1

BSEL0
BSEL1
BSEL2

PWRGOOD
RESET#
D63#

D62#
D61#
D60#
D59#
D58#
D57#
D56#
D55#
D54#

D53#

B15

C14

HD#53

HD#52

D52#

HD#51

D51#

C15

U5A

AG5

A35#

A34#

A33#

A32#

D50#

D49#

D48#

D47#

D46#

D45#

A14

E22

D17

D20

D22

G22

G21

HD#49

HD#48

HD#47

HD#44

HD#50

HD#45

HD#46

HA#12

D26#

D13

HD#25

HA#11

D25#

HD#24

F12

HA#10

U6

D24#

F11

HD#23

HA#6

HA#8

HA#7

HA#9

A9#T5A8#R4A7#M4A6#L4A5#M5A4#P6A3#

D23#

D22#

D21#

D20#D7D19#E9D18#F9D17#F8D16#G9D15#

E10

D10

HD#20

HD#21

HD#19

HD#22

HA#4

HA#5

HA#3

AN5

AN6

AN3

AN4

L5

AC2

DBR#

RSVD

RSVD

VCC_SENSE

D14#

D13#

D12#D8D11#

D10#

B12

B10

A11

D11

C12

C11

HD#10

HD#12

HD#17

HD#16

HD#18

HD#9

HD#13

HD#14

HD#11

HD#15

AJ3

AK3

AM7

ITP_CLK1

ITP_CLK0

VSS_SENSE

D9#

D8#

D7#A7D6#B7D5#B6D4#A5D3#C6D2#A4D1#C5D0#

A10

HD#8

HD#4

HD#7

HD#6

HD#5

VID5

VID4

AM5

AL4

AK4

VID6#

VID5#

VID4#

VID7#

VID_SELECT

GTLREF0
GTLREF1

GTLREF_SEL

TESTHI12
TESTHI11
TESTHI10

ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#

LINT1/NMI

LINT0/INTR

HD#3

HD#2

HD#1

B

THERM# PROCHOT#

HA#[3..33]8

THERM#18,22

8

C E

Q3 2N3904S

7

6

5

4

8

7

6

5

4

3

2

1

VCCP

AH27

AH26

AH25

AH22

AH21

AH19

AH18

AH15

AH14

AH12

AH11

AG9

AG8

AG30

AG29

AG28

AG27

AG26

AG25

AG22

AG21

AG19

AG18

AG15

AG14

AG12

AG11

AF9

AF8

AF22

AF21

AF19
AF18
AF15
AF14
AF12
AF11

AE23
AE22
AE21
AE19
AE18
AE15
AE14
AE12
AE11

AD30
AD29
AD28
AD27
AD26
AD25
AD24
AD23

AC30
AC29
AC28
AC27
AC26
AC25
AC24
AC23

AE9

AD8

AC8

AB8
AA8

U5B

VCCP

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCU8VCCV8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCW8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

Y8

Y30

Y23

Y24

Y25

Y26

Y27

Y28

Y29

W30

W29

W28

W27

W26

W25

W24

W23

U26

U27

U28

U29

U30

D D

VCCP

C C

AH28

AH29

AH30

AH8

AH9

AJ11

AJ12

AJ14

AJ15

AJ18

AJ19

AJ21

AJ22

AJ25

AJ26

AJ8

AJ9

AK11

AK12

AK14

AK15

AK18

AK19

AK21

AK22

AK25

AK26

AK8

AK9

AL11

AL12

AL14

AL15

AL18

AL19

AL21

AL22

AL25

AL26

AL29

AL30

AL8

AL9

AM11

AM12

AM14

AM15

AM18

AM19

AM21

AM22

AM25

AM26

AM29

AM30

AM8

AM9

AN11

AN12

AN14

AN15

AN18

AN19

AN21

AN22

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCA
VSSA
RSVD

VCC-IOPLL

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VTTPWRGD

VTT_OUT_RIGHT

VTT_OUT_LEFT

VCC

AN8

VCC

VTT_SEL

VCC

VCC

VCC

VCC

HS11HS22HS33HS4

AN25

AN26

AN29

AN30

RSVD/VTT_PKGSENSE

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCJ8VCCJ9VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCK8VCCL8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCM8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCN8VCCP8VCCR8VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCC

VCCT8VCC

VCC

VCC

J10

J11

J12

J13

J14

J15

J18

J19

J20

J21

J22

J23

J24

J25

J26

J27

J28

J29

T30

U23

U24

U25

N30

N23

N24

N25

N26

N27

N28

N29

M30

M29

M28

M27

M26

M25

M24

M23

K27

K28

K29

K30

T23

T24

T25

T26

T27

T28

T29

J30

K23

K24

K25

K26

AN9

A23
B23
D23
C23

A25
A26
A27
A28
A29
A30
B25
B26
B27
B28
B29
B30
C25
C26
C27
C28
C29
C30
D25
D26
D27
D28
D29
D30
AM6

AA1
J1
F27

F29

ZIF-SOCK775-15u

4

V_FSB_VTT
H_VSSA

V_FSB_VTT

VTT_PWG
VTT_OUT_RIGHT

VTT_OUT_LEFT

V_FSB_VTT

VTT_SEL

V_FSB_VTT

C56 C10U10Y0805

CAPS FOR FSB GE NERIC

VTT_OUT_RIGHT

VTT_OUT_LEFT

R79

X_1K

TEJ/PSC

0
1

RSVD

VCC3

PLACE COMPONENTS AS CLOSE AS POSSIBLE TO PROCESSOR SOCKET
TRACE WIDTH TO CAPS MUST BE SMALLER THAN 12MILS

B B

VTT_OUT_LEFT

100 OHMS OVER 210 OHMS RESISTORS

VTT_OUT_LEFT CPU_GTLREF

GTLREF VOLTAGE SHOULD BE

0.67*VTT = 0.8V

R60

49.9

49.9R1%

R57
100R1%

100

C34
CD1U25V3Y5V

CPU_GTLREF 5

C35
X_C220P50N

PLACE AT CPU END OF ROUTE

VTT_OUT_RIGHT

VTT_OUT_LEFT

A A

VTT_OUT_RIGHT

VTT_OUT_LEFT

V_FSB_VTT

R42 62R
R40 120R

R53 100R
R64 62R

R44 62R
R54 62R

CPURST#
PROCHOT#

CPU_GD
HBR#0

IERR#
THERMTRIP#

CPURST# 5,8
PROCHOT# 5

CPU_GD 5,27
HBR#0 5,8

IERR# 5
THERMTRIP# 5,29

PLACE AT SB END OF ROUTE

V_FSB_VTT

8

7

R52 62R

FERR#

6

FERR# 5,19

5

V_FSB_VTT V_FSB_VTT

C65

C1U16V3Y5VL

C68

C1U16V3Y5VL

VCC5_SB

R12
1KR

VID_GD#27,28

FSBSEL RESISTOR CAN BE REMOVED IF ONLY TEJAS
AND CEDAR MILL ARE SUPPORTED

V_FSB_VTT

R17

10KR

RN32 8P4R-470R

1
3
5
7

4

Change from H_VCCA

VTT_OUT_LEFT

2
4
6
8

H_VSSA

V_FSB_VTT

Change from H_VCCA

R32
680R

Q2

2N3904S

H_BSL1 5,16,18
H_BSL2 5
H_BSL0 5,16,18

1.25V VTT_PWRGOOD

VTT_PWG

3

MSI

Title

Size Document Number Re v

Date: Sheet

MICRO-STAR INt'L CO., LTD.

Monday, August 09, 2004

2

Intel LGA775 - Power

MS-7071

of

631

1

0A

1

A A

TP10

TP11 TP7

AC4

AE3

AE4

U5C

A12

VSS

A15

VSS

A18

VSS

A2

VSS

A21

VSS

A24

VSS

A6

VSS

A9

VSS

AA23

VSS

AA24

VSS

AA25

VSS

AA26

B B

C C

AA27
AA28
AA29

AA30

AB23
AB24
AB25
AB26
AB27
AB28
AB29
AB30

AC3
AC6
AC7
AD4

AD7
AE10
AE13
AE16
AE17

AE2
AE20
AE24
AE25
AE26
AE27
AE28

AA3
AA6

AA7
AB1

AB7

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

D14

RSVD

RSVD

RSVD

RSVDD1RSVD

VSS

VSS

VSS

VSS

VSS

AE5

AE7

AF10

AF13

AE29

AE30

VSS

E23

E24

RSVD

VSS

AF16

AF17

RSVD

RSVDE5RSVDE6RSVDE7RSVD

VSS

VSS

VSS

AF20

AF23

TP9

F23

B13

RSVDF6RSVD

VSS

VSS

VSS

VSS

VSS

AF24

AF25

AF26

AF27

AF28

RSVDJ3RSVDN4RSVDP5RSVDV1RSVDW1RSVD

VSS

VSS

VSS

VSS

VSS

AF3

AF6

AF7

AF29

AF30

2

VSS

VSS

AG10

AG13

Y3

VSSY7VSSY5VSSY2VSSW7VSSW4VSSV7VSSV6VSS

VSS

VSS

VSS

VSS

AG16

AG17

AG20

AG23

3

V30

V29

V28

V27

V26

V25

V24

V23

VSSV3VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSU7VSSU1VSST7VSST6VSST3VSSR7VSSR5VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AH1

AG7

AH10

AH13

AG24

AH3

AH6

AH7

AJ10

AJ13

AJ16

AH16

AH17

AH20

AH23

AH24

AJ17

VSS

R30

R29

R28

R27

R26

R25

R24

R23

P30

P29

P28

P27

P26

P25

P24

P23

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSR2VSSP7VSSP4VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSN7VSSN6VSSN3VSSM7VSSM1VSSL7VSSL6VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AJ4

AJ7

AJ20

AJ23

AJ24

AJ27

AJ28

AJ29

AJ30

AK2

AK10

AK13

AK16

AK17

AK20

AK23

AK5

AK7

AL10

AL13

AK24

AK27

AK28

AL16

AK29

AK30

VSS

L30

L29

L28

L27

L26

L25

VSSL3VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AL3

AL7

AL17

AL20

AM1

AL23

AL24

AL27

AL28

AM10

AM13

AM16

VSS

VSS

4

H17

H18

H19

H20

H21

H22

H23

H24

H25

H26

H27

K2

L24

L23

K5

VSS

VSS

VSSK7VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

AM17

AM4

AM20

AM23

AM24

AM27

AM28

H28

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSH3VSSH6VSSH7VSSH8VSSH9VSSJ4VSSJ7VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSS

VSSB1VSS

VSS

B11

AN1

AN2

AN10

AN13

AN16

AN17

AN20

AN23

B14

AN24

AN27

AN28

H14

VSS

H13

VSS

H12

VSS

H11

VSS

H10

VSS

G1

VSS

F7

VSS

F4

VSS

F22

VSS

F19

VSS

F16

VSS

F13

VSS

F10

VSS

E8

VSS

E29

VSS

E28

VSS

E27

VSS

E26

VSS

E25

VSS

E20

VSS

E2

VSS

E17

VSS

E14

VSS

E11

VSS

D9

VSS

D6

VSS

D5

VSS

D3

VSS

D24

VSS

D21

VSS

D18

VSS

D15

VSS

D12

VSS

C7

VSS

C4

VSS

C24

VSS

C22

VSS

C19

VSS

C16

VSS

C13

VSS

C10

VSS

B8

VSS

B5

VSS

B24

VSS

B20

VSS

B17

VSS

ZIF-SOCK775-15u

5

D D

MSI

Title

Size Document Number Rev

1

2

3

4

Date: Sheet of

MICRO-STAR INt'L CO., LTD.

Intel LGA775- GND

Monday, August 09, 2004

MS-7071

731

5

0A

4

3

2

1

VIA confirmed

V_FSB_VTT

D D

HA#[3..33]5

C C

ADD HA32,33

HADSTB#05
HADSTB#15

HADS#5
HBNR#5
HBPRI#5
HBR#05,6
HDBSY#5

HDEFER#5

HDRDY#5
HIT#5
HITM#5

HLOCK#5

HTRDY#5

B B

CD01U50V3X7RL

CD01U50V3X7RL C80

A A

HREQ#[0..4]5

near NB

near NB

X_CD01U50V3X7RL-B

C82

CD01U50V3X7RL

HRS#[0..2]5

HDBI#[0..3]5

CPURST#5,6

NBHCLK16
NBHCLK#16

GTLVREF_NB

C83

CD01U50V3X7RL-B

GTLVREF_NB1

C252

HA#3
HA#4
HA#5
HA#6
HA#7
HA#8

HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31

HA#32
HA#33

HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4

HRS#0
HRS#1
HRS#2

HDBI#0
HDBI#1
HDBI#2
HDBI#3

CD01U50V3X7RL-B

C246

C245

C253

CD01U50V3X7RL-B

HRCOMP

HCOMPVREF

4

Y29
V27

AA29

Y27

Y26
AC27
AA28
AB27
AA27
AC29
AB29
AB28
AC26
AD29

T28

R28

N29

N28

P29

P27

R27

N26

T26

P26

R25

N27

N25

R29

T27

U26

T25

W28

R26

M29
M28

T29

K26

M25

U27

M26

L27

U29

L29

M24
W27

V28

V26

W29

V29

L26

M27

K25

C29

H27

B21

A21

D14

Y23

W23

R24

V24

F22

G24

F19

F16

L24

G25

G26

K24

P4M800

U6A

HA3
HA4
HA5
HA6
HA7
HA8
HA9
HA10
HA11
HA12
HA13
HA14
HA15
HA16
HA17
HA18
HA19
HA20
HA21
HA22
HA23
HA24
HA25
HA26
HA27
HA28
HA29
HA30
HA31
HA32
HA33

HADSTB0
HADSTB1

ADS
BNR
BPRI
BREQ
DBSY
DEFER
DRDY
HIT
HITM
HLOCK
HTRDY

HREQ0
HREQ1
HREQ2
HREQ3
HREQ4
RS0
RS1
RS2

HDBI0
HDBI1
HDBI2
HDBI3

CPURST
HCLK+

HCLK-

HAVREF0
HAVREF1

HDVREF0
HDVREF1
HDVREF2
HDVREF3

GTLVREF

HRCOMP
HCOMPVREF
DPWR

GND

GND

GND

A16

A19

B22

B25

GND

GND

GND

B28

D16

D15

K15

K16

K17

K18

K19

K20

L20

M20

N20

P20

R20

T20

U20

HD0

GND

L15

HDSTB0P
HDSTB0N

HDSTB1P
HDSTB1N

HDSTB2P
HDSTB2N

HDSTB3P
HDSTB3N

GND

L16

L17

HD1
HD2
HD3
HD4
HD5
HD6
HD7
HD8

HD9
HD10
HD11
HD12
HD13
HD14
HD15
HD16
HD17
HD18
HD19
HD20
HD21
HD22
HD23
HD24
HD25
HD26
HD27
HD28
HD29
HD30
HD31
HD32
HD33
HD34
HD35
HD36
HD37
HD38
HD39
HD40
HD41
HD42
HD43
HD44
HD45
HD46
HD47
HD48
HD49
HD50
HD51
HD52
HD53
HD54
HD55
HD56
HD57
HD58
HD59
HD60
HD61
HD62
HD63

GND
GND
GND
GND
GND
GND
GND

GND

GND

GND

GND

GND

L18

L19

N19

M19

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

VTT

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

P25

P28

U25

U28

Y25

Y28

GND

GND

GND

N18

M18

P18

GND

GND

GND

GND

GND

GND

T18

V18

R18

U18

AC28

3

GND

GND

GND

GND

GND

L25

L28

E29

E26

E25

E22

H26

D19

H29

P19

HD#0

D27

HD#1

D26

HD#2

A29

HD#3

C26

HD#4

C28

HD#5

D28

HD#6

A27

HD#7

B29

HD#8

A26

HD#9

B26

HD#10

D25

HD#11

E24

HD#12

A25

HD#13

A28

HD#14

D24

HD#15

C25

HD#16

K28

HD#17

K29

HD#18

J28

HD#19

K27

HD#20

J26

HD#21

J29

HD#22

J25

HD#23

J27

HD#24

F28

HD#25

G29

HD#26

G27

HD#27

D29

HD#28

E27

HD#29

F27

HD#30

E28

HD#31

F29

HD#32

E23

HD#33

B24

HD#34

C24

HD#35

A24

HD#36

A23

HD#37

B23

HD#38

A22

HD#39

C23

HD#40

F21

HD#41

C22

HD#42

E21

HD#43

C21

HD#44

D20

HD#45

D21

HD#46

F20

HD#47

E20

HD#48

B19

HD#49

C19

HD#50

B20

HD#51

B18

HD#52

C20

HD#53

A20

HD#54

C18

HD#55

B17

HD#56

B16

HD#57

A17

HD#58

C14

HD#59

C15

HD#60

A18

HD#61

B15

HD#62

B14

HD#63

A15
B27

HDSTBP#0 5

C27

HDSTBN#0 5

H28

HDSTBP#1 5

G28

HDSTBN#1 5

D23

HDSTBP#2 5

D22

HDSTBN#2 5

C17

HDSTBP#3 5

C16

HDSTBN#3 5

W17
W18
W19
V19
U19
T19
R19

GND

HD#[0..63] 5

V_FSB_VTT V_FSB_ VTT

CB47
C10U10V5Y5V
CB36
C10U10V5Y5V
CB29
X_CD1U25V3Y5V
CB43
C1U16V3Y5VL
CB53
C1U16V3Y5VL

Component Side

VCCP

V_FSB_VTT

2

R96

X_0R

R97

0R

CB125
C10U10V5Y5V-B
CB122
X_CD1U25V3Y5V-B
CB127
C1U16V3Y5VL-B

Solder Side

R99 100R1%

R102 100R1%

R100 100R1%

R92 20.5R1%

Title

Size Document Number Rev

Date: Sheet

MICRO-STAR INt'L CO., LTD.

NORTH BRIDGE

Monday, August 09, 2004

GTLVREF_NB1

R95
169R1%

GTLVREF_NB

R103
169R1%

HCOMPVREF

R101

49.9R1%

MS-7071

1

HRCOMP

831

0A

of

BY PASS CAP

4

VCC_DDR

Y10

Y11

Y12

Y13

Y14

VCC25MEM

VCC25MEM

VCC25MEM

VCC25MEM

GND

GND

GND

GND

AH8

AH5

AH2

Y15

VCC25MEM

VCC25MEM

VCC25MEM

GND

GND

GND

AH11

AH14

AH17

W10

GND

AE14

GND

AE16

GND

AE17

GND

AE20

W20

VCC25MEM

GND

GND

AE28

AE25

AE23

AD28
AE27
AF27
AG28
AD27
AE29
AG27
AG29
AH29

AJ29

AG25

AJ25

AJ28
AH27
AH26

AJ26

AJ24
AG24

AJ22
AG21
AH24
AG23
AG22

AJ21
AH21

AJ20
AG18
AH18
AG20
AH19

AJ18
AG17

AJ12
AG12

AJ10
AH12

AJ11
AG10

AH9
AG8

AH6
AG9

AG5
AH4

AH1
AG4
AF4
AG3

AG1
AF2
AD3
AD1
AG2
AF3
AE1
AD2

AF21
AF23
AE22
AF24
AF22
AE24

AF29
AG26
AH22
AG19
AH10

AG6
AF1

AJ9

AJ7
AJ6

AJ8
AJ5
AJ4

AJ2

AJ1

AJ3

U6B

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

CKEA0
CKEA1
CKEA2
CKEA3
CKEA4
CKEA5

DQM0
DQM1
DQM2
DQM3
DQM4
DQM5
DQM6
DQM7

P4M800

AE2

GND

GND

GND

AE8

AE11

4

-DQM0

-DQM1

-DQM2

-DQM3

-DQM4

-DQM5

-DQM6

-DQM7

MD0
MD1
MD2
MD3
MD4
MD5
MD6
MD7
MD8
MD9
MD10
MD11
MD12
MD13
MD14
MD15
MD16
MD17
MD18
MD19
MD20
MD21
MD22
MD23
MD24
MD25
MD26
MD27
MD28
MD29
MD30
MD31
MD32
MD33
MD34
MD35
MD36
MD37
MD38
MD39
MD40
MD41
MD42
MD43
MD44
MD45
MD46
MD47
MD48
MD49
MD50
MD51
MD52
MD53
MD54
MD55
MD56
MD57
MD58
MD59
MD60
MD61
MD62
MD63

CKEA0
CKEA1
CKEA2
CKEA3

D D

C C

B B

A A

MD[0:63]12,13

CKEA012,13
CKEA112,13
CKEA212,13
CKEA312,13

-DQM[0:7]12,13

Y16

Y17

Y18

Y19

VCC25MEM

VCC25MEM

VCC25MEM

GND

GND

GND

AH20

AH23

AH25

AH28

3

Y20

V20

V10

VCC25MEM

VCC25MEM

VCC25MEM

VCC25MEM

GND

GND

GND

GND

N17

AF5

M17

3

P17

2

VCC_DDR

R118

MAA0

AF13

MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8

MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
MAA15

MAB0

MAB1

MAB2

MAB3

MAB4

MAB5

MAB6

MAB7

MAB8

MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
MAB15

SRASA
SRASB

SCASA
SCASB

SWEA
SWEB

CS0
CS1
CS2
CS3
CS4
CS5

DQS0

DQS1

DQS2

DQS3

DQS4

DQS5

DQS6

DQS7

MCLKIA

MCLKO-

MCLKO+

MEMVREF1
MEMVREF2
MEMVREF3
MEMVREF4

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

GND

GND

GND

GND

T17

V17

R17

U17

GND

GND

GND

GND

GND

GND

GND

W16

W15

W14

W13

W12

AD15
AJ15
AJ16
AJ17
AF16
AG15
AE18
AF17
AE19
AJ14
AF12
AJ13
AF20
AE21
AD7

AF14
AD14
AF15
AH15
AG16
AE15
AH16
AF18
AD18
AF19
AG14
AG13
AH13
AD20
AD21
AE7

AE12
AE13

AF9
AF10

AF11
AD12

AD9
AF8
AG7
AF7
AE9
AE10

AF28
AJ27
AJ23
AJ19
AG11
AH7
AH3
AE3

AD26
AE26
AF26

AD23
AD17
AD11
AD8

M16
N16
P16
R16
T16
U16
V16
M15
N15
P15
R15
T15
U15
V15

-CS0

-CS1

-CS2

-CS3

-DQS0

-DQS1

-DQS2

-DQS3

-DQS4

-DQS5

-DQS6

-DQS7

MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
MAA14
MAA15

MAB0
MAB1
MAB2
MAB3
MAB4
MAB5
MAB6
MAB7
MAB8

MAB9
MAB10
MAB11
MAB12
MAB13
MAB14
MAB15

MAA[0:15] 12,13

MAB[0:15] 12,13

-SRASA 12,13

-SRASB 12,13

-SCASA 12,13

-SCASB 12,13

-SWEA 12,13

-SWEB 12,13

-CS0 12,13

-CS1 12,13

-CS2 12,13

-CS3 12,13

-DQS[0:7] 12,13

DCLKI 16

DCLKO+

DCLKO as short as passable
DCLKI = DCLKx + 2 "

MVREF_NB

R128 22R0402

DCLKO 16

2

100R

MVREF_NB

R120
100R

C1000P50V3X7RL-B

VCC_DDR VCC_DDR

MVREF_NB = 0.5* VCCDDR

C256

C251

C1000P50V3X7RL-B

CB63
C10U10V5Y5V
CB34
X_C10U10V5Y5V
CB56
X_C1U16V3Y5VL

Component Side

HEATSINK1

Heatsink

VCLASS_heatsink

Title

Size Document Number Rev

Date: Sheet

MICRO-STAR INt'L CO., LTD.

NORTH BRIDGE

Monday, August 09, 2004

Solder Side

MCH

MS-7071

1

CD01U50V3X7RL-B
C258

CB124
C10U10V5Y5V-B
CB128
C10U10V5Y5V-B
CB131
CD1U25V3Y5V-B
CB121
C1U16V3Y5VL-B
CB133
X_C1U16V3Y5VL-B
CB129
X_C1U16V3Y5VL-B
CB126
C1U16V3Y5VL-B

1

0A

of

931