MSI MS-6736 Schematics
1
Cover Sheet, Block diagram
Power Delivery
GPIO & JUMPER SETTING
1~ 2
3
4
MS-6736 ATX
Intel (R) Springdale (GMCH) + ICH5 Chipset
Version 0A
Intel Northwood & Prescott mPGA478B Processor
CLOCK BLOCK DIAGRAM 5
REVISION HISTORY 1 , 2 , 3
Intel µPGA478B CPU - Signals & Power
Intel Springdale CPU & MERMORY & AGP , LAN
Intel ICH5 - PCI , IDE , AC97 & Other
Clock - Cypress CY28405 & FWH
LPC I/O - W83627HF & KB/MS
COM1, LPT, Floppy & VGA Connectors
AC97 Audio - ALC650 & Interanl SPK 18
6 ~ 7
8 ~ 9
10 ~ 12
13 ~ 14
15
16
17
CPU:
Intel Northwood/Prescott - 3.0G & Above
System Chipset:
Intel Springdale - GMCH (North Bridge)
Intel ICH5 (South Bridge)
On Board Chipset:
BIOS -- FWH 4M
AC'97 Codec -- ALC650
LPC Super I/O -- W83627HF-AW
A A
LAN - Realtek RTL8101L
ATA , SATA , Manual Parts
DDR System Memory 1 , 2 , 3 & 4
19
20
21 ~ 22
LAN - Realtek RTL8101L
1394 -- NEC PD72874
IDE RAID -- PDC20276
CLOCK -- Cypress CY28405
AGP 4X/8X Slot
23
Main Memory:
PCI Slots 1 , 2 , 3 & 4, 5 , MS1
IDE RAID PROMISE & CONNECTOR
ACPI CONTROLLER W83302E
ATX & Front Panel
USB Connectors
1394 - NEC PD72874
VRM 10 - Intersil HIP 6556A + HIP 6602B
PULL UP/ DOWN RESISTORS
24 ~ 25
26 ~ 27
28
29
30
31
32MEMORY , VCC_DAC , VTT Regulator Controller
33
34
DDR * 4 (Max 4GB)
Expansion Slots:
PCI2.3 SLOT * 5
AGP4X/8X SLOT * 1
Intersil PWM:
Controller: HIP6556A
Driver: HIP6602B * 2
Regulators
System : FAN5236
1
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
COVER SHEET
MS-6736
134Wednesday, November 13, 2002
of
0A
1
CLOCK BLOCK DIAGRAM
AGP 1.5V
Connector
P.23
AGP_CLK
CPU_CLK
CPU_CLK#
Intel mPAG478B Processor
P.8~9
2 DDR
DIMM
AC'97 Codec
ALC650
LAN
RTL8101L
P.18
P.19
AC_14
LAN_PCLK
DOT_48
Springdale
P.10~12
MCLK_A[0..5]
MCLK_A#[0..5]
MCLK_B[0..5]
MCLK_B#[0..5]
Modules
A
2 DDR
DIMM
Modules
B
P.21
P.22
MCH_CLK
1394
NEC PD72874
P.31
1394_PCLK
Cypress
Cy28405
A A
LPC SIO
W83627HF
FWH
P.16
P.15
SIO_PCLK
SIO_48M
FWH_PCLK
ICH_14
USB_48
ICH_PCLK
P.15
ICH_66
MCH_CLK#
MCH_66
PCI_CLK0
PCI_CLK1
PCI_CLK2
MS1_PCLK
SATA_100#
SATA_100
MS1
P.25
PCI_CLK4
PCI_CLK5
RAID_PCLK
PCI Slot 1
PCI Slot 2
PCI Slot 3
P.24 P.24 P.24
PCI Slot 4
PCI Slot 5
P.25 P.25
ICH5
P.13~14
RAID
PDC20276
MSI
Title
Size Document Number Rev
1
Date: Sheet
P.26~27
MICRO-STAR INt'L CO., LTD.
CLOCK BLOCK DIAGRAM
MS-6736
234Wednesday, November 13, 2002
0A
of
1
VRM 10
Intersil 6556
4-Phase PWM
P.33
Intel mPAG478B Processor
FSB
P.8~9
Block Diagram
2 DDR
CHANNEL A
AGP 1.5V
4X/8X w/Fast Wr i t e
Connector
P.23
Analog
Video
Out
IDE Primary
IDE Secondary
SERIAL ATA1
A A
SERIAL ATA2
USB2.0
P.17
P.20
P.20
P.20
P.20
UltraDMA
33/66/100
USB
Springdale
ICH5
Link
CHANNEL B
P.10~12
HUB
P.13~14
LPC Bus
USB Port0~ 7
P.30
DIMM
Modules
2 DDR
DIMM
Modules
PCI
P.21
P.22
PCI Slot 1
PCI Slot 2
PCI Slot 3
P.24 P.24 P.24
PCI Slot 4
PCI Slot 5
P.25 P.25
AC'97 Codec
ALC650
LAN
RTL8101L
1394
NEC PD72874
RAID
PDC20276
P.26~27
P.18
P.19
P.31
AC'97 Link
PCI
FWH
P.15
LPC SIO
W83627HF
Keyboard
Mouse
1
P.16
P.16
P.16
Floopy Parallel Serial
P.17 P.17 P.17
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
BLOCK DIAGRAM
MS-6736
234Wednesday, November 13, 2002
of
0A
8
POWER DELIVERY MAP
7
6
5
4
3
2
1
D D
3.3V 5V 5VSB1A12V
ATX 12V POWER Supply
12V POWER
12VP-12V
VRM
VCORE(60A~65A)
Processor Core
Processor Vtt(0.8A)
Processor VID
GMCH Core
GMCH Vtt(1.2A)
GMCH AGP
GMCH HUB & CSA
GMCH Memory 2.5V
2 CHANNEL DDR System Memory 2.5V
2 CHANNEL DDR Vtt 1.25V
2 CHANNEL DDR Vref
Processor Core(2.5mA)
ICH VCC_HI
ICH Core
VCC_2.5V
REG
VTT REG
2A
VTT(1.05~1.55)V
1.5V REG
6.6A
VCC_AGP(4.1A)
VCC_AGP(370mA)
VCC_AGP(180mA)
MEM_2.5V
C C
REG 19.25A
VCC_DDR(4.8A)
VCC_DDR(6A)
VTT_DDR(1.8A)
Voltage
Divider
VCC_AGP(90mA)
VREF(16µA)
VCC2.5_SB
REG
1.25V VREG
VCC_AGP(900mA)
ICH VCC3_SB LAN
VCC3_SB
ICH Resume VCC3_SB(288.6mA)
ICH 3.3V(480mA)
ICH 5V(10uA)
ICH VCC5_SB(10uA)
B B
LPC FWH 3.3V 67mA
LPC Super I/O 3.3V
8 PORT USB & PS2(MS/KB)USB_STR (4A/S0, S1) (40mA/S3, S5)
A A
MSI
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
POWER DELIVERY MAP
MS-6736
2
334Wednesday, November 13, 2002
1
0A
of
1
ICH5
FunctionTypeGPIO Pin
I
GPIO 0
GPIO 1
GPIO 2
GPIO 3
GPIO 4
GPIO 5
GPIO 6
GPIO 7
GPIO 8
GPIO 9
GPIO 10
GPIO 11
GPIO 12
GPIO 13
GPIO 14
GPIO 15
GPIO 16
GPIO 17 O
GPIO 19
GPIO 20
GPIO 21
GPIO 22
OD
GPIO 23 O
GPIO 24
A A
GPIO 25
GPIO 27
GPIO 28
I/O
I/O
I/O
I/O
GPIO 32 I/O
GPIO 33 I/O
GPIO 34 I/O
GPIO 40
GPIO 41
GPIO 48
GPIO 49
PREQ#A (multifuntion pin)
I
PREQ#B (multifuntion pin)
I
PCI_IRQ#E (multifunction pin)
PCI_IRQ#F (multifunction pin)
I
PCI_IRQ#G (multifunction pin)
I
PCI_IRQ#H (multifunction pin)
I
Unused (multifunction pin)
I
Unused (multifunction pin)
I
I
SIO_PME# (multifunction pin)
I
Unused (multifunction pin)
I
Unused (multifunction pin)
I
Unused (multifunction pin)
I
ATADET0 (multifunction pin)
I
ATADET1 (multifunction pin)
Unused (multifunction pin)
I
I
Unused (multifunction pin)
PGNT#A (multifuntion pin)
O
PGNT#B (multifuntion pin)
Unused (multifunction pin)
OGPIO 18
O
Unused (multifunction pin)
O
Unused (multifunction pin)
O
IDE RAID Enable/Disable
Unused (multifunction pin)
Unused (multifunction pin)
Unused (multifunction pin)
Unused (multifunction pin)
Unused (multifunction pin)
Password Clear(Active low)
CLEAR_CMOS# (multifunction pin)
Unused (multifunction pin)
Unused (multifunction pin)
PREQ#4 (multifuntion pin)I
Unused (multifunction pin)
I
PGNT#4 (multifuntion pin)
O
OD
CPU_GD (multifunction pin)
PCI RESET DEVICE
Signals
PCIRST#1
PCIRST#2
PCIRST_ICH5#
HDDRST#
Target
PCI slot 1 , 2 , 3 , 4 , 5 , AGP
SIO , LAN , RAID , 1394 , MS1
Northbridge , FWH , MS5
Primary, Scondary IDE
PCI Config.
DEVICE
MCP1 INT Pin
PIRQG
PIRQH
PCI_REQ#0PCI Slot 1
PCI_GNT#0
IDSEL
AD26
PIRQE
PIRQF
PCI Slot 2
PIRQF
PIRQG
PCI_REQ#4 AD25 PCICLK1
PCI_GNT#4
PIRQH
PIRQE
PCI Slot 3 PCI_REQ#2 AD28
PIRQE
PIRQF
PCI_GNT#2
PIRQG
PIRQH
PCI Slot 4
PIRQC
PCI_REQ#B AD30 MS1PCLK
PIRQD PCI_GNT#B
PIRQF
PIRQE
PCI Slot 5
PIRQD
PIRQF
PCI_REQ#B AD31
PCI_GNT#B
PIRQE
PIRQC
LAN AD27
PIRQE
PCI_REQ#3 LAN_PCLK
PCI_GNT#3
1394
PIRQH
PCI_REQ#1
AD29
PCI_GNT#1
PIRQGRAID AD20PCI_REQ#A
PCI_GNT#A
CLOCKREQ#/GNT#
PCICLK0
PCICLK2
MS1PCLK
1394_PCLK
MS1PCLK
SIO
PIN NAME NOTES
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16 UNUSED
GPIO17 UNUSED
GPIO20
GPIO21
GPIO22
GPIO23
GPIO24
GPIO25 BIOS_P FWH write protection function, acti ve LO W.
GPIO26 UNUSED
GPIO27 OUTPUT
GPIO30 SLP_S3# INPUT S3 state indicator signal
GPIO31
GPIO32 UNUSED
GPIO33
GPIO34
GPIO35
USAGE
MB_ID0
MB_ID1
MB_ID2
MB_ID3
UNUSED
UNUSED
SMBCLK_ISO
SMBDATA_ISO
POWER_LED Default used MS-5
UNUSED
UNUSED
PS_ON# OUTPUT Connector to Power Supply to turn on Power.
UNUSED
UNUSED
UNUSED
Input/Output
INPUT
INPUT
INPUT
INPUT
OUTPUT
INPUTVID5 Low: VID add 0.0125V , High :by p as s
OUTPUT
OUTPUT
OUTPUT
INPUT
INPU T / OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
OUTPUT
1
SMBUS CLOCK
SMBUS DATA
DDR DIMM Config.
DEVICE
DIMM 1
DIMM 2
DIMM 3
DIMM 4
AOH
A2H
A4H
A6H
JUMPER SETTING
JBAT1
JAUD1
BIOS Protect Config.
BIOS Un_Protected
BIOS Protected
MSI
Title
Size Document Number Rev
Date: Sheet
(1-2)NORMAL (2-3)CLEAR
(5-6)
(9-10)
MICRO-STAR INt'L CO., LTD.
General Purpose Spec & JUMPER SETTING
CLOCKADDRESS
MCLK_A0/MCLK_A#0
MCLK_A1/MCLK_A#1
MCLK_A2/MCLK_A#2
MCLK_A3/MCLK_A#3
MCLK_A4/MCLK_A#4
MCLK_A5/MCLK_A#5
MCLK_B0/MCLK_B#0
MCLK_B1/MCLK_B#1
MCLK_B2/MCLK_B#2
MCLK_B3/MCLK_B#3
MCLK_B4/MCLK_B#4
MCLK_B5/MCLK_B#5
W/O
FRONT
AUDIO
1
0
MS-6736
WITH FRONT
AUDIO
434Wednesday, November 13, 2002
0A
of
5
D D
C C
4
3
2
1
B B
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
REVISION HISTORY - 2
MS-6736
634Wednesday, November 13, 2002
1
of
0A
5
D D
C C
4
3
2
1
B B
A A
MSI
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
MICRO-STAR INt'L CO., LTD.
REVISION HISTORY - 3
MS-6736
734Wednesday, November 13, 2002
1
of
0A
8
7
6
5
4
3
2
1
CPU GTL REFERNCE VOLTAGE BLOCK
R178
200_1%
C145
220p
VTT
VCC_SENSE 33
CPU SIGNAL BLOCK
HA#[3..31]10
D D
VID2
VID1
VID3
VID5
VID4
AC26
AE1
AE2
AE3
AE4
AD2
AD3
VID4#
VID3#
VID2#
VID5#
ITP_CLK0
VIDPWRGD
D9#
D8#
D7#
D6#
D5#
D4#
D3#
B25
C24
C23
B24
D22
C21
A25
A23
N22
HA#17
A18#
D33#
M23
HA#16
A17#
D32#
H25
HA#15
A16#
D31#
K23
HA#14
A15#
D30#
J24
HA#13
A14#
D29#
L22
HA#12
A13#
D28#
M21
HA#11
A12#
D27#
H24
HA#10
A11#
D26#
G26
HA#9
A10#
D25#
L21
HA#8
A9#
D24#
D26
HA#7
A8#
D23#
F26
HA#6
A7#
D22#
E25
HA#5
A6#
D21#
F24
HA#4
A5#
D20#
F23
HA#3
A4#
D19#
G23
A3#
D18#
E24
D17#
H22
AE25A5A4
DBR#
D16#
D15#
D14#
D25
J21
D23
VCC_SENSE
D13#
C26
VSS_SENSE
D12#
H21
AD26
D11#
G22
ITP_CLK1
D10#
HA#29
HA#24
HA#25
HA#23
HA#26
HA#30
HA#31
HA#28
HA#27
CPU1A
HDBI#[0..3]10
FERR#14,34
STPCLK#14
HINIT#14,15
HDBSY#10
HDRDY#10
HTRDY#10
HADS#10
C C
10:10:10<8"
5:7<10"
5:7<17"
B B
5:13<12"
5:13<10"
HLOCK#10
HBNR#10
HIT#10
HITM#10
HBPRI#10
HDEFER#10
ITP_TDI34
ITP_TDO34
ITP_TMS34
ITP_TRST#34
ITP_TCK34
THERMDA_CPU16
THERMDC_CPU16
TRMTRIP#14,34
PROCHOT#10
IGNNE#14
SMI#14
A20M#14
SLP#14
BOOT32
BSEL010,15
BSEL110,15
CPU_GD14,34
CPURST#10,34
HD#[0..63]10
HDBI#0
HDBI#1
HDBI#2
HDBI#3
5:5<17"
ITP_TDI
ITP_TDO
ITP_TMS
ITP_TRST#
ITP_TCK
PROCHOT#
BOOT
R188 X_0
CPU_GD
CPURST#
HD#63
HD#62
HD#61
HD#60
HD#59
HD#58
HD#57
HD#56
HD#55
HD#54
E21
DBI0#
G25
DBI1#
P26
DBI2#
V21
DBI3#
AC3
IERR#
V6
MCERR#
B6
FERR#
Y4
STPCLK#
AA3
BINIT#
W5
INIT#
AB2
RSP#
H5
DBSY#
H2
DRDY#
J6
TRDY#
G1
ADS#
G4
LOCK#
G2
BNR#
F3
HIT#
E3
HITM#
D2
BPRI#
E2
DEFER#
C1
TDI
D5
TDO
F7
TMS
E6
TRST#
D4
TCK
B3
THERMDA
C4
THERMDC
A2
THERMTRIP#
AF26
GND/SKTOCC#
C3
PROCHOT#
B2
IGNNE#
B5
SMI#
C6
A20M#
AB26
SLP#
A22
RESERVED0
A7
RESERVED1
AE21
RESERVED2
AF24
RESERVED3
AF25
RESERVED4
AD1
BOOTSELECT
AE26
OPTIMIZED/COMPAT#
AD6
BSEL0
AD5
BSEL1
AB23
PWRGOOD
AB25
RESET#
AA24
D63#
AA22
D62#
AA25
D61#
Y21
D60#
Y24
D59#
Y23
D58#
W25
D57#
Y26
D56#
W26
D55#
V24
D54#
AB1Y1W2V3U4T5W1R6V2T4U3P6U1T2R3P4P3R2T1N5N4N2M1N1M4M3L2M6L3K1L6K4K2
A35#
A34#
A33#
A32#
A31#
A30#
A29#
A28#
A27#
D53#
D52#
D51#
D50#
D49#
D48#
D47#
D46#
D45#
D44#
D43#
D42#
V22
U21
V25
U23
U24
U26
T23
T22
T25
T26
R24
R25
P24
A26#
D41#
R21
A25#
D40#
N25
A24#
D39#
N26
HA#22
A23#
D38#
M26
HA#21
A22#
D37#
N23
HA#20
A21#
D36#
M24
HA#19
A20#
D35#
P21
HA#18
A19#
D34#
VSS_SENSE 33
VID_GD 15,28
VID[0..5] 16,33
VID0
AE5
VID1#
VID0#
GTLREF3
GTLREF2
GTLREF1
GTLREF0
BPM5#
BPM4#
BPM3#
BPM2#
BPM1#
BPM0#
REQ4#
REQ3#
REQ2#
REQ1#
REQ0#
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI7
TESTHI6
TESTHI5
TESTHI4
TESTHI3
TESTHI2
TESTHI1
TESTHI0
BCLK1#
BCLK0#
RS2#
RS1#
RS0#
AP1#
AP0#
BR0#
COMP1
COMP0
DP3#
DP2#
DP1#
DP0#
ADSTB1#
ADSTB0#
DSTBP3#
DSTBP2#
DSTBP1#
DSTBP0#
DSTBN3#
DSTBN2#
DSTBN1#
DSTBN0#
LINT1/NMI
LINT0/INTR
D2#
D1#
D0#
NORTHWOOD/PRESCOTT
B22
B21
AA21
AA6
F20
F6
AB4
AA5
Y6
AC4
AB5
AC6
H3
J3
J4
K5
J1
AD25
A6
Y3
W4
U6
AB22
AA20
AC23
AC24
AC20
AC21
AA2
AD24
AF23
AF22
F4
G5
F1
V5
AC1
H6
P1
L24
L25
K26
K25
J26
R5
L5
W23
P23
J23
F21
W22
R22
K22
E22
E5
D1
BPM#5
BPM#4
BPM#3
BPM#2
BPM#1
BPM#0
HREQ#4
HREQ#3
HREQ#2
HREQ#1
HREQ#0
TESTHI12
TESTHI11
TESTHI10
TESTHI9
TESTHI8
TESTHI2
TESTHI0
HRS#2
HRS#1
HRS#0
HBR#0
COMP1
COMP0
PLACE CLOSE TO CPU
GTLREF
C160 220p
R191 62
R245 62
R208 62
R213 62
R216 62
R176 62
R207 62
5:7<8"
R509 61.9_1%(S/S)
R211 61.9_1%
12:15<1.5"
GTLREF 10
BPM#5 34
BPM#4 34
BPM#3 34
BPM#2 34
BPM#1 34
BPM#0 34
HREQ#[0..4] 10
C390
0.1u
CPU_CLK# 15
CPU_CLK 15
HRS#[0..2] 10
HBR#0 10,34
5:13<1.5"
HADSTB#1 10
HADSTB#0 10
HDSTBP#3 10
HDSTBP#2 10
HDSTBP#1 10
HDSTBP#0 10
HDSTBN#3 10
HDSTBN#2 10
HDSTBN#1 10
HDSTBN#0 10
NMI 14
INTR 14
3"
GTLREF
0.63*VCC_AVG
VCCP
5:7<1"
SOLDER SIDE
10:7
VCCP
R243
3"
200_1%
C156
R244
0.1u
169_1%
PLACE CLOSE TO CPUPLACE CLOSE TO GMCH
HD#48
HD#46
HD#47
HD#44
HD#45
6
HD#43
HD#42
HD#41
HD#40
HD#39
HD#38
HD#36
HD#37
HD#35
HD#34
HD#32
HD#33
HD#31
HD#30
HD#29
HD#28
HD#51
HD#52
HD#53
HD#50
A A
8
7
HD#49
HD#26
HD#27
HD#24
HD#25
5
HD#22
HD#23
HD#20
HD#21
HD#19
HD#18
HD#17
HD#16
HD#14
HD#15
HD#12
HD#13
HD#11
HD#10
HD#9
HD#8
HD#7
HD#6
4
HD#5
HD#4
HD#3
HD#2
HD#1
HD#0
MSI
Title
Size Document Number Rev
3
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Signals
MS-6736
2
834Wednesday, November 13, 2002
0A
of
1
8
7
6
5
4
3
2
1
CPU VOLTAGE BLOCK
VCC_VID28
C137
D15
VCC
VCC
VSS
VSS
E7E9F10
D17
VCC
VSS
D19D7D9
VCC
VCC
VSS
VSS
F12
4.7u_0805
E10
VCC
VCC
VSS
VSS
F14
F16
E12
E14
VCC
VCC
VSS
VSS
F18F2F22
E16
E18
VCC
VSS
F25F5F8
D D
VCCP
CPU1B
A10
A12
A14
A16
A18
A20A8AA10
AA12
AA14
AA16
AA18
AA8
AB11
AB13
AB15
AB17
AB19
AB7
AB9
AC10
AC12
AC14
AC16
AC18
AC8
AD11
AD13
AD15
AD17
AD19
AD7
AD9
AE10
AE12
AE14
AE16
AE18
AE20
AE6
AE8
AF11
AF13
AF15
AF17
AF19
AF2
AF21
AF5
AF7
AF9
B11
B13
B15
B17
B19B7B9
C10
C12
C14
C16
C18
C20C8D11
D13
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
A11
VSS
A13
VSS
A15
VSS
A17
VSS
A19
VSS
A21
VSS
A24
VSS
A26
VSS
A3
VSS
A9
VSS
AA1
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
C C
B B
AA19
AA23
AA26
AB10
AB12
AB14
AB16
AB18
AB20
AB21
AB24
AC11
AC13
AC15
AC17
AC19
AC2
AC22
AC25
AC5
AC7
AC9
AA4
AA7
AA9
AB3
AB6
AB8
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AD10
AD12
AD14
AD16
AD18
AD21
AD4
AD23
AD8
AE11
AE13
AE15
AE17
AE19
AE22
AE24
AE7
AE9
AF1
AF10
AF12
AF14
AF16
AF18
AF20
AF6
AF8
B10
B12
B14
B16
B18
B23
B20
B26B4B8
C11
C13
C15
C17C2C19
C22
C25C5C7C9D12
D14
D16
D18
D20
D21D3D24D6D8E1E11
E13
E15
E17
E19
E23
E4
E26
E20E8F11
VCC
VCC
VSS
VSS
VCC
VSS
F13
VCC
VSS
G21G6G24
1.2V 150mA
F15
F17
VCC
VCC
VCC
VSS
VSS
VSS
G3H1H23
C140
0.1u
F19
VCC
VSS
F9
VCC
VSS
H26H4J2
VSS
AF4
VCC-VID
VSS
VSS
AF3
J22
VCC-VIDPRG
VSS
VSS
J25J5K21
It must close bulk caps.
It support DC current if 100mA.
VSSA
EC22
22u_1206
L8 10uH_0805_100mA
L7 10uH_0805_100mA
DC voltage drop should
be less than 70mV.
VCCP
CPU_IOPLL
EC12
10u_1206_X5R
AE23
AD20
XX12
XX13
XX14
XX15
XX16
XX17
XX18
XX19
XX20
XX21
XX22
XX23
XX24
XX25
XX26
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
AD22D10
VSSAVSS
Y5
VSS
Y25
VSS
Y22
VSS
Y2
VSS
W6
VSS
W3
VSS
W24
VSS
W21
VSS
V4
VSS
V26
VSS
V23
VSS
V1
VSS
U5
VSS
U25
VSS
U22
VSS
U2
VSS
T6
VSS
T3
VSS
T24
VSS
T21
VSS
R4
VSS
R26
VSS
R23
VSS
R1
VSS
P5
VSS
P25
VSS
P22
VSS
P2
VSS
N6
VSS
N3
VSS
N24
VSS
N21
VSS
M5
VSS
M25
VSS
M22
VSS
M2
VSS
L4
VSS
L26
VSS
L23
VSS
L1
VSS
K6
VSS
K3
VSS
K24
VSS
XX32
HVSS
XX31
HVSS
HVSS
HVSS
HVSS
HVSS
HVSS
XX11
XX27
XX28
XX29
XX30
VCC-IOPLL
VSS
VSS
VCCA
XX1
HVSS
XX2
HVSS
XX3
HVSS
XX4
HVSS
XX5
HVSS
XX6
HVSS
XX7
HVSS
XX8
HVSS
XX9
HVSS
HVSS
XX10
NORTHWOOD/PRESCOTT
CPU DECOUPLING CAPACITORS
VCCP
EC24
10u_1206_X5R
EC27
10u_1206_X5R
EC33
10u_1206_X5R
EC32
10u_1206_X5R
EC29
A A
10u_1206_X5R
EC31
10u_1206_X5R
Place these caps within socket cavity Place these caps within south side of processor
8
VCCP VCCP VCCP VCCP VCCP VCCPVCCP
EC34
10u_1206_X5R
EC26
10u_1206_X5R
EC30
10u_1206_X5R
EC25
10u_1206_X5R
EC23
10u_1206_X5R
EC28
10u_1206_X5R
EC21
10u_1206_X5R
EC20
10u_1206_X5R
EC18
10u_1206_X5R
EC15
10u_1206_X5R
EC14
10u_1206_X5R
EC13
10u_1206_X5R
12pcs 19pcs 9pcs
Place these caps within north side of processor
7
6
EC6
10u_1206_X5R
EC5
10u_1206_X5R
EC11
10u_1206_X5R
EC9
10u_1206_X5R
EC8
10u_1206_X5R
EC7
10u_1206_X5R
5
EC19
10u_1206_X5R
EC4
10u_1206_X5R
EC17
10u_1206_X5R
EC10
10u_1206_X5R
EC16
10u_1206_X5R
EC3
10u_1206_X5R
EC40
10u_1206_X5R
EC44
10u_1206_X5R
EC43
10u_1206_X5R
EC42
10u_1206_X5R
EC41
10u_1206_X5R
+
EC39
10u_1206_X5R
EC38
10u_1206_X5R
EC37
10u_1206_X5R
EC36
10u_1206_X5R
EC2
10u_1206_X5R
4
Solder side
3
+
EC48
X_150u_2.5V(S/S)
EC49
X_150u_2.5V(S/S)
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel mPGA478B - Power
MS-6736
2
934Wednesday, November 13, 2002
1
0A
of
8
HA#3
HA#[3..31]8
D D
C C
HADSTB#08
HADSTB#18
HBR#08,34
HBPRI#8
HBNR#8
HLOCK#8
HADS#8
HREQ#[0..4]8
HIT#8
HITM#8
HDEFER#8
HTRDY#8
HDBSY#8
HDRDY#8
HRS#[0..2]8
B B
MCH_CLK15
MCH_CLK#15
PWR_GD28,32,34
CPURST#8
PCIRST_ICH5#13,28
ICH_SYNC#34
PROCHOT#8,34
R174 2.49K_1%
BSEL0
BSEL1
R165 2K_1%
R164 2K_1%
R173 2.49K_1%
R215 20_1%
10:7<0.5"
HSWING34
12:10<3"
GTLREF8
HA#4
HA#5
HA#6
HA#7
HA#8
HA#9
HA#10
HA#11
HA#12
HA#13
HA#14
HA#15
HA#16
HA#17
HA#18
HA#19
HA#20
HA#21
HA#22
HA#23
HA#24
HA#25
HA#26
HA#27
HA#28
HA#29
HA#30
HA#31
HREQ#0
HREQ#1
HREQ#2
HREQ#3
HREQ#4
HRS#0
HRS#1
HRS#2
SEL0
SEL1
HRCOMP
12:15
C127
0.1u
AE14
D26
D30
E29
B32
K23
C30
C31
B31
E30
B33
F25
D34
C32
F28
C34
G27
F29
E28
H27
K24
E32
F31
G30
G26
B30
D28
B24
B26
B28
E25
F27
B29
C29
K21
E23
D24
E27
G24
G22
C27
B27
AK4
AJ8
E24
C25
F23
VCCA_FSB
VCCA_DPLL
U14A
L23
J25
J24
J27
J26
J23
L22
J21
L21
B7
C7
E8
L20
L13
L12
7
C148 0.1u
HA3#
HA4#
HA5#
HA6#
HA7#
HA8#
HA9#
HA10#
HA11#
HA12#
HA13#
HA14#
HA15#
HA16#
HA17#
HA18#
HA19#
HA20#
HA21#
HA22#
HA23#
HA24#
HA25#
HA26#
HA27#
HA28#
HA29#
HA30#
HA31#
HAD_STB0#
HAD_STB1#
BREQ0#
BPRI#
BNR#
HLOCK#
ADS#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HIT#
HITM#
DEFER#
HTRDY#
DBSY#
DRDY#
RS0#
RS1#
RS2#
HCLKP
HCLKN
PWROK
CPURST#
RSTIN#
ICH_SYNC#
PROCHOT#
BSEL0
BSEL1
HDRCOMP
HDSWING
HDVREF
B3
A31
B4
VCCA_FSB
VCCA_FSB
VCCA_DPLL
VSS
VSS
VSS
C12
C14
C10
C8
J6J7J8J9K6K7K8K9L6L7L9
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
C16
C18
C20
C22
C24
C26
C28D1D11
D9
VCC
VSS
VCC
VSS
D13
VCC
VSS
L10
D15
VCC
VSS
L11
D17
VCC
VSS
6
5
4
3
2
1
VTT
D19
VCC
VSS
D21
VCC
VSS
M10
D23
VCC
VSS
M11M8M9
VCC
VSS
D25
VCC_AGP
N10
VCC
VCC
VSS
VSS
D27
D29
N11N9P10
D31
VCC
VSS
D33
VCC
VSS
P11
D35
VCC
VSS
R11
E1
VCC
VSS
T16
T17
T18
T19
U16
U17
U20
V16
V18
V20
W16
W19
W20
Y16
Y17
Y18
Y19
VCC
VSS
Y20
A3
A33
A35B2B25
B34C1C23
C35
E26
M31
AF13
AF23
AJ12
AN1
AP2
AR3
AR33
AR35
A7A9A11
A13
A16
A20
A23
A25
A27
A29
VSS
VSS
A32
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
K33
K20
K22
K25
K27
K29
R25
VCC
VSS
F26
G28
NCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNCNC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
G31
VSS
G35
VSS
VSS
VSS
H5
H8
VSS
VSS
VSS
H12
H14
H16H2H20
H18
H9
H22
VSS
H24
VSS
H26
VSS
H30
VSS
H33
VSS
NC
VSS
VSS
VSS
VSS
VSS
J10
J12
J14
J16
J18
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J20
J22
J28
J32
J35
K11
K12
K14
K16
K18
T20
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
F3F5F8
E3
F1
F10
VSS
VSS
VSS
VSS
F18
F20
F22
F24
F14
F16
F12
C4
VSS
VSS
L24
D5D6D7E6E7
VSS
VSS
VSS
L25
L26
VTT
VSS
VTT
VSS
L31
C136
4.7u_0805
VTT
VTT
VSS
VSS
M3M6M26
L35
F7
A4A5A6B5B6C5C6
VTT
VTT
VTT
VTT
VTT
VSS
VSS
VSS
VSS
VSS
M27
M28
M30
C132
1u_0805
VTT
VTT
VSS
VSS
M33N1N4
A15
A21
VTT
VTT
VTT_FSB
VTT_FSB
DINV_0#
DINV_1#
DINV_2#
DINV_3#
HD_STBP0#
HD_STBN0#
HD_STBP1#
HD_STBN1#
HD_STBP2#
HD_STBN2#
HD_STBP3#
HD_STBN3#
VSS
Intel Springdale
VTT_FSB1
VTT_FSB2
HD0#
HD1#
HD2#
HD3#
HD4#
HD5#
HD6#
HD7#
HD8#
HD9#
HD10#
HD11#
HD12#
HD13#
HD14#
HD15#
HD16#
HD17#
HD18#
HD19#
HD20#
HD21#
HD22#
HD23#
HD24#
HD25#
HD26#
HD27#
HD28#
HD29#
HD30#
HD31#
HD32#
HD33#
HD34#
HD35#
HD36#
HD37#
HD38#
HD39#
HD40#
HD41#
HD42#
HD43#
HD44#
HD45#
HD46#
HD47#
HD48#
HD49#
HD50#
HD51#
HD52#
HD53#
HD54#
HD55#
HD56#
HD57#
HD58#
HD59#
HD60#
HD61#
HD62#
HD63#
B23
E22
B21
D20
B22
D22
B20
C21
E18
E20
B16
D16
B18
B17
E16
D18
G20
F17
E19
F19
J17
L18
G16
G18
F21
F15
E15
E21
J19
G14
E17
K17
J15
L16
J13
F13
F11
E13
K15
G12
G10
L15
E11
K13
J11
H10
G8
E9
B13
E14
B14
B12
B15
D14
C13
B11
D10
C11
E10
B10
C9
B9
D8
B8
C17
L17
L14
C15
B19
C19
L19
K19
G9
F9
D12
E12
CB73 0.47u
CB76 0.47u
HD#0
HD#1
HD#2
HD#3
HD#4
HD#5
HD#6
HD#7
HD#8
HD#9
HD#10
HD#11
HD#12
HD#13
HD#14
HD#15
HD#16
HD#17
HD#18
HD#19
HD#20
HD#21
HD#22
HD#23
HD#24
HD#25
HD#26
HD#27
HD#28
HD#29
HD#30
HD#31
HD#32
HD#33
HD#34
HD#35
HD#36
HD#37
HD#38
HD#39
HD#40
HD#41
HD#42
HD#43
HD#44
HD#45
HD#46
HD#47
HD#48
HD#49
HD#50
HD#51
HD#52
HD#53
HD#54
HD#55
HD#56
HD#57
HD#58
HD#59
HD#60
HD#61
HD#62
HD#63
HDBI#0
HDBI#1
HDBI#2
HDBI#3
HD#[0..63] 8
HDBI#[0..3] 8
HDSTBP#0 8
HDSTBN#0 8
HDSTBP#1 8
HDSTBN#1 8
HDSTBP#2 8
HDSTBN#2 8
HDSTBP#3 8
HDSTBN#3 8
A A
I=30mA
VCCA_FSB
C126
0.1u
L9 0.82uH_35mA
CT33
22u_1206
VCC_AGP VCC_AGP
I=35mA
VCCA_DPLL DPLL
CLOSE TO PINA31
8
7
6
5
ESR is 0.1mohm to GMCH
+
C131
0.1u
CT35
100u_6.3V_6X
4
L10 100nH_300mA
CLOSE TO PINB3
R180 1_1%
3
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - CPU Signals
MS-6736
2
10 34Wednesday, November 13, 2002
of
1
0A
8
MCS_A#021
MCS_A#121
D D
MCS_A#221
MCS_A#321
MRAS_A#21
MCAS_A#21
MWE_A#21
MA_A[0..12]21
MAB_A[1..5]21
C C
MBA_A021
MBA_A121
MDQM_A[0..7]21
MDQS_A[0..7]21
MCLK_A021
MCLK_A#021
MCLK_A121
B B
MCLK_A#121
MCLK_A221
MCLK_A#221
MCLK_A321
MCLK_A#321
MCLK_A421
MCLK_A#421
MCLK_A521
MCLK_A#521
0.01uC186
0.01uC159
0.01uC179
C150 0.1u
C149 2.2u
12:12<1"
MDQ_A[0..63]21 MCKE_A[0..3] 21
AA34
Y31
Y32
W34
AC33
Y34
AB34
MA_A0
AJ34
MA_A1
AL33
MA_A2
AK29
MA_A3
AN31
MA_A4
AL30
MA_A5
AL26
MA_A6
AL28
MA_A7
AN25
MA_A8
AP26
MA_A9
AP24
MA_A10
AJ33
MA_A11
AN23
MA_A12
AN21
MAB_A1
AL34
MAB_A2
AM34
MAB_A3
AP32
MAB_A4
AP31
MAB_A5
AM26
AE33
AH34
MDQM_A0
AP12
MDQM_A1
AP16
MDQM_A2
AM24
MDQM_A3
AP30
MDQM_A4
AF31
MDQM_A5
W33
MDQM_A6
M34
MDQM_A7
H32
MDQS_A0
AN11
MDQS_A1
AP15
MDQS_A2
AP23
MDQS_A3
AM30
MDQS_A4
AF34
MDQS_A5
V34
MDQS_A6
M32
MDQS_A7
H31
AK32
AK31
AP17
AN17
N33
N34
AK33
AK34
AM16
AL16
P31
P32
XRCOMP
AK9
XCOMPH
AN9
XCOMPL
AL9
XVREF
E34
PLACE CLOSE TO GMCH
CB86 0.47u
CB93 0.22u
CB94 0.1u
8
CB92 0.22u
CB91 0.1u
XRCOMP34
XCOMPH34
XCOMPL34
VCC_DDR_C234
VCC_DDR_C334
XRCOMP
XCOMPH
XCOMPL
A A
U14B
SCS_A0#
SCS_A1#
SCS_A2#
SCS_A3#
SRAS_A#
SCAS_A#
SWE_A#
SMAA_A0
SMAA_A1
SMAA_A2
SMAA_A3
SMAA_A4
SMAA_A5
SMAA_A6
SMAA_A7
SMAA_A8
SMAA_A9
SMAA_A10
SMAA_A11
SMAA_A12
SMAB_A1
SMAB_A2
SMAB_A3
SMAB_A4
SMAB_A5
SBA_A0
SBA_A1
SDM_A0
SDM_A1
SDM_A2
SDM_A3
SDM_A4
SDM_A5
SDM_A6
SDM_A7
SDQS_A0
SDQS_A1
SDQS_A2
SDQS_A3
SDQS_A4
SDQS_A5
SDQS_A6
SDQS_A7
SMDCLK_A0
SMDCLK_A0#
SMDCLK_A1
SMDCLK_A1#
SMDCLK_A2
SMDCLK_A2#
SMDCLK_A3
SMDCLK_A3#
SMDCLK_A4
SMDCLK_A4#
SMDCLK_A5
SMDCLK_A5#
SMXRCOMP
SMXCOMPVOH
SMXCOMPVOL
SMVREF_A
VCC_DDR_C1
VCC_DDR_C2
VCC_DDR_C3
VCC_DDR_C4
VCC_DDR_C5
7
MDQ_A2
AP11
AM12
SDQ_A1
SDQ_A2
VCC_DDR
VCC_DDR
E35
R35
MDQ_A3
MDQ_A4
AN13
AM10
SDQ_A3
VCC_DDR
AA35
AR21
MDQ_A5
MDQ_A6
AL10
AL12
SDQ_A4
SDQ_A5
SDQ_A6
VCC_DDR
VCC_DDR
VCC_DDR
AR15
AL6
MDQ_A7
MDQ_A8
AP13
AP14
SDQ_A7
SDQ_A8
VCC_DDR
VCC_DDR
AM1
AL7
MDQ_A9
MDQ_A10
AM14
SDQ_A9
VCC_DDR
AM2
MDQ_A0
AP10
SDQ_A0
MDQ_A1
VCC_DDR
MDQ_B[0..63]22
7
MDQ_A11
AL18
AP19
SDQ_A10
SDQ_A11
VCC_DDR
VCC_DDR
AN8
AP3
MDQ_A12
MDQ_A13
AL14
AN15
SDQ_A12
SDQ_A13
VCC_DDR
VCC_DDR
AP4
AP5
MDQ_A14
MDQ_A15
AP18
AM18
SDQ_A14
SDQ_A15
VCC_DDR
VCC_DDR
AP6
AP7
6
MDQ_A16
MDQ_A17
AP22
AM22
SDQ_A16
VCC_DDR
AR4
AR5
6
MDQ_A19
MDQ_A18
AL24
AN27
SDQ_A17
SDQ_A18
SDQ_A19
VCC_DDR
VCC_DDR
VCC_DDR
AR7
AR31
MDQ_A21
MDQ_A20
AP21
AL22
SDQ_A20
AJ10
MDQ_B0
MDQ_A22
AP25
SDQ_A21
SDQ_B0
AE15
MDQ_B1
MDQ_A23
AP27
SDQ_A22
SDQ_B1
AL11
MDQ_B2
MDQ_A24
AP28
SDQ_A23
SDQ_B2
AE16
MDQ_B3
MDQ_A25
AP29
SDQ_A24
SDQ_B3
AL8
MDQ_B4
MDQ_A26
AP33
SDQ_A25
SDQ_B4
AF12
MDQ_B5
MDQ_A27
AM33
SDQ_A26
SDQ_B5
AK11
MDQ_B6
MDQ_A28
AM28
SDQ_A27
SDQ_B6
AG12
MDQ_B7
MDQ_A29
AN29
SDQ_A28
SDQ_B7
AE17
MDQ_B8
MDQ_A30
AM31
SDQ_A29
SDQ_B8
AL13
MDQ_B9
MDQ_A31
AN34
SDQ_A30
SDQ_B9
AK17
MDQ_B10
MDQ_A32
AH32
SDQ_A31
SDQ_B10
AL17
MDQ_B11
MDQ_A33
AG34
SDQ_A32
SDQ_B11
AK13
MDQ_B12
MDQ_A34
AF32
SDQ_A33
SDQ_B12
AJ14
MDQ_B13
5
MDQ_A35
AD32
SDQ_A34
SDQ_B13
AJ16
MDQ_B14
5
MDQ_A36
AH31
SDQ_A35
SDQ_B14
AJ18
MDQ_B15
MDQ_A37
AG33
SDQ_A36
SDQ_B15
AE19
MDQ_B16
MDQ_A38
AE34
SDQ_A37
SDQ_B16
AE20
MDQ_B17
MDQ_A39
AD34
SDQ_A38
SDQ_B17
AG23
MDQ_B18
MDQ_A40
AC34
SDQ_A39
SDQ_B18
AK23
MDQ_B19
MDQ_A41
AB31
SDQ_A40
SDQ_B19
AL19
MDQ_B20
MDQ_A42
V32
SDQ_A41
SDQ_B20
AK21
MDQ_B21
MDQ_A43
V31
SDQ_A42
SDQ_B21
AJ24
MDQ_B22
MDQ_A44
AD31
SDQ_A43
SDQ_B22
AE22
MDQ_B23
MDQ_A45
AB32
SDQ_A44
SDQ_B23
AK25
MDQ_B24
MDQ_A46
U34
SDQ_A45
SDQ_B24
AH26
MDQ_B25
MDQ_A47
U33
SDQ_A46
SDQ_B25
AG27
MDQ_B26
MDQ_A48
T34
SDQ_A47
SDQ_B26
AF27
MDQ_B27
MDQ_A49
T32
SDQ_A48
SDQ_B27
AJ26
MDQ_B28
MDQ_A50
K34
SDQ_A49
SDQ_B28
AJ27
MDQ_B29
MDQ_A51
K32
SDQ_A50
SDQ_B29
AD25
MDQ_B30
MDQ_A52
T31
SDQ_A51
SDQ_B30
AF28
MDQ_B31
MDQ_A53
P34
SDQ_A52
SDQ_B31
AE30
MDQ_B32
4
MDQ_A54
L34
SDQ_A53
SDQ_B32
AC27
MDQ_B33
4
MDQ_A55
L33
SDQ_A54
SDQ_B33
AC30
MDQ_B34
MDQ_A56
J33
SDQ_A55
SDQ_B34
Y29
MDQ_B35
MDQ_A57
H34
SDQ_A56
SDQ_B35
AE31
MDQ_B36
MDQ_A58
E33
SDQ_A57
SDQ_B36
AB29
MDQ_B37
MDQ_A59
F33
SDQ_A58
SDQ_B37
AA26
MDQ_B38
MDQ_A60
K31
SDQ_A59
SDQ_B38
AA27
MDQ_B39
MDQ_A61
J34
SDQ_A60
SDQ_B39
AA30
MDQ_B40
MDQ_A62
G34
SDQ_A61
SDQ_A62
SDQ_B40
SDQ_B41
W30
MDQ_B41
MDQ_A63
F34
SDQ_A63
SDQ_B42
U27
T25
MDQ_B43
MDQ_B42
MCKE_A0
AL20
SDQ_B43
AA31
MDQ_B44
MCKE_A1
AN19
SCKE_A0
SCKE_A1
SDQ_B44
SDQ_B45
V29
MDQ_B45
MCKE_A2
MCKE_A3
AM20
AP20
SCKE_A2
SDQ_B46
U25
R27
MDQ_B47
MDQ_B46
SCKE_A3
SDQ_B47
P29
MDQ_B48
AB25
SDQ_B48
R30
MDQ_B49
C173 0.1u
AC26
AC25
VCCA_DDR
VCCA_DDR
SDQ_B49
SDQ_B50
K28
L30
MDQ_B51
MDQ_B50
3
AL35
VCCA_DDR
SDQ_B51
R31
MDQ_B52
3
VCCA_DDR
SDQ_B52
R26
MDQ_B53
AN4
VCC_DDR
SDQ_B53
SDQ_B54
P25
MDQ_B54
AM3
AN5
VCC_DDR
VCC_DDR
SDQ_B55
SDQ_B56
L32
K30
MDQ_B56
MDQ_B55
AM5
AM6
VCC_DDR
VCC_DDR
SDQ_B57
SDQ_B58
H29
F32
MDQ_B58
MDQ_B57
2
AM7
AM8
VCC_DDR
SDQ_B59
G33
N25
MDQ_B60
MDQ_B59
VCCA_DDR
VCC_DDR
AN2
AN6
VCC_DDR
VCC_DDR
VCC_DDR
SDQ_B60
SDQ_B61
SDQ_B62
M25
J29
MDQ_B62
MDQ_B61
MDQ_B63
AN7
VCC_DDR
SDQ_B63
G32
N35
N32
VSS
VSS
SCKE_B0
SCKE_B1
AK19
AF19
MCKE_B2
MCKE_B0
MCKE_B1
CLOSE TO NB
C133
0.1u
P3P6P8
Its current is 5.1A.
SCS_B0#
VSS
VSS
VSS
SCS_B1#
SCS_B2#
SCS_B3#
SRAS_B#
SCAS_B#
SWE_B#
SMAA_B0
SMAA_B1
SMAA_B2
SMAA_B3
SMAA_B4
SMAA_B5
SMAA_B6
SMAA_B7
SMAA_B8
SMAA_B9
SMAA_B10
SMAA_B11
SMAA_B12
SMAB_B1
SMAB_B2
SMAB_B3
SMAB_B4
SMAB_B5
SBA_B0
SBA_B1
SDM_B0
SDM_B1
SDM_B2
SDM_B3
SDM_B4
SDM_B5
SDM_B6
SDM_B7
SDQS_B0
SDQS_B1
SDQS_B2
SDQS_B3
SDQS_B4
SDQS_B5
SDQS_B6
SDQS_B7
SCMDCLK_B0
SCMDCLK_B0#
SCMDCLK_B1
SCMDCLK_B1#
SCMDCLK_B2
SCMDCLK_B2#
SCMDCLK_B3
SCMDCLK_B3#
SCMDCLK_B4
SCMDCLK_B4#
SCMDCLK_B5
SCMDCLK_B5#
SMYRCOMP
SMYCOMPVOH
SMYCOMPVOL
SMVREF_B
SCKE_B2
SCKE_B3
Intel Springdale
AG19
AE18
MCKE_B3
L12 1uH-1A_1206
+
C130
100u_6.3V_6X
U26
T29
V25
W25
W26
W31
W27
MA_B0
AG31
MA_B1
AJ31
MA_B2
AD27
MA_B3
AE24
MA_B4
AK27
MA_B5
AG25
MA_B6
AL25
MA_B7
AF21
MA_B8
AL23
MA_B9
AJ22
MA_B10
AF29
MA_B11
AL21
MA_B12
AJ20
MAB_B1
AE27
MAB_B2
AD26
MAB_B3
AL29
MAB_B4
AL27
MAB_B5
AE23
Y25
AA25
MDQM_B0
AG11
MDQM_B1
AG15
MDQM_B2
AE21
MDQM_B3
AJ28
MDQM_B4
AC31
MDQM_B5
U31
MDQM_B6
M29
MDQM_B7
J31
MDQS_B0
AF15
MDQS_B1
AG13
MDQS_B2
AG21
MDQS_B3
AH27
MDQS_B4
AD29
MDQS_B5
U30
MDQS_B6
L27
MDQS_B7
J30
AG29
AG30
AF17
AG17
N27
N26
AJ30
AH29
AK15
AL15
N31
N30
YRCOMP
AA33
YCOMPH
R34
YCOMPL
R33
YVREF
AP9
C153 0.1u
PLACE CLOSE TO GMCH
YRCOMP
YCOMPH
YCOMPL
YVREF
MCKE_B[0..3] 22
MSI
Title
Size Document Number Rev
Date: Sheet
MICRO-STAR INt'L CO., LTD.
Intel Springdale - Memory Signals
MS-6736
2
1
VCC_AGP
MCS_B#0 22
MCS_B#1 22
MCS_B#2 22
MCS_B#3 22
MRAS_B# 22
MCAS_B# 22
MWE_B# 22
MA_B[0..12] 22
MAB_B[1..5] 22
MBA_B0 22
MBA_B1 22
MDQM_B[0..7] 22
MDQS_B[0..7] 22
MCLK_B0 22
MCLK_B#0 22
MCLK_B1 22
MCLK_B#1 22
MCLK_B2 22
MCLK_B#2 22
MCLK_B3 22
MCLK_B#3 22
MCLK_B4 22
MCLK_B#4 22
MCLK_B5 22
MCLK_B#5 22
0.01uC170
0.01uC157
0.01uC161
YRCOMP 34
YCOMPH 34
YCOMPL 34
YVREF 34
11 34Wednesday, November 13, 2002
1
0A
of
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