MSI MS-16521 Schematics rev.0A
5
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MS-1652 Ver : 0.A
D D
Switch
Switch
21
Switch
LVDS Transmitter
Switch
21
LVDS
CRT
C C
HDMI
23
22
22
MXM II
19,20
21
21
MXM_RST#
MXM_PRESENT#
PCI EXPRESS 0
MXM_PWR_EN
MXM_RUNPWROK
Processor
AMD Griffin S1G2
638 pin uFCPGA 638 socket
5,6,7,8
16 X 16 Bit
HyperTransport Link
nVIDIA
MCP77
11,12,13,14,15,16,17,18
DDR2 400 / 533 / 667/800 MHz
PCI Express
PCI Express
PCI Express
SATA
SATA
SATA
DDR2 Sodimm 0
DDR2 Sodimm 1
RTL8111C
New Card
JMICRO 380
HDD
ODD
ESATA
9,10
9,10
27
29
Card Reader
SD/MS/MMC/XD/SM
26
IEEE 1394
25
25
25
USB 1.1 / 2.0
B B
Microphone In
Line In
Internal Microphone
Line Out & SPDIF
Audio Codec
Realtek ALC888S
47
Azalia Interface
MDC
USB 0
ESATA &USB
25
25,28
USB Connector
USB 3USB 1,2
USB 4
25 25 28 29 29 28
FingerPrint
USB 5
WLAN
USB 6 USB 7
New CardCamera
BlueTooth
USB 8
TV & 3G
29
Internal SPK
A A
5
Audio AMP
ANPEC2031
Internal Keyboard
LPC
LPC Debug Port
SPI ROM
4
3
KBC
ene KB3925
SPI
Touch Pad
24
Smart Fan
For CPU & System
ICE
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-16521
MS-16521
MS-16521
1
of
1 51Tuesday, December 25, 2007
of
1 51Tuesday, December 25, 2007
of
1 51Tuesday, December 25, 2007
0A
0A
0A
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1
SATA HDD 1A
+3VALW 19pin
+5VALW 21pin
SUS_ON
U28 108PIN
NB_BUF
DIMM_ON
SUS_ON
4
SYSTEM
POWER
LDO
+5VSUS G1 4A
PWR SWITCH
ENABLE
+3VSUS G2 4A
TPS51120RHBR
CPU CORE0
SHDN#
CPU CORE1
NB_SKIP#
NBV_BUF
MAX17009
REFIN
SKIP#
EN
MAX8792
PWR SWITCH
EN1
+1.1VSUS G5 15A
PWR SWITCH
EN2
TPS51124RGER_QFN24-RH
EN/PSV
SC411
+5V_CIR
RUND
AVDD_5V
USB5V_A
RUND
+5VRUN PQ3
CPU_VDD0_RUN
CPU_VDD1_RUN
CPU_VDDNB_RUN
CPU_VDDIO_SUS G4 8A
RUND
+MCP CORE POWER
D D
PWR_SRC
CPU_SVC
C C
PWR_SRC
PWR_SRC
PWR_SRC
CPU_SVD
VCORE_EN
NB_SKIP#
VCORE_EN
ADAPTER&BATTERY
B B
PWR_SRC
PWR_SRC
A A
5
+1.1VRUN_PG
CPU_M_VREF_SUS
MEM_M_VREF_SUS
RUN_ON
RT1973BPS
RUND
+1.1VRUN
SATA ODD 1.9A
MXM 5VRUN 0.5A
VCCFAN1
CRT5V D2
CAMERA_ON
+5V_CAMERA
HDMI5V F1
BT_PWRON#
+5VRUN_BT 0.5A
CPU_VTT_SUS
+1.8VRUN PQ14
+1.1VPLL L3 O.128A
+1.1V_PLL_LEG L17 0.02A
+1.1V_PEA L7 2.063A
+1.1V_PLL L6 0.08A
+1.1VPLL_PE_SS L5 0.01A
+1.1VSPD_B 0.04A
+1.1V_PLL_DISP
+1.1VRUN_DP_VDD L12 0.3A
+1.1V_PLL_SP_VDD L15 0.08A
+1.1V_PLL_SP_SS L16 0.005A
+1.1VSPA_B L14 0.213A
3
OZ711 AVCC L25
OZ711 COREVCC 0.15A
1_5_VCC
APL5912
VLDT_EN
APL5912
+3VSUS_CARD
P2231
RUND
VDD33
+1.8V_IFP 0.11A
+1_5VRUN G6 1.3A
+VLDT G8 1.5A
+3VRUN PQ4
AVDD33 0.1A
AVDD18
EVDD18 0.198A
DVDD15 0.367A
+3.3HDMI_PLL L11 0.06A
RGB_DAC L9
+3.3PLL L2 0.07A
miniPCIE 2A
PCI_VCC
SPEAKER_MUTE#
+3V_SPDIF Q30
+3VRUN_CARD
P2231
Touch Pad
CODEC_3V L36 0.3A
+3.3USB_PLL L13 0.018A
MCP77 +3.3V 1.8A
MXM3V3RUN 1.5A
LVDS_VDDEN_ON
+3V_LCD 1A
+3VRUN
+2.5VRUN PIN3
AME8805
VDDA_EN
+VDDA PIN5
RT9167
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
POWER DELIVERY
POWER DELIVERY
POWER DELIVERY
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
2 51Tuesday, December 25, 2007
2 51Tuesday, December 25, 2007
2 51Tuesday, December 25, 2007
0A
0A
0A
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PWR_SRC
+3VALW/+5VALW
>=150ms
PWRSW#
D D
PWRBT#_SB
SUS_ON
+3V/+5VSUS
delay time<10ms
BUF_25M
+1.1VSUSPWROK
SUS_PWROK
(+3VSUS,+5VSUS,+1.1VSUS)
delay 68ms by RC
S5#deassert after PWRGD_SB<15ms
PM_SLP_S5#
EC deglitch PM_SLP_S5#
DIMM_ON
C C
VTT_VDDIO_PG
S3#deassert after PWRGD_SB <15ms
PM_SLP_S3#
RUN_ON
RUN_PWR
RUN_PWRGD
( PM_SLP_S3# )
(+3V,+5V+1.8V,+2.5V,+1.1V,+MCP CORE POWER,VDDA )
delay 68ms by RC
40ms<delay time<100ms
spec no delay restriction
CPU_VDD_EN
CPU_CORE
B B
VDD_PWRGD
CPU_VDD0_RUN CPU_VDD1_RUN CPU_VDD1_NB
10ms<delay time<15ms
VLDT_EN
VLDT_PWRGD
delay time<70ms
CLK_OUT
CPU_PWRGD
1ms<delay time
HT_STOP
PCI_RST#
11ms<delay time<138ms
1ms<delay time<100ms
CPU_RST#
1us<delay time
A A
System State
S3 -> S0G3 -> S5G3
G3 -> S0 POWER UP SEQUENCE
5
4
3
S0
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
POWER SEQUENCE
POWER SEQUENCE
POWER SEQUENCE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
0A
0A
0A
of
3 51Tuesday, December 25, 2007
3 51Tuesday, December 25, 2007
3 51Tuesday, December 25, 2007
1
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1
MXM CONNECT
MINI-PCIE
D D
PEX_REFCLK#
PEX_REFCLK
100MHZ
MXM_REFCLK_N
MXM_REFCLK_P
C C
PEA_REFCLK_P
PEA_REFCLK_N
AMD CPU
S1G2
MB_CLK_H1
MB_CLK_H7
MB_CLK_L7
B B
MEM_MB_CLK1_N
MEM_MB_CLK1_P
L0_CLKOUT_H/L
L0_CLKIN_H/L
MA_CLK_H7
MB_CLK_L1
MEM_MB_CLK0_P
MA_CLK_L7
MEM_MB_CLK0_N
MEM_MA_CLK1_P
MA_CLK_H1
MEM_MA_CLK0_P
MEM_MA_CLK1_N
HT_CPU_NB_CLK_H/L[1:0]
1GHZ
HT_NB_CPU_CLK_H/L[1:0]
MA_CLK_L1
MEM_MA_CLK0_N
HT_MCP_RX_CLK_N/P
HT_MCP_TX_CLK_N/P
CARD WLAN
REFCLK+
CLK_MINI_PCIE1#
CLK_MINI_PCIE1
PEB_REFCLK_P
MCP77
MINI-PCIE
CARD TV & 3G
REFCLK-
PEB_REFCLK_N
REFCLK-
REFCLK+
100MHZ
CLK_MINI_PCIE2#
CLK_MINI_PCIE2
PEC_REFCLK_P
PEC_REFCLK_N
NEW CARD
PIN 19
100MHZ
CLK_NEW_CARD#
CLK_NEW_CARD
PED_REFCLK_P
PIN 18
PED_REFCLK_N
NEW CARD
PIN 19
100MHZ
1394_REFCLK_P
1394_REFCLK_N
PEE_REFCLK_P
PIN 18
PEE_REFCLK_N
RTL8111C
PIN 26
100MHZ
CLK_PCIE_LAN
CLK_PCIE_LAN#
PEF_REFCLK_P
HDA_BITCLK
PCI_CLK1
LPC_CLK0
25MHZ
CRYSTAL
PIN 27
100MHZ
PEF_REFCLK_N
AZ_BITCLK
24MHZ
PCI_CLK1
33MHZ
LPC_CLK0
33MHZ
BIT_CLK
PIN12
LCLK
LCLK
ALC888S
MDC CONN
DEBUG CARD
KBC
INTERNAL CLOCK
GENERATOR
32.768KHZ12.5P_S-2
CK0
CK1#
CK0#
CK0
CK1
5
CK1#
CK0#
XTALIN
25MHZ
CRYSTAL
(P16)
4
XTALOUT
XTALIN_RTC
XTALOUT_RTC
32.768KHZ
CRYSTAL
(P16)
3
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
CLOCK DIATRIBUTION
CLOCK DIATRIBUTION
CLOCK DIATRIBUTION
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
0A
0A
0A
of
of
of
4 51Tuesday, December 25, 2007
4 51Tuesday, December 25, 2007
4 51Tuesday, December 25, 2007
CK1
FAR SODIMM NEAR SODIMM
A A
5
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4
3
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1
VLDT:1.2VRUN MAX 1.5A
U1A
D D
HT_NB_CPU_CAD_H011
HT_NB_CPU_CAD_L011
HT_NB_CPU_CAD_H111
HT_NB_CPU_CAD_L111
HT_NB_CPU_CAD_H211
HT_NB_CPU_CAD_L211
HT_NB_CPU_CAD_H311
HT_NB_CPU_CAD_L311
HT_NB_CPU_CAD_H411
HT_NB_CPU_CAD_L411
C C
B B
HT_NB_CPU_CAD_H511
HT_NB_CPU_CAD_L511
HT_NB_CPU_CAD_H611
HT_NB_CPU_CAD_L611
HT_NB_CPU_CAD_H711
HT_NB_CPU_CAD_L711
HT_NB_CPU_CAD_H811
HT_NB_CPU_CAD_L811
HT_NB_CPU_CAD_H911
HT_NB_CPU_CAD_L911
HT_NB_CPU_CAD_H1011
HT_NB_CPU_CAD_L1011
HT_NB_CPU_CAD_H1111
HT_NB_CPU_CAD_L1111
HT_NB_CPU_CAD_H1211
HT_NB_CPU_CAD_L1211
HT_NB_CPU_CAD_H1311
HT_NB_CPU_CAD_L1311
HT_NB_CPU_CAD_H1411
HT_NB_CPU_CAD_L1411
HT_NB_CPU_CAD_H1511
HT_NB_CPU_CAD_L1511
HT_NB_CPU_CLK_H011
HT_NB_CPU_CLK_L011
HT_NB_CPU_CLK_H111
HT_NB_CPU_CLK_L111
HT_NB_CPU_CTL_H011
HT_NB_CPU_CTL_L011
HT_NB_CPU_CTL_H111
HT_NB_CPU_CTL_L111
+VLDT
U1A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
HT LINK
HT LINK
L0_CADOUT_H0
L0_CADOUT_H1
L0_CADOUT_H2
L0_CADOUT_H3
L0_CADOUT_H4
L0_CADOUT_H5
L0_CADOUT_H6
L0_CADOUT_H7
L0_CADOUT_H8
L0_CADOUT_H9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
L0_CADOUT_L0
L0_CADOUT_L1
L0_CADOUT_L2
L0_CADOUT_L3
L0_CADOUT_L4
L0_CADOUT_L5
L0_CADOUT_L6
L0_CADOUT_L7
L0_CADOUT_L8
L0_CADOUT_L9
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
+VLDT
* If VLDT is connected only on one side,
one 4.7uF cap should be added to
the island side
HT_CPU_NB_CAD_H0 11
HT_CPU_NB_CAD_L0 11
HT_CPU_NB_CAD_H1 11
HT_CPU_NB_CAD_L1 11
HT_CPU_NB_CAD_H2 11
HT_CPU_NB_CAD_L2 11
HT_CPU_NB_CAD_H3 11
HT_CPU_NB_CAD_L3 11
HT_CPU_NB_CAD_H4 11
HT_CPU_NB_CAD_L4 11
HT_CPU_NB_CAD_H5 11
HT_CPU_NB_CAD_L5 11
HT_CPU_NB_CAD_H6 11
HT_CPU_NB_CAD_L6 11
HT_CPU_NB_CAD_H7 11
HT_CPU_NB_CAD_L7 11
HT_CPU_NB_CAD_H8 11
HT_CPU_NB_CAD_L8 11
HT_CPU_NB_CAD_H9 11
HT_CPU_NB_CAD_L9 11
HT_CPU_NB_CAD_H10 11
HT_CPU_NB_CAD_L10 11
HT_CPU_NB_CAD_H11 11
HT_CPU_NB_CAD_L11 11
HT_CPU_NB_CAD_H12 11
HT_CPU_NB_CAD_L12 11
HT_CPU_NB_CAD_H13 11
HT_CPU_NB_CAD_L13 11
HT_CPU_NB_CAD_H14 11
HT_CPU_NB_CAD_L14 11
HT_CPU_NB_CAD_H15 11
HT_CPU_NB_CAD_L15 11
HT_CPU_NB_CLK_H0 11
HT_CPU_NB_CLK_L0 11
HT_CPU_NB_CLK_H1 11
HT_CPU_NB_CLK_L1 11
HT_CPU_NB_CTL_H0 11
HT_CPU_NB_CTL_L0 11
HT_CPU_NB_CTL_H1 11
HT_CPU_NB_CTL_L1 11
LAYOUT: Place bypass cap on topside of board
+VLDT
AMD check list 4-24~4-27
C335
C335
C334
C334
C4.7u6.3X5
C4.7u6.3X5
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
C262
C262
C4.7u6.3X5
C4.7u6.3X5
C260
C260
C4.7u6.3X5
C4.7u6.3X5
C261
C261
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C333
C322
C322
C333
C180p50N0402
C180p50N0402
C180p50N0402
C180p50N0402
SOCKET_638_PIN
A A
5
SOCKET_638_PIN
BGA638P
BGA638P
N12-6380030-F02
N12-6380030-F02
4
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
S1G2 HT I/F
S1G2 HT I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
3
Date: Sheet
S1G2 HT I/F
Custom
Custom
Custom
MS-16521
MS-16521
MS-16521
2
0A
0A
0A
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5 51Wednesday, December 26, 2007
5 51Wednesday, December 26, 2007
5 51Wednesday, December 26, 2007
1
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B
C
D
E
Processor Memory Interface
U1C
U1C
MEM:DATA
4 4
0.75A
PLACE THEM CLOSE TO
CPU WITHIN 1"
CPU_VDDIO_SUS
MEM_MA0_ODT09,10
MEM_MA0_ODT19,10
MEM_MA0_CS#09,10
MEM_MA0_CS#19,10
MEM_MA_CKE09,10
MEM_MA_CKE19,10
MEM_MA_CLK0_P9
MEM_MA_CLK0_N9
3 3
MEM_MA_CLK1_P9
MEM_MA_CLK1_N9
MEM_MA_ADD[0:15]9,10
MEM_MA_BANK09,10
MEM_MA_BANK19,10
MEM_MA_BANK29,10
MEM_MA_RAS#9,10
MEM_MA_CAS#9,10
MEM_MA_WE#9,10
CPU_VTT_SUS CPU_VTT_SUS
R287 39.2R1%R287 39.2R1%
R286
R286
39.2R1%
39.2R1%
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
M_ZP
M_ZN
AD10
AF10
AE10
AA16
D10
C10
B10
H16
T19
V22
U21
V19
T20
U19
U20
V20
J22
J20
N19
N20
E16
F16
Y16
P19
P20
N21
M20
N22
M19
M22
L20
M24
L21
L19
K22
R21
L22
K20
V24
K24
K19
R20
R23
J21
R19
T22
T24
U1B
U1B
VTT1
MEM:CMD/CTRL/CLK
MEM:CMD/CTRL/CLK
VTT2
VTT3
VTT4
MEMZP
MEMZN
RSVD_M1
MA0_ODT0
MA0_ODT1
MA1_ODT0
MA1_ODT1
MA0_CS_L0
MA0_CS_L1
MA1_CS_L0
MA1_CS_L1
MA_CKE0
MA_CKE1
MA_CLK_H5
MA_CLK_L5
MA_CLK_H1
MA_CLK_L1
MA_CLK_H7
MA_CLK_L7
MA_CLK_H4
MA_CLK_L4
MA_ADD0
MA_ADD1
MA_ADD2
MA_ADD3
MA_ADD4
MA_ADD5
MA_ADD6
MA_ADD7
MA_ADD8
MA_ADD9
MA_ADD10
MA_ADD11
MA_ADD12
MA_ADD13
MA_ADD14
MA_ADD15
MA_BANK0
MA_BANK1
MA_BANK2
MA_RAS_L
MA_CAS_L
MA_WE_L
SOCKET_638_PIN
SOCKET_638_PIN
BGA638P
BGA638P
N12-6380030-F02
N12-6380030-F02
VTT5
VTT6
VTT7
VTT8
VTT9
VTT_SENSE
MEMVREF
RSVD_M2
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS_L0
MB0_CS_L1
MB1_CS_L0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS_L
MB_CAS_L
MB_WE_L
W10
AC10
AB10
AA10
A10
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
P24
N24
P26
N23
N26
L23
N25
L24
M26
K26
T26
L26
L25
W24
J23
J24
R24
U26
J26
U25
U24
U23
SNS_+0.9VTT
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
CPU_VTT_SUS
C674 X_C1000p50X0402C674 X_C1000p50X0402
MEM_MB_BANK0 9,10
MEM_MB_BANK1 9,10
MEM_MB_BANK2 9,10
MEM_MB_RAS# 9,10
MEM_MB_CAS# 9,10
MEM_MB_WE# 9,10
CPU_M_VREF_SUS
MEM_MB0_ODT0 9,10
MEM_MB0_ODT1 9,10
MEM_MB0_CS#0 9,10
MEM_MB0_CS#1 9,10
MEM_MB_CKE0 9,10
MEM_MB_CKE1 9,10
MEM_MB_CLK0_P 9
MEM_MB_CLK0_N 9
MEM_MB_CLK1_P 9
MEM_MB_CLK1_N 9
MEM_MB_ADD[0:15] 9,10
VDD_VREF_SUS_CPU
2 2
CPU_VDDIO_SUS CPU_M_VREF_SUS
R476
R476
2KR1%0402
2KR1%0402
C664
C669
C669
C664
C0.1u10X0402
C0.1u10X0402
R479
R479
2KR1%0402
2KR1%0402
C1000p16X0402
C1000p16X0402
LAYOUT:PLACE CLOSE TO CPU
MEM_MA_CLK1_P9
MEM_MA_CLK1_N9
MEM_MA_CLK0_P9
MEM_MA_CLK0_N9
AMD check list 2-1
MEM_MB_CLK1_P9
MEM_MB_CLK1_N9
MEM_MB_CLK0_P9
MEM_MB_CLK0_N9
C680
C680
C1.5p50N0402-RH-1
C1.5p50N0402-RH-1
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C606
C606
C1.5p50N0402-RH-1
C1.5p50N0402-RH-1
C687
C687
C1.5p50N0402-RH-1
C1.5p50N0402-RH-1
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C601
C601
C1.5p50N0402-RH-1
C1.5p50N0402-RH-1
MEM_MB_DATA[0:63]9
To reverse SODIMM
MEM_MB_DM[0:7]9
MEM_MB_DQS0_P9
MEM_MB_DQS0_N9
MEM_MB_DQS1_P9
MEM_MB_DQS1_N9
MEM_MB_DQS2_P9
MEM_MB_DQS2_N9
MEM_MB_DQS3_P9
MEM_MB_DQS3_N9
MEM_MB_DQS4_P9
MEM_MB_DQS4_N9
MEM_MB_DQS5_P9
MEM_MB_DQS5_N9
MEM_MB_DQS6_P9
MEM_MB_DQS6_N9
MEM_MB_DQS7_P9
MEM_MB_DQS7_N9
socket
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
AA24
AA23
AD24
AE24
AA26
AA25
AD26
AE25
AC22
AD22
AE20
AF20
AF24
AF23
AC20
AD20
AD18
AE18
AC14
AD14
AF19
AC18
AF16
AF15
AF13
AC12
AB11
AE14
AF14
AF11
AD11
AB26
AE22
AC16
AD12
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
C11
A11
A14
B14
G11
E11
D12
A13
A15
A16
A19
A20
C14
D14
C18
D18
D20
A21
D24
C25
B20
C20
B24
C24
E23
E24
G25
G26
C26
D26
G23
G24
Y11
A12
B16
A22
E25
C12
B12
D16
C16
A24
A23
F26
E26
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
SOCKET_638_PIN
SOCKET_638_PIN
BGA638P
BGA638P
N12-6380030-F02
N12-6380030-F02
MEM:DATA
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
J19
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19MEM_MB_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41MEM_MB_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_DATA[0:63] 9
MEM_MA_DM[0:7] 9
MEM_MA_DQS0_P 9
MEM_MA_DQS0_N 9
MEM_MA_DQS1_P 9
MEM_MA_DQS1_N 9
MEM_MA_DQS2_P 9
MEM_MA_DQS2_N 9
MEM_MA_DQS3_P 9
MEM_MA_DQS3_N 9
MEM_MA_DQS4_P 9
MEM_MA_DQS4_N 9
MEM_MA_DQS5_P 9
MEM_MA_DQS5_N 9
MEM_MA_DQS6_P 9
MEM_MA_DQS6_N 9
MEM_MA_DQS7_P 9
MEM_MA_DQS7_N 9
To normal SODIMM
socket
1 1
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
E
0A
0A
6 51Tuesday, January 08, 2008
6 51Tuesday, January 08, 2008
6 51Tuesday, January 08, 2008
0A
of
of
of
A
B
Title
Title
Title
S1G2 DDRII MEM I/F
S1G2 DDRII MEM I/F
S1G2 DDRII MEM I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
C
D
Date: Sheet
5
www.vinafix.vn
maximun
40 ohm
+2.5VRUN
D D
C C
B B
A A
AMD check list 4-22
C587
C587
C4.7u6.3X5
C4.7u6.3X5
CPU_VDDIO_SUS
R283
R283
390R0402
390R0402
CPU_PWRGD11
CPU_LDT_STOP#11
CPU_LDT_RST#11
CPU_LDT_REQ#11
Cap close to
thermal
sensor
CPU_THERMDA
CPU_THERMDC
T_CRIT_CPU#16
L35
L35
21
33n300mA-RH
33n300mA-RH
R282
R282
390R0402
390R0402
VDDA 2.5V ==> Max Current 250mA
C607
C595
C595
C4.7u6.3X5
C4.7u6.3X5
R284
R284
1KR0402
1KR0402
C336
C336
C2200p50X0402
C2200p50X0402
R281
R281
5
C607
C609
C609
C3300p50X0402-RH-1
C3300p50X0402-RH-1
CPU_ALERT
CPU_SIC
CPU_SID
CPU_VDDIO_SUS
246
135
+3VRUN
X_0R0402
X_0R0402
C0.22u6.3X50402
C0.22u6.3X50402
C337
C337
C0.1u10X0402
C0.1u10X0402
CPU_VDDA_2.5_RUN
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
CPU_CLK_P11
0B時,
改為
3900pF , C0603
CPU_CLK_N11
8
RN14
RN14
8P4R-330R0402
8P4R-330R0402
7
U18
U18
1
VDD
2
D+
3
DT_CRIT_A4GND
LM86CIMMXNOPB_MSOP8-RH
LM86CIMMXNOPB_MSOP8-RH
Close to CPU socket
0B時,Test21,Test24 pull down 300 ohm
PWRGD
LDT_STOP#
LDT_RST#
LDT_REQ#
SMBCLK
SMBData
ALERT
4
C249 C4700p25X0402C249C4700p25X0402
C248 C4700p25X0402C248C4700p25X0402
If unused, the ALERT_L pin is left unconnected
Keep trace from resisor to CPU within 0.6"
keep trace from caps to CPU within 1.2"
R244
R244
169R1%0402
169R1%0402
place them to CPU within 1.5"
R475
R475
+VLDT
8
7
6
5
R467 44.2R1%R467 44.2R1%
PWM
R241
R241
0R0402
0R0402
SMB_CPU_CLK 10,23,29
SMB_CPU_DATA 10,23,29
THERMAL_INT# 16,23
CPU_VDD0_RUN_FB_H36
CPU_VDD0_RUN_FB_L36
CPU_VDD1_RUN_FB_H36
CPU_VDD1_RUN_FB_L36
0B時,THERMAL_INT# 是否可以不用接?
4
CPU_VDDA_RUN
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
LDT_RST#
PWRGD
LDT_STOP#
LDT_REQ#
CPU_SIC
CPU_SID
CPU_ALERT
44.2R1%
44.2R1%
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU TEST9 ANALOGIN
3
CPU_HTREF0
CPU_HTREF1
3
U1D
U1D
F8
VDDA1
F9
VDDA2
A9
CLKIN_H
A8
CLKIN_L
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
C6
LDTREQ_L
AF4
SIC
AF5
SID
AE6
ALERT_L
R6
HT_REF0
P6
HT_REF1
F6
VDD0_FB_H
E6
VDD0_FB_L
Y6
VDD1_FB_H
AB6
VDD1_FB_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
AD7
TEST23
H10
TEST18
G9
TEST19
E9
TEST25_H
E8
TEST25_L
AB8
TEST21
AF7
TEST20
AE7
TEST24
AE8
TEST22
AC8
TEST12
AF8
TEST27
C2
TEST9
AA6
TEST6
A3
RSVD1
A5
RSVD2
B3
RSVD3
B5
RSVD4
C1
RSVD5
SOCKET_638_PIN
SOCKET_638_PIN
BGA638P
BGA638P
N12-6380030-F02
N12-6380030-F02
KEY1
KEY2
SVC
SVD
THERMTRIP_L
PROCHOT_L
MEMHOT_L
THERMDC
THERMDA
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
DBREQ_L
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD10
RSVD9
RSVD8
RSVD7
RSVD6
2
CPU_VDDIO_SUS
+1.8VRUN
246
8
RN15
RN15
8P4R-330R0402
8P4R-330R0402
135
2
7
Q46
Q46
B
N-PMBS3904
N-PMBS3904
B
C
C
E
E
VRD_PROCHOT#36
PWM
CPU_VDDIO_SUS
246
8
RN13
RN13
8P4R-2.7KR0402
8P4R-2.7KR0402
135
7
CPU_SVC 36
R242 X_0R0402R242 X_0R0402
CPU_PWRGD Pull up to 1.8VRun
Title
Title
Title
S1G2 CTRL
S1G2 CTRL
S1G2 CTRL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MS-16521
MS-16521
MS-16521
CPU_SVD 36
CPU_PWRGD_SVID_REG 36
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
M11
W18
CPU_SVC_R
A6
CPU_SVD_R
A4
CPU_THERMTRIP#_1.8V
AF6
CPU_PROCHOT#_1.8V
AC7
MEMHOT_SODIMM#_1.8V
AA8
CPU_THERMDC
W7
CPU_THERMDA
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
VDDIO_FB_H
VDDIO_FB_L
CPU_VDDNB_RUN_FB_H 36
CPU_DBREQ#
CPU_TDO
0B時,DBREQ_L pull up 300 ohm for CPU_VDDIO_SUS
CPU_SVC_R
CPU_SVD_R
PWRGD
1
R285 X_0R0402R285 X_0R0402
1
CPU_THERMTRIP# 11
CPU_PROCHOT# 11
CPU_MEMHOT# 9,10
CPU_PROCHOT#_1.8V
PWM
7 51Wednesday, January 16, 2008
7 51Wednesday, January 16, 2008
7 51Wednesday, January 16, 2008
of
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of
0A
0A
0A
5
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D D
C C
B B
18A 18A
CPU_VDD0_RUN
3A
CPU_VDDNB_RUN
CPU_VDDIO_SUS
U1E
U1E
G4
VDD0_1
H2
VDD0_2
J9
VDD0_3
J11
VDD0_4
J13
VDD0_5
J15
VDD0_6
K6
VDD0_7
K10
VDD0_8
K12
VDD0_9
K14
VDD0_10
L4
VDD0_11
L7
VDD0_12
L9
VDD0_13
L11
VDD0_14
L13
VDD0_15
L15
VDD0_16
M2
VDD0_17
M6
VDD0_18
M8
VDD0_19
M10
VDD0_20
N7
VDD0_21
N9
VDD0_22
N11
VDD0_23
K16
VDDNB_1
M16
VDDNB_2
P16
VDDNB_3
T16
VDDNB_4
V16
VDDNB_5
H25
VDDIO1
J17
VDDIO2
K18
VDDIO3
K21
VDDIO4
K23
VDDIO5
K25
VDDIO6
L17
VDDIO7
M18
VDDIO8
M21
VDDIO9
M23
VDDIO10
M25
VDDIO11
N17
VDDIO12
SOCKET_638_PIN
SOCKET_638_PIN
BGA638P
BGA638P
N12-6380030-F02
N12-6380030-F02
VDD1_1
VDD1_2
VDD1_3
VDD1_4
VDD1_5
VDD1_6
VDD1_7
VDD1_8
VDD1_9
VDD1_10
VDD1_11
VDD1_12
VDD1_13
VDD1_14
VDD1_15
VDD1_16
VDD1_17
VDD1_18
VDD1_19
VDD1_20
VDD1_21
VDD1_22
VDD1_23
VDD1_24
VDD1_25
VDD1_26
VDDIO27
VDDIO26
VDDIO25
VDDIO24
VDDIO23
VDDIO22
VDDIO21
VDDIO20
VDDIO19
VDDIO18
VDDIO17
VDDIO16
VDDIO15
VDDIO14
VDDIO13
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
CPU_VDD1_RUN
2A
CPU_VDDIO_SUS
4
U1F
U1F
AA4
AA11
AA13
AA15
AA17
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
SOCKET_638_PIN
SOCKET_638_PIN
BGA638P
BGA638P
N12-6380030-F02
N12-6380030-F02
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
3
2
1
BOTTOMSIDE DECOUPLING
CPU_VDD0_RUN
C625
C625
C626
C634
C634
C22u6.3X50805-RH
C22u6.3X50805-RH
CPU_VDD1_RUN
C640
C640
C22u6.3X50805-RH
C22u6.3X50805-RH
CPU_VDDNB_RUN
C637
C637
C22u6.3X50805-RH
C22u6.3X50805-RH
C626
C22u6.3X50805-RH
C22u6.3X50805-RH
C22u6.3X50805-RH
C22u6.3X50805-RH
C654
C654
C641
C641
C22u6.3X50805-RH
C22u6.3X50805-RH
C22u6.3X50805-RH
C22u6.3X50805-RH
C658
C658
C22u6.3X50805-RH
C22u6.3X50805-RH
C635
C635
C22u6.3X50805-RH
C22u6.3X50805-RH
C655
C655
C22u6.3X50805-RH
C22u6.3X50805-RH
C647
C647
C22u6.3X50805-RH
C22u6.3X50805-RH
C627
C627
C616
C616
C0.22u6.3X50402
C0.22u6.3X50402
C668
C668
C663
C663
C0.22u6.3X50402
C0.22u6.3X50402
C617
C617
C180p50N0402
C180p50N0402
C0.22u6.3X50402
C0.22u6.3X50402
C662
C662
C180p50N0402
C180p50N0402
C10000p16X0402-RH
C10000p16X0402-RH
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU_VDDIO_SUS
C636
C636
C22u6.3X50805-RH
C22u6.3X50805-RH
CPU_VTT_SUS
C301
C301
C291
C291
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C590
C590
C693
C693
C4.7u6.3X5
C4.7u6.3X5
AMD check list 4-6~4-8,4-11
AMD Check list 4-1~4-5
C659
C659
C4.7u6.3X5
C4.7u6.3X5
C0.22u6.3X50402
C0.22u6.3X50402
CPU_VDDIO_SUS
C681
C681
C4.7u6.3X5
C4.7u6.3X5
C651
C651
C615
C615
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C612
C612
C611
C611
C4.7u6.3X5
C4.7u6.3X5
C692
C692
C605
C605
C1000p10X0402
C1000p10X0402
C0.22u6.3X50402
C0.22u6.3X50402
C288
C288
C4.7u6.3X5
C4.7u6.3X5
C676
C676
C309
C309
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C0.22u6.3X50402
C675
C675
C1000p10X0402
C1000p10X0402
C1000p10X0402
C1000p10X0402
C295
C295
C306
C306
C0.22u6.3X50402
C0.22u6.3X50402
C698
C698
C673
C673
C1000p10X0402
C1000p10X0402
C294
C294
C0.22u6.3X50402
C0.22u6.3X50402
C10000p16X0402-RH
C10000p16X0402-RH
C603
C603
C180p50N0402
C180p50N0402
C180p50N0402
C180p50N0402
C300
C300
C304
C304
C180p50N0402
C180p50N0402
C10000p16X0402-RH
C10000p16X0402-RH
C619
C619
C604
C604
C180p50N0402
C180p50N0402
C180p50N0402
C180p50N0402
PROCESSOR POWER AND GROUND
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
S1G2 PWR&GND
S1G2 PWR&GND
S1G2 PWR&GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
0A
0A
8 51Wednesday, December 26, 2007
8 51Wednesday, December 26, 2007
8 51Wednesday, December 26, 2007
0A
of
of
of
5
www.vinafix.vn
DIMM1A
MEM_MA_DATA[0:63]6
D D
C C
B B
+3VRUN
CPU_VDDIO_SUS
A A
C718 C0.1u10X0402C718 C0.1u10X0402
MEMHOT_SODIMM#7,10
MEM_VREF_SUS
R452
R452
1KR1%0402
1KR1%0402
C541
C541
C0.1u10X0402
R453
R453
1KR1%0402
1KR1%0402
C0.1u10X0402
MEM_M_VREF_SUS
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
CPU_VDDIO_SUS
3A
R469 0R0402R469 0R0402
TP30TP30
TP39TP39
MEM_M_VREF_SUS
C542
C542
C1000p50X0402
C1000p50X0402
DIMM1A
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
DIMM-200PS_BLACK-RH-1
DIMM-200PS_BLACK-RH-1
DIMM1B
DIMM1B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND
202
GND
203
203
204
204
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DIMM-200PS_BLACK-RH-1
DIMM-200PS_BLACK-RH-1
LAYOUT: PLACE CLOSE TO DIMMs
5
A10/AP
A16_BA2
CK0#
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
SDA
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
4
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
A14
A15
BA0
BA1
S0#
S1#
CK0
CK1
SA0
SA1
SCL
101
100
99
98
97
94
92
93
91
105
90
89
116
86
84
85
107
106
110
115
30
32
164
166
79
80
113
108
109
198
200
197
195
114
119
10
26
52
67
130
147
170
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
4
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK2
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
MEM_MA_ADD0
102
MEM_MA_ADD[0:15] 6,10
MEM_MA_BANK2 6,10
MEM_MA_BANK0 6,10
MEM_MA_BANK1 6,10
MEM_MA0_CS#0 6,10
MEM_MA0_CS#1 6,10
MEM_MA_CLK0_P 6
MEM_MA_CLK0_N 6
MEM_MA_CLK1_P 6
MEM_MA_CLK1_N 6
MEM_MA_CKE0 6,10
MEM_MA_CKE1 6,10
MEM_MA_CAS# 6,10
MEM_MA_RAS# 6,10
MEM_MA_WE# 6,10
SMB_CLK_M2 16
SMB_DATA_M2 16
MEM_MA0_ODT0 6,10
MEM_MA0_ODT1 6,10
MEM_MA_DM[0:7] 6
MEM_MA_DQS0_P 6
MEM_MA_DQS1_P 6
MEM_MA_DQS2_P 6
MEM_MA_DQS3_P 6
MEM_MA_DQS4_P 6
MEM_MA_DQS5_P 6
MEM_MA_DQS6_P 6
MEM_MA_DQS7_P 6
MEM_MA_DQS0_N 6
MEM_MA_DQS1_N 6
MEM_MA_DQS2_N 6
MEM_MA_DQS3_N 6
MEM_MA_DQS4_N 6
MEM_MA_DQS5_N 6
MEM_MA_DQS6_N 6
MEM_MA_DQS7_N 6
CPU_VDDIO_SUS CPU_VDDIO_SUS
C652
C652
C642
C642
C0.1u10X0402
C0.1u10X0402
C2.2U6.3X5
C2.2U6.3X5
3
C624
C624
C679
C679
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
D38
D38
BAT54S-7-F_SOT23-RH
BAT54S-7-F_SOT23-RH
3
MEM_MB_DATA[0:63]6
C608
C608
C0.1u10X0402
C0.1u10X0402
+3VSUS +3VSUS
SMB_CLK_M2SMB_DATA_M2
Z
D39
D39
X Y
BAT54S-7-F_SOT23-RH
BAT54S-7-F_SOT23-RH
C610
C610
Z
C682
C682
C2.2U6.3X5
C2.2U6.3X5
X Y
MEM_MB_DATA0
MEM_MB_DATA1
MEM_MB_DATA2
MEM_MB_DATA3
MEM_MB_DATA4
MEM_MB_DATA5
MEM_MB_DATA6
MEM_MB_DATA7
MEM_MB_DATA8
MEM_MB_DATA9
MEM_MB_DATA10
MEM_MB_DATA11
MEM_MB_DATA12
MEM_MB_DATA13
MEM_MB_DATA14
MEM_MB_DATA15
MEM_MB_DATA16
MEM_MB_DATA17
MEM_MB_DATA18
MEM_MB_DATA19
MEM_MB_DATA20
MEM_MB_DATA21
MEM_MB_DATA22
MEM_MB_DATA23
MEM_MB_DATA24
MEM_MB_DATA25
MEM_MB_DATA26
MEM_MB_DATA27
MEM_MB_DATA28
MEM_MB_DATA29
MEM_MB_DATA30
MEM_MB_DATA31
MEM_MB_DATA32
MEM_MB_DATA33
MEM_MB_DATA34
MEM_MB_DATA35
MEM_MB_DATA36
MEM_MB_DATA37
MEM_MB_DATA38
MEM_MB_DATA39
MEM_MB_DATA40
MEM_MB_DATA41
MEM_MB_DATA42
MEM_MB_DATA43
MEM_MB_DATA44
MEM_MB_DATA45
MEM_MB_DATA46
MEM_MB_DATA47
MEM_MB_DATA48
MEM_MB_DATA49
MEM_MB_DATA50
MEM_MB_DATA51
MEM_MB_DATA52
MEM_MB_DATA53
MEM_MB_DATA54
MEM_MB_DATA55
MEM_MB_DATA56
MEM_MB_DATA57
MEM_MB_DATA58
MEM_MB_DATA59
MEM_MB_DATA60
MEM_MB_DATA61
MEM_MB_DATA62
MEM_MB_DATA63
C0.1u10X0402
C0.1u10X0402
+3VRUN
MEMHOT_SODIMM#
2
DIMM2A
DIMM2A
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
DIMM-200S_BLACK
DIMM-200S_BLACK
C717 C0.1u10X0402C717 C0.1u10X0402
R468 0R0402R468 0R0402
MEM_M_VREF_SUS
2
CPU_VDDIO_SUS
3A
TP31TP31
TP40TP40
A10/AP
A16_BA2
CK0#
CK1#
CKE0
CKE1
CAS#
RAS#
WE#
ODT0
ODT1
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS#0
DQS#1
DQS#2
DQS#3
DQS#4
DQS#5
DQS#6
DQS#7
1
MEM_MB_ADD0
102
BA0
BA1
S0#
S1#
CK0
CK1
SA0
SA1
SCL
SDA
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A11
A12
A13
A14
A15
112
111
117
96
95
118
81
82
87
103
88
104
199
83
120
50
69
163
201
202
203
204
47
133
183
77
12
48
184
78
71
72
121
122
196
193
MEM_MB_ADD1
101
MEM_MB_ADD2
100
MEM_MB_ADD3
99
MEM_MB_ADD4
98
MEM_MB_ADD5
97
MEM_MB_ADD6
94
MEM_MB_ADD7
92
MEM_MB_ADD8
93
MEM_MB_ADD9
91
MEM_MB_ADD10
105
MEM_MB_ADD11
90
MEM_MB_ADD12
89
MEM_MB_ADD13
116
MEM_MB_ADD14
86
MEM_MB_ADD15
84
MEM_MB_BANK2
85
MEM_MB_BANK0
107
MEM_MB_BANK1
106
110
115
30
32
164
166
79
80
113
108
109
R292 4.7KR0402R292 4.7KR0402
198
200
197
195
114
119
MEM_MB_DM0
10
MEM_MB_DM1
26
MEM_MB_DM2
52
MEM_MB_DM3
67
MEM_MB_DM4
130
MEM_MB_DM5
147
MEM_MB_DM6
170
MEM_MB_DM7
185
13
31
51
70
131
148
169
188
11
29
49
68
129
146
167
186
DIMM2B
DIMM2B
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDDSPD
NC1
NC2
NC3
NC4
NCTEST
1
VREF
GND
GND
203
204
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
8
VSS15
DIMM-200S_BLACK
DIMM-200S_BLACK
Title
Title
Title
DDR2 SODIMMS:A/B CHANNEL
DDR2 SODIMMS:A/B CHANNEL
DDR2 SODIMMS:A/B CHANNEL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
18
VSS16
24
VSS17
41
VSS18
53
VSS19
42
VSS20
54
VSS21
59
VSS22
65
VSS23
60
VSS24
66
VSS25
127
VSS26
139
VSS27
128
VSS28
145
VSS29
165
VSS30
171
VSS31
172
VSS32
177
VSS33
187
VSS34
178
VSS35
190
VSS36
9
VSS37
21
VSS38
33
VSS39
155
VSS40
34
VSS41
132
VSS42
144
VSS43
156
VSS44
168
VSS45
2
VSS46
3
VSS47
15
VSS48
27
VSS49
39
VSS50
149
VSS51
161
VSS52
28
VSS53
40
VSS54
138
VSS55
150
VSS56
162
VSS57
MS-16521
MS-16521
MS-16521
MEM_MB_ADD[0:15] 6,10
MEM_MB_BANK2 6,10
MEM_MB_BANK0 6,10
MEM_MB_BANK1 6,10
MEM_MB0_CS#0 6,10
MEM_MB0_CS#1 6,10
MEM_MB_CLK0_P 6
MEM_MB_CLK0_N 6
MEM_MB_CLK1_P 6
MEM_MB_CLK1_N 6
MEM_MB_CKE0 6,10
MEM_MB_CKE1 6,10
MEM_MB_CAS# 6,10
MEM_MB_RAS# 6,10
MEM_MB_WE# 6,10
+3VRUN
SMB_CLK_M2 16
SMB_DATA_M2 16
MEM_MB0_ODT0 6,10
MEM_MB0_ODT1 6,10
MEM_MB_DM[0:7] 6
MEM_MB_DQS0_P 6
MEM_MB_DQS1_P 6
MEM_MB_DQS2_P 6
MEM_MB_DQS3_P 6
MEM_MB_DQS4_P 6
MEM_MB_DQS5_P 6
MEM_MB_DQS6_P 6
MEM_MB_DQS7_P 6
MEM_MB_DQS0_N 6
MEM_MB_DQS1_N 6
MEM_MB_DQS2_N 6
MEM_MB_DQS3_N 6
MEM_MB_DQS4_N 6
MEM_MB_DQS5_N 6
MEM_MB_DQS6_N 6
MEM_MB_DQS7_N 6
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
1
0A
0A
0A
of
9 51Tuesday, January 08, 2008
of
9 51Tuesday, January 08, 2008
of
9 51Tuesday, January 08, 2008
5
www.vinafix.vn
MEM_MA_ADD[0:15]6,9
RN34
MEM_MA_BANK16,9
MEM_MA_RAS#6,9
D D
MEM_MA_CKE16,9
MEM_MA_BANK06,9
MEM_MA_CAS#6,9
MEM_MA_WE#6,9
MEM_MA0_ODT06,9
MEM_MA0_CS#06,9
C C
MEM_MB_ADD[0:15]6,9
B B
A A
MEM_MA_CKE06,9
MEM_MA_BANK26,9
MEM_MA0_CS#16,9
MEM_MA0_ODT16,9
MEM_MB_BANK16,9
MEM_MB_CKE16,9
MEM_MB_BANK06,9
MEM_MB_CAS#6,9
MEM_MB_WE#6,9
MEM_MB0_CS#06,9
MEM_MB0_ODT06,9
MEM_MB_RAS#6,9
MEM_MB_CKE06,9
MEM_MB_BANK26,9
MEM_MB0_CS#16,9
MEM_MB0_ODT16,9
5
MEM_MA_BANK1
MEM_MA_RAS#
MEM_MA_ADD0
MEM_MA_ADD2
MEM_MA_ADD6
MEM_MA_ADD4
MEM_MA_ADD11
MEM_MA_ADD5
MEM_MA_ADD8
MEM_MA_ADD1
MEM_MA_ADD3
MEM_MA_ADD7
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_CKE1
MEM_MA_ADD10
MEM_MA_BANK0
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA_ADD13
MEM_MA0_ODT0
MEM_MA0_CS#0
MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD9
MEM_MA_ADD12
MEM_MA0_CS#1
MEM_MA0_ODT1
MEM_MB_BANK1
MEM_MB_ADD0
MEM_MB_ADD2
MEM_MB_ADD4
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD11
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD1
MEM_MB_ADD3
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_CKE1
MEM_MB_ADD10
MEM_MB_BANK0
MEM_MB_CAS#
MEM_MB_WE#
MEM_MB_ADD13
MEM_MB0_CS#0
MEM_MB0_ODT0
MEM_MB_RAS#
MEM_MB_CKE0
MEM_MB_BANK2
MEM_MB_ADD9
MEM_MB_ADD12
MEM_MB0_CS#1
MEM_MB0_ODT1
RN34
RN29
RN29
RN31
RN31
RN26
RN26
RN36
RN36
RN38
RN38
RN25
RN25
RN40
RN40
RN33
RN33
RN30
RN30
RN32
RN32
RN28
RN28
RN35
RN35
RN37
RN37
RN27
RN27
RN39
RN39
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
4
CPU_VTT_SUS
CPU_VTT_SUS
4
CPU_VTT_SUS CPU_VDDIO_SUS
C671 C0.1u10X0402C671 C0.1u10X0402
C667 C0.1u10X0402C667 C0.1u10X0402
C661 C0.1u10X0402C661 C0.1u10X0402
C660 C0.1u10X0402C660 C0.1u10X0402
C646 C0.1u10X0402C646 C0.1u10X0402
C645 C0.1u10X0402C645 C0.1u10X0402
C633 C0.1u10X0402C633 C0.1u10X0402
MEMORY VTT
LAYOUT:PLACE BEHIND RPAKS,2 CAPS PER RPAK
ONE CAP TO GND, SECOND CAP TO +1.8V
PLACE 1 10UF CAP ON TOP, 1 ON BUTTON
NEAR RPAKS
C632 C0.1u10X0402C632 C0.1u10X0402
C622 C0.1u10X0402C622 C0.1u10X0402
C630 C0.1u10X0402C630 C0.1u10X0402
C623 C0.1u10X0402C623 C0.1u10X0402
C656 C0.1u10X0402C656 C0.1u10X0402
C644 C0.1u10X0402C644 C0.1u10X0402
C672 C0.1u10X0402C672 C0.1u10X0402
CPU_VTT_SUS
C653
C653
C631
C631
C628
C628
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
CPU_VDDIO_SUSCPU_VTT_SUS
C589
C589
C0.1u10X0402
C0.1u10X0402
C685
C685
C0.1u10X0402
C0.1u10X0402
3
C666
C666
C0.1u10X0402
C0.1u10X0402
3
C621
C621
C0.1u10X0402
C0.1u10X0402
C614
C614
C0.1u10X0402
C0.1u10X0402
CPU_VTT_SUS
C684
C684
C0.1u10X0402
C0.1u10X0402
R433
R433
10KR0402
10KR0402
C643
C643
SMB_CPU_DATA7,23,29
SMB_CPU_CLK7,23,29
C0.1u10X0402
C0.1u10X0402
C683
C683
C657
C657
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
SMBus Address
48h 7-bit
90h 8-bit
R426
R426
R425
R425
10KR0402
10KR0402
10KR0402
10KR0402
2
C629
C629
C638
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
C0.1u10X0402
7
6
5
1
2
SNSR-LM75CIMX-3-RH
SNSR-LM75CIMX-3-RH
C638
U27
U27
A0
A1
A2
SDA
SCL
+3VRUN
C0.1u10X0402
C0.1u10X0402
8
+VS
GND
4
C649
C649
C0.1u10X0402
C0.1u10X0402
C507 C0.1u10X0402C507 C0.1u10X0402
+3VRUN
3
O.S.
D36 S-RB751V-40_SOD323-RHD36 S-RB751V-40_SOD323-RH
R429
R429
10KR0402
10KR0402
R430 0R0402R430 0R0402
R431 X_0R0402R431 X_0R0402
A C
C720
C720
OVERTEMP SENSOR SO-DIMM REGION
Overtemperature Output Assertion Default Setting 80 C
Overtemperature Output Deassertion Default Setting 75 C
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
CPU_MEMHOT# 7,9
MEMHOT_SODIMM# 7,9
EC_MEMHOT_IN# 23
EC_MEMHOT_OUT# 23
R437X_10KR0402 R437X_10KR0402
10 51Wednesday, January 09, 2008
10 51Wednesday, January 09, 2008
10 51Wednesday, January 09, 2008
1
+3VSUS
of
of
of
0A
0A
0A
5
www.vinafix.vn
HT_CPU_NB_CAD_H05
HT_CPU_NB_CAD_L05
HT_CPU_NB_CAD_H15
HT_CPU_NB_CAD_L15
HT_CPU_NB_CAD_H25
D D
C C
HT_CPU_NB_CAD_L25
HT_CPU_NB_CAD_H35
HT_CPU_NB_CAD_L35
HT_CPU_NB_CAD_H45
HT_CPU_NB_CAD_L45
HT_CPU_NB_CAD_H55
HT_CPU_NB_CAD_L55
HT_CPU_NB_CAD_H65
HT_CPU_NB_CAD_L65
HT_CPU_NB_CAD_H75
HT_CPU_NB_CAD_L75
HT_CPU_NB_CAD_H85
HT_CPU_NB_CAD_L85
HT_CPU_NB_CAD_H95
HT_CPU_NB_CAD_L95
HT_CPU_NB_CAD_H105
HT_CPU_NB_CAD_L105
HT_CPU_NB_CAD_H115
HT_CPU_NB_CAD_L115
HT_CPU_NB_CAD_H125
HT_CPU_NB_CAD_L125
HT_CPU_NB_CAD_H135
HT_CPU_NB_CAD_L135
HT_CPU_NB_CAD_H145
HT_CPU_NB_CAD_L145
HT_CPU_NB_CAD_H155
HT_CPU_NB_CAD_L155
4
AF16
AG16
AH16
AJ16
AJ15
AK15
AK16
AL16
AG17
AF17
AL17
AK17
AL18
AK18
AJ19
AK19
AD14
AE14
AF14
AG14
AH14
AJ14
AL13
AK13
AC15
AD15
AD16
AE16
AE17
AD17
AB17
AC17
U4A
U4A
?
?
PBGA836
PBGA836
HT_MCP_RXD0_P
HT_MCP_RXD0_N
HT_MCP_RXD1_P
HT_MCP_RXD1_N
HT_MCP_RXD2_P
HT_MCP_RXD2_N
HT_MCP_RXD3_P
HT_MCP_RXD3_N
HT_MCP_RXD4_P
HT_MCP_RXD4_N
HT_MCP_RXD5_P
HT_MCP_RXD5_N
HT_MCP_RXD6_P
HT_MCP_RXD6_N
HT_MCP_RXD7_P
HT_MCP_RXD7_N
HT_MCP_RXD8_P
HT_MCP_RXD8_N
HT_MCP_RXD9_P
HT_MCP_RXD9_N
HT_MCP_RXD10_P
HT_MCP_RXD10_N
HT_MCP_RXD11_P
HT_MCP_RXD11_N
HT_MCP_RXD12_P
HT_MCP_RXD12_N
HT_MCP_RXD13_P
HT_MCP_RXD13_N
HT_MCP_RXD14_P
HT_MCP_RXD14_N
HT_MCP_RXD15_P
HT_MCP_RXD15_N
SEC 1 OF 8
SEC 1 OF 8
HT
HT
3
HT_MCP_TXD0_P
HT_MCP_TXD0_N
HT_MCP_TXD1_P
HT_MCP_TXD1_N
HT_MCP_TXD2_P
HT_MCP_TXD2_N
HT_MCP_TXD3_P
HT_MCP_TXD3_N
HT_MCP_TXD4_P
HT_MCP_TXD4_N
HT_MCP_TXD5_P
HT_MCP_TXD5_N
HT_MCP_TXD6_P
HT_MCP_TXD6_N
HT_MCP_TXD7_P
HT_MCP_TXD7_N
HT_MCP_TXD8_P
HT_MCP_TXD8_N
HT_MCP_TXD9_P
HT_MCP_TXD9_N
HT_MCP_TXD10_P
HT_MCP_TXD10_N
HT_MCP_TXD11_P
HT_MCP_TXD11_N
HT_MCP_TXD12_P
HT_MCP_TXD12_N
HT_MCP_TXD13_P
HT_MCP_TXD13_N
HT_MCP_TXD14_P
HT_MCP_TXD14_N
HT_MCP_TXD15_P
HT_MCP_TXD15_N
AK27
AJ27
AK26
AL26
AK25
AL25
AL24
AK24
AK22
AL22
AK21
AL21
AH21
AJ21
AL20
AM20
AG27
AH27
AF25
AG25
AH25
AJ25
AE23
AF23
AD21
AE21
AF21
AG21
AC20
AD20
AE19
AF19
2
HT_NB_CPU_CAD_H0 5
HT_NB_CPU_CAD_L0 5
HT_NB_CPU_CAD_H1 5
HT_NB_CPU_CAD_L1 5
HT_NB_CPU_CAD_H2 5
HT_NB_CPU_CAD_L2 5
HT_NB_CPU_CAD_H3 5
HT_NB_CPU_CAD_L3 5
HT_NB_CPU_CAD_H4 5
HT_NB_CPU_CAD_L4 5
HT_NB_CPU_CAD_H5 5
HT_NB_CPU_CAD_L5 5
HT_NB_CPU_CAD_H6 5
HT_NB_CPU_CAD_L6 5
HT_NB_CPU_CAD_H7 5
HT_NB_CPU_CAD_L7 5
HT_NB_CPU_CAD_H8 5
HT_NB_CPU_CAD_L8 5
HT_NB_CPU_CAD_H9 5
HT_NB_CPU_CAD_L9 5
HT_NB_CPU_CAD_H10 5
HT_NB_CPU_CAD_L10 5
HT_NB_CPU_CAD_H11 5
HT_NB_CPU_CAD_L11 5
HT_NB_CPU_CAD_H12 5
HT_NB_CPU_CAD_L12 5
HT_NB_CPU_CAD_H13 5
HT_NB_CPU_CAD_L13 5
HT_NB_CPU_CAD_H14 5
HT_NB_CPU_CAD_L14 5
HT_NB_CPU_CAD_H15 5
HT_NB_CPU_CAD_L15 5
1
HT_CPU_NB_CLK_H05
HT_CPU_NB_CLK_L05
HT_CPU_NB_CLK_H15
HT_CPU_NB_CLK_L15
HT_CPU_NB_CTL_H05
HT_CPU_NB_CTL_L05
HT_CPU_NB_CTL_H15
HT_CPU_NB_CTL_L15
CPU_THERMTRIP#7
0.074A
B B
+3VRUN
0.141A
+1.1VRUN
0.016A
+1.1VPLL
+1.1VRUN
A A
CPU_PROCHOT#7
R434 0R0402R434 0R0402
R465 0R0402R465 0R0402
R464 0R0402R464 0R0402
5
C525
C511
C511
C4.7u6.3X5
C4.7u6.3X5
C594
C594
C10u10Y0805
C10u10Y0805
C584
C584
C4.7u6.3X5
C4.7u6.3X5
R252 150R1%0402R252 150R1%0402 C536
C525
C0.1u10X0402
C0.1u10X0402
C559
C559
C0.1u10X0402
C0.1u10X0402
C567
C567
+3.3PLL
TO PAGE 12
+1.1VPLL
C0.1u10X0402
C0.1u10X0402
C586
C586
C0.1u10X0402
C0.1u10X0402
cap less than 500mil to pin
AJ17
AH17
AL14
AK14
AH19
AG19
AC18
AD18
AC13
AB13
R13
AB15
AB16
AM12
AL12
R251
R251
150R1%0402
150R1%0402
AG28
AJ28
R461
R461
2.37KR1%0402
2.37KR1%0402
4
HT_MCP_RX_CLK0_P
HT_MCP_RX_CLK0_N
HT_MCP_RX_CLK1_P
HT_MCP_RX_CLK1_N
HT_MCP_RXCTL0_P
HT_MCP_RXCTL0_N
HT_MCP_RXCTL1_P
HT_MCP_RXCTL1_N
THERMTRIP#/GPIO_58
PROCHOT#/GPIO_20
+3.3V_DLL_HT
+1.1V_PLL_HT
+1.1V_PLL_CPU
HT_MCP_COMP_VDD
HT_MCP_COMP_GND
CPU_SBVREF
CLK200_TERM_GND
?
?
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL0_P
HT_MCP_TXCTL0_N
HT_MCP_TXCTL1_P
HT_MCP_TXCTL1_N
HT_MCP_REQ#
HT_MCP_STOP#
HT_MCP_RST#
HT_MCP_PWRGD
CLKOUT_200MHZ_P
CLKOUT_200MHZ_N
CLKOUT_25MHZ
+1.1V_HT_D1
+1.1V_HT_D2
+1.1V_HT_D3
+1.1V_HT_A1
+1.1V_HT_A2
+1.1V_HT_A3
+1.1V_HT_A4
3
AK23
AJ23
AG23
AH23
AK20
AJ20
AD19
AC19
AD23
AB20
AC21
AD22
AL28
AM28
AK28
Y15
Y17
Y16
V15
V16
W15
W16
CPU_LDT_REQ#
CPU_LDT_STOP#
CPU_LDT_RST#
CPU_PWRGD
CPU_CLK_P
CPU_CLK_N
C550
C550
C1u6.3X50402-1
C1u6.3X50402-1
C536
C1u6.3X50402-1
C1u6.3X50402-1
HT_NB_CPU_CLK_H0 5
HT_NB_CPU_CLK_L0 5
HT_NB_CPU_CLK_H1 5
HT_NB_CPU_CLK_L1 5
HT_NB_CPU_CTL_H0 5
HT_NB_CPU_CTL_L0 5
HT_NB_CPU_CTL_H1 5
HT_NB_CPU_CTL_L1 5
CPU_LDT_REQ# 7
CPU_LDT_STOP# 7
CPU_LDT_RST# 7
CPU_PWRGD 7
CPU_CLK_P 7
CPU_CLK_N 7
C551
C551
C1u6.3X50402-1
C1u6.3X50402-1
C537
C537
C1u6.3X50402-1
C1u6.3X50402-1
2
C588
C588
C4.7u6.3X5
C4.7u6.3X5
C548
C548
C4.7u6.3X5
C4.7u6.3X5
0.301A
C560
C560
C22u6.3X50805-RH
C22u6.3X50805-RH
C547
C547
C4.7u6.3X5
C4.7u6.3X5
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
+1.1VRUN+1.1VRUN
2.515A
+1.1VRUN
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MCP77-HT LINK0 I/F
MCP77-HT LINK0 I/F
MCP77-HT LINK0 I/F
MS-16521
MS-16521
MS-16521
of
11 51Thursday, January 10, 2008
of
11 51Thursday, January 10, 2008
of
11 51Thursday, January 10, 2008
1
0A
0A
0A
5
www.vinafix.vn
TP25TP25
TP23TP23
TP24TP24
W27
W28
+1.1VPLL_PE_SS
TO page13
R234
R234
X_2.37KR1%0402
X_2.37KR1%0402
F23
G23
F24
F25
D25
D26
C28
D28
C29
C30
D29
D30
F26
F27
F28
F29
H23
H24
H25
H26
H27
H28
K24
K25
K27
K26
K28
K29
K31
K30
H17
U31
U30
U29
U28
M26
M27
U26
U27
N23
N22
U25
U24
N30
N31
R22
U23
P31
P30
T22
V31
P26
P27
U22
V30
U19
R20
R19
P20
V24
J31
J30
L29
L30
PCIE_MCP_RX0P19
PCIE_MCP_RX0N19
PCIE_MCP_RX1P19
PCIE_MCP_RX1N19
PCIE_MCP_RX2P19
PCIE_MCP_RX2N19
PCIE_MCP_RX3P19
PCIE_MCP_RX3N19
+3.3PLL
0.01A
PCIE_MCP_RX4P19
PCIE_MCP_RX4N19
PCIE_MCP_RX5P19
PCIE_MCP_RX5N19
PCIE_MCP_RX6P19
PCIE_MCP_RX6N19
PCIE_MCP_RX7P19
PCIE_MCP_RX7N19
PCIE_MCP_RX8P19
PCIE_MCP_RX8N19
PCIE_MCP_RX9P19
PCIE_MCP_RX9N19
PCIE_MCP_RX10P19
PCIE_MCP_RX10N19
PCIE_MCP_RX11P19
PCIE_MCP_RX11N19
PCIE_MCP_RX12P19
PCIE_MCP_RX12N19
PCIE_MCP_RX13P19
PCIE_MCP_RX13N19
PCIE_MCP_RX14P19
PCIE_MCP_RX14N19
PCIE_MCP_RX15P19
PCIE_MCP_RX15N19
PCIE_WAKE#26,27,28 MXM_REFCLK_P 19
PE0_PRSNT_16#
PCIE_MINI_RXP127
PCIE_MINI_RXN127
SLOT0_CLKREQ#27
PCIE_MINI_RXP227
PCIE_MINI_RXN227
SLOT1_CLKREQ#27
PCIE_NEWCARD_RXP28
PCIE_NEWCARD_RXN28
NEWCARD_CLK_REQ#28
NEWCARD_PRSENT#28
PCIE_1394_RXN25
PCIE_GLAN_RXN26
GLAN_CLK_REQ#26
C519
C519
C4.7u6.3X5
C4.7u6.3X5
R235 0R0402R235 0R0402
R447 0R0402R447 0R0402
R448 0R0402R448 0R0402
R230 0R0402R230 0R0402
C527
C527
C0.1u10X0402
C0.1u10X0402
0.188A
C520
C520
C0.1u10X0402
C0.1u10X0402
FROM PAGE11
C518
C518
C0.1u10X0402
C0.1u10X0402
D D
PE0_PRSNT_16#
C C
B B
A A
R232
R232
X_0R0402
X_0R0402
PE0_PRESENT# 19
+1.1VRUN
0.016A
R231
R231
0R0402
0R0402
MXM_ON# 14
R443 0R0402R443 0R0402
4
U4B
U4B
?
?
PBGA836
PBGA836
PE0_RX0_P
PE0_RX0_N
PE0_RX1_P
PE0_RX1_N
PE0_RX2_P
PE0_RX2_N
PE0_RX3_P
PE0_RX3_N
PE0_RX4_P
PE0_RX4_N
PE0_RX5_P
PE0_RX5_N
PE0_RX6_P
PE0_RX6_N
PE0_RX7_P
PE0_RX7_N
PE0_RX8_P
PE0_RX8_N
PE0_RX9_P
PE0_RX9_N
PE0_RX10_P
PE0_RX10_N
PE0_RX11_P
PE0_RX11_N
PE0_RX12_P
PE0_RX12_N
PE0_RX13_P
PE0_RX13_N
PE0_RX14_P
PE0_RX14_N
PE0_RX15_P
PE0_RX15_N
PE_WAKE#/GPIO_21
PE0_PRSNT_1#
PE0_PRSNT_4#
PE0_PRSNT_8#
PE0_PRSNT_16#
PE1_RX_P
PE1_RX_N
PEB_CLKREQ#
PEB_PRSNT#
PE2_RX_P
PE2_RX_N
PEC_CLKREQ#
PEC_PRSNT#
PE3_RX_P
PE3_RX_N
PED_CLKREQ#
PED_PRSNT#
PE4_RX_P
PE4_RX_N
PEE_CLKREQ#/GPIO_16
PEE_PRSNT#
PE5_RX_P
PE5_RX_N
PEF_CLKREQ#/GPIO_17
PEF_PRSNT#
PE6_RX_P
PE6_RX_N
PEG_CLKREQ#/GPIO_18
PEG_PRSNT#
+1.1V_PLL_PE_SS1
+1.1V_PLL_PE1
NC2/+1.2V_PLL_PE2
NC1/+3.3V_PLL_PE_SS2
PE_CLK_COMP
?
?
SEC 2 OF 8
SEC 2 OF 8
PCIE
PCIE
PE0_TX0_P
PE0_TX0_N
PE0_TX1_P
PE0_TX1_N
PE0_TX2_P
PE0_TX2_N
PE0_TX3_P
PE0_TX3_N
PE0_TX4_P
PE0_TX4_N
PE0_TX5_P
PE0_TX5_N
PE0_TX6_P
PE0_TX6_N
PE0_TX7_P
PE0_TX7_N
PE0_TX8_P
PE0_TX8_N
PE0_TX9_P
PE0_TX9_N
PE0_TX10_P
PE0_TX10_N
PE0_TX11_P
PE0_TX11_N
PE0_TX12_P
PE0_TX12_N
PE0_TX13_P
PE0_TX13_N
PE0_TX14_P
PE0_TX14_N
PE0_TX15_P
PE0_TX15_N
PEA_REFCLK_P
PEA_REFCLK_N
PE1_TX_P
PE1_TX_N
PEB_REFCLK_P
PEB_REFCLK_N
PE2_TX_P
PE2_TX_N
PEC_REFCLK_P
PEC_REFCLK_N
PE3_TX_P
PE3_TX_N
PED_REFCLK_P
PED_REFCLK_N
PE4_TX_P
PE4_TX_N
PEE_REFCLK_P
PEE_REFCLK_N
PE5_TX_P
PE5_TX_N
PEF_REFCLK_P
PEF_REFCLK_N
PE6_TX_P
PE6_TX_N
PEG_REFCLK_P
PEG_REFCLK_N
+1.1V_PED_A1
+1.1V_PED_B1
+1.1V_PED_B2
+1.1V_PED_B3
+1.1V_PED_B4
+1.1V_PEA_A1
+1.1V_PEA_A2
+1.1V_PEA_B1
+1.1V_PEA_B2
+1.1V_PEA_B3
+1.1V_PEA_B4
+1.1V_PEA_B5
+1.1V_PEA_B6
PEX_RST0#
PEX_RST1#
3
D24
C24
A24
B24
B25
C25
B26
C26
C27
D27
A28
B28
A29
B29
A30
B30
B31
B32
C31
C32
D31
D32
E31
E30
F31
F30
G29
G30
H29
H30
H32
H31
R29
R30
PCIE_MINI_TXP1_C
M28
PCIE_MINI_TXN1_C
M29
T32
T31
PCIE_MINI_TXP2_C
M24
PCIE_MINI_TXN2_C
M25
T29
T30
PCIE_NEWCARD_TXP_C
M22
PCIE_NEWCARD_TXN_C
M23
T27
T28
PCIE_1394_TXP_C
M30
PCIE_1394_TXN_C
M31
T25
T26
PCIE_GLAN_TXP_C
P29
PCIE_GLAN_TXN_C
P28
T23
T24
P24
P25
P23
R23
W26
W24
V23
V22
W25
Y29
Y27
Y25
Y24
W23
Y23
W22
Y22
W30
W29
MCP77
MCP77
GFX_TX0P_C
GFX_TX0N_C
GFX_TX1P_C
GFX_TX1N_C
GFX_TX2P_C
GFX_TX2N_C
GFX_TX3P_C
GFX_TX3N_C
GFX_TX4P_C
GFX_TX4N_C
GFX_TX5P_C
GFX_TX5N_C
GFX_TX6P_C
GFX_TX6N_C
GFX_TX7P_C
GFX_TX7N_C
GFX_TX8P_C
GFX_TX8N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX15P_C
GFX_TX15N_C
C543
C543
C0.1u10X0402
C0.1u10X0402
+3VRUN
VCC
VCC
A
A
1
B
B
2
GND
GND
C90 C0.1u10X0402C90 C0.1u10X0402
C94 C0.1u10X0402C94 C0.1u10X0402
C95 C0.1u10X0402C95 C0.1u10X0402
C96 C0.1u10X0402C96 C0.1u10X0402
C98 C0.1u10X0402C98 C0.1u10X0402
C101 C0.1u10X0402C101 C0.1u10X0402
C102 C0.1u10X0402C102 C0.1u10X0402
C105 C0.1u10X0402C105 C0.1u10X0402
C106 C0.1u10X0402C106 C0.1u10X0402
C109 C0.1u10X0402C109 C0.1u10X0402
C110 C0.1u10X0402C110 C0.1u10X0402
C111 C0.1u10X0402C111 C0.1u10X0402
C112 C0.1u10X0402C112 C0.1u10X0402
C114 C0.1u10X0402C114 C0.1u10X0402
C116 C0.1u10X0402C116 C0.1u10X0402
C117 C0.1u10X0402C117 C0.1u10X0402
C118 C0.1u10X0402C118 C0.1u10X0402
C121 C0.1u10X0402C121 C0.1u10X0402
C122 C0.1u10X0402C122 C0.1u10X0402
C123 C0.1u10X0402C123 C0.1u10X0402
C124 C0.1u10X0402C124 C0.1u10X0402
C125 C0.1u10X0402C125 C0.1u10X0402
C126 C0.1u10X0402C126 C0.1u10X0402
C127 C0.1u10X0402C127 C0.1u10X0402
C128 C0.1u10X0402C128 C0.1u10X0402
C129 C0.1u10X0402C129 C0.1u10X0402
C130 C0.1u10X0402C130 C0.1u10X0402
C131 C0.1u10X0402C131 C0.1u10X0402
C132 C0.1u10X0402C132 C0.1u10X0402
C133 C0.1u10X0402C133 C0.1u10X0402
C142 C0.1u10X0402C142 C0.1u10X0402
C148 C0.1u10X0402C148 C0.1u10X0402
C251 C0.1u10X0402C251 C0.1u10X0402
C253 C0.1u10X0402C253 C0.1u10X0402
C705 C0.1u10X0402C705 C0.1u10X0402
C706 C0.1u10X0402C706 C0.1u10X0402
C690 C0.1u10X0402C690 C0.1u10X0402
C689 C0.1u10X0402C689 C0.1u10X0402
C303 C0.1u10X0402C303 C0.1u10X0402
C298 C0.1u10X0402C298 C0.1u10X0402
C424 C0.1u10X0402C424 C0.1u10X0402
C423 C0.1u10X0402C423 C0.1u10X0402
C538
C538
X_C1u6.3X50402-1
X_C1u6.3X50402-1
C544
C544
C0.1u10X0402
C0.1u10X0402
RESET
C620 X_C0.1u10X0402C620 X_C0.1u10X0402
53
U28
U28
4
Y
Y
NC7SZ08M5X_SOT23-5
NC7SZ08M5X_SOT23-5
+1.1VRUN
0.419A
C598
C598
C22u6.3X50805-RH
C22u6.3X50805-RH
C535
C535
C1u6.3X50402-1
C1u6.3X50402-1
R233 0R0402R233 0R0402
R471 0R0402R471 0R0402
R474 0R0402R474 0R0402
R472 0R0402R472 0R0402
2
C546
C546
C4.7u6.3X5
C4.7u6.3X5
MXM_RST#0 19
WLAN_RST# 27
TV_RST# 27
NEWCARD_RST# 28
PCIE_MCP_TX0P 19
PCIE_MCP_TX0N 19
PCIE_MCP_TX1P 19
PCIE_MCP_TX1N 19
PCIE_MCP_TX2P 19
PCIE_MCP_TX2N 19
PCIE_MCP_TX3P 19
PCIE_MCP_TX3N 19
PCIE_MCP_TX4P 19
PCIE_MCP_TX4N 19
PCIE_MCP_TX5P 19
PCIE_MCP_TX5N 19
PCIE_MCP_TX6P 19
PCIE_MCP_TX6N 19
PCIE_MCP_TX7P 19
PCIE_MCP_TX7N 19
PCIE_MCP_TX8P 19
PCIE_MCP_TX8N 19
PCIE_MCP_TX9P 19
PCIE_MCP_TX9N 19
PCIE_MCP_TX10P 19
PCIE_MCP_TX10N 19
PCIE_MCP_TX11P 19
PCIE_MCP_TX11N 19
PCIE_MCP_TX12P 19
PCIE_MCP_TX12N 19
PCIE_MCP_TX13P 19
PCIE_MCP_TX13N 19
PCIE_MCP_TX14P 19
PCIE_MCP_TX14N 19
PCIE_MCP_TX15P 19
PCIE_MCP_TX15N 19
MXM_REFCLK_N 19
PCIE_MINI_TXP1 27
PCIE_MINI_TXN1 27
CLK_MINI_PCIE1 27
CLK_MINI_PCIE1# 27
PCIE_MINI_TXP2 27
PCIE_MINI_TXN2 27
CLK_MINI_PCIE2 27
CLK_MINI_PCIE2# 27
PCIE_NEWCARD_TXP 28
PCIE_NEWCARD_TXN 28
CLK_NEW_CARD 28
CLK_NEW_CARD# 28
PCIE_1394_TXP 25
PCIE_1394_TXN 25
1394_REFCLK_P 25
1394_REFCLK_N 25PCIE_1394_RXP25
PCIE_GLAN_TXP 26
PCIE_GLAN_TXN 26
CLK_PCIE_LAN 26
CLK_PCIE_LAN# 26PCIE_GLAN_RXP26
C533
C533
C22u6.3X50805-RH
C22u6.3X50805-RH
PCIE0:MXM
PCIE1:Wireless LAN
PCIE2:TV or 3G
PCIE3:NEW CARD
PCIE4:1394
PCIE5:RTL8111C
1.281A
+1.1VRUN
C597
C597
C22u6.3X50805-RH
C22u6.3X50805-RH
1
C591
C591
C22u6.3X50805-RH
C22u6.3X50805-RH
5
4
R473 0R0402R473 0R0402
R470 0R0402R470 0R0402
3
CARD_RST# 25
LAN_RST# 26
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
MCP77-PCIE I/F
MCP77-PCIE I/F
MCP77-PCIE I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet of
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
of
12 51Friday, January 11, 2008
12 51Friday, January 11, 2008
12 51Friday, January 11, 2008
0A
0A
0A
5
www.vinafix.vn
RN18 8P4R-10KR0402RN18 8P4R-10KR0402
7
8
5
6
3
4
1
2
R427 10KR0402R427 10KR0402
D D
0.005A
+1.1VSUS
L34 30L1.7A-50_0402-RHL34 30L1.7A-50_0402-RH
+1.1VRUN
0.037A
C C
0.187A
B B
0.011A
+1.1VPLL_PE_SS
+1.8VRUN
0.008A
+3VRUN
+1.1VRUN
0.094A
R459 0R0402R459 0R0402
R458 0R0402R458 0R0402
From page12
R457 0R0402R457 0R0402
BLON_MCP22
LVDS_VDDEN_MCP22
HDMI_CP_MCP21
HDMI_CN_MCP21
HDMI_D0P_MCP21
HDMI_D0N_MCP21
HDMI_D1P_MCP21
HDMI_D1N_MCP21
HDMI_D2P_MCP21
HDMI_D2N_MCP21
C4.7u6.3X5
C4.7u6.3X5
C0.1u10X0402
C0.1u10X0402
C4.7u6.3X5
C4.7u6.3X5
C513
C513
C4.7u6.3X5
C4.7u6.3X5
C582
C582
C579
C579
C575
C575
C524
C524
C0.1u10X0402
C0.1u10X0402
C254 C0.1u10X0402C254 C0.1u10X0402
C255 C0.1u10X0402C255 C0.1u10X0402
C246 C0.1u10X0402C246 C0.1u10X0402
C247 C0.1u10X0402C247 C0.1u10X0402
C252 C0.1u10X0402C252 C0.1u10X0402
C250 C0.1u10X0402C250 C0.1u10X0402
C244 C0.1u10X0402C244 C0.1u10X0402
C245 C0.1u10X0402C245 C0.1u10X0402
HDMI_A_HPD19,21
C580
C580
C0.1u10X0402
C0.1u10X0402
C570
C570
C0.1u10X0402
C0.1u10X0402
C576
C576
C0.1u10X0402
C0.1u10X0402
+3VSUS
R418 10KR0402R418 10KR0402
R419 10KR0402R419 10KR0402
R176 10KR0402R176 10KR0402
R175 49.9R1%0402R175 49.9R1%0402
R196 49.9R1%0402R196 49.9R1%0402
R436 124R1%0402R436 124R1%0402
C203 C0.01u25X0402C203 C0.01u25X0402
HDMI_CEC
TP20TP20
SKIP_1XRUN_UC*
TP21TP21
HDMI_CP_MCP_C
HDMI_CN_MCP_C
HDMI_D0P_MCP_C
HDMI_D0N_MCP_C
HDMI_D1P_MCP_C
HDMI_D1N_MCP_C
HDMI_D2P_MCP_C
HDMI_D2N_MCP_C
R455 22KR0402R455 22KR0402
+1.8V_IFP
0.081A
1KR1%0402
1KR1%0402
+1.1V_PLL_DISP
R240
R240
4
U4C
U4C
?
?
PBGA836
PBGA836
B20
RGMII_RXD0/MII_RXD0
C20
RGMII_RXD1/MII_RXD1
E19
RGMII_RXD2/MII_RXD2
F19
RGMII_RXD3/MII_RXD3
G19
RGMII_RXC/MII_RXCLK
J20
RGMII_RXCTL/MII_RXDV
C19
MII_RXER/GPIO_36
J18
MII_COL/MSMB_DATA
D19
MII_CRS/MSMB_CLK
B18
RGMII/MII_INTR/GPIO35
N13
+1.1V_PLL_MAC_DUAL
B17
MII_COMP_3P3V
C17
MII_COMP_GND
K21
RGB_DAC_RSET
D21
RGB_DAC_VREF
E23
TV_DAC_RSET
H22
TV_DAC_VREF
N15
+1.1V_PLL_DISP
E17
TV_XTALIN
F17
TV_XTALOUT
U11
GPIO_6/FERR/IGPU_GPIO_6#
T11
GPIO_7/NFERR/IGPU_GPIO_7#
AD24
LCD_BKL_CTL
AE25
LCD_BKL_ON
AE27
LCD_PANEL_PWR
AL29
HDMI_TXC_P/ML0_LANE3_P
AM29
HDMI_TXC_N/ML0_LANE3_N
AK29
HDMI_TXD0_P/ML0_LANE2_P
AJ29
HDMI_TXD0_N/ML0_LANE2_N
AM30
HDMI_TXD1_P/ML0_LANE1_P
AL30
HDMI_TXD1_N/ML0_LANE1_N
AK30
HDMI_TXD2_P/ML0_LANE0_P
AJ30
HDMI_TXD2_N/ML0_LANE0_N
AD25
AUX_CH0_P
AC26
AUX_CH0_N
AE26
HPLUG_DET3
AL32
HPLUG_DET2
AC24
+1.8V_IFPA
AC25
+1.8V_IFPB
AC23
+3.3V_IFPAB_HVDD
AC22
+3.3V_HDMI_PLL_HVDD
U20
+1.1V_PLL_DP
AH29
+1.1V_DP_VDD
AK31
HDMI_RSET
AK32
HDMI_VPROBE
C243
C243
X_C0.1u10X0402
X_C0.1u10X0402
SEC 3 OF 8
SEC 3 OF 8
LAN
LAN
DACS
DACS
?
?
FLAT
FLAT
PANEL
PANEL
+3.3V_DUAL_RMGT
+1.1V_DUAL_RMGT
RGMII_TXD0/MII_TXD0
RGMII_TXD1/MII_TXD1
RGMII_TXD2/MII_TXD2
RGMII_TXD3/MII_TXD3
RGMII_TXCLK/MII_TXCLK
RGMII_TXCTL/MII_TXEN
RGMII/MII_MDC
RGMII/MII_MDIO
RGMII/MII_PWRDWN#/GPIO_37
BUF_25MHZ
MII_RESET#
MII_VREF
RGB_DAC_RED
RGB_DAC_GREEN
RGB_DAC_BLUE
RGB_DAC_HSYNC
RGB_DAC_VSYNC
DDC_CLK0
DDC_DATA0
+3.3V_RGB_DAC
+3.3V_TV_DAC
TV_DAC_RED
TV_DAC_GREEN
TV_DAC_BLUE
IFPA_TXC_P
IFPA_TXC_N
IFPA_TXD0_P
IFPA_TXD0_N
IFPA_TXD1_P
IFPA_TXD1_N
IFPA_TXD2_P
IFPA_TXD2_N
IFPA_TXD3_P
IFPA_TXD3_N
IFPB_TXC_P
IFPB_TXC_N
IFPB_TXD4_P
IFPB_TXD4_N
IFPB_TXD5_P
IFPB_TXD5_N
IFPB_TXD6_P
IFPB_TXD6_N
IFPB_TXD7_P
IFPB_TXD7_N
DDC_CLK2
DDC_DATA2
DDC_CLK3
DDC_DATA3
IFPAB_RSET
IFPAB_VPROBE
3
L14
N18
J19
K19
L19
L18
H19
K18
K20
L20
D17
G17
C18
H20
B21
C21
B22
G21
H21
G8
H8
E21
F21
C23
C22
D23
AE30
AE31
AC30
AC29
AC27
AC28
AD30
AD29
AD31
AD32
AJ31
AJ32
AE28
AE29
AF30
AF31
AG30
AG29
AH31
AH30
L21
J22
L22
K22
AB31
AB30
C241
C241
X_C0.1u10X0402
X_C0.1u10X0402
C196
C196
X_C0.1u10X0402
X_C0.1u10X0402
R435 10KR0402R435 10KR0402
R438 10KR0402R438 10KR0402
R420 10KR0402R420 10KR0402
C498
C498
C0.1u10X0402
C0.1u10X0402
LVDS_TXLCLKP_MCP
LVDS_TXLCLKN_MCP
LVDS_TXL0P_MCP
LVDS_TXL0N_MCP
LVDS_TXL1P_MCP
LVDS_TXL1N_MCP
LVDS_TXL2P_MCP
LVDS_TXL2N_MCP
LVDS_TXUCLKP_MCP
LVDS_TXUCLKN_MCP
LVDS_TXU0P_MCP
LVDS_TXU0N_MCP
LVDS_TXU1P_MCP
LVDS_TXU1N_MCP
LVDS_TXU2P_MCP
LVDS_TXU2N_MCP
LVDS_CLK_MCP
LVDS_DATA_MCP
HDMI_CLK_MCP
HDMI_DATA_MCP
R237
R237
X_1KR1%0402
X_1KR1%0402
VGA_R_MCP
VGA_G_MCP
VGA_B_MCP
L33 30L1.7A-50_0402-RHL33 30L1.7A-50_0402-RH
C497
C497
C4.7u6.3X5
C4.7u6.3X5
LVDS_TXLCLKP_MCP 22
LVDS_TXLCLKN_MCP 22
LVDS_TXL0P_MCP 22
LVDS_TXL0N_MCP 22
LVDS_TXL1P_MCP 22
LVDS_TXL1N_MCP 22
LVDS_TXL2P_MCP 22
LVDS_TXL2N_MCP 22
LVDS_TXUCLKP_MCP 22
LVDS_TXUCLKN_MCP 22
LVDS_TXU0P_MCP 22
LVDS_TXU0N_MCP 22
LVDS_TXU1P_MCP 22
LVDS_TXU1N_MCP 22
LVDS_TXU2P_MCP 22
LVDS_TXU2N_MCP 22
LVDS_CLK_MCP 22
LVDS_DATA_MCP 22
HDMI_CLK_MCP 21
HDMI_DATA_MCP 21
VGA_HSYNC_MCP 22
VGA_VSYNC_MCP 22
CRT_CLK_MCP 22
CRT_DATA_MCP 22
C496
C496
C4.7u6.3X5
C4.7u6.3X5
0.204A
0.081A
+3VRUN
2
+3VSUS
+1.1VSUS
0.109A
C204
C204
C205
C205
X_C4.7p50N0402
X_C4.7p50N0402
X_C4.7p50N0402
X_C4.7p50N0402
Close to chipset
C206
C206
1
VGA_R_MCP 22
VGA_G_MCP 22
VGA_B_MCP 22
R179
R178
R178
R179
150R1%0402
150R1%0402
150R1%0402
150R1%0402
R177
R177
150R1%0402
150R1%0402
X_C4.7p50N0402
X_C4.7p50N0402
HDCP ROM
+3VSUS
C214
C214
X_C0.1u10X0402
R211
R211
X_10KR0402
SUS_SMBCLK16,19,27,28
A A
SUS_SMBDATA16,19,27,28
SUS_SMBCLK
SUS_SMBDATA
5
X_10KR0402
R210
R210
X_10KR0402
X_10KR0402
U14
U14
6
SCL
VCC
NC4
5
SDA
3
NC3
GND
2
NC1
NC2
X_AT88SC0808C-SU-RH-1
X_AT88SC0808C-SU-RH-1
X_C0.1u10X0402
8
7
4
1
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
MCP77-LAN/DISPLAY
MCP77-LAN/DISPLAY
MCP77-LAN/DISPLAY
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet of
4
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
0A
0A
0A
of
13 51Wednesday, January 02, 2008
13 51Wednesday, January 02, 2008
13 51Wednesday, January 02, 2008
5
www.vinafix.vn
PCI_REQ#0
PCI_REQ#1
PCI_REQ#2
MXM_PWR_EN20
D D
+3VRUN
C C
MXM_ON#12
B B
R171
R171
X_8.2KR0402
X_8.2KR0402
PCI_CLKRUN#23
+3VRUN
LPC_DRQ0#23
SERIRQ23
MXM_PWR_EN
PCI_REQ#4
PCI_INTW#
PCI_INTX#
PCI_INTY#
PCI_INTZ#
PCI_TRDY#
PCI_CLKRUN#
R245 10KR0402R245 10KR0402
R249 5.6KR0402R249 5.6KR0402
R248 10KR0402R248 10KR0402
R247 4.7KR0402R247 4.7KR0402
G10
M11
D10
C10
D11
C11
H12
G12
D12
C12
G14
D14
C14
D15
C15
G16
H16
D16
AF10
AK8
AK7
AK6
AK5
AK9
AG10
AK11
AH10
AK10
AL10
AF12
R250
R250
15KR0402
15KR0402
E10
J10
E8
B10
L12
K11
J11
J12
F12
E12
B12
E14
J15
K15
L16
J16
E16
F16
A16
L17
J17
B16
K17
K14
D5
C6
B6
D6
AL9
AJ6
AL5
AL4
AJ5
AL6
AJ7
AJ8
AL8
4
U4D
U4D
PBGA836
PBGA836
PCI_REQ0#
PCI_REQ1#/FANRPM2
PCI_REQ2#/GPIO_40/RS232_DSR#
PCI_REQ3#/GPIO_38/RS232_CTS#
PCI_REQ4#/GPIO_52/RS232_SIN#
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_INTW#
PCI_INTX#
PCI_INTY#
PCI_INTZ#
PCI_TRDY#
PCI_CLKRUN#/GPIO_42
LPC_DRQ1#/GPIO19/FANRPM1
LPC_DRQ0#/GPIO_50
LPC_SERIRQ
IDE_DATA_P0/WUSB_DATA0
IDE_DATA_P1/WUSB_DATA1
IDE_DATA_P2/WUSB_DATA2
IDE_DATA_P3/WUSB_DATA3
IDE_DATA_P4/WUSB_DATA4
IDE_DATA_P5/WUSB_DATA5
IDE_DATA_P6/WUSB_DATA6
IDE_DATA_P7/WUSB_DATA7
IDE_DATA_P8
IDE_DATA_P9
IDE_DATA_P10
IDE_DATA_P11
IDE_DATA_P12
IDE_DATA_P13
IDE_DATA_P14
IDE_DATA_P15
IDE_DREQ_P/WUSB_PCLK
IDE_INTR_P/WUSB_PHY_ACTIVE
IDE_RDY_P/WUSB_DATA_EN
IDE_IOR_P#/WUSB_SERIAL_DATA
CABLE_DET_P/GPIO_63
?
?
SEC 4 OF 8
SEC 4 OF 8
PCI
PCI
IDE
IDE
?
?
PCI_GNT2#/GPIO_41/RS232_DTR#
PCI_GNT3#/GPIO_39/RS232_RTS#
PCI_GNT4#/GPIO_53/RS232_SOUT#
PCI_PERR#/GPIO_43/RS232_DCD#
LPC_PWRDWN#/GPIO_54/EXT_NMI#
LPC
LPC
IDE_CS1_P#/WUSB_PHY_RESET#
IDE_IOW_P#/WUSB_CCA_STATUS
3
PCI_GNT0#
PCI_GNT1#/FANCTL2
PCI_CBE0#
PCI_CBE1#
PCI_CBE2#
PCI_CBE3#
PCI_DEVSEL#
PCI_FRAME#
PCI_IRDY#
PCI_PAR
PCI_SERR#
PCI_STOP#
PCI_PME#/GPIO_30
PCI_RESET0#
PCI_RESET1#
PCI_RESET2#
PCI_CLK0
PCI_CLK1
PCI_CLK2
PCI_CLK3
PCI_CLK4
PCI_CLKIN
LPC_FRAME#
LPC_RESET0#
LPC_RESET1#
LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_CLK0
IDE_ADDR_P0/WUSB_STOPC
IDE_ADDR_P1/WUSB_RX_EN
IDE_ADDR_P2/WUSB_TX_EN
LPC_CLK1
IDE_CS3_P#
IDE_DACK_P#
IDE_COMP_3P3V
IDE_COMP_GND
F10
H10
K10
L10
F8
K12
K13
F14
K16
PCI_DEVSEL#
L13
PCI_FRAME#
J14
H14
B14
J13
C13
B13
C16
J9
K9
K8
C9
B9
B8
A8
R423 33R0402R423 33R0402
C8
D8
D7
B3
C7
L9
A4
B4
C4
A3
B5
C5
AG12
AE12
AH12
AJ12
AK12
AJ11
AJ10
R246 121R1%0402R246 121R1%0402
AM4
R254 121R1%0402R254 121R1%0402
AK4
PCI_IRDY#
PCI_PERR#
PCI_SERR#
PCI_STOP#
PCI_PME#
R197 22R0402R197 22R0402
R198 33R0402R198 33R0402
RN5 8P4R-22R0402RN5 8P4R-22R0402
7
5
3
1
R170 22R0402R170 22R0402
C202
C202
X_C10p25N0402
X_C10p25N0402
R195 22R0402R195 22R0402
TP15TP15
C495
C495
X_C10p25N0402
X_C10p25N0402
8
6
4
2
+3VRUN
2
C193
C193
X_C10p25N0402
X_C10p25N0402
LPC_FRAME# 18,23
LPC_RST# 23
LPC_AD1 23
LPC_AD0 23
LPC_AD2 23
LPC_AD3 23
LPC_CLK0 23
LPC_DEBUG_CLK 23
PCI_FRAME#
PCI_TRDY#
PCI_DEVSEL#
MXM_PWR_EN
PCI_PERR#
PCI_STOP#
PCI_SERR#
PCI_INTY#
PCI_REQ#2
PCI_REQ#1
PCI_REQ#0
PCI_REQ#4
PCI_INTX#
PCI_INTW#
PCI_INTZ#
PCI_IRDY#
PCI_CLKRUN#
PCI_PME#PCI_CLK4
1
RN20
RN20
1
2
3
4
5
6
7
8
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN4
RN4
1
2
3
4
5
6
7
8
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN21
RN21
1
2
3
4
5
6
7
8
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
RN19
RN19
1
2
3
4
5
6
7
8
8P4R-8.2KR0402-1
8P4R-8.2KR0402-1
R421 8.2KR0402R421 8.2KR0402
R174 X_8.2KR0402R174 X_8.2KR0402
+3VRUN
+3VRUN
+3VRUN
+3VRUN
+3VRUN
+3VSUS
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MS-16521
MS-16521
MS-16521
1
0A
0A
0A
of
14 51Friday, January 11, 2008
of
14 51Friday, January 11, 2008
of
14 51Friday, January 11, 2008
5
4
Title
Title
Title
MCP77-PCI/LPC/IDE
MCP77-PCI/LPC/IDE
MCP77-PCI/LPC/IDE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
3
2
Date: Sheet
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