How it Works
MSI
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MS-163B1
Schematic
43 pgs1.17 Mb0

MSI MS-163B1 Schematic

1
COVER SHEET Block Diagram POWER DELIVERY CHART CLOCK DISTRIBUTION I2C ILLUSTRATE AMD S1 HT & CTRL I/F AMD S1 DDR II Memory I/F AMD S1 Power & GND DDR II A/B SO-DIMM CONN. DDR II A/B Terminations RS690M HT LINK I/F RS690T PCI-E LINK&HDMI I/F RS690T SYSTEM I/F&CLK RS690T POWER & GND CLOCK GENERATOR LVDS & CRT & TV Connector SB600 PCIE/PCI/CPU/LPC SB600 ACPI/GPIO/USB/AUDIO SB600 SATA/IDE/HWM/SPI SB600 POWER & GND SB600 STRAPS Card Reader (RTS5158) New Card & CPU Fan CTRL
A A
LAN (RTL8101E) Azalia CODEC (AL883) Amplifier & Audio Jack SATA & CDROM Connector USB Connector & WEBCAM Mini-PCI & WLAN/BT On/Off CTRL KBC & EC & uP (ENE3910-LPQFP176) MDC Connector & LED & SW Battery Select System Power 3/5 VSUS & VRUN PWRGD VCC_NB 1.2V 1.5V 1.8VRUN Battery Charger CPU VCORE Screw EMI Cap Manual Part Launch Board for MS16321 Touch Pad Board
Page 1 Page 2 Page 3 Page 4 Page 5 Page 6 Page 7 Page 8 Page 9 Page 10 Page 11 Page 12 Page 13 Page 14 Page 15 Page 16 Page 17 Page 18 Page 19 Page 20 Page 21 Page 22 Page 23 Page 24 Page 25 Page 26 Page 27 Page 28 Page 29 Page 30 Page 31 Page 32 Page 33 Page 34 Page 35 Page 36 Page 37 Page 38 Page 39 Page 40 Page 41 Page 42
ATI RS690MC & SB600
MS-163B1
CPU: AMD S1 638
System Chipset: ATI RS690MC - North Bridge ATI SB600 - South Bridge
On Board Chipset: BIOS -- ISA EEPROM SHARE WITH EC/uP CONTROLLER AUDIO -- REALTAK ALC883 AZALIA Audio CODEC AMPLIFIER -- ANPEC APA2030 or TI TPA0212 KBC/EC/uP -- ENE3910 LAN -- MII PHY REALTEK RTL8101E CLOCK -- ICS951462 1394 & Card Reader Controller -- REALTEK
Main Memory: DDR II * 2 (Max 2GB)
Expansion Slots & Connector : New Card X1 Mini-PCIE X1
Version 0A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
COVER SHEET
COVER SHEET
COVER SHEET
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
1
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-163B1
MS-163B1
MS-163B1
of
of
of
140Monday, April 23, 2007
140Monday, April 23, 2007
140Monday, April 23, 2007
5
4
3
2
1
MS-163B1 Ver : 0.A
D D
LVDS
CRT
LVDS Transmitter
Processor
AMD S1
638 pin uFCPGA 638 socket
Page ?
16 X 16 Bit HyperTransport Link
North Bridge
ATI RS690MC
DDR2 400 / 533 / 667 MHz
PCI Express
DDR2 Sodimm 0
DDR2 Sodimm 1
New Card
TV Out
C C
HyperTransport Link
SATA II IDE Bus
HDD
South Bridge
ATI SB600
Secondary IDE Bus
ODD
B B
Microphone In
Line In
Audio Codec
Realtek ALC883
Azalia Interface
USB 1.1 / 2.0
USB 0,1,2,3 USB 5USB 4
USB Connectors
MiniPCIE
USB 6
New CardCamera
USB 7 USB 8,9
BlueTooth
Reserve
Internal Microphone
Line Out & SPDIF
MDC
X-Bus
BIOS ROM
KBC
Internal SPK
A A
Audio AMP
ANPEC2030
LPC
ene KB3910
LPC Debug Port
5
4
3
Internal Keyboard
Touch Pad Smart Fan
For CPU & System
2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
MS-163B1
Block Diagram
Block Diagram
Block Diagram
1
Sheet of
Sheet of
Sheet of
240
240
240
0A
0A
0A
5
4
3
2
1
+3VALW 19pin
SYSTEM PWR
+5VALW 21pin
LDO
RUND
D D
PWR_SRC
+5VSUS 4A
PWR SWITCH
SUS_ON
ENABLE
USB5V_A
RUND
ADD5V
+5VRUN
+3VSUS 4A
TPS51120RHBR
VID(0-5)
Output Select
C C
PWR_SRC
CPU CORE
ENABLEVDD_EN
CPU_VDD_RUN
V5_VREF
VCCFAN1
RST5158
RUND_DG
BT_PWRON#
+5V_CAMERA
+5VRUN_BT 0.5A
C_A3V3
D3V3
AVDD_USB 0.5A
+3.3V_AVDDC 0.01A
P2231
RUND
VDD33
+3VSUS_PCIE
+3VRUN
AVDD33 0.1A
AVDD18
EVDD18 0.198A
DVDD15 0.367A
AVDD 0.25A
DEPOP1
P2231
AVDDCK_3V
CLK_VDD 0.4A
XTLVDD_ATA 0.005A
VDD3V 0.05A
LVDS_DIGON
+3VRUN
AME8804_NC
+3VRUN
AME8805DEFT
VDDR3 0.05A
+3V_SPDIF
+3VRUN_PCIE
+3V_LCD
+1.27VRUN
PLLVDD_ATA
+2.5VRUN
MAX8774GTL+
+3VSUS
W83310DS
RUND
1_5_VCC
APL5912
CPU_M_VREF_SUS
MEM_M_VREF_SUS
CPU_VTT_SUS
+1.8VRUN
+1.5VRUN 2A
P2231
AVDDQ 0.625A
PLLVDD 0.625A
HTPVDD 0.625A
AVDDQ
VDD18 0.6A
+1.5VRUN_PCIE
AVDDCK_1.2V
PWR_SRC
ADAPTER&BATTERY
PWR SWITCH
ON/SKIP1
+3VRUN
B B
PWR_SRC
CPU_VDDIO_SUS 4A
RUND
+1.2VSUS 10A +1.2VRUN
+5VSUS
PWR SWITCH
ON/SKIP2
TPS51124RGER_QFN24-RH
A A
5
4
3
VLDT_EN
PLLVDD12 0.2A
VDDA12 0.5A
VDDA18 5A
+1.2VRUN
PCIE_VDDR 0.391A
VDDHT 0.5A
AVDD_SATA 0.245A
PLLVDD_ATA 0.054A
+VLDT
VCC_NB 10A
Title
Title
Title
POWER DELIVERY CHART
POWER DELIVERY CHART
POWER DELIVERY CHART
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
MS-163B1 0A
MS-163B1 0A
MS-163B1 0A
340Monday, April 23, 2007
340Monday, April 23, 2007
340Monday, April 23, 2007
1
5
4
3
2
1
100MHZ
100MHZ
100MHZ
100MHZ
RS690M
GFX_CLKP
GFX_CLKN
SB_OSCIN
SBSRC_CLKP
SBSRC_CLKN
CLK_48M_USB
HTREFCLK
14.318MHZ
100MHZ
100MHZ
48MHZ
REFCLK+
REFCLK-
PIN19
PIN18
OSCIN
MINI-PCIE-CARD
NEW CARD
14M_OSC
PCIE_RCLKP
PCIE_RCLKN
USBCLK
AZ_BITCLK
PCICLK5
SB600
32.768KHZ12.5P_S-2
AZ_BIT_CLK
PCI_CLK5
33MHZ
33MHZ
BIT_CLK
PIN12
LCLK
RTS5158
12MHZ20P_S
ALC883
MDC CONN
KBC
32.768KHZ12.5P_S-2
PSCLK3
SBLINK_CLKP
SBLINK_CLKN
D D
SRCCLKC0
SRCCLKT0
CLKIN_H
CLKIN_L
ATIGCLKT0
ATIGCLKC0
HTTCLK0
FS2/REF2
FS1/REF1
SRCCLKT1
SRCCLKC1
48MHz_0
SRCCLKT2
SRCCLKC2
SRCCLKT4
SRCCLKC4
FAR SODIMMNEAR SODIMM
CK1
CK0
CK0#
CK1#
333MHZ
333MHZ
C C
MEM_MA0_CLK1_N
MEM_MA0_CLK1_P
MA0_CLK_L1
MA0_CLK_H1
333MHZ
333MHZ
MEM_MA0_CLK2_N
MEM_MA0_CLK2_P
MA0_CLK_L2
MA0_CLK_H2
AMD CPU
B B
CK0
CK0#
333MHZ
333MHZ
MEM_MB0_CLK1_N
MEM_MB0_CLK1_P
MB0_CLK_L1
MB0_CLK_H1
CK1
CK1#
333MHZ
333MHZ
MEM_MB0_CLK2_N
MEM_MB0_CLK2_P
MB0_CLK_L2
MB0_CLK_H2
CPUCLK8T0
CPUCLK8C0
CPUCLK
CPUCLK#
200MHZ
200MHZ
100MHZ
100MHZ
NBSRC_CLKP
NBSRC_CLKN
HTREFCLK
NB_OSC
GPP_CLK0P
GPP_CLK0N
GPP_CLK2P
GPP_CLK2N
SB_CLKP SB_CLKN
100MHZ
100MHZ
66MHZ
14.318MHZ
SRCCLKT5
SRCCLKC5
GPP_CLK3P
GPP_CLK3N
100MHZ
100MHZ
REFCLK_P
REFCLK_N
RTL8101E
CLOCK GENERATOR
14.31818MHZ20P_S-2
A A
5
14.31818MHZ20P_S-2
4
3
25MHZ20P_S-2
Title
Title
Title
CLOCK DISTRIBUTION
CLOCK DISTRIBUTION
CLOCK DISTRIBUTION
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-163B1 0A
B
MS-163B1 0A
B
MS-163B1 0A
B
of
440Monday, April 23, 2007
of
440Monday, April 23, 2007
of
Date: Sheet
Date: Sheet
2
Date: Sheet
440Monday, April 23, 2007
1
5
4
3
2
1
SCL1
KBC
D D
C C
SDA1
SCL2
SDA2
SCL0/GPOC0#
SCL0/GPOC1#
BATCLK_M
BATADATA_M
SMB_THRMCPU_CLK
SMB_THRMCPU_DAT
SCLK0
SDATA0
BATTERY
CPU THERMAL
MEMORY
SB600
CLOCK GENERATOR
SCL0/GPOC2#
SCL0/GPOC3#
SCLK1
SDATA1
NEW CARD
B B
MINI-PCIE
DACSCL
R690MC CRT
A A
5
DACSDA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
Date: Sheet
I2C ILLUSTRATE
I2C ILLUSTRATE
I2C ILLUSTRATE
MS-163B1 0A
A
MS-163B1 0A
A
MS-163B1 0A
A
of
540Monday, April 23, 2007
540Monday, April 23, 2007
2
540Monday, April 23, 2007
1
5
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY TO OTHER HT POWER PINS PLACE CLOSE TO VLDT0 POWER PINS
+VLDT
D D
C262
C262
C4.7U6.3X50805
C4.7U6.3X50805
HT_CADIN15_P11 HT_CADIN15_N11 HT_CADIN14_P11 HT_CADIN14_N11 HT_CADIN13_P11 HT_CADIN13_N11 HT_CADIN12_P11 HT_CADIN12_N11 HT_CADIN11_P11 HT_CADIN11_N11 HT_CADIN10_P11 HT_CADIN10_N11 HT_CADIN9_P11
C C
HT_CADIN9_N11 HT_CADIN8_P11 HT_CADIN8_N11 HT_CADIN7_P11 HT_CADIN7_N11 HT_CADIN6_P11 HT_CADIN6_N11 HT_CADIN5_P11 HT_CADIN5_N11 HT_CADIN4_P11 HT_CADIN4_N11 HT_CADIN3_P11 HT_CADIN3_N11 HT_CADIN2_P11 HT_CADIN2_N11 HT_CADIN1_P11 HT_CADIN1_N11 HT_CADIN0_P11 HT_CADIN0_N11
+VLDT
R190 51R0402R190 51R0402 R189 51R0402R189 51R0402
HT_CLKIN1_P11 HT_CLKIN1_N11 HT_CLKIN0_P11 HT_CLKIN0_N11
HT_CTLIN0_P11 HT_CTLIN0_N11
C263
C263
C0.1U10X0402
C0.1U10X0402
C23
C23
HT_CTLIN1_P HT_CTLIN1_N
C0.1U10X0402
C0.1U10X0402
C264
C264
C0.1U10X0402
C0.1U10X0402
D4 D3 D2 D1
N5 P5 M3 M4 L5 M5 K3 K4 H3 H4 G5 H5 F3 F4 E5 F5 N3 N2 L1 M1 L3 L2
J1 K1 G1 H1 G3 G2 E1 F1 E3 E2
J5 K5
J3
J2
P3 P4
N1 P1
C265
C265
C0.1U10X0402
C0.1U10X0402
VLDT_A3 VLDT_A2 VLDT_A1 VLDT_A0
L0_CADIN_H15 L0_CADIN_L15 L0_CADIN_H14 L0_CADIN_L14 L0_CADIN_H13 L0_CADIN_L13 L0_CADIN_H12 L0_CADIN_L12 L0_CADIN_H11 L0_CADIN_L11 L0_CADIN_H10 L0_CADIN_L10 L0_CADIN_H9 L0_CADIN_L9 L0_CADIN_H8 L0_CADIN_L8 L0_CADIN_H7 L0_CADIN_L7 L0_CADIN_H6 L0_CADIN_L6 L0_CADIN_H5 L0_CADIN_L5 L0_CADIN_H4 L0_CADIN_L4 L0_CADIN_H3 L0_CADIN_L3 L0_CADIN_H2 L0_CADIN_L2 L0_CADIN_H1 L0_CADIN_L1 L0_CADIN_H0 L0_CADIN_L0
L0_CLKIN_H1 L0_CLKIN_L1 L0_CLKIN_H0 L0_CLKIN_L0
L0_CTLIN_H1 L0_CTLIN_L1
L0_CTLIN_H0 L0_CTLIN_L0
U2AU2A
L0_CADOUT_H15 L0_CADOUT_L15 L0_CADOUT_H14 L0_CADOUT_L14 L0_CADOUT_H13 L0_CADOUT_L13 L0_CADOUT_H12 L0_CADOUT_L12 L0_CADOUT_H11 L0_CADOUT_L11 L0_CADOUT_H10 L0_CADOUT_L10
L0_CADOUT_H9 L0_CADOUT_L9 L0_CADOUT_H8 L0_CADOUT_L8 L0_CADOUT_H7 L0_CADOUT_L7 L0_CADOUT_H6 L0_CADOUT_L6 L0_CADOUT_H5 L0_CADOUT_L5 L0_CADOUT_H4 L0_CADOUT_L4 L0_CADOUT_H3 L0_CADOUT_L3 L0_CADOUT_H2 L0_CADOUT_L2 L0_CADOUT_H1 L0_CADOUT_L1 L0_CADOUT_H0 L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1 L0_CTLOUT_L1
L0_CTLOUT_H0 L0_CTLOUT_L0
VLDT_B3 VLDT_B2 VLDT_B1 VLDT_B0
+VLDT
AE5 AE4 AE3 AE2
T4 T3 V5 U5 V4 V3 Y5 W5 AB5 AA5 AB4 AB3 AD5 AC5 AD4 AD3 T1 R1 U2 U3 V1 U1 W2 W3 AA2 AA3 AB1 AA1 AC2 AC3 AD1 AC1
Y4 Y3 Y1 W1
HT_CPU_CTLOUT1_P
T5
HT_CPU_CTLOUT1_N
R5 R2
R3
Athlon 64 S1 Processor Socket
B B
A A
RN42
RN42
8P4R-10KR0402
8P4R-10KR0402
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
R369
R369
0R0402
0R0402
R370
R370
0R0402
0R0402
R371
R371
0R0402
0R0402
CPU_LDTSTOP#
CPU_HT_RESET#LDT_RST#
246
135
SB_CPUPWRGD CPU_ALL_PWROK
LDT_STOP#
8
7
5
4
+VDDA
VDDA 2.5V
HT_CADOUT15_P 11 HT_CADOUT15_N 11 HT_CADOUT14_P 11 HT_CADOUT14_N 11 HT_CADOUT13_P 11 HT_CADOUT13_N 11 HT_CADOUT12_P 11 HT_CADOUT12_N 11 HT_CADOUT11_P 11 HT_CADOUT11_N 11 HT_CADOUT10_P 11 HT_CADOUT10_N 11 HT_CADOUT9_P 11 HT_CADOUT9_N 11 HT_CADOUT8_P 11 HT_CADOUT8_N 11 HT_CADOUT7_P 11 HT_CADOUT7_N 11 HT_CADOUT6_P 11 HT_CADOUT6_N 11 HT_CADOUT5_P 11 HT_CADOUT5_N 11 HT_CADOUT4_P 11 HT_CADOUT4_N 11 HT_CADOUT3_P 11 HT_CADOUT3_N 11 HT_CADOUT2_P 11 HT_CADOUT2_N 11 HT_CADOUT1_P 11 HT_CADOUT1_N 11 HT_CADOUT0_P 11 HT_CADOUT0_N 11
HT_CLKOUT1_P 11 HT_CLKOUT1_N 11 HT_CLKOUT0_P 11 HT_CLKOUT0_N 11
HT_CTLOUT0_P 11 HT_CTLOUT0_N 11
4
VDDA_EN34
TP13TP13 TP12TP12
1u_6.3V_0402
1u_6.3V_0402
PC2142
PC2142
10u_6V_0603
10u_6V_0603
PR2121
PR2121
+3VSUS
VDDA_EN
PC2139
PC2139
PD2007
PD2007
S-RB751V-40
S-RB751V-40
1K_0402
1K_0402
100K_0402
100K_0402
SB_CPUPWRGD17
LDT_STOP#13,17
LDT_RST#17
1 3
AC
PR2123
PR2123
X_8P4R-1KR0402
X_8P4R-1KR0402
VDD_PG34,37
IN
BP SHDN OUT5GND
PU2007
PU2007
RT9167/A
RT9167/A
VDDA_PG
CPU_PROCHOT#_1.8
RN18
RN18
4
2
PC2138
PC2138
2.2u_6V_0603
2.2u_6V_0603
+1.8VRUN
246
135
3
+VDDA
PC2140
PC2140
0.01u_16V_0402
0.01u_16V_0402
CPU_VDDA_2.5_RUN
place them to CPU within 1"(5mil trace 10mil space)
CPUCLK15
CPUCLK#15
CPU_VDDIO_SUS
CPU_VDDIO_SUS
R287
R287 X_10K_0402
X_10K_0402
CPU_PH_G
X_4.7K_0402
X_4.7K_0402
B
E C
Q23
Q23 X_SMBT3904
X_SMBT3904
147
U18A
U18A
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U18B
U18B
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U18C
U18C
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U18D
U18D
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U18E
U18E
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U18F
U18F
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
+VLDT
R274
R274
+1.8VRUN
+3VRUN
135
246
3
C3900P50X
C3900P50X
C3900P50X
C3900P50X
C31
C31
169R1%0402
169R1%0402
C32
C32
R16 510R0402R16 510R0402 R18 510R0402R18 510R0402
7
8
CPU_ALL_PWROK
CPU_HT_RESET#
VDDA_PG 34
8
7
11 10
13 12
CPU_VDDIO_SUS
+3VSUS
1 2
3 4
5 6
9 8
CP7
CP7
X_COPPER
X_COPPER
R191 44.2R1%R191 44.2R1% R188 44.2R1%R188 44.2R1%
CPU_VDD_RUN_FB_H37 CPU_VDD_RUN_FB_L37
CPU_CLKIN_SC_N
R14
R14
SB_TALERT# 19
RN19
RN19 X_8P4R-330R0402
X_8P4R-330R0402
CPU_SPI#_L
CPU_LDTSTOP#
C260
C260
C4.7U6.3X50805
C4.7U6.3X50805
CPU_HT_RESET# CPU_ALL_PWROK CPU_LDTSTOP#
CPU_SIC_R17
CPU_SID_R17
CPU_VDD_RUN_FB_H CPU_VDD_RUN_FB_L
CPU_CLKIN_SC_P
TP21TP21
CPU_TMS
TP15TP15
CPU_TCK
TP18TP18
CPU_TRST#
TP16TP16
CPU_TDI
TP19TP19
CPU_TEST25_H_BYPASSCLK_H CPU_TEST25_L_BYPASSCLK_L CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1
CPU_TEST5_THERMDC CPU_TEST4_THERMDA
Cap close to thermal sensor
CPU_TEST4_THERMDA
CPU_TEST5_THERMDC
2
ATHLON Control and Debug
LAYOUT: ROUTE VDDA TRACE APPROX. 50 mils WIDE (USE 2x25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.
C256
C256
C257
C257
C0.1U16Y0402
C0.1U16Y0402
CPU_SIC_R
CPU_HTREF1 CPU_HTREF0
CPU_DBRDY
C2200P50X0402
C2200P50X0402
T_CRIT_CPU#34
C1000P50X0402
C1000P50X0402
CPU_SID_R
C277
C277
F8 F9
B7 A7
F10
AF4 AF5
P6
R6
F6 E6
W9
Y9 A9
A8 G10 AA9
AC9 AD9 AF9
E8
G9 H10 AA7
C2
D7
E7 F7
C7 AC8
C3 AA6
W7 W8
Y6
AB6 P20
P19 N20 N19
R26 R25 P22 R22
U2D
U2D
VDDA2
THERMTRIP_L
VDDA1
PROCHOT_L
RESET_L PWROK LDTSTOP_L
SIC SID
HT_REF1 HT_REF0
CPU_PRESENT_L VDD_FB_H VDD_FB_L
VDDIO_FB_H VDDIO_FB_L
CLKIN_H CLKIN_L
DBRDY TMS
TCK TRST_L TDI
TEST25_HE9TEST29_H TEST25_L TEST19 TEST18 TEST13 TEST9 TEST17 TEST16 TEST15 TEST14 TEST12
TEST7 TEST6 THERMDC THERMDA TEST3 TEST2
RSVD0 RSVD1 RSVD2 RSVD3
RSVD4 RSVD5 RSVD6 RSVD7
AMD NPT S1 SOCKET Processor Socket
JTAC
JTAC
MISC
MISC
+3VALW
C278
C278
R368
R368
X_0R0402
X_0R0402
2
C0.1U16Y0402
C0.1U16Y0402
DBREQ_L
TEST29_L
TEST24 TEST23 TEST22 TEST21 TEST20
TEST28_H TEST28_L
TEST27 TEST26 TEST10
TEST8 RSVD8
RSVD9
RSVD10 RSVD11
RSVD12 RSVD13 RSVD14
RSVD15 RSVD16 RSVD17 RSVD18 RSVD19 RSVD20
+3VSUS
R367
R367
X_0R0402
X_0R0402
PSI_L
VID5 VID4 VID3 VID2 VID1 VID0
TDO
R327
R327
0R0402
0R0402
R193
R193 X_10KR0402
X_10KR0402
AF6 AC7
A5 C6 A6 A4 C5 B5
AC6 A3
E10
AE9
C9 C8
AE7 AD7 AE8 AB8 AF7
J7 H8 AF8 AE6 K8 C4
H16 B18
B3 C1
H6 G6 D5
R24 W18 R23 AA8 H18 H19
CPU_VDDIO_SUS
R195
R195
330R0402
330R0402
CPU_THERMTRIP# CPU_PROCHOT#_1.8
CPU_VID5 CPU_VID4 CPU_VID3 CPU_VID2 CPU_VID1 CPU_VID0
CPU_PRESENT# CPU_SPI#_L
CPU_VDDIO_SUS
R2038
R2038
510_0402 _NC
510_0402 _NC
CPU_DBREQ#
CPU_TDO
CPU_TEST29_H_FBCLKOUT_P CPU_TEST29_L_FBCLKOUT_N
CPU_TEST21_SCANEN
CPU_TEST26_BURNIN#
Close to CPU socket
U20
U20
1
VDD
SMBCLK
2
D+
SMBData
3
D-
ALERT
T_CRIT_A4GND
LM86CIMMXNOPB_MSOP8-RH
LM86CIMMXNOPB_MSOP8-RH
1
+1.8VRUN
R196
R196 10KR0402
10KR0402 Q55
Q55
B
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
CPU_THERMTRIP_D#
CE
TP14TP14
CE
Q54
Q54 N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
B
R192
R192 10KR0402
10KR0402
+1.8VRUN
TP17TP17
R219
R219
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
80.6R1%0402
80.6R1%0402
PLACE IT CLOSE TO CPU WITHIN 1"
CPU_SIC_R CPU_SID_R CPU_THERMTRIP# CPU_PROCHOT#_1.8
CPU_TEST19_PLLTEST0 CPU_TEST18_PLLTEST1 CPU_TEST21_SCANEN CPU_TEST26_BURNIN#
CPU_THERMTRIP_D# SMB_THRMCPU_CLK SMB_THRMCPU_DATA CPU_THRM_ALERT-
SMB_THRMCPU_CLK
8
SMB_THRMCPU_DATA
7 6 5
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
CPU_THERMTRIP_D# 18
CPU_VID5 37 CPU_VID4 37 CPU_VID3 37 CPU_VID2 37 CPU_VID1 37 CPU_VID0 37
CPU_PSI#
CPU_PSI# 37
2/19 modify by benny
CPU_VDDIO_SUS
RN20
RN20
8P4R-330R0402
8P4R-330R0402
1
2
3
4
5
6
7
8
RN21
RN21
8P4R-330R0402
8P4R-330R0402
1
2
3
4
5
6
7
8
RN22
RN22
1
2
3
4
5
6
7
8
8P4R-10KR0402
8P4R-10KR0402
SMB_THRMCPU_CLK 30 SMB_THRMCPU_DATA 30 CPU_THRM_ALERT- 30
MS-163B1
MS-163B1
MS-163B1
AMD S1 HT & CTRL I/F
AMD S1 HT & CTRL I/F
AMD S1 HT & CTRL I/F
1
+3VRUN
Sheet of
Sheet of
Sheet of
640
640
640
0A
0A
0A
5
4
3
2
1
MEM_MB_DATA[63..0]9
D D
C C
B B
A A
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VTT_SENSE should be routed as a 10-mil trace with 10 mils spacing.
CPU_VDDIO_SUS CPU_M_VREF_SUS
R17
R17
39.2R1%0402
39.2R1%0402
R19
R19
39.2R1%0402
39.2R1%0402
PLACE THEM CLOSE TO CPU WITHIN 1"
MEM_MA0_CS#39,10 MEM_MA0_CLK2_P 9 MEM_MA0_CS#29,10 MEM_MA0_CS#19,10 MEM_MA0_CS#09,10
MEM_MB0_CS#39,10 MEM_MB0_CS#29,10 MEM_MB0_CS#19,10 MEM_MB0_CS#09,10
MEM_MA_ADD[15..0]9,10
MEM_MA_BANK29,10 MEM_MA_BANK19,10 MEM_MB_BANK1 9,10 MEM_MA_BANK09,10
TP20TP20
MEM_MB_CKE19,10 MEM_MB_CKE09,10 MEM_MA_CKE19,10 MEM_MA_CKE09,10
MEM_MA_RAS#9,10 MEM_MA_CAS#9,10 MEM_MA_WE#9,10
CPU_VDDIO_SUS
R224
R224 1KR1%0402
1KR1%0402
R225
R225 1KR1%0402
1KR1%0402
CPU_M_VREF
W17
SNS_+0.9VTT
Y10
M_ZN
AE10
M_ZP
AF10
V19 J22 V22 T19
Y26 J24
W24
U23 H26
J23 J20
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
J21 K19
K20 V24 K24 L20 R19 L19 L22
L21 M19 M20 M24 M22
N22
N21
R21
K22
R20
T22
T20
U20
U21
VDD_VREF_SUS_CPU
CPU_M_VREF_SUS
C305
C305
C0.1U10X0402
C0.1U10X0402
LAYOUT:PLACE CLOSE TO CPU
5
15MIL trace, 20MIL space, shorter than 1"
U2B
U2B
MEMVREF VTT_SENSE
MEMZN MEMZP
MA0_CS_L3 MA0_CS_L2 MA0_CS_L1 MA0_CS_L0
MB0_CS_L3 MB0_CS_L2 MB0_CS_L1 MB0_CS_L0
MB_CKE1 MB_CKE0 MA_CKE1 MA_CKE0
MA_ADD15 MA_ADD14 MA_ADD13 MA_ADD12 MA_ADD11 MA_ADD10 MA_ADD9 MA_ADD8 MA_ADD7 MA_ADD6 MA_ADD5 MA_ADD4 MA_ADD3 MA_ADD2 MA_ADD1 MA_ADD0
MA_BANK2 MA_BANK1 MA_BANK0
MA_RAS_L MA_CAS_L MA_WE_L
MA0_CLK_H2 MA0_CLK_L2 MA0_CLK_H1 MA0_CLK_L1
MB0_CLK_H2 MB0_CLK_L2 MB0_CLK_H1 MB0_CLK_L1
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
Athlon 64 S1 Processor Socket
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9
MB0_ODT1 MB0_ODT0 MA0_ODT1 MA0_ODT0
MB_ADD15 MB_ADD14 MB_ADD13 MB_ADD12 MB_ADD11 MB_ADD10
MB_ADD9 MB_ADD8 MB_ADD7 MB_ADD6 MB_ADD5 MB_ADD4 MB_ADD3 MB_ADD2 MB_ADD1 MB_ADD0
MB_BANK2 MB_BANK1 MB_BANK0
MB_RAS_L MB_CAS_L
MB_WE_L
4
CPU_VTT_SUS
D10 C10 B10 AD10 W10 AC10 AB10 AA10 A10
Y16 AA16 E16 F16
AF18 AF17 A17 A18
W23 W26 V20 U19
MEM_MB_ADD15
J25
MEM_MB_ADD14
J26
MEM_MB_ADD13
W25
MEM_MB_ADD12
L23
MEM_MB_ADD11
L25
MEM_MB_ADD10
U25
MEM_MB_ADD9
L24
MEM_MB_ADD8
M26
MEM_MB_ADD7
L26
MEM_MB_ADD6
N23
MEM_MB_ADD5
N24
MEM_MB_ADD4
N25
MEM_MB_ADD3
N26
MEM_MB_ADD2
P24
MEM_MB_ADD1
P26
MEM_MB_ADD0
T24 K26
T26 U26
U24 V26 U22
CLOSE TO CPU SOCKET
C78
C78
C515
C515
C280
C280
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
MEM_MB0_CLK2_P9
MEM_MB0_CLK2_N9 MEM_MB0_CLK1_P9
MEM_MB0_CLK1_N9
MEM_MA0_CLK2_P9
MEM_MA0_CLK2_N9 MEM_MA0_CLK1_P9
MEM_MA0_CLK1_N9
MEM_MA0_CLK2_N 9 MEM_MA0_CLK1_P 9 MEM_MA0_CLK1_N 9
MEM_MB0_CLK2_P 9 MEM_MB0_CLK2_N 9 MEM_MB0_CLK1_P 9 MEM_MB0_CLK1_N 9
MEM_MB0_ODT1 9,10 MEM_MB0_ODT0 9,10 MEM_MA0_ODT1 9,10 MEM_MA0_ODT0 9,10
MEM_MB_ADD[15..0] 9,10
MEM_MB_BANK2 9,10 MEM_MB_BANK0 9,10 MEM_MB_RAS# 9,10
MEM_MB_CAS# 9,10 MEM_MB_WE# 9,10
X_C0.1U10X0402
X_C0.1U10X0402
C343
C343
C316
C316
C1000P50X0402
C1000P50X0402
X_C1000P50X0402
X_C1000P50X0402
C287
C287
C293
C293
C286
C286
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
CLOSE TO CPU SOCKET
Differential CTT termination
C307
C307 C1.5P50N0402
C1.5P50N0402
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
C308
C308 C1.5P50N0402
C1.5P50N0402
Differential CTT termination
C301
C301 C1.5P50N0402
C1.5P50N0402
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
C302
C302 C1.5P50N0402
C1.5P50N0402
X_C0.1U10X0402
X_C0.1U10X0402
C288
C288
C1000P50X0402
C1000P50X0402
3
C285
C285
X_C1000P50X0402
X_C1000P50X0402
MEM_MB_DM[7..0]9
MEM_MB_DQS7_P9 MEM_MB_DQS7_N9 MEM_MB_DQS6_P9 MEM_MB_DQS6_N9 MEM_MB_DQS5_P9 MEM_MB_DQS5_N9 MEM_MB_DQS4_P9 MEM_MB_DQS4_N9 MEM_MB_DQS3_P9 MEM_MB_DQS3_N9 MEM_MB_DQS2_P9 MEM_MB_DQS2_N9 MEM_MB_DQS1_P9 MEM_MB_DQS1_N9
MEM_MB_DQS0_N9
A1
AF1
MEM_MB_DATA63 MEM_MB_DATA62 MEM_MB_DATA61 MEM_MB_DATA60 MEM_MB_DATA59 MEM_MB_DATA58 MEM_MB_DATA57 MEM_MB_DATA56 MEM_MB_DATA55 MEM_MB_DATA54 MEM_MB_DATA53 MEM_MB_DATA52 MEM_MB_DATA51 MEM_MB_DATA50 MEM_MB_DATA49 MEM_MB_DATA48 MEM_MB_DATA47 MEM_MB_DATA46 MEM_MB_DATA45 MEM_MB_DATA44 MEM_MB_DATA43 MEM_MB_DATA42 MEM_MB_DATA41 MEM_MB_DATA40 MEM_MB_DATA39 MEM_MB_DATA38 MEM_MB_DATA37 MEM_MB_DATA36 MEM_MB_DATA35 MEM_MB_DATA34 MEM_MB_DATA33 MEM_MB_DATA32 MEM_MB_DATA31 MEM_MB_DATA30 MEM_MA_DATA30 MEM_MB_DATA29 MEM_MB_DATA28 MEM_MB_DATA27 MEM_MB_DATA26 MEM_MA_DATA26 MEM_MB_DATA25 MEM_MB_DATA24 MEM_MB_DATA23 MEM_MB_DATA22 MEM_MB_DATA21 MEM_MA_DATA21 MEM_MB_DATA20 MEM_MB_DATA19 MEM_MB_DATA18 MEM_MB_DATA17 MEM_MB_DATA16 MEM_MB_DATA15 MEM_MB_DATA14 MEM_MB_DATA13 MEM_MB_DATA12 MEM_MB_DATA11 MEM_MB_DATA10 MEM_MB_DATA9 MEM_MB_DATA8 MEM_MB_DATA7 MEM_MB_DATA6 MEM_MB_DATA5 MEM_MB_DATA4 MEM_MB_DATA3 MEM_MB_DATA2 MEM_MB_DATA1 MEM_MB_DATA0
MEM_MB_DM7 MEM_MB_DM5
MEM_MB_DM4 MEM_MB_DM3 MEM_MB_DM2 MEM_MB_DM1 MEM_MB_DM0
AD11
AE14 AB11
AC12
AC18 AD14
AC14 AE18 AD18 AD20 AC20
AE20 AD22 AC22 AE25 AD26 AA25 AA26 AE24 AD24 AA23 AA24
AD12 AC16 AE22 AB26
AE12 AE16 AD16
AC25 AC26
AF11 AF14
AF13 AF15 AF16
AF19
AF23 AF24 AF20
AF12
AF21 AF22
Y11
G24 G23 D26 C26 G26 G25 E24 E23 C24 B24 C20 B20 C25 D24 A21 D20 D18 C18 D14 C14 A20 A19 A16 A15 A13 D12 E11 G11 B14 A14 A11 C11
E25 A22 B16 A12
F26 E26 A24 A23 D16 C16 C12 B12
A26
Athlon 64 S1g1
uPGA638 Top View
2
Processor DDR2 Memory Interface
MB_DATA63 MB_DATA62 MB_DATA61 MB_DATA60 MB_DATA59 MB_DATA58 MB_DATA57 MB_DATA56 MB_DATA55 MB_DATA54 MB_DATA53 MB_DATA52 MB_DATA51 MB_DATA50 MB_DATA49 MB_DATA48 MB_DATA47 MB_DATA46 MB_DATA45 MB_DATA44 MB_DATA43 MB_DATA42 MB_DATA41 MB_DATA40 MB_DATA39 MB_DATA38 MB_DATA37 MB_DATA36 MB_DATA35 MB_DATA34 MB_DATA33 MB_DATA32 MB_DATA31 MB_DATA30 MB_DATA29 MB_DATA28 MB_DATA27 MB_DATA26 MB_DATA25 MB_DATA24 MB_DATA23 MB_DATA22 MB_DATA21 MB_DATA20 MB_DATA19 MB_DATA18 MB_DATA17 MB_DATA16 MB_DATA15 MB_DATA14 MB_DATA13 MB_DATA12 MB_DATA11 MB_DATA10 MB_DATA9 MB_DATA8 MB_DATA7 MB_DATA6 MB_DATA5 MB_DATA4 MB_DATA3 MB_DATA2 MB_DATA1 MB_DATA0
MB_DM7 MB_DM6 MB_DM5 MB_DM4 MB_DM3 MB_DM2 MB_DM1 MB_DM0
MB_DQS_H7 MB_DQS_L7 MB_DQS_H6 MB_DQS_L6 MB_DQS_H5 MB_DQS_L5 MB_DQS_H4 MB_DQS_L4 MB_DQS_H3 MB_DQS_L3 MB_DQS_H2 MB_DQS_L2 MB_DQS_H1 MB_DQS_L1 MB_DQS_H0 MB_DQS_L0
U2C
U2C
DDR: DATA
DDR: DATA
AMD S1 Processor Socket
MA_DATA63 MA_DATA62 MA_DATA61 MA_DATA60 MA_DATA59 MA_DATA58 MA_DATA57 MA_DATA56 MA_DATA55 MA_DATA54 MA_DATA53 MA_DATA52 MA_DATA51 MA_DATA50 MA_DATA49 MA_DATA48 MA_DATA47 MA_DATA46 MA_DATA45 MA_DATA44 MA_DATA43 MA_DATA42 MA_DATA41 MA_DATA40 MA_DATA39 MA_DATA38 MA_DATA37 MA_DATA36 MA_DATA35 MA_DATA34 MA_DATA33 MA_DATA32 MA_DATA31 MA_DATA30 MA_DATA29 MA_DATA28 MA_DATA27 MA_DATA26 MA_DATA25 MA_DATA24 MA_DATA23 MA_DATA22 MA_DATA21 MA_DATA20 MA_DATA19 MA_DATA18 MA_DATA17 MA_DATA16 MA_DATA15 MA_DATA14 MA_DATA13 MA_DATA12 MA_DATA11 MA_DATA10
MA_DATA9 MA_DATA8 MA_DATA7 MA_DATA6 MA_DATA5 MA_DATA4 MA_DATA3 MA_DATA2 MA_DATA1 MA_DATA0
MA_DM7 MA_DM6 MA_DM5 MA_DM4 MA_DM3 MA_DM2 MA_DM1 MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12 AB12 AA14 AB14 W11 Y12 AD13 AB13 AD15 AB15 AB17 Y17 Y14 W14 W16 AD17 Y18 AD19 AD21 AB21 AB18 AA18 AA20 Y20 AA22 Y22 W21 W22 AA21 AB22 AB24 Y24 H22 H20 E22 E21 J19 H24 F22 F20 C23 B22 F18 E18 E20 D22 C19 G18 G17 C17 F14 E14 H17 E17 E15 H15 E13 C13 H12 H11 G14 H14 F12 G12
Y13 AB16 Y19 AC24 F24 E19 C15 E12
W12 W13 Y15 W15 AB19 AB20 AD23 AC23 G22 G21 C22 C21 G16 G15 G13 H13
MEM_MA_DATA63 MEM_MA_DATA62 MEM_MA_DATA61 MEM_MA_DATA60 MEM_MA_DATA59 MEM_MA_DATA58 MEM_MA_DATA57 MEM_MA_DATA56 MEM_MA_DATA55 MEM_MA_DATA54 MEM_MA_DATA53 MEM_MA_DATA52 MEM_MA_DATA51 MEM_MA_DATA50 MEM_MA_DATA49 MEM_MA_DATA48 MEM_MA_DATA47 MEM_MA_DATA46 MEM_MA_DATA45 MEM_MA_DATA44 MEM_MA_DATA43 MEM_MA_DATA42 MEM_MA_DATA41 MEM_MA_DATA40 MEM_MA_DATA39 MEM_MA_DATA38 MEM_MA_DATA37 MEM_MA_DATA36 MEM_MA_DATA35 MEM_MA_DATA34 MEM_MA_DATA33 MEM_MA_DATA32 MEM_MA_DATA31
MEM_MA_DATA29 MEM_MA_DATA28 MEM_MA_DATA27
MEM_MA_DATA25 MEM_MA_DATA24 MEM_MA_DATA23 MEM_MA_DATA22
MEM_MA_DATA20 MEM_MA_DATA19 MEM_MA_DATA18 MEM_MA_DATA17 MEM_MA_DATA16 MEM_MA_DATA15 MEM_MA_DATA14 MEM_MA_DATA13 MEM_MA_DATA12 MEM_MA_DATA11 MEM_MA_DATA10 MEM_MA_DATA9 MEM_MA_DATA8 MEM_MA_DATA7 MEM_MA_DATA6 MEM_MA_DATA5 MEM_MA_DATA4 MEM_MA_DATA3 MEM_MA_DATA2 MEM_MA_DATA1 MEM_MA_DATA0
MEM_MA_DM7 MEM_MA_DM6MEM_MB_DM6 MEM_MA_DM5 MEM_MA_DM4 MEM_MA_DM3 MEM_MA_DM2 MEM_MA_DM1 MEM_MA_DM0
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Date:
Date:
Date:
MEM_MA_DATA[63..0] 9
MEM_MA_DM[7..0] 9
MEM_MA_DQS7_P 9 MEM_MA_DQS7_N 9 MEM_MA_DQS6_P 9 MEM_MA_DQS6_N 9 MEM_MA_DQS5_P 9 MEM_MA_DQS5_N 9 MEM_MA_DQS4_P 9 MEM_MA_DQS4_N 9 MEM_MA_DQS3_P 9 MEM_MA_DQS3_N 9 MEM_MA_DQS2_P 9 MEM_MA_DQS2_N 9 MEM_MA_DQS1_P 9 MEM_MA_DQS1_N 9 MEM_MA_DQS0_P 9MEM_MB_DQS0_P9 MEM_MA_DQS0_N 9
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MS-163B1
AMD S1 DDR II Memory I/F
AMD S1 DDR II Memory I/F
AMD S1 DDR II Memory I/F
Monday, April 23, 2007
Monday, April 23, 2007
Monday, April 23, 2007
1
Sheet of
Sheet of
Sheet of
740
740
740
0A
0A
0A
5
D D
CPU_VDD_RUN CPU_VDD_RUN
AC4 AD2
G4 H2
J11 J13
K6 K10 K12 K14
L11 L13
M2
M6
M8 M10
N7
N9 N11
P8 P10
R4
C C
R7
R9 R11
T2
T6
T8
T10 T12 T14
U7
U9 U11 U13
V6
V8 V10
A1
U2E
U2E
VDD1 VDD2 VDD3 VDD4
J9
VDD5 VDD6 VDD7 VDD8 VDD9 VDD10 VDD11
L4
VDD12
L7
VDD13
L9
VDD14 VDD15 VDD16 VDD17 VDD18 VDD19 VDD20 VDD21 VDD22 VDD23 VDD24 VDD25 VDD26 VDD27 VDD28 VDD29 VDD30 VDD31 VDD32 VDD33 VDD34 VDD35 VDD36 VDD37 VDD38 VDD39 VDD40 VDD41 VDD42
POWER
POWER
Athlon 64 S1 Processor Socket
VDD43 VDD44 VDD45 VDD46 VDD47 VDD48 VDD49 VDD50 VDD51 VDD52 VDD53 VDD54
VDDIO1 VDDIO2 VDDIO3 VDDIO4 VDDIO5 VDDIO6 VDDIO7 VDDIO8
VDDIO9 VDDIO10 VDDIO11 VDDIO12 VDDIO13 VDDIO14 VDDIO15 VDDIO16 VDDIO17 VDDIO18 VDDIO19 VDDIO20 VDDIO21 VDDIO22 VDDIO23 VDDIO24 VDDIO25 VDDIO26 VDDIO27
V12 V14 W4 Y2 J15 K16 L15 M16 P16 T16 U15 V16
H25 J17 K18 K21 K23 K25 L17 M18 M21 M23 M25 N17 P18 P21 P23 P25 R17 T18 T21 T23 T25 U17 V18 V21 V23 V25 Y25
CPU_VDDIO_SUS
A26
Athlon 64 S1g1
uPGA638 Top View
B B
AF1
4
U2F
U2F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
GROUND
GROUND
Athlon 64 S1 Processor Socket
VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98
VSS99 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129
3
J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 M11 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6
BOTTOMSIDE DECOUPLING
CPU_VDD_RUN
C289
C289
1 2
C266
C266
C295
C295
1 2
CPU_VDD_RUN
C273
C273
CPU_VDDIO_SUS
C514
C514
1 2
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
C298
C298
C275
C275
C469
C469
1 2
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
1 2
C294
C294
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C274
C274
C0.1U10X0402
C0.1U10X0402
C329
C329
C4.7U6.3X50805
C4.7U6.3X50805
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
C276
C276
C0.1U10X0402
C0.1U10X0402
C99
C99
C322
C322
C4.7U6.3X50805
C4.7U6.3X50805
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU_VDDIO_SUS
C314
C314
C323
C323
C319
C319
C102
C306
C306
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
C102
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
X_C0.1U16Y0402
X_C0.1U16Y0402
1 2
X_C0.1U10X0402
X_C0.1U10X0402
C98
C98
X_C0.1U16Y0402
X_C0.1U16Y0402
2
C272
C272
1 2
C299
C299
C290
C290
1 2
X_C22U10Y1206-RH-1
X_C0.1U10X0402
X_C0.1U10X0402
C496
C496
C0.1U16Y0402
C0.1U16Y0402
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
C100
C100
C495
C495
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
C324
C324
1
PROCESSOR POWER AND GROUND
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
Date:
5
4
3
2
Monday, April 23, 2007
MS-163B1
AMD S1 Power & GND
AMD S1 Power & GND
AMD S1 Power & GND
1
Sheet of
Sheet of
Sheet of
840
840
840
0A
0A
0A
5
MEM_MA_ADD[15..0]7,10 MEM_MB_ADD[15..0]7,10
D D
MEM_MA_BANK[2..0]7,10 MEM_MB_BANK[2..0]7,10
MEM_MA0_CS#07,10 MEM_MA0_CS#17,10
MEM_MA0_CLK1_P7
MEM_MA0_CLK1_N7
MEM_MA0_CLK2_P7
MEM_MA0_CLK2_N7 MEM_MA_CKE07,10 MEM_MA_CKE17,10 MEM_MA_CAS#7,10 MEM_MA_RAS#7,10
MEM_MA_WE#7,10
SCLK015,18 SDATA015,18
MEM_MA0_ODT07,10 MEM_MA0_ODT17,10
MEM_MA_DM[7..0]7 MEM_MB_DM[7..0]7
C C
B B
CPU_VDDIO_SUS
A A
SCLK0 SDATA0
MEM_MA_DQS0_P7 MEM_MA_DQS1_P7 MEM_MA_DQS2_P7 MEM_MA_DQS3_P7 MEM_MA_DQS4_P7 MEM_MA_DQS5_P7 MEM_MA_DQS6_P7 MEM_MA_DQS7_P7 MEM_MA_DQS0_N7 MEM_MA_DQS1_N7 MEM_MA_DQS2_N7 MEM_MA_DQS3_N7 MEM_MA_DQS4_N7 MEM_MA_DQS5_N7 MEM_MA_DQS6_N7 MEM_MA_DQS7_N7
MEM_MA0_CS#27,10 MEM_MA0_CS#37,10
C310
C310
C4.7U6.3X50805
C4.7U6.3X50805
5
MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7
MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15 MEM_MA_BANK2 MEM_MB_BANK2
MEM_MA_BANK0 MEM_MA_BANK1
MEM_MA_DM0 MEM_MA_DM1 MEM_MA_DM2 MEM_MA_DM3 MEM_MA_DM4 MEM_MA_DM5 MEM_MA_DM6 MEM_MA_DM7
CPU_VDDIO_SUS
+3VRUN
MEM_M_VREF_SUS
C311
C311
C4.7U6.3X50805
C4.7U6.3X50805
102
101
100
99
98
97
94
92
93
91
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DIMM1B
DIMM1B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND#201
202
GND
203
203
204
204
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DIMM-200S_black-1
DIMM-200S_black-1
DIMM-200S_black-1
DIMM-200S_black-1
DIMM1A
DIMM1A
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
4
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8MEM_MA_ADD8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA32
123
MEM_MA_DATA33
125
MEM_MA_DATA34
135
MEM_MA_DATA35
137
MEM_MA_DATA36
124
MEM_MA_DATA37
126
MEM_MA_DATA38
134
MEM_MA_DATA39
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA42
151
MEM_MA_DATA43
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA46
152
MEM_MA_DATA47
154
MEM_MA_DATA48
157
MEM_MA_DATA49
159
MEM_MA_DATA50
173
MEM_MA_DATA51
175
MEM_MA_DATA52
158
MEM_MA_DATA53
160
MEM_MA_DATA54
174
MEM_MA_DATA55
176
MEM_MA_DATA56
179
MEM_MA_DATA57
181
MEM_MA_DATA58
189
MEM_MA_DATA59
191
MEM_MA_DATA60
180
MEM_MA_DATA61
182
MEM_MA_DATA62
192
MEM_MA_DATA63
194
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
4
CPU_VDDIO_SUS
R278
R278
1KR1%0402
1KR1%0402
R275
R275
1KR1%0402
1KR1%0402
3
MEM_MA_DATA[63..0] 7 MEM_MB_DATA[63..0] 7
MEM_MB0_CS#07,10 MEM_MB0_CS#17,10
MEM_MB0_CLK1_P7
MEM_MB0_CLK1_N7
MEM_MB0_CLK2_P7
MEM_MB0_CLK2_N7
MEM_MB_CKE07,10 MEM_MB_CKE17,10 MEM_MB_CAS#7,10 MEM_MB_RAS#7,10
MEM_MB_WE#7,10
SCLK0 SDATA0
MEM_MB0_ODT07,10 MEM_MB0_ODT17,10
CPU_VDDIO_SUS
C303
C303 C0.1U16Y0402
C0.1U16Y0402 C304
C304 C0.1U16Y0402
C0.1U16Y0402 C493
C493 C0.1U16Y0402
C0.1U16Y0402 C492
C492 C0.1U16Y0402
C0.1U16Y0402 C494
C494 C0.1U16Y0402
C0.1U16Y0402
MEM_MB_DQS0_P7 MEM_MB_DQS1_P7 MEM_MB_DQS2_P7 MEM_MB_DQS3_P7 MEM_MB_DQS4_P7 MEM_MB_DQS5_P7 MEM_MB_DQS6_P7 MEM_MB_DQS7_P7 MEM_MB_DQS0_N7 MEM_MB_DQS1_N7 MEM_MB_DQS2_N7 MEM_MB_DQS3_N7 MEM_MB_DQS4_N7 MEM_MB_DQS5_N7 MEM_MB_DQS6_N7 MEM_MB_DQS7_N7
MEM_MB0_CS#27,10 MEM_MB0_CS#37,10
MEM_VREF_SUS
MEM_M_VREF_SUS
C472
C0.1U16Y0402
C0.1U16Y0402
C472
C0.1U16Y0402
C0.1U16Y0402
C456
C456
MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15
MEM_MB_BANK0 MEM_MB_BANK1
+3VRUN
MEM_MB_DM0 MEM_MB_DM1 MEM_MB_DM2 MEM_MB_DM3 MEM_MB_DM4 MEM_MB_DM5 MEM_MB_DM6 MEM_MB_DM7
CPU_VDDIO_SUS
+3VRUN
MEM_M_VREF_SUS
LAYOUT: PLACE CLOSE TO DIMMs
3
2
102
101
100
99
98
97
94
92
93
91
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DIMM2B
DIMM2B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND#201
202
GND
203
203
204
204
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DIMM-200S_black
DIMM-200S_black
2
DIMM2A
DIMM2A
DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8
DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63
DIMM-200S_black
DIMM-200S_black
VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57
MEM_MB_DATA0
5
MEM_MB_DATA1
7
MEM_MB_DATA2
17
MEM_MB_DATA3
19
MEM_MB_DATA4
4
MEM_MB_DATA5
6
MEM_MB_DATA6
14
MEM_MB_DATA7
16
MEM_MB_DATA8
23
MEM_MB_DATA9
25
MEM_MB_DATA10
35
MEM_MB_DATA11
37
MEM_MB_DATA12
20
MEM_MB_DATA13
22
MEM_MB_DATA14
36
MEM_MB_DATA15
38
MEM_MB_DATA16
43
MEM_MB_DATA17
45
MEM_MB_DATA18
55
MEM_MB_DATA19
57
MEM_MB_DATA20
44
MEM_MB_DATA21
46
MEM_MB_DATA22
56
MEM_MB_DATA23
58
MEM_MB_DATA24
61
MEM_MB_DATA25
63
MEM_MB_DATA26
73
MEM_MB_DATA27
75
MEM_MB_DATA28
62
MEM_MB_DATA29
64
MEM_MB_DATA30
74
MEM_MB_DATA31
76
MEM_MB_DATA32
123
MEM_MB_DATA33
125
MEM_MB_DATA34
135
MEM_MB_DATA35
137
MEM_MB_DATA36
124
MEM_MB_DATA37
126
MEM_MB_DATA38
134
MEM_MB_DATA39
136
MEM_MB_DATA40
141
MEM_MB_DATA41
143
MEM_MB_DATA42
151
MEM_MB_DATA43
153
MEM_MB_DATA44
140
MEM_MB_DATA45
142
MEM_MB_DATA46
152
MEM_MB_DATA47
154
MEM_MB_DATA48
157
MEM_MB_DATA49
159
MEM_MB_DATA50
173
MEM_MB_DATA51
175
MEM_MB_DATA52
158
MEM_MB_DATA53
160
MEM_MB_DATA54
174
MEM_MB_DATA55
176
MEM_MB_DATA56
179
MEM_MB_DATA57
181
MEM_MB_DATA58
189
MEM_MB_DATA59
191
MEM_MB_DATA60
180
MEM_MB_DATA61
182
MEM_MB_DATA62
192
MEM_MB_DATA63
194
18 24 41 53 42 54 59 65 60 66 127 139 128 145 165 171 172 177 187 178 190 9 21 33 155 34 132 144 156 168 2 3 15 27 39 149 161 28 40 138 150 162
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev Custom
Custom
Custom Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
CPU_VDDIO_SUS
CPU_VDDIO_SUS
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
DDR II A/B SO-DIMM CONN.
DDR II A/B SO-DIMM CONN.
DDR II A/B SO-DIMM CONN.
1
C320
C320
C4.7U6.3X50805
C4.7U6.3X50805
MS-163B1
MS-163B1
MS-163B1
1
C106
C106 C0.1U16Y0402
C0.1U16Y0402 C105
C105 C0.1U16Y0402
C0.1U16Y0402 C104
C104 C0.1U16Y0402
C0.1U16Y0402 C101
C101 C0.1U16Y0402
C0.1U16Y0402 C103
C103 C0.1U16Y0402
C0.1U16Y0402
C321
C321
C4.7U6.3X50805
C4.7U6.3X50805
Sheet of
Sheet of
Sheet of
940
940
940
5
4
3
2
1
MEM_MA_ADD[15..0]7,9
D D
MEM_MA_BANK[2..0]7,9
C C
MEM_MA_ADD[15..0]
MEM_MA_BANK[2..0]
MEM_MA_CAS#7,9 MEM_MA_WE#7,9 MEM_MA_RAS#7,9
MEM_MA0_CS#07,9 MEM_MA0_CS#17,9 MEM_MA0_CS#27,9 MEM_MA0_CS#37,9
MEM_MA0_ODT07,9 MEM_MA0_ODT17,9
MEM_MA_CKE17,9 MEM_MA_CKE07,9
MEM_MA_ADD15 MEM_MA_ADD14 MEM_MA_ADD13 MEM_MA_ADD12 MEM_MA_ADD11 MEM_MA_ADD10 MEM_MA_ADD9 MEM_MA_ADD8 MEM_MA_ADD7 MEM_MA_ADD6 MEM_MA_ADD5 MEM_MA_ADD4 MEM_MA_ADD3 MEM_MA_ADD2 MEM_MA_ADD1 MEM_MA_ADD0
MEM_MA_BANK2 MEM_MA_BANK1 MEM_MA_BANK0
MEM_MA_CAS# MEM_MA_WE# MEM_MA_RAS#
MEM_MA0_CS#0 MEM_MA0_CS#1 MEM_MA0_CS#2 MEM_MA0_CS#3
MEM_MA0_ODT0 MEM_MA0_ODT1
MEM_MA_CKE1 MEM_MA_CKE0
MEM_MA_CKE0 MEM_MA_ADD12 MEM_MA_BANK2 MEM_MA_ADD8
MEM_MA_ADD9 MEM_MA_ADD5 MEM_MA_ADD3 MEM_MA_ADD2
MEM_MA_BANK0 MEM_MA_ADD10 MEM_MA_CAS# MEM_MA_WE#
MEM_MA_ADD13 MEM_MA0_ODT1
MEM_MA0_CS#3 MEM_MA_ADD14
MEM_MA_ADD15 MEM_MA_CKE1 MEM_MA0_CS#2
MEM_MA_ADD4 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD11
MEM_MA_RAS# MEM_MA_BANK1 MEM_MA_ADD0 MEM_MA_ADD1
MEM_MA0_CS#1 MEM_MA0_ODT0 MEM_MA0_CS#0
1 3 5 7
1 3 5 7
1 3 5 7
1 3 5 7
1 3 5 7
1 3 5 7
1 3 5 7
1 3 5 7
CPU_VTT_SUS
2
RN23
RN23
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN24
RN24
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN25
RN25
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN26
RN26
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN27
RN27
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN28
RN28
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN29
RN29
4
8P4R-47R0402
8P4R-47R0402
6 8
2
RN30
RN30
4
8P4R-47R0402
8P4R-47R0402
6 8
CHANNEL A VTT BYPASS CAP CHANNEL B VTT BYPASS CAP
CPU_VTT_SUS
MEM_MB_ADD[15..0]7,9
B B
MEM_MB_BANK[2..0]7,9
MEM_MB_ADD[15..0]
MEM_MB_BANK[2..0]
MEM_MB_CAS#7,9 MEM_MB_WE#7,9
MEM_MB_RAS#7,9 MEM_MB0_CS#07,9
MEM_MB0_CS#17,9
MEM_MB0_CS#27,9
MEM_MB0_CS#37,9 MEM_MB0_ODT07,9
MEM_MB0_ODT17,9 MEM_MB_CKE17,9
MEM_MB_CKE07,9
MEM_MB_ADD15 MEM_MB_ADD14 MEM_MB_ADD13 MEM_MB_ADD12 MEM_MB_ADD11 MEM_MB_ADD10 MEM_MB_ADD9 MEM_MB_ADD8 MEM_MB_ADD7 MEM_MB_ADD6 MEM_MB_ADD5 MEM_MB_ADD4 MEM_MB_ADD3 MEM_MB_ADD2 MEM_MB_ADD1 MEM_MB_ADD0
MEM_MB_BANK2 MEM_MB_BANK1 MEM_MB_BANK0
MEM_MB_CAS# MEM_MB_WE# MEM_MB_RAS#
MEM_MB0_CS#0 MEM_MB0_CS#1 MEM_MB0_CS#2 MEM_MB0_CS#3
MEM_MB0_ODT0 MEM_MB0_ODT1
MEM_MB_CKE1 MEM_MB_CKE0
MEM_MB_CKE0 MEM_MB0_CS#2 MEM_MB_BANK2 MEM_MB_ADD12
MEM_MB_ADD9 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD5
MEM_MB_ADD3 MEM_MB_ADD1 MEM_MB_ADD10 MEM_MB_WE#
MEM_MB_CAS# MEM_MB0_CS#1 MEM_MB_ADD13
MEM_MB_ADD11 MEM_MB_ADD14 MEM_MB_ADD15 MEM_MB_CKE1
MEM_MB_ADD0 MEM_MB_ADD2 MEM_MB_ADD4 MEM_MB_ADD6
MEM_MB0_CS#0 MEM_MB_RAS# MEM_MB_BANK0 MEM_MB_BANK1
MEM_MB0_CS#3 MEM_MB0_ODT1 MEM_MB0_ODT0
1
2
RN31
RN31
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN32
RN32
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN33
RN33
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN34
RN34
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN37
RN37
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN35
RN35
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN38
RN38
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN36
RN36
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
CPU_VTT_SUS
CPU_VTT_SUS CPU_VTT_SUS
C336
C281
C281 C4.7U6.3X50805
C4.7U6.3X50805 C416
C416 C0.1U16Y0402
C0.1U16Y0402 C332
C332 C0.1U16Y0402
C0.1U16Y0402 C513
C513 C0.1U16Y0402
C0.1U16Y0402 C378
C378 C0.1U16Y0402
C0.1U16Y0402 C460
C460 C0.1U16Y0402
C0.1U16Y0402 C386
C386 C0.1U16Y0402
C0.1U16Y0402 C466
C466 C0.1U16Y0402
C0.1U16Y0402 C284
C284 C0.1U16Y0402
C0.1U16Y0402
C336 X_C4.7U6.3X50805
X_C4.7U6.3X50805
C463
C463 X_C0.1U16Y0402
X_C0.1U16Y0402 C335
C335 X_C0.1U16Y0402
X_C0.1U16Y0402 C411
C411 X_C0.1U16Y0402
X_C0.1U16Y0402
CPU_VDDIO_SUS
C477
C477 C4.7U6.3X50805
C4.7U6.3X50805 C476
C476 C0.1U16Y0402
C0.1U16Y0402 C511
C511 C0.1U16Y0402
C0.1U16Y0402 C470
C470 C0.1U16Y0402
C0.1U16Y0402 C413
C413 C0.1U16Y0402
C0.1U16Y0402 C461
C461 C0.1U16Y0402
C0.1U16Y0402 C407
C407 C0.1U16Y0402
C0.1U16Y0402 C468
C468 C0.1U16Y0402
C0.1U16Y0402 C512
C512 C0.1U16Y0402
C0.1U16Y0402
CPU_VTT_SUS
C376
C376 X_C4.7U6.3X50805
X_C4.7U6.3X50805 C353
C353 X_C0.1U16Y0402
X_C0.1U16Y0402 C497
C497 X_C0.1U16Y0402
X_C0.1U16Y0402 C442
C442 X_C0.1U16Y0402
X_C0.1U16Y0402 C475
C475 X_C0.1U16Y0402
X_C0.1U16Y0402 C334
C334 X_C0.1U16Y0402
X_C0.1U16Y0402
CPU_VDDIO_SUS
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Date:
Monday, April 23, 2007
Date:
Monday, April 23, 2007
Date:
5
4
3
2
Monday, April 23, 2007
MS-163B1
DDR II A/B Terminations
DDR II A/B Terminations
DDR II A/B Terminations
1
Sheet of
Sheet of
Sheet of
10 40
10 40
10 40
0A
0A
0A
5
D D
HT_CADOUT15_P6 HT_CADOUT15_N6 HT_CADOUT14_P6 HT_CADOUT14_N6 HT_CADOUT13_P6 HT_CADOUT13_N6 HT_CADOUT12_P6 HT_CADOUT12_N6 HT_CADOUT11_P6 HT_CADOUT11_N6 HT_CADOUT10_P6 HT_CADOUT10_N6 HT_CADOUT9_P6 HT_CADOUT9_N6 HT_CADOUT8_P6 HT_CADOUT8_N6
HT_CADOUT7_P6 HT_CADOUT7_N6
C C
HT_CADOUT6_P6 HT_CADOUT6_N6 HT_CADOUT5_P6 HT_CADOUT5_N6 HT_CADOUT4_P6 HT_CADOUT4_N6 HT_CADOUT3_P6 HT_CADOUT3_N6 HT_CADOUT2_P6 HT_CADOUT2_N6 HT_CADOUT1_P6 HT_CADOUT1_N6 HT_CADOUT0_P6 HT_CADOUT0_N6
HT_CLKOUT1_P6 HT_CLKOUT1_N6
HT_CLKOUT0_P6 HT_CLKOUT0_N6
HT_CTLOUT0_P6 HT_CTLOUT0_N6
VDDHT_PKG
4
U2016A
U2016A
R19
HT_RXCAD15P
R18
HT_RXCAD15N
R21
HT_RXCAD14P
R22
HT_RXCAD14N
U22
HT_RXCAD13P
U21
HT_RXCAD13N
U18
HT_RXCAD12P
U19
HT_RXCAD12N
W19
HT_RXCAD11P
W20
HT_RXCAD11N
AC21
HT_RXCAD10P
AB22
HT_RXCAD10N
AB20
HT_RXCAD9P
AA20
HT_RXCAD9N
AA19
HT_RXCAD8P
Y19
HT_RXCAD8N
T24
HT_RXCAD7P
R25
HT_RXCAD7N
U25
HT_RXCAD6P
U24
HT_RXCAD6N
V23
HT_RXCAD5P
U23
HT_RXCAD5N
V24
HT_RXCAD4P
V25
HT_RXCAD4N
AA25
HT_RXCAD3P
AA24
HT_RXCAD3N
AB23
HT_RXCAD2P
AA23
HT_RXCAD2N
AB24
HT_RXCAD1P
AB25
HT_RXCAD1N
AC24
HT_RXCAD0P
AC25
HT_RXCAD0N
W21
HT_RXCLK1P
W22
HT_RXCLK1N
Y24
HT_RXCLK0P
W25
HT_RXCLK0N
P24
HT_RXCTLP
P25 A24
C24
HT_RXCTLN HT_RXCALP
HT_RXCALN
RS690M
RS690M
R253 49.9_0402R253 49.9_0402 R217 100_0402R217 100_0402 R226 49.9_0402R226 49.9_0402
HT_RXCALP HT_RXCALN
PART 1 OF 5
PART 1 OF 5
HT_TXCAD15N HT_TXCAD14P HT_TXCAD14N HT_TXCAD13P HT_TXCAD13N HT_TXCAD12P HT_TXCAD12N HT_TXCAD11P HT_TXCAD11N HT_TXCAD10P HT_TXCAD10N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCAD15P
HT_TXCAD9P HT_TXCAD9N HT_TXCAD8P HT_TXCAD8N
HT_TXCAD7P HT_TXCAD7N HT_TXCAD6P HT_TXCAD6N HT_TXCAD5P HT_TXCAD5N HT_TXCAD4P HT_TXCAD4N HT_TXCAD3P HT_TXCAD3N HT_TXCAD2P HT_TXCAD2N HT_TXCAD1P HT_TXCAD1N HT_TXCAD0P HT_TXCAD0N
HT_TXCLK1P HT_TXCLK1N
HT_TXCLK0P HT_TXCLK0N
HT_TXCTLP HT_TXCTLN
HT_TXCALP HT_TXCALN
3
P21 P22 P18 P19 M22 M21 M18 M19 L18 L19 G22 G21 J20 J21 F21 F22
N24 N25 L25 M24 K25 K24 J23 K23 G25 H24 F25 F24 E23 F23 E24 E25
L21 L22
J24 J25
N23 P23
C25 D24
HT_TXCALP
HT_TXCALN
HT_CADIN15_P 6 HT_CADIN15_N 6 HT_CADIN14_P 6 HT_CADIN14_N 6 HT_CADIN13_P 6 HT_CADIN13_N 6 HT_CADIN12_P 6 HT_CADIN12_N 6 HT_CADIN11_P 6 HT_CADIN11_N 6 HT_CADIN10_P 6 HT_CADIN10_N 6 HT_CADIN9_P 6 HT_CADIN9_N 6 HT_CADIN8_P 6 HT_CADIN8_N 6
HT_CADIN7_P 6 HT_CADIN7_N 6 HT_CADIN6_P 6 HT_CADIN6_N 6 HT_CADIN5_P 6 HT_CADIN5_N 6 HT_CADIN4_P 6 HT_CADIN4_N 6 HT_CADIN3_P 6 HT_CADIN3_N 6 HT_CADIN2_P 6 HT_CADIN2_N 6 HT_CADIN1_P 6 HT_CADIN1_N 6 HT_CADIN0_P 6 HT_CADIN0_N 6
HT_CLKIN1_P 6 HT_CLKIN1_N 6
HT_CLKIN0_P 6 HT_CLKIN0_N 6
HT_CTLIN0_P 6 HT_CTLIN0_N 6
2
1
B B
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
RS690M HT LINK I/F
RS690M HT LINK I/F
RS690M HT LINK I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-163B1
MS-163B1
MS-163B1
1
0A
0A
0A
of
of
of
11 40Monday, April 23, 2007
11 40Monday, April 23, 2007
11 40Monday, April 23, 2007
5
4
3
2
1
U2016B
U2016B
G5 G4
J8
AB7 AB6
W11 W12
AA11 AB11
AA7 AB9
AA9
W14 W15
AB12 AA12
AA14 AB14
J7 J4 J5 L8 L7 L4
L5 M8 M7 M4 M5
P8 P7 P4 P5 R4 R5 R7 R8 U4
U5 W4 W5
Y4 Y5
V9 W9
Y7
RS690M
RS690M
D D
C C
A_RX2P17 A_RX2N17
A_RX3P17 A_RX3N17
GPP_RX2P23 GPP_RX2N23
GPP_RX3P24 GPP_RX3N24
A_RX0P17 A_RX0N17
A_RX1P17
B B
A_RX1N17
TP28TP28 TP29TP29
version A12
PART 2 OF 5
GFX_RX0P GFX_RX0N GFX_RX1P GFX_RX1N GFX_RX2P GFX_RX2N GFX_RX3P GFX_RX3N GFX_RX4P GFX_RX4N GFX_RX5P GFX_RX5N GFX_RX6P GFX_RX6N GFX_RX7P GFX_RX7N GFX_RX8P GFX_RX8N GFX_RX9P GFX_RX9N GFX_RX10P GFX_RX10N GFX_RX11P GFX_RX11N GFX_RX12P GFX_RX12N GFX_RX13P GFX_RX13N GFX_RX14P GFX_RX14N GFX_RX15P GFX_RX15N
GPP_RX0P(SB_RX2P) GPP_RX0N(SB_RX2N)
GPP_RX1P(SB_RX3P) GPP_RX1N(SB_RX3N)
GPP_RX2P GPP_RX2N
GPP_RX3P GPP_RX3N
SB_RX0P SB_RX0N
SB_RX1P SB_RX1N
PCE_ISET(NC) PCE_TXISET(NC)
PART 2 OF 5
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P GFX_TX0N GFX_TX1P GFX_TX1N GFX_TX2P GFX_TX2N GFX_TX3P GFX_TX3N GFX_TX4P GFX_TX4N GFX_TX5P GFX_TX5N GFX_TX6P GFX_TX6N GFX_TX7P GFX_TX7N GFX_TX8P GFX_TX8N GFX_TX9P
GFX_TX9N GFX_TX10P GFX_TX10N GFX_TX11P GFX_TX11N GFX_TX12P GFX_TX12N GFX_TX13P GFX_TX13N GFX_TX14P GFX_TX14N GFX_TX15P GFX_TX15N
GPP_TX0P(SB_TX2P)
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0N(SB_TX2N) GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P SB_TX0N
SB_TX1P SB_TX1N
PCE_PCAL(PCE_CALRP) PCE_NCAL(PCE_CALRN)
J1 H2 K2 K1 K3 L3 L1 L2 N2 N1 P2 P1 P3 R3 R1 R2 T2 U1 V2 V1 V3 W3 W1 W2 Y2 AA1 AA2 AB2 AB1 AC1 AE3 AE4
A_TX2P_C
AD8
A_TX2N_C
AE8
A_TX3P_C
AD7
A_TX3N_C
AE7
GPP_TX2P_C
AD4
GPP_TX2N_C
AE5
GPP_TX3P_C
AD5
GPP_TX3N_C
AD6
A_TX0P_C
AE9
A_TX0N_C
AD10
A_TX1P_C
AC8
A_TX1N_C
AD9
R263 562_0402 1%R263 562_0402 1%
AD11
R267 2K_1%_0402R267 2K_1%_0402
AE11
R50 562Ohm R52 2KOhm
C649 0.1u_10V_0402C649 0.1u_10V_0402 C651 0.1u_10V_0402C651 0.1u_10V_0402
C650 0.1u_10V_0402C650 0.1u_10V_0402 C653 0.1u_10V_0402C653 0.1u_10V_0402
C646 0.1u_10V_0402C646 0.1u_10V_0402
C645 0.1u_10V_0402C645 0.1u_10V_0402
C656 0.1u_10V_0402C656 0.1u_10V_0402
C655 0.1u_10V_0402C655 0.1u_10V_0402
C652 0.1u_10V_0402C652 0.1u_10V_0402
C654 0.1u_10V_0402C654 0.1u_10V_0402
C648 0.1u_10V_0402C648 0.1u_10V_0402
C647 0.1u_10V_0402C647 0.1u_10V_0402
VDDA12_PKG2
A_TX2P 17 A_TX2N 17
A_TX3P 17 A_TX3N 17
GPP_TX2P 23 GPP_TX2N 23
GPP_TX3P 24 GPP_TX3N 24
A_TX0P 17 A_TX0N 17
A_TX1P 17 A_TX1N 17
TO NEW CARD
TO LAN
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
RS690T PCI-E LINK&HDMI I/F
RS690T PCI-E LINK&HDMI I/F
RS690T PCI-E LINK&HDMI I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MS-163B1
MS-163B1
MS-163B1
MICRO-STAR INT'L CO.,LTD.
12 40Monday, April 23, 2007
12 40Monday, April 23, 2007
12 40Monday, April 23, 2007
of
of
1
of
0A
0A
0A
5
D D
+1.8VRUN
AVDDQ
0.625A
L16
L16
1 2
300L300m
300L300m
10u_6V_0603_NC
10u_6V_0603_NC
1 2
300L300m
300L300m
10u_6V_0603 _NC
R285
R285
4.7K_0402
4.7K_0402
10u_6V_0603 _NC
+1.8VRUN
1 2
300L300m
300L300m
10u_6V_0603_NC
10u_6V_0603_NC
+3VRUN
4.7K_0402
4.7K_0402 R295
R295
+1.2VRUN PLLVDD12
C C
B B
L33
L33
L17
L17
R297 4.7K_0402R297 4.7K_0402
L38
L38
1 2
300L300m
300L300m
PLLVDD
HTPVDD
C659
C659
0.625A
C663
C663
0.625A
C664
C664
I2C_CLK
I2C_DATA
DDC_DATA
0.2A
C658
C658
2.2u_6V_0603
2.2u_6V_0603
C422
C422
2.2u_6V_0603
2.2u_6V_0603
C657
C657
2.2u_6V_0603
2.2u_6V_0603
C667
C667 1u_6.3V_0402
1u_6.3V_0402
2.2K_0402 _NC
2.2K_0402 _NC
TV_C16 TV_Y16
TV_CVBS16
2.2K_0402_NC
2.2K_0402_NC
R377
R377
R385
R385
TV_C TV_Y TV_CVBS
RED16 GREEN16 BLUE16
+3VRUN
4
STRP_DATA
R63
R63
150_0402 1%
150_0402 1%
150_0402 1%
150_0402 1%
R62
R62
150_0402 1%
150_0402 1%
R57
R57
150_0402 1%
150_0402 1%
R35
R35
FOR RS690M +3V
PLEASE CLOSE TO NB
R34
R34
R37
R37
PLEASE CLOSE TO NB
150_0402 1%
150_0402 1%
150_0402 1%
150_0402 1%
10K_0402
10K_0402
LDT_STOP#6,17
+3VRUN
L15
L15
300L600m
300L600m
+1.8VRUN
0.625A
C408
C408
2.2u_6V_0603
2.2u_6V_0603
AVDDQ
0.625A
+1.8VRUN
To CRT
+3VRUN
R44
R44
E C
R45
R45 10K_0402
10K_0402
B
Q17
Q17 SMBT3904
SMBT3904
HTREFCLK15
NB_OSC15
NBSRC_CLKP15 NBSRC_CLKN15
SBLINK_CLKP15 SBLINK_CLKN15
GPIO0 Pull down 3.0K to enable Side Port
To LCD panel
NB_PWRGD34
I2C_CLK16 I2C_DATA16
PLLVDD12
R300 4.7K_0402R300 4.7K_0402
DAC_SCL16
DAC_SDAT16
3
PLLVDD
HTPVDD
NB_PWRGD LDT_STOP#_NB
AVDD
0.25A
C346
C346
2.2u_6V_0603
2.2u_6V_0603
0.625A
0.625A
0.2A
R254 3K_0402 _NCR254 3K_0402 _NC R373 3K_0402 _NCR373 3K_0402 _NC R389 3K_0402_NCR389 3K_0402_NC R314 3K_0402 _NCR314 3K_0402 _NC R280 3K_0402 _NCR280 3K_0402 _NC
BMREQ#17
I2C_DATA
TP75TP75
2
AVDD1 AVDD2 AVSSN1 AVSSN2 AVDDDI AVSSDI
AVDDQ AVSSQ
C_R Y_G COMP_B
RED GREEN BLUE DACVSYNC DACHSYNC
RSET DACSCL
DACSDA PLLVDD(PLLVDD18)
PLLVSS HTPVDD
HTPVSS SYSRESET#
POWERGOOD LDTSTOP# ALLOW_LDTSTOP
HTTSTCLK HTREFCLK
TVCLKIN OSCIN
OSCOUT(PLLVDD12) GFX_CLKP
GFX_CLKN SB_CLKP
SB_CLKN DFT_GPIO0
DFT_GPIO1 DFT_GPIO2 DFT_GPIO3 DFT_GPIO4 DFT_GPIO5
BMREQb I2C_CLK I2C_DATA THERMALDIODE_P THERMALDIODE_N
TMDS_HPD DDC_DATA TESTMODE STRP_DATA
version A12
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
LVDDR18A_1(LVDDR33_1) LVDDR18A_2(LVDDR33_2)
PM
PM
PLL PWR
PLL PWR
CLOCKs
CLOCKs
MIS.
MIS.
TXOUT_L0P TXOUT_L0N TXOUT_L1P TXOUT_L1N TXOUT_L2P TXOUT_L2N TXOUT_L3P TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP TXCLK_LN TXCLK_UP TXCLK_UN
LVDDR18D_1
LVDS
LVDS
LVDDR18D_2
LVSSR1 LVSSR3 LVSSR5 LVSSR6 LVSSR7 LVSSR8
LVSSR12 LVSSR13
LVDS_DIGON
LVDS_BLON LVDS_BLEN
DVO_D0(GPP_TX0P) DVO_D1(GPP_TX0N)
DVO_D2(NC) DVO_D3(GPP_RX0P) DVO_D4(GPP_RX0N)
DVO_D5(NC)
DVO_D6(NC) DVO_D7(GPP_TX1N) DVO_D8(GPP_TX1P) DVO_D9(GPP_RX1N)
DVO
DVO
DVO_D10(GPP_RX1P)
DVO_D11(NC)
DVO_VSYNC(NC)
DVO_DE(NC)
DVO_HSYNC(NC)
DVO_IDCKP(NC) DVO_IDCKN(NC)
U2016C
U2016C
B22 C22
G17
H17 A20 B20
A21
TV_C TV_Y TV_CVBS
VSYNC16
HSYNC16
R317
R317
NB_RST#17
ALLOW_LDTSTOP17
R326 10K_0402R326 10K_0402
R43 10K_0402R43 10K_0402
R374 33_0402R374 33_0402
TMDS_HPD DDC_DATA
A22 C21
C20 D19
E19 F19
G19
C6 A5
715_0402
715_0402
1%
B21
B6 A6
A10 B10
B24 B25
C10 C11
C5 B5
C23 B23
C2
B11 A11
F2 E1
G1 G2
DFT_GPIO0 GPP_TX0N_C
D6
LOAD_ROM#
D7
DFT_GPIO2
C8
DFT_GPIO3
C7
DFT_GPIO4
B8
DFT_GPIO5
A8 B2
A2 B4
AA15
TP30TP30
AB15
TP32TP32
C14
B3 C3
STRP_DATA
A3
RS690M
RS690M
LPVDD LPVSS
B14 B15 B13 A13 H14 G14 D17 E17
A15 B16 C17 C18 B17 A17 A18 B18
E15 D15 H15 G15
D14 E14
A12 B12 C12 C13
A16 A14 D12 C19 C15 C16
F14 F15
E12 G12 F12
AD14 AD15 AE15 AD16 AE16 AC17 AD18 AE19 AD19 AE20 AD20 AE21
AD13 AC13 AE13 AE17 AD17
0.2A
0.2A
GPP_TX0P_C
LVDS_L_TXL0P 16 LVDS_L_TXL0N 16 LVDS_L_TXL1P 16 LVDS_L_TXL1N 16 LVDS_L_TXL2P 16 LVDS_L_TXL2N 16
LVDS_U_TXL0P 16 LVDS_U_TXL0N 16 LVDS_U_TXL1P 16 LVDS_U_TXL1N 16 LVDS_U_TXL2P 16 LVDS_U_TXL2N 16
LVDS_L_TXLCKP 16 LVDS_L_TXLCKN 16 LVDS_U_TXLCKP 16 LVDS_U_TXLCKN 16
0.1u_10V_0402 _NC
0.1u_10V_0402 _NC
0.2A
C348
C348
2.2u_6V_0603
2.2u_6V_0603
LVDS_DIGON 16 LVDS_BLON 16
C352 0.1u_10V_0402C352 0.1u_10V_0402
GPP_RX0P 29 GPP_RX0N 29
C660
C660
C355 0.1u_10V_0402C355 0.1u_10V_0402R388 3K_0402_NCR388 3K_0402_NC
1 2
300L300m
300L300m
C661
C661
2.2u_6V_0603
2.2u_6V_0603
1 2
C360
C360
0.1u_10V_0402
0.1u_10V_0402
L30
L30
L20
L20
300L300m
300L300m
1
+1.8VRUN
+1.8VRUN
C662
C662
0.1u_10V_0402
0.1u_10V_0402
GPP_TX0P 29 GPP_TX0N 29
RS690: LVDDR18A=3.3V
+3VRUN
L31
L31
300L300m
300L300m
1 2
C665
C665
4.7u_6V_0603
4.7u_6V_0603
TO MINI-PCIE
DFT_GPIO[4:2]
RS690 only (NC for RS485)
Enable debug bus via the memory IO pads, if available in the package
DEFAULT
use default values
use the memory data bus to output the debug bus
3
DFT_GPIO5
DEFAULT
LOAD_ROM#: LOAD ROM STRAP ENABLE
High, LOAD ROM STRAP DISABLE Low, LOAD ROM STRAP ENABLE
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
RS690T SYSTEM I/F&CLK
RS690T SYSTEM I/F&CLK
RS690T SYSTEM I/F&CLK
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-163B1
MS-163B1
MS-163B1
1
0A
0A
0A
of
of
of
13 40Monday, April 23, 2007
13 40Monday, April 23, 2007
13 40Monday, April 23, 2007
RS485/RS690
A A
5
PULL HIGH (internally pulled high)
PULL LOW
DFT_GPIO1
Bypass the loading of EEPROM straps and use Hardware default values
DEFAULT
I2C Master can load strap values from EEPROM if connected, or use default values if not connected
DFT_GPIO0
Memory side port not available
DEFAULT
Memory side port available
4
These pin straps are used to configure PCI-E GPP mode: 111: register defined (register default to Config E)
110: 4-0-0-0-0 Config A 101: 4-4 Config B 100: 4-2-2 Config C 011: 4-2-1-1 Config D 010: 4-1-1-1-1 Config E others: register defined (register default to Config E)
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