1
COVER SHEET
Block Diagram
POWER DELIVERY CHART
CLOCK DISTRIBUTION
I2C ILLUSTRATE
AMD S1 HT & CTRL I/F
AMD S1 DDR II Memory I/F
AMD S1 Power & GND
DDR II A/B SO-DIMM CONN.
DDR II A/B Terminations
RS690M HT LINK I/F
RS690T PCI-E LINK&HDMI I/F
RS690T SYSTEM I/F&CLK
RS690T POWER & GND
CLOCK GENERATOR
LVDS & CRT & TV Connector
SB600 PCIE/PCI/CPU/LPC
SB600 ACPI/GPIO/USB/AUDIO
SB600 SATA/IDE/HWM/SPI
SB600 POWER & GND
SB600 STRAPS
Card Reader (RTS5158)
New Card & CPU Fan CTRL
A A
LAN (RTL8101E)
Azalia CODEC (AL883)
Amplifier & Audio Jack
SATA & CDROM Connector
USB Connector & WEBCAM
Mini-PCI & WLAN/BT On/Off CTRL
KBC & EC & uP (ENE3910-LPQFP176)
MDC Connector & LED & SW
Battery Select
System Power 3/5 VSUS & VRUN
PWRGD
VCC_NB 1.2V 1.5V 1.8VRUN
Battery Charger
CPU VCORE
Screw
EMI Cap
Manual Part
Launch Board for MS16321
Touch Pad Board
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Page 42
ATI RS690MC & SB600
MS-163B1
CPU:
AMD S1 638
System Chipset:
ATI RS690MC - North Bridge
ATI SB600 - South Bridge
On Board Chipset:
BIOS -- ISA EEPROM SHARE WITH EC/uP CONTROLLER
AUDIO -- REALTAK ALC883 AZALIA Audio CODEC
AMPLIFIER -- ANPEC APA2030 or TI TPA0212
KBC/EC/uP -- ENE3910
LAN -- MII PHY REALTEK RTL8101E
CLOCK -- ICS951462
1394 & Card Reader Controller -- REALTEK
Main Memory:
DDR II * 2 (Max 2GB*2)
Expansion Slots & Connector :
New Card X1
Mini-PCIE X1
Version 0B
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
COVER SHEET
COVER SHEET
COVER SHEET
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
1
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MS-163B1
MS-163B1
MS-163B1
0B
0B
143Monday, July 16, 2007
143Monday, July 16, 2007
143Monday, July 16, 2007
0B
5
www.schematic-x.blogspot.com
4
3
2
1
MS-163B1 Ver : 0.A
D D
LVDS
CRT
LVDS Transmitter
Processor
AMD S1
638 pin uFCPGA 638 socket
Page ?
16 X 16 Bit
HyperTransport Link
North Bridge
ATI RS690MC
DDR2 400 / 533 / 667 MHz
PCI Express
DDR2 Sodimm 0
DDR2 Sodimm 1
New Card
TV Out
C C
HyperTransport Link
SATA II IDE Bus
HDD
South Bridge
ATI SB600
Secondary IDE Bus
ODD
B B
Microphone In
Line In
Audio Codec
Realtek ALC883
Azalia Interface
USB 1.1 / 2.0
USB 0,1,2,3 USB 5USB 4
USB Connectors
MiniPCIE
USB 6
New CardCamera
USB 7 USB 8,9
BlueTooth
Reserve
Internal Microphone
Line Out & SPDIF
MDC
X-Bus
BIOS ROM
KBC
Internal SPK
A A
Audio AMP
ANPEC2030
LPC
ene KB3910
LPC Debug Port
5
4
3
Internal Keyboard
Touch Pad
Smart Fan
For CPU & System
2
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Monday, July 16, 2007
Monday, July 16, 2007
Monday, July 16, 2007
MS-163B1
Block Diagram
Block Diagram
Block Diagram
1
Sheet ofDate:
243
Sheet ofDate:
243
Sheet ofDate:
243
0B
0B
0B
5
4
3
2
1
+3VALW 19pin
SYSTEM PWR
+5VALW 21pin
LDO
RUND
D D
PWR_SRC
+5VSUS 4A
PWR SWITCH
SUS_ON
ENABLE
USB5V_A
RUND
ADD5V
+5VRUN
+3VSUS 4A
TPS51120RHBR
VID(0-5)
Output Select
C C
PWR_SRC
CPU CORE
ENABLEVDD_EN
CPU_VDD_RUN
V5_VREF
VCCFAN1
RST5158
RUND_DG
BT_PWRON#
+5V_CAMERA
+5VRUN_BT 0.5A
C_A3V3
D3V3
AVDD_USB 0.5A
+3.3V_AVDDC 0.01A
P2231
RUND
VDD33
+3VSUS_PCIE
+3VRUN
AVDD33 0.1A
AVDD18
EVDD18 0.198A
DVDD15 0.367A
AVDD 0.25A
DEPOP1
P2231
AVDDCK_3V
CLK_VDD 0.4A
XTLVDD_ATA 0.005A
VDD3V 0.05A
LVDS_DIGON
+3VRUN
AME8804_NC
+3VRUN
AME8805DEFT
VDDR3 0.05A
+3V_SPDIF
+3VRUN_PCIE
+3V_LCD
+1.27VRUN
PLLVDD_ATA
+2.5VRUN
MAX8774GTL+
+3VSUS
W83310DS
RUND
1_5_VCC
APL5912
CPU_M_VREF_SUS
MEM_M_VREF_SUS
CPU_VTT_SUS
+1.8VRUN
+1.5VRUN 2A
P2231
AVDDQ 0.625A
PLLVDD 0.625A
HTPVDD 0.625A
AVDDQ
VDD18 0.6A
+1.5VRUN_PCIE
AVDDCK_1.2V
PWR_SRC
ADAPTER&BATTERY
PWR SWITCH
ON/SKIP1
+3VRUN
B B
PWR_SRC
CPU_VDDIO_SUS 4A
RUND
+1.2VSUS 10A +1.2VRUN
+5VSUS
PWR SWITCH
ON/SKIP2
TPS51124RGER_QFN24-RH
A A
5
4
3
VLDT_EN
PLLVDD12 0.2A
VDDA12 0.5A
VDDA18 5A
+1.2VRUN
PCIE_VDDR 0.391A
VDDHT 0.5A
AVDD_SATA 0.245A
PLLVDD_ATA 0.054A
+VLDT
VCC_NB 10A
Title
Title
Title
POWER DELIVERY CHART
POWER DELIVERY CHART
POWER DELIVERY CHART
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
MS-163B1 0B
MS-163B1 0B
MS-163B1 0B
343Monday, July 16, 2007
343Monday, July 16, 2007
343Monday, July 16, 2007
1
5
4
3
2
1
100MHZ
100MHZ
100MHZ
100MHZ
RS690M
GFX_CLKP
GFX_CLKN
SB_OSCIN
SBSRC_CLKP
SBSRC_CLKN
CLK_48M_USB
HTREFCLK
14.318MHZ
100MHZ
100MHZ
48MHZ
REFCLK+
REFCLK-
PIN19
PIN18
OSCIN
MINI-PCIE-CARD
NEW CARD
14M_OSC
PCIE_RCLKP
PCIE_RCLKN
USBCLK
AZ_BITCLK
PCICLK5
SB600
32.768KHZ12.5P_S-2
AZ_BIT_CLK
PCI_CLK5
33MHZ
33MHZ
BIT_CLK
PIN12
LCLK
RTS5158
12MHZ20P_S
ALC883
MDC CONN
KBC
32.768KHZ12.5P_S-2
PSCLK3
SBLINK_CLKP
SBLINK_CLKN
D D
SRCCLKC0
SRCCLKT0
CLKIN_H
CLKIN_L
ATIGCLKT0
ATIGCLKC0
HTTCLK0
FS2/REF2
FS1/REF1
SRCCLKT1
SRCCLKC1
48MHz_0
SRCCLKT2
SRCCLKC2
SRCCLKT4
SRCCLKC4
FAR SODIMMNEAR SODIMM
CK0
CK1
CK0#
CK1#
333MHZ
333MHZ
C C
MEM_MA0_CLK1_N
MEM_MA0_CLK1_P
MA0_CLK_L1
MA0_CLK_H1
333MHZ
333MHZ
MEM_MA0_CLK2_N
MEM_MA0_CLK2_P
MA0_CLK_L2
MA0_CLK_H2
AMD CPU
B B
CK0
CK0#
333MHZ
333MHZ
MEM_MB0_CLK1_N
MEM_MB0_CLK1_P
MB0_CLK_L1
MB0_CLK_H1
CK1
CK1#
333MHZ
333MHZ
MEM_MB0_CLK2_N
MEM_MB0_CLK2_P
MB0_CLK_L2
MB0_CLK_H2
CPUCLK8T0
CPUCLK8C0
CPUCLK
CPUCLK#
200MHZ
200MHZ
100MHZ
100MHZ
NBSRC_CLKP
NBSRC_CLKN
HTREFCLK
NB_OSC
GPP_CLK0P
GPP_CLK0N
GPP_CLK2P
GPP_CLK2N
SB_CLKP
SB_CLKN
100MHZ
100MHZ
66MHZ
14.318MHZ
SRCCLKT5
SRCCLKC5
GPP_CLK3P
GPP_CLK3N
100MHZ
100MHZ
REFCLK_P
REFCLK_N
RTL8101E
CLOCK GENERATOR
14.31818MHZ20P_S-2
A A
5
14.31818MHZ20P_S-2
4
3
25MHZ20P_S-2
Title
Title
Title
CLOCK DISTRIBUTION
CLOCK DISTRIBUTION
CLOCK DISTRIBUTION
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
MS-163B1 0B
B
MS-163B1 0B
B
MS-163B1 0B
B
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
443Monday, July 16, 2007
443Monday, July 16, 2007
443Monday, July 16, 2007
1
5
4
3
2
1
SCL1
KBC
D D
C C
SDA1
SCL2
SDA2
SCL0/GPOC0#
SCL0/GPOC1#
BATCLK_M
BATADATA_M
SMB_THRMCPU_CLK
SMB_THRMCPU_DAT
SCLK0
SDATA0
BATTERY
CPU THERMAL
MEMORY
SB600
CLOCK GENERATOR
SCL0/GPOC2#
SCL0/GPOC3#
SCLK1
SDATA1
NEW CARD
B B
MINI-PCIE
DACSCL
R690MC CRT
A A
5
DACSDA
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
4
3
Date: Sheet of
I2C ILLUSTRATE
I2C ILLUSTRATE
I2C ILLUSTRATE
MS-163B1 0B
A
MS-163B1 0B
A
MS-163B1 0B
A
543Monday, July 16, 2007
543Monday, July 16, 2007
2
543Monday, July 16, 2007
1
5
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
+VLDT
D D
C239
C239
C245
C0.1U10X0402
C0.1U10X0402
X_C0.1U10X0402
X_C0.1U10X0402
D4
D3
D2
D1
N5
P5
M3
M4
L5
M5
K3
K4
H3
H4
G5
H5
F3
F4
E5
F5
N3
N2
L1
M1
L3
L2
J1
K1
G1
H1
G3
G2
E1
F1
E3
E2
J5
K5
J3
J2
P3
P4
N1
P1
C245
X_C0.1U10X0402
X_C0.1U10X0402
VLDT_A3
VLDT_A2
VLDT_A1
VLDT_A0
L0_CADIN_H15
L0_CADIN_L15
L0_CADIN_H14
L0_CADIN_L14
L0_CADIN_H13
L0_CADIN_L13
L0_CADIN_H12
L0_CADIN_L12
L0_CADIN_H11
L0_CADIN_L11
L0_CADIN_H10
L0_CADIN_L10
L0_CADIN_H9
L0_CADIN_L9
L0_CADIN_H8
L0_CADIN_L8
L0_CADIN_H7
L0_CADIN_L7
L0_CADIN_H6
L0_CADIN_L6
L0_CADIN_H5
L0_CADIN_L5
L0_CADIN_H4
L0_CADIN_L4
L0_CADIN_H3
L0_CADIN_L3
L0_CADIN_H2
L0_CADIN_L2
L0_CADIN_H1
L0_CADIN_L1
L0_CADIN_H0
L0_CADIN_L0
L0_CLKIN_H1
L0_CLKIN_L1
L0_CLKIN_H0
L0_CLKIN_L0
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
should be routed at
least 200 mils wide
VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0
+VLDT
AE5
AE4
AE3
AE2
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
Y4
Y3
Y1
W1
HT_CPU_CTLOUT1_P
T5
HT_CPU_CTLOUT1_N
R5
R2
R3
U1AU1A
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
C240
C240
C238
C238
C0.1U10X0402
C0.1U10X0402
C244
C244
C4.7U6.3X50805
C4.7U6.3X50805
HT_CADIN15_P11
HT_CADIN15_N11
HT_CADIN14_P11
HT_CADIN14_N11
HT_CADIN13_P11
HT_CADIN13_N11
HT_CADIN12_P11
HT_CADIN12_N11
HT_CADIN11_P11
HT_CADIN11_N11
HT_CADIN10_P11
HT_CADIN10_N11
HT_CADIN9_P11
C C
HT_CADIN9_N11
HT_CADIN8_P11
HT_CADIN8_N11
HT_CADIN7_P11
HT_CADIN7_N11
HT_CADIN6_P11
HT_CADIN6_N11
HT_CADIN5_P11
HT_CADIN5_N11
HT_CADIN4_P11
HT_CADIN4_N11
HT_CADIN3_P11
HT_CADIN3_N11
HT_CADIN2_P11
HT_CADIN2_N11
HT_CADIN1_P11
HT_CADIN1_N11
HT_CADIN0_P11
HT_CADIN0_N11
+VLDT
R218 51R0402R218 51R0402
R217 51R0402R217 51R0402
HT_CLKIN1_P11
HT_CLKIN1_N11
HT_CLKIN0_P11
HT_CLKIN0_N11
HT_CTLIN1_P
HT_CTLIN1_N
HT_CTLIN0_P11
HT_CTLIN0_N11
Athlon 64 S1 Processor Socket
B B
A A
RN9
RN9
8P4R-680R0402
8P4R-680R0402
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
246
135
SB_CPUPWRGD CPU_ALL_PWROK
LDT_STOP#
8
7
5
0R37 0R_NC0R37 0R_NC
12
0R36 0R_NC0R36 0R_NC
12
0R35 0R_NC0R35 0R_NC
12
CPU_LDTSTOP#
CPU_HT_RESET#LDT_RST#
4
+VDDA
VDDA 2.5V
HT_CADOUT15_P 11
HT_CADOUT15_N 11
HT_CADOUT14_P 11
HT_CADOUT14_N 11
HT_CADOUT13_P 11
HT_CADOUT13_N 11
HT_CADOUT12_P 11
HT_CADOUT12_N 11
HT_CADOUT11_P 11
HT_CADOUT11_N 11
HT_CADOUT10_P 11
HT_CADOUT10_N 11
HT_CADOUT9_P 11
HT_CADOUT9_N 11
HT_CADOUT8_P 11
HT_CADOUT8_N 11
HT_CADOUT7_P 11
HT_CADOUT7_N 11
HT_CADOUT6_P 11
HT_CADOUT6_N 11
HT_CADOUT5_P 11
HT_CADOUT5_N 11
HT_CADOUT4_P 11
HT_CADOUT4_N 11
HT_CADOUT3_P 11
HT_CADOUT3_N 11
HT_CADOUT2_P 11
HT_CADOUT2_N 11
HT_CADOUT1_P 11
HT_CADOUT1_N 11
HT_CADOUT0_P 11
HT_CADOUT0_N 11
HT_CLKOUT1_P 11
HT_CLKOUT1_N 11
HT_CLKOUT0_P 11
HT_CLKOUT0_N 11
HT_CTLOUT0_P 11
HT_CTLOUT0_N 11
4
PC41
PC41
VDDA_EN34
TP12TP12
TP11TP11
1u_6.3V_0402
1u_6.3V_0402
VDDA_EN
PC43
PC43
X_10u_6V_0603
X_10u_6V_0603
PD1
PD1
S-RB751V-40
S-RB751V-40
PR2
PR2
1K_0402
1K_0402
SB_CPUPWRGD17
LDT_STOP#13,17
+3VSUS
AC
PR3
PR3
100K_0402
100K_0402
LDT_RST#17
VDD_PG34,37
1
IN
3
SHDN
OUT5GND
PU1
PU1
RT9167/A
RT9167/A
VDDA_PG
CPU_PROCHOT#_1.8
RN8
RN8
X_8P4R-1KR0402
X_8P4R-1KR0402
BP
+1.8VRUN
246
135
3
+VDDA
4
PC45
PC45
0.01u_16V_0402
0.01u_16V_0402
2
CPU_VDDA_2.5_RUN
place them to CPU within
1"(5mil trace 10mil space)
CPUCLK15
CPUCLK#15
CPU_VDDIO_SUS
CPU_VDDIO_SUS
R222
R222
X_10K_0402
X_10K_0402
CPU_PH_G
X_4.7K_0402
X_4.7K_0402
B
E C
Q38
Q38
X_SMBT3904
X_SMBT3904
147
U29A
U29A
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U29B
U29B
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U29C
U29C
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U29D
U29D
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U29E
U29E
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
147
U29F
U29F
X_LCX07MTCTSSOP14
X_LCX07MTCTSSOP14
+VLDT
R223
R223
+1.8VRUN
+3VRUN
3
VDDA_PG 34
PC10
PC10
2.2u_6V_0603
2.2u_6V_0603
8
7
+3VSUS
1 2
3 4
5 6
9 8
11 10
13 12
C20
C20
C3900P50X
C3900P50X
169R1%0402
169R1%0402
C19
C19
C3900P50X
C3900P50X
R15 510R0402R15 510R0402
R16 510R0402R16 510R0402
135
7
246
8
CPU_HT_RESET#
R220 44.2R1%R220 44.2R1%
R219 44.2R1%R219 44.2R1%
CPU_VDD_RUN_FB_H37
CPU_VDD_RUN_FB_L37
R11
R11
SB_TALERT# 19
RN10
RN10
X_8P4R-330R0402
X_8P4R-330R0402
CPU_SPI#_L
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_SIC_R17
CPU_SID_R17
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
TP20TP20
TP15TP15
TP18TP18
TP16TP16
TP14TP14
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST5_THERMDC
CPU_TEST4_THERMDA
CPU_TEST4_THERMDA
CPU_TEST5_THERMDC
ATHLON Control and Debug
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
C253
C253
Cap close to
thermal
sensor
C255
C255
C0.1U16Y0402
C0.1U16Y0402
C4.7U6.3X50805
C4.7U6.3X50805
CPU_HT_RESET#
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_SIC_R
CPU_HTREF1
CPU_HTREF0
CPU_VDD_RUN_FB_H
CPU_VDD_RUN_FB_L
TP65TP65
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
C2200P50X0402
C2200P50X0402
T_CRIT_CPU#34
C249
C249
X_C1000P50X0402
X_C1000P50X0402
CPU_SID_R
TP71TP71
TP69TP69
TP70TP70
TP67TP67
C252
C252
F8
VDDA2
F9
VDDA1
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
AF4
SIC
AF5
SID
P6
HT_REF1
R6
HT_REF0
F6
VDD_FB_H
E6
VDD_FB_L
W9
VDDIO_FB_H
Y9
VDDIO_FB_L
A9
CLKIN_H
A8
CLKIN_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
TEST25_HE9TEST29_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
THERMDC
W8
THERMDA
Y6
TEST3
AB6
TEST2
P20
RSVD0
P19
RSVD1
N20
RSVD2
N19
RSVD3
R26
RSVD4
R25
RSVD5
P22
RSVD6
R22
RSVD7
AMD NPT S1 SOCKET
Processor Socket
2
U1D
U1D
THERMTRIP_L
CPU_PRESENT_L
JTAC
JTAC
MISC
MISC
+3VSUS
C246
C246
C0.1U16Y0402
C0.1U16Y0402
R14
R14
X_0R0402
X_0R0402
2
PROCHOT_L
PSI_L
DBREQ_L
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
AF6
AC7
CPU_VID5
A5
VID5
CPU_VID4
C6
VID4
CPU_VID3
A6
VID3
CPU_VID2
A4
VID2
CPU_VID1
C5
VID1
CPU_VID0
B5
VID0
CPU_PRESENT#
AC6
CPU_SPI#_L
A3
CPU_DBREQ#
E10
CPU_TDO
AE9
TDO
CPU_TEST29_H_FBCLKOUT_P
C9
CPU_TEST29_L_FBCLKOUT_N
C8
AE7
AD7
AE8
AB8
AF7
J7
H8
AF8
AE6
K8
C4
H16
B18
B3
C1
H6
G6
D5
R24
W18
R23
AA8
H18
H19
Close to CPU socket
1
2
3
LM86CIMMXNOPB_MSOP8-RH
LM86CIMMXNOPB_MSOP8-RH
R13
R13
X_10KR0402
X_10KR0402
CPU_VDDIO_SUS
330R0402
330R0402
CPU_THERMTRIP#
CPU_PROCHOT#_1.8
CPU_VDDIO_SUS
R226
R226
510_0402 _NC
510_0402 _NC
TP72TP72
TP73TP73
TP74TP74
TP75TP75
U31
U31
VDD
SMBCLK
D+
SMBData
D-
ALERT
T_CRIT_A4GND
1
+1.8VRUN
R224
R224
R225
R225
10KR0402
10KR0402
Q39
Q39
B
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
CE
TP13TP13
+1.8VRUN
TP17TP17
R230
R230
80.6R1%0402
80.6R1%0402
CPU_TEST21_SCANEN
CPU_TEST26_BURNIN#
CPU_SIC_R
CPU_SID_R
CPU_THERMTRIP#
CPU_PROCHOT#_1.8
CPU_TEST19_PLLTEST0
CPU_TEST18_PLLTEST1
CPU_TEST21_SCANEN
CPU_TEST26_BURNIN#
CPU_THERMTRIP_D#
CE
Q37
Q37
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
B
R221
R221
10KR0402
10KR0402
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
CPU_VID5 37
CPU_VID4 37
CPU_VID3 37
CPU_VID2 37
CPU_VID1 37
CPU_VID0 37
CPU_PSI#
2/19 modify by benny
8P4R-330R0402
8P4R-330R0402
2
4
6
8
8P4R-330R0402
8P4R-330R0402
2
4
6
8
+3VSUS
CPU_PSI# 37
CPU_VDDIO_SUS
RN11
RN11
RN12
RN12
change to +3vsus 0508
RN13
RN13
SMB_THRMCPU_CLK
SMB_THRMCPU_DATA
CPU_THRM_ALERT-
SMB_THRMCPU_CLK
8
SMB_THRMCPU_DATA
7
6
5
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Monday, July 16, 2007
Monday, July 16, 2007
Monday, July 16, 2007
1
3
5
7
8P4R-10KR0402
8P4R-10KR0402
SMB_THRMCPU_CLK 30
SMB_THRMCPU_DATA 30
CPU_THRM_ALERT- 30
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MS-163B1
AMD S1 HT & CTRL I/F
AMD S1 HT & CTRL I/F
AMD S1 HT & CTRL I/F
1
R344
R344
X_10KR0402
X_10KR0402
CPU_THERMTRIP_D# 18
1
3
5
7
1
3
5
7
+3VSUS
2
4
6
8
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
0B
0B
0B
643
643
643
5
4
3
2
1
MEM_MB_DATA[63..0]9
D D
C C
B B
A A
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
VTT_SENSE
should be routed as a 10-mil trace with 10 mils spacing.
CPU_VDDIO_SUS CPU_M_VREF_SUS
R233
R233
39.2R1%0402
39.2R1%0402
R235
R235
39.2R1%0402
39.2R1%0402
PLACE THEM CLOSE TO
CPU WITHIN 1"
MEM_MA0_CS#39,10 MEM_MA0_CLK2_P 9
MEM_MA0_CS#29,10
MEM_MA0_CS#19,10
MEM_MA0_CS#09,10
MEM_MB0_CS#39,10
MEM_MB0_CS#29,10
MEM_MB0_CS#19,10
MEM_MB0_CS#09,10
MEM_MA_ADD[15..0]9,10
MEM_MA_BANK29,10
MEM_MA_BANK19,10 MEM_MB_BANK1 9,10
MEM_MA_BANK09,10
TP19TP19
MEM_MB_CKE19,10
MEM_MB_CKE09,10
MEM_MA_CKE19,10
MEM_MA_CKE09,10
MEM_MA_RAS#9,10
MEM_MA_CAS#9,10
MEM_MA_WE#9,10
CPU_VDDIO_SUS
R237
R237
1KR1%0402
1KR1%0402
R238
R238
1KR1%0402
1KR1%0402
CPU_M_VREF
W17
SNS_+0.9VTT
Y10
M_ZN
AE10
M_ZP
AF10
V19
J22
V22
T19
Y26
J24
W24
U23
H26
J23
J20
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
J21
K19
K20
V24
K24
L20
R19
L19
L22
L21
M19
M20
M24
M22
N22
N21
R21
K22
R20
T22
T20
U20
U21
VDD_VREF_SUS_CPU
CPU_M_VREF_SUS
C277
C277
C0.1U10X0402
C0.1U10X0402
LAYOUT:PLACE CLOSE TO CPU
5
15MIL trace, 20MIL space,
shorter than 1"
U1B
U1B
MEMVREF
VTT_SENSE
MEMZN
MEMZP
MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0
MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0
MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS_L
MA_CAS_L
MA_WE_L
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
Athlon 64 S1
Processor
Socket
VTT1
VTT2
VTT3
VTT4
VTT5
VTT6
VTT7
VTT8
VTT9
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
MB_WE_L
4
CPU_VTT_SUS
D10
C10
B10
AD10
W10
AC10
AB10
AA10
A10
Y16
AA16
E16
F16
AF18
AF17
A17
A18
W23
W26
V20
U19
MEM_MB_ADD15
J25
MEM_MB_ADD14
J26
MEM_MB_ADD13
W25
MEM_MB_ADD12
L23
MEM_MB_ADD11
L25
MEM_MB_ADD10
U25
MEM_MB_ADD9
L24
MEM_MB_ADD8
M26
MEM_MB_ADD7
L26
MEM_MB_ADD6
N23
MEM_MB_ADD5
N24
MEM_MB_ADD4
N25
MEM_MB_ADD3
N26
MEM_MB_ADD2
P24
MEM_MB_ADD1
P26
MEM_MB_ADD0
T24
K26
T26
U26
U24
V26
U22
CLOSE TO CPU SOCKET
C263
C263
C258
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
MEM_MA0_CLK2_N 9
MEM_MA0_CLK1_P 9
MEM_MA0_CLK1_N 9
MEM_MB0_CLK2_P 9
MEM_MB0_CLK2_N 9
MEM_MB0_CLK1_P 9
MEM_MB0_CLK1_N 9
MEM_MB0_ODT1 9,10
MEM_MB0_ODT0 9,10
MEM_MA0_ODT1 9,10
MEM_MA0_ODT0 9,10
MEM_MB_ADD[15..0] 9,10
MEM_MB_BANK2 9,10
MEM_MB_BANK0 9,10
MEM_MB_RAS# 9,10
MEM_MB_CAS# 9,10
MEM_MB_WE# 9,10
MEM_MB0_CLK2_P9
MEM_MB0_CLK2_N9
MEM_MB0_CLK1_P9
MEM_MB0_CLK1_N9
MEM_MA0_CLK2_P9
MEM_MA0_CLK2_N9
MEM_MA0_CLK1_P9
MEM_MA0_CLK1_N9
C258
C1000P50X0402
C1000P50X0402
C261
C261
C259
C259
C257
C257
C1000P50X0402
C1000P50X0402
C1000P50X0402
C1000P50X0402
C262
C262
C256
C256
C271
C271
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
CLOSE TO CPU SOCKET
Differential CTT termination
C280
C280
C1.5P50N0402
C1.5P50N0402
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C281
C281
C1.5P50N0402
C1.5P50N0402
Differential CTT termination
C274
C274
C1.5P50N0402
C1.5P50N0402
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C275
C275
C1.5P50N0402
C1.5P50N0402
X_C0.1U10X0402
X_C0.1U10X0402
C268
C268
C1000P50X0402
C1000P50X0402
3
C264
C264
X_C1000P50X0402
X_C1000P50X0402
MEM_MB_DM[7..0]9
MEM_MB_DQS7_P9
MEM_MB_DQS7_N9
MEM_MB_DQS6_P9
MEM_MB_DQS6_N9
MEM_MB_DQS5_P9
MEM_MB_DQS5_N9
MEM_MB_DQS4_P9
MEM_MB_DQS4_N9
MEM_MB_DQS3_P9
MEM_MB_DQS3_N9
MEM_MB_DQS2_P9
MEM_MB_DQS2_N9
MEM_MB_DQS1_P9
MEM_MB_DQS1_N9
MEM_MB_DQS0_N9
A1
AF1
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30 MEM_MA_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26 MEM_MA_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21 MEM_MA_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DM7
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AD11
AE14
AB11
AC12
AC18
AD14
AC14
AE18
AD18
AD20
AC20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
AD12
AC16
AE22
AB26
AE12
AE16
AD16
AC25
AC26
AF11
AF14
AF13
AF15
AF16
AF19
AF23
AF24
AF20
AF12
AF21
AF22
Y11
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11
E25
A22
B16
A12
F26
E26
A24
A23
D16
C16
C12
B12
A26
Athlon 64 S1g1
uPGA638
Top View
2
Processor DDR2 Memory Interface
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
U1C
U1C
DDR: DATA
DDR: DATA
AMD S1
Processor
Socket
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
Y13
AB16
Y19
AC24
F24
E19
C15
E12
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_DM7
MEM_MA_DM6MEM_MB_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
MEM_MA_DATA[63..0] 9
MEM_MA_DM[7..0] 9
MEM_MA_DQS7_P 9
MEM_MA_DQS7_N 9
MEM_MA_DQS6_P 9
MEM_MA_DQS6_N 9
MEM_MA_DQS5_P 9
MEM_MA_DQS5_N 9
MEM_MA_DQS4_P 9
MEM_MA_DQS4_N 9
MEM_MA_DQS3_P 9
MEM_MA_DQS3_N 9
MEM_MA_DQS2_P 9
MEM_MA_DQS2_N 9
MEM_MA_DQS1_P 9
MEM_MA_DQS1_N 9
MEM_MA_DQS0_P 9MEM_MB_DQS0_P9
MEM_MA_DQS0_N 9
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MS-163B1
AMD S1 DDR II Memory I/F
AMD S1 DDR II Memory I/F
AMD S1 DDR II Memory I/F
Monday, July 16, 2007
Monday, July 16, 2007
Monday, July 16, 2007
1
Sheet ofDate:
743
Sheet ofDate:
743
Sheet ofDate:
743
0B
0B
0B
5
D D
CPU_VDD_RUN CPU_VDD_RUN
AC4
AD2
G4
H2
J11
J13
K6
K10
K12
K14
L11
L13
M2
M6
M8
M10
N7
N9
N11
P8
P10
R4
C C
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
V6
V8
V10
A1
U1E
U1E
VDD1
VDD2
VDD3
VDD4
J9
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
VDD30
VDD31
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
VDD40
VDD41
VDD42
POWER
POWER
Athlon 64 S1
Processor
Socket
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
CPU_VDDIO_SUS
A26
Athlon 64 S1g1
uPGA638
Top View
B B
AF1
4
U1F
U1F
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
VSS5
AA19
VSS6
AB2
VSS7
AB7
VSS8
AB9
VSS9
AB23
VSS10
AB25
VSS11
AC11
VSS12
AC13
VSS13
AC15
VSS14
AC17
VSS15
AC19
VSS16
AC21
VSS17
AD6
VSS18
AD8
VSS19
AD25
VSS20
AE11
VSS21
AE13
VSS22
AE15
VSS23
AE17
VSS24
AE19
VSS25
AE21
VSS26
AE23
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
B11
VSS32
B13
VSS33
B15
VSS34
B17
VSS35
B19
VSS36
B21
VSS37
B23
VSS38
B25
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
D11
VSS43
D13
VSS44
D15
VSS45
D17
VSS46
D19
VSS47
D21
VSS48
D23
VSS49
D25
VSS50
E4
VSS51
F2
VSS52
F11
VSS53
F13
VSS54
F15
VSS55
F17
VSS56
F19
VSS57
F21
VSS58
F23
VSS59
F25
VSS60
H7
VSS61
H9
VSS62
H21
VSS63
H23
VSS64
J4
VSS65
GROUND
GROUND
Athlon 64 S1
Processor
Socket
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
3
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
BOTTOMSIDE DECOUPLING
CPU_VDD_RUN
1 2
1 2
C270
C270
CPU_VDD_RUN
C242
C242
CPU_VDDIO_SUS
C92
C92
1 2
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
C272
C272
C247
C247
C283
C283
1 2
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C0.1U10X0402
C0.1U10X0402
C4.7U6.3X50805
C4.7U6.3X50805
1 2
C265
C265
C236
C22U10Y1206-RH-1
C22U10Y1206-RH-1
C0.1U10X0402
C0.1U10X0402
C286
C286
C4.7U6.3X50805
C4.7U6.3X50805
C236
C22U10Y1206-RH-1
C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
C250
C250
C0.1U10X0402
C0.1U10X0402
C284
C284
C282
C282
C4.7U6.3X50805
C4.7U6.3X50805
C269
C269
C248
C248
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU_VDDIO_SUS
C296
C278
C278
C296
C299
C299
C288
C294
C294
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
C288
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
C4.7U6.3X50805
X_C0.1U16Y0402
X_C0.1U16Y0402
1 2
X_C0.1U10X0402
X_C0.1U10X0402
C291
C291
X_C0.1U16Y0402
X_C0.1U16Y0402
2
1 2
1 2
C241
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
C289
C289
X_C0.1U10X0402
X_C0.1U10X0402
C287
C287
C0.1U16Y0402
C0.1U16Y0402
C241
C266
C266
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
X_C22U10Y1206-RH-1
C276
C276
C290
C290
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C0.1U16Y0402
C273
C273
1
PROCESSOR POWER AND GROUND
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Monday, July 16, 2007
Monday, July 16, 2007
5
4
3
2
Monday, July 16, 2007
MS-163B1
AMD S1 Power & GND
AMD S1 Power & GND
AMD S1 Power & GND
1
Sheet ofDate:
843
Sheet ofDate:
843
Sheet ofDate:
843
0B
0B
0B
5
MEM_MA_ADD[15..0]7,10 MEM_MB_ADD[15..0]7,10
D D
MEM_MA_BANK[2..0]7,10 MEM_MB_BANK[2..0]7,10
MEM_MA0_CS#07,10
MEM_MA0_CS#17,10
MEM_MA0_CLK1_P7
MEM_MA0_CLK1_N7
MEM_MA0_CLK2_P7
MEM_MA0_CLK2_N7
MEM_MA_CKE07,10
MEM_MA_CKE17,10
MEM_MA_CAS#7,10
MEM_MA_RAS#7,10
MEM_MA_WE#7,10
SCLK015,18
SDATA015,18
MEM_MA0_ODT07,10
MEM_MA0_ODT17,10
MEM_MA_DM[7..0]7 MEM_MB_DM[7..0]7
C C
B B
CPU_VDDIO_SUS
A A
SCLK0
SDATA0
MEM_MA_DQS0_P7
MEM_MA_DQS1_P7
MEM_MA_DQS2_P7
MEM_MA_DQS3_P7
MEM_MA_DQS4_P7
MEM_MA_DQS5_P7
MEM_MA_DQS6_P7
MEM_MA_DQS7_P7
MEM_MA_DQS0_N7
MEM_MA_DQS1_N7
MEM_MA_DQS2_N7
MEM_MA_DQS3_N7
MEM_MA_DQS4_N7
MEM_MA_DQS5_N7
MEM_MA_DQS6_N7
MEM_MA_DQS7_N7
MEM_MA0_CS#27,10
MEM_MA0_CS#37,10
C367
C367
C4.7U6.3X50805
C4.7U6.3X50805
5
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK2 MEM_MB_BANK2
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
CPU_VDDIO_SUS
+3VRUN
MEM_M_VREF_SUS
C365
C365
C4.7U6.3X50805
C4.7U6.3X50805
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DIMM1B
DIMM1B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND#201
202
GND
203
203
204
204
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DIMM-200S_black-1
DIMM-200S_black-1
DIMM-200S_black-1
DIMM-200S_black-1
DIMM1A
DIMM1A
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
4
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8MEM_MA_ADD8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA32
123
MEM_MA_DATA33
125
MEM_MA_DATA34
135
MEM_MA_DATA35
137
MEM_MA_DATA36
124
MEM_MA_DATA37
126
MEM_MA_DATA38
134
MEM_MA_DATA39
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA42
151
MEM_MA_DATA43
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA46
152
MEM_MA_DATA47
154
MEM_MA_DATA48
157
MEM_MA_DATA49
159
MEM_MA_DATA50
173
MEM_MA_DATA51
175
MEM_MA_DATA52
158
MEM_MA_DATA53
160
MEM_MA_DATA54
174
MEM_MA_DATA55
176
MEM_MA_DATA56
179
MEM_MA_DATA57
181
MEM_MA_DATA58
189
MEM_MA_DATA59
191
MEM_MA_DATA60
180
MEM_MA_DATA61
182
MEM_MA_DATA62
192
MEM_MA_DATA63
194
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
4
CPU_VDDIO_SUS
R281
R281
1KR1%0402
1KR1%0402
R278
R278
1KR1%0402
1KR1%0402
3
MEM_MA_DATA[63..0] 7 MEM_MB_DATA[63..0] 7
MEM_MB0_CS#07,10
MEM_MB0_CS#17,10
MEM_MB0_CLK1_P7
MEM_MB0_CLK1_N7
MEM_MB0_CLK2_P7
MEM_MB0_CLK2_N7
MEM_MB_CKE07,10
MEM_MB_CKE17,10
MEM_MB_CAS#7,10
MEM_MB_RAS#7,10
MEM_MB_WE#7,10
SCLK0
SDATA0
MEM_MB0_ODT07,10
MEM_MB0_ODT17,10
CPU_VDDIO_SUS
C88
C88
C0.1U16Y0402
C0.1U16Y0402
C364
C364
C0.1U16Y0402
C0.1U16Y0402
C363
C363
C0.1U16Y0402
C0.1U16Y0402
C90
C90
C0.1U16Y0402
C0.1U16Y0402
C91
C91
C0.1U16Y0402
C0.1U16Y0402
MEM_MB_DQS0_P7
MEM_MB_DQS1_P7
MEM_MB_DQS2_P7
MEM_MB_DQS3_P7
MEM_MB_DQS4_P7
MEM_MB_DQS5_P7
MEM_MB_DQS6_P7
MEM_MB_DQS7_P7
MEM_MB_DQS0_N7
MEM_MB_DQS1_N7
MEM_MB_DQS2_N7
MEM_MB_DQS3_N7
MEM_MB_DQS4_N7
MEM_MB_DQS5_N7
MEM_MB_DQS6_N7
MEM_MB_DQS7_N7
MEM_MB0_CS#27,10
MEM_MB0_CS#37,10
MEM_VREF_SUS
MEM_M_VREF_SUS
C368
C368
C0.1U16Y0402
C0.1U16Y0402
C380
C380
C0.1U16Y0402
C0.1U16Y0402
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
+3VRUN
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
CPU_VDDIO_SUS
+3VRUN
MEM_M_VREF_SUS
LAYOUT: PLACE CLOSE TO DIMMs
3
2
102
A0
101
A1
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10/AP
90
A11
89
A12
116
A13
86
A14
84
A15
85
A16_BA2
107
BA0
106
BA1
110
S0#
115
S1#
30
CK0
32
CK0#
164
CK1
166
CK1#
79
CKE0
80
CKE1
113
CAS#
108
RAS#
109
WE#
198
SA0
200
SA1
197
SCL
195
SDA
114
ODT0
119
ODT1
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS#0
29
DQS#1
49
DQS#2
68
DQS#3
129
DQS#4
146
DQS#5
167
DQS#6
186
DQS#7
DIMM2B
DIMM2B
112
VDD1
111
VDD2
117
VDD3
96
VDD4
95
VDD5
118
VDD6
81
VDD7
82
VDD8
87
VDD9
103
VDD10
88
VDD11
104
VDD12
199
VDDSPD
83
NC1
120
NC2
50
NC3
69
NC4
163
NCTEST
1
VREF
201
GND#201
202
GND
203
203
204
204
47
VSS1
133
VSS2
183
VSS3
77
VSS4
12
VSS5
48
VSS6
184
VSS7
78
VSS8
71
VSS9
72
VSS10
121
VSS11
122
VSS12
196
VSS13
193
VSS14
8
VSS15
DIMM-200S_black
DIMM-200S_black
2
DIMM2A
DIMM2A
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DIMM-200S_black
DIMM-200S_black
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
MEM_MB_DATA0
5
MEM_MB_DATA1
7
MEM_MB_DATA2
17
MEM_MB_DATA3
19
MEM_MB_DATA4
4
MEM_MB_DATA5
6
MEM_MB_DATA6
14
MEM_MB_DATA7
16
MEM_MB_DATA8
23
MEM_MB_DATA9
25
MEM_MB_DATA10
35
MEM_MB_DATA11
37
MEM_MB_DATA12
20
MEM_MB_DATA13
22
MEM_MB_DATA14
36
MEM_MB_DATA15
38
MEM_MB_DATA16
43
MEM_MB_DATA17
45
MEM_MB_DATA18
55
MEM_MB_DATA19
57
MEM_MB_DATA20
44
MEM_MB_DATA21
46
MEM_MB_DATA22
56
MEM_MB_DATA23
58
MEM_MB_DATA24
61
MEM_MB_DATA25
63
MEM_MB_DATA26
73
MEM_MB_DATA27
75
MEM_MB_DATA28
62
MEM_MB_DATA29
64
MEM_MB_DATA30
74
MEM_MB_DATA31
76
MEM_MB_DATA32
123
MEM_MB_DATA33
125
MEM_MB_DATA34
135
MEM_MB_DATA35
137
MEM_MB_DATA36
124
MEM_MB_DATA37
126
MEM_MB_DATA38
134
MEM_MB_DATA39
136
MEM_MB_DATA40
141
MEM_MB_DATA41
143
MEM_MB_DATA42
151
MEM_MB_DATA43
153
MEM_MB_DATA44
140
MEM_MB_DATA45
142
MEM_MB_DATA46
152
MEM_MB_DATA47
154
MEM_MB_DATA48
157
MEM_MB_DATA49
159
MEM_MB_DATA50
173
MEM_MB_DATA51
175
MEM_MB_DATA52
158
MEM_MB_DATA53
160
MEM_MB_DATA54
174
MEM_MB_DATA55
176
MEM_MB_DATA56
179
MEM_MB_DATA57
181
MEM_MB_DATA58
189
MEM_MB_DATA59
191
MEM_MB_DATA60
180
MEM_MB_DATA61
182
MEM_MB_DATA62
192
MEM_MB_DATA63
194
18
24
41
53
42
54
59
65
60
66
127
139
128
145
165
171
172
177
187
178
190
9
21
33
155
34
132
144
156
168
2
3
15
27
39
149
161
28
40
138
150
162
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
Custom
Custom
Custom
Monday, July 16, 2007
Monday, July 16, 2007
Monday, July 16, 2007
CPU_VDDIO_SUS
CPU_VDDIO_SUS
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
DDR II A/B SO-DIMM CONN.
DDR II A/B SO-DIMM CONN.
DDR II A/B SO-DIMM CONN.
1
C392
C392
C4.7U6.3X50805
C4.7U6.3X50805
MS-163B1
MS-163B1
MS-163B1
1
C94
C94
C0.1U16Y0402
C0.1U16Y0402
C93
C93
C0.1U16Y0402
C0.1U16Y0402
C95
C95
C0.1U16Y0402
C0.1U16Y0402
C395
C395
C0.1U16Y0402
C0.1U16Y0402
C396
C396
C0.1U16Y0402
C0.1U16Y0402
C393
C393
C4.7U6.3X50805
C4.7U6.3X50805
Sheet ofDate:
943
Sheet ofDate:
943
Sheet ofDate:
943
0B
0B
0B
5
4
3
2
1
MEM_MA_ADD[15..0]7,9
D D
MEM_MA_BANK[2..0]7,9
C C
MEM_MA_ADD[15..0]
MEM_MA_BANK[2..0]
MEM_MA_CAS#7,9
MEM_MA_WE#7,9
MEM_MA_RAS#7,9
MEM_MA0_CS#07,9
MEM_MA0_CS#17,9
MEM_MA0_CS#27,9
MEM_MA0_CS#37,9
MEM_MA0_ODT07,9
MEM_MA0_ODT17,9
MEM_MA_CKE17,9
MEM_MA_CKE07,9
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA_RAS#
MEM_MA0_CS#0
MEM_MA0_CS#1
MEM_MA0_CS#2
MEM_MA0_CS#3
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MA_CKE0
MEM_MA_ADD12
MEM_MA_BANK2
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD5
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_BANK0
MEM_MA_ADD10
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA_ADD13
MEM_MA0_ODT1
MEM_MA0_CS#3
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_CKE1
MEM_MA0_CS#2
MEM_MA_ADD4
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD11
MEM_MA_RAS#
MEM_MA_BANK1
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA0_CS#1
MEM_MA0_ODT0
MEM_MA0_CS#0
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
CPU_VTT_SUS
2
RN14
RN14
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN15
RN15
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN16
RN16
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN17
RN17
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN18
RN18
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN19
RN19
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN20
RN20
4
8P4R-47R0402
8P4R-47R0402
6
8
2
RN21
RN21
4
8P4R-47R0402
8P4R-47R0402
6
8
CHANNEL A VTT BYPASS CAP CHANNEL B VTT BYPASS CAP
CPU_VTT_SUS
MEM_MB_ADD[15..0]7,9
B B
MEM_MB_BANK[2..0]7,9
MEM_MB_ADD[15..0]
MEM_MB_BANK[2..0]
MEM_MB_CAS#7,9
MEM_MB_WE#7,9
MEM_MB_RAS#7,9
MEM_MB0_CS#07,9
MEM_MB0_CS#17,9
MEM_MB0_CS#27,9
MEM_MB0_CS#37,9
MEM_MB0_ODT07,9
MEM_MB0_ODT17,9
MEM_MB_CKE17,9
MEM_MB_CKE07,9
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CAS#
MEM_MB_WE#
MEM_MB_RAS#
MEM_MB0_CS#0
MEM_MB0_CS#1
MEM_MB0_CS#2
MEM_MB0_CS#3
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB_CKE1
MEM_MB_CKE0
MEM_MB_CKE0
MEM_MB0_CS#2
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD5
MEM_MB_ADD3
MEM_MB_ADD1
MEM_MB_ADD10
MEM_MB_WE#
MEM_MB_CAS#
MEM_MB0_CS#1
MEM_MB_ADD13
MEM_MB_ADD11
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_CKE1
MEM_MB_ADD0
MEM_MB_ADD2
MEM_MB_ADD4
MEM_MB_ADD6
MEM_MB0_CS#0
MEM_MB_RAS#
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB0_CS#3
MEM_MB0_ODT1
MEM_MB0_ODT0
1
2
RN22
RN22
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN23
RN23
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN24
RN24
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN25
RN25
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN28
RN28
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN26
RN26
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN29
RN29
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
1
2
RN27
RN27
3
4
8P4R-47R0402
8P4R-47R0402
5
6
7
8
CPU_VTT_SUS
CPU_VTT_SUS CPU_VTT_SUS
C354
C354
C4.7U6.3X50805
C4.7U6.3X50805
C373
C373
C0.1U16Y0402
C0.1U16Y0402
C351
C351
C0.1U16Y0402
C0.1U16Y0402
C376
C376
C0.1U16Y0402
C0.1U16Y0402
C342
C342
C0.1U16Y0402
C0.1U16Y0402
C343
C343
C0.1U16Y0402
C0.1U16Y0402
C377
C377
C0.1U16Y0402
C0.1U16Y0402
C374
C374
C0.1U16Y0402
C0.1U16Y0402
C344
C344
C0.1U16Y0402
C0.1U16Y0402
C353
C353
X_C4.7U6.3X50805
X_C4.7U6.3X50805
C356
C356
X_C0.1U16Y0402
X_C0.1U16Y0402
C369
C369
C0.1U16Y0402
C0.1U16Y0402
C361
C361
C0.1U16Y0402
C0.1U16Y0402
CPU_VDDIO_SUS
C406
C406
C4.7U6.3X50805
C4.7U6.3X50805
C384
C384
C0.1U16Y0402
C0.1U16Y0402
C405
C405
C0.1U16Y0402
C0.1U16Y0402
C409
C409
C0.1U16Y0402
C0.1U16Y0402
C378
C378
C0.1U16Y0402
C0.1U16Y0402
C379
C379
C0.1U16Y0402
C0.1U16Y0402
C385
C385
C0.1U16Y0402
C0.1U16Y0402
C408
C408
C0.1U16Y0402
C0.1U16Y0402
C404
C404
C0.1U16Y0402
C0.1U16Y0402
CPU_VTT_SUS
C400
C400
X_C4.7U6.3X50805
X_C4.7U6.3X50805
C375
C375
X_C0.1U16Y0402
X_C0.1U16Y0402
C399
C399
C0.1U16Y0402
C0.1U16Y0402
C401
C401
X_C0.1U16Y0402
X_C0.1U16Y0402
C381
C381
X_C0.1U16Y0402
X_C0.1U16Y0402
C391
C391
C0.1U16Y0402
C0.1U16Y0402
CPU_VDDIO_SUS
A A
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MICRO-STAR INT'L CO.,LTD
MS-163B1
MS-163B1
MSI
MSI
MSI
Size Document Description Rev
Size Document Description Rev
Size Document Description Rev
C
C
C
Monday, July 16, 2007
Monday, July 16, 2007
5
4
3
2
Monday, July 16, 2007
MS-163B1
DDR II A/B Terminations
DDR II A/B Terminations
DDR II A/B Terminations
1
0B
0B
10 43
10 43
10 43
0B
Sheet ofDate:
Sheet ofDate:
Sheet ofDate:
5
D D
HT_CADOUT15_P6
HT_CADOUT15_N6
HT_CADOUT14_P6
HT_CADOUT14_N6
HT_CADOUT13_P6
HT_CADOUT13_N6
HT_CADOUT12_P6
HT_CADOUT12_N6
HT_CADOUT11_P6
HT_CADOUT11_N6
HT_CADOUT10_P6
HT_CADOUT10_N6
HT_CADOUT9_P6
HT_CADOUT9_N6
HT_CADOUT8_P6
HT_CADOUT8_N6
HT_CADOUT7_P6
HT_CADOUT7_N6
C C
HT_CADOUT6_P6
HT_CADOUT6_N6
HT_CADOUT5_P6
HT_CADOUT5_N6
HT_CADOUT4_P6
HT_CADOUT4_N6
HT_CADOUT3_P6
HT_CADOUT3_N6
HT_CADOUT2_P6
HT_CADOUT2_N6
HT_CADOUT1_P6
HT_CADOUT1_N6
HT_CADOUT0_P6
HT_CADOUT0_N6
HT_CLKOUT1_P6
HT_CLKOUT1_N6
HT_CLKOUT0_P6
HT_CLKOUT0_N6
HT_CTLOUT0_P6
HT_CTLOUT0_N6
VDDHT_PKG
4
R30 49.9_0402R30 49.9_0402
R33 49.9_0402R33 49.9_0402
HT_RXCALP
HT_RXCALN
AC21
AB22
AB20
AA20
AA19
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
Y19
T24
R25
U25
U24
V23
U23
V24
V25
W21
W22
Y24
W25
P24
P25
A24
C24
U4A
U4A
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN
RS690M
RS690M
3
P21
HT_TXCAD15P
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
HT_TXCALP
C25
HT_TXCALN
D24
HT_CADIN15_P 6
HT_CADIN15_N 6
HT_CADIN14_P 6
HT_CADIN14_N 6
HT_CADIN13_P 6
HT_CADIN13_N 6
HT_CADIN12_P 6
HT_CADIN12_N 6
HT_CADIN11_P 6
HT_CADIN11_N 6
HT_CADIN10_P 6
HT_CADIN10_N 6
HT_CADIN9_P 6
HT_CADIN9_N 6
HT_CADIN8_P 6
HT_CADIN8_N 6
HT_CADIN7_P 6
HT_CADIN7_N 6
HT_CADIN6_P 6
HT_CADIN6_N 6
HT_CADIN5_P 6
HT_CADIN5_N 6
HT_CADIN4_P 6
HT_CADIN4_N 6
HT_CADIN3_P 6
HT_CADIN3_N 6
HT_CADIN2_P 6
HT_CADIN2_N 6
HT_CADIN1_P 6
HT_CADIN1_N 6
HT_CADIN0_P 6
HT_CADIN0_N 6
HT_CLKIN1_P 6
HT_CLKIN1_N 6
HT_CLKIN0_P 6
HT_CLKIN0_N 6
HT_CTLIN0_P 6
HT_CTLIN0_N 6
R35 100_0402R35 100_0402
2
1
B B
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
RS690M HT LINK I/F
RS690M HT LINK I/F
RS690M HT LINK I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
MS-163B1
MS-163B1
MS-163B1
1
0B
0B
11 43Monday, July 16, 2007
11 43Monday, July 16, 2007
11 43Monday, July 16, 2007
0B
5
4
3
2
1
U4B
U4B
G5
G4
J8
AB7
AB6
W11
W12
AA11
AB11
AA7
AB9
AA9
W14
W15
AB12
AA12
AA14
AB14
J7
J4
J5
L8
L7
L4
L5
M8
M7
M4
M5
P8
P7
P4
P5
R4
R5
R7
R8
U4
U5
W4
W5
Y4
Y5
V9
W9
Y7
RS690M
RS690M
D D
C C
A_RX2P17
A_RX2N17
A_RX3P17
A_RX3N17
GPP_RX2P23
GPP_RX2N23
GPP_RX3P24
GPP_RX3N24
A_RX0P17
A_RX0N17
A_RX1P17
B B
A_RX1N17
TP30TP30
TP29TP29
version A12
PART 2 OF 5
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P(SB_RX2P)
GPP_RX0N(SB_RX2N)
GPP_RX1P(SB_RX3P)
GPP_RX1N(SB_RX3N)
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
PCE_ISET(NC)
PCE_TXISET(NC)
PART 2 OF 5
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX0P(SB_TX2P)
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0N(SB_TX2N)
GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
A_TX2P_C
AD8
A_TX2N_C
AE8
A_TX3P_C
AD7
A_TX3N_C
AE7
GPP_TX2P_C
AD4
GPP_TX2N_C
AE5
GPP_TX3P_C
AD5
GPP_TX3N_C
AD6
A_TX0P_C
AE9
A_TX0N_C
AD10
A_TX1P_C
AC8
A_TX1N_C
AD9
R53 562_0402 1%R53 562_0402 1%
AD11
R277 2K_1%_0402R277 2K_1%_0402
AE11
R50 562Ohm
R52 2KOhm
C83 0.1u_10V_0402C83 0.1u_10V_0402
C79 0.1u_10V_0402C79 0.1u_10V_0402
C78 0.1u_10V_0402C78 0.1u_10V_0402
C76 0.1u_10V_0402C76 0.1u_10V_0402
C85 0.1u_10V_0402C85 0.1u_10V_0402
C80 0.1u_10V_0402C80 0.1u_10V_0402
C87 0.1u_10V_0402C87 0.1u_10V_0402
C86 0.1u_10V_0402C86 0.1u_10V_0402
C77 0.1u_10V_0402C77 0.1u_10V_0402
C75 0.1u_10V_0402C75 0.1u_10V_0402
C73 0.1u_10V_0402C73 0.1u_10V_0402
C72 0.1u_10V_0402C72 0.1u_10V_0402
VDDA12_PKG2
A_TX2P 17
A_TX2N 17
A_TX3P 17
A_TX3N 17
GPP_TX2P 23
GPP_TX2N 23
GPP_TX3P 24
GPP_TX3N 24
A_TX0P 17
A_TX0N 17
A_TX1P 17
A_TX1N 17
TO NEW CARD
TO LAN
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
RS690T PCI-E LINK&HDMI I/F
RS690T PCI-E LINK&HDMI I/F
RS690T PCI-E LINK&HDMI I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MS-163B1
MS-163B1
MS-163B1
MICRO-STAR INT'L CO.,LTD.
12 43Monday, July 16, 2007
12 43Monday, July 16, 2007
12 43Monday, July 16, 2007
1
0B
0B
0B
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