5
4
3
2
1
AMD S1 PROCESSOR
D D
DVT
EXTERNAL CLOCK GENERATOR
ICS951462
22
638-Pin uFCPGA 638
HyperTransport
LINK0
OUT
DDR II 400/533/667/800
5,6,7,8
16x16
IN
2G BW
ATI NB - RX690
HyperTransport LINK0 CPU I/F
37
ISA I/F
PCIE 16x16
MDC
30
HD AUDIO I/F
ATA 66/100/133 I/F
ATA 66/100/133 I/F
PCI
TPM
40
X1 PCIE INTERFACE
MINIPCIE SLOT
C C
B B
BATTERY CHAGER
SYSTEM MAIN POWER
A A
CPU MEMORY POWER
SB600 & PCIE POWER
5
36
MINIPCIE SLOT
W/L TV
CPU CORE POWER
47
FAN
43
45
45
NewCard
USB#7
W/L
USB#6
4
30
36
42
40
NEW CARD
CAMERA
USB#1
USB#9
USBPORT
USB#5
34
TV/IR
USBPORT
USB#3
36
FINGER
PRINT
USB#0
M76 CORE POWER
CPU&RX690 HT VLDT
POWER
36
30
34
31
44
41
RTL811B
PCIE ETHERNET
X1
USBPORT
USB#4
34
USBPORT
USB#2
31
B/T
USB#8
34 34
1 X16 PCIE VIDEO/SDVO I/F
1 X4 PCIE I/F WITH SB
4 X1 PCIE I/F
31
USB 2.0
PS2
TOUCH
PAD
37
3
11,12,13,14
A-LINK
X4
ATI SB - SB600
USB 2.0 (10 PORTS)
SATA II (4 PORTS)
AZALIA HD AUDIO
AC97 2.3
ATA 66/100/133
SPI I/F
LPC I/F
ACPI 2.0
INT RTC
HW MONITOR
PCI/PCI BDGE
23,24,25,26,27
LPC BUS
KBC ENE3910
KB
BIOS
37
37
UNBUFFERED
DDR2 NEAR
SODIMM
200-PIN DDR2 SODIMM
UNBUFFERED
DDR2 FAR
SODIMM
200-PIN DDR2 SODIMM
ATI M76
LVDS/TMDS/HDMI
15,16,17,18,21
ALC888
AZALIA CODEC
SATA CONNECTOR
IDE CONNECTOR
R5C833
2
9,10
9,10
S-VIDEO
CRT
LVDS
DDRII 400MHz
EXTRA DISPLAY
S-VIDEO
VGA CON
LVDS CON
& INVERTER
GPU MEMORY
DDR3 256M
HDMI
MIC_IN
33
INTERNAL
MIC
32
40
38
38
38
LINE_IN
HEARPHONE
32
35
35
28,29
DISCHARGE CIRCUIT
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
& SPDIF
INTERNAL
SPEAKER
1394
CARD
READER
46
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
Custom
Custom
Custom
MS-1634X
MS-1634X
MS-1634X
33
AMP
33
33
28
29
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
1
19,20
0B
0B
15 1 Thursday, May 31, 2007
15 1 Thursday, May 31, 2007
15 1 Thursday, May 31, 2007
0B
5
ADAPTER 19 VOLTAGE
CHARGER MAX
8724
AC_OK#
D D
ADAPTER &
BATTERY
SELECTOR
V_CHG
BATTERY 6
or 9 CELL
SM BUS to KBC
C C
BATTERY 12~16.8V
PWR_SRC
4
+5VRUN
OZ826LN
System power TPS51120
+5VSUS
OZ813LP
3
+3VSUS
VDD
CPU_VDD_RUN
CPU_VDD_RUN
+1.2VRUN
+1.8VRUN
VDD
+3VALW
VDD_CORE
+3VRUN
+5VALW
+5VSUS +5VRUN
POWER
SWITCH
+3VRUN +3VSUS
+1.8VRUN PCIE_VDD
CPU_VDDIO_SUS
VDD
+1.2VSUS +1.2VRUN
CPU_VDDIO_SUS
POWER
SWITCH
+1.2VSUS
+3VRUN
+3VSUS
2.5V LDO
REGULATOR
+2.5V_REG
REGULATOR
PCIE_VDD
REGULATOR
CPU_VTT
REGULATOR
2
VLDT 1.2V
SWITCH
+VDDA (S0, S1)
CPU_VDD_RUN (S0, S1)
+VLDT (S0, S1)
VDD_HT (S0, S1)
VCC_NB (S0, S1)
VDDA_1V2(S0, S1)
+1.8V(S0, S1)
+2.5V_REG
CPU_VDDIO_SUS (S0, S1, S3)
CPU_VTT_SUS (S0, S1, S3)
VCC_SB
(S0, S1)
AMD CPU S1g1
VDDA 2.5V 500mA
VDDCORE
0.375-1.500V 35A
VLDT 1.2V 1A
GPU M66
GPU CORE 20A
I/O INTERFACE 0.8A
MEMORY I/O CLOCK
PCI-E INTERFACE
1.2V 0.5A
G-MEMORY 5A
DDR2 SODIMMX2
VDD MEM 6A
VTT_MEM 1A
SB SB600
X4 PCI-E 0.8A
ATA I/O 0.2A
ATA PLL 0.01A
PCI-E PVDD 80mA
SB CORE 0.6A
1.2V S5 PW 0.22A
3.3V I/O 0.45A
3.3V S5 PW 0.01A
USB CORE I/O 0.2A
1
NB RX690
HT INTERFACE
NB CORE 5A
PCI-E INTERFACE 5A
GPIO (1.8V) 200mA
PLL INTERFACE(1.8V)
200mA
PLL INTERFACE(1.2V)
GBIT ENTHENET
3.3V 0.5A
B B
INVERTER
+5VSUS
SC413
VDD
VDD_CORE
+1.5VRUN
+1.8VRUN
+3VALW
1.5V
REGULATOR
A A
5
4
+1.5VRUN
+5VSUS
AVDD_5V
SWITCH
CODEC_3V
+5VRUN
USB5V_C
USB X2 RL
USB X2 FR
VDD VDD
1.0A
1.0A
3
2
FINGERPRINT
VDD
0.5A
+5VRUN_BT
BLUETOOTH
VDD
0.5A
(S0, S1, S3, S4, S5)
PCI-E CARD
1.5V (S0, S1) 0.7A
3.3V (S3, S5) 0.3A
3.3V (S0, S1) 1.3A
KBC(ENE3910)
+3VALW 0.01A
(S0, S1, S3, S4, S5)
ALC888
HD CODEC
3.3V CORE 0.035A
5V ANALOG 0.055A
Title
Title
Title
POWER DELIVERY CHART
POWER DELIVERY CHART
POWER DELIVERY CHART
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-1634X
MS-1634X
MS-1634X
Date: Sheet
Date: Sheet
Date: Sheet
OZ711
CORE_VCC 0.15A
PCI_VCC
PCI INTERFACE
AVCC
1394 PHY
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
of
of
of
25 1 Thursday, May 31, 2007
25 1 Thursday, May 31, 2007
25 1 Thursday, May 31, 2007
1
0B
0B
0B
5
ADAPTER 19 VOLTAGE
CHARGER MAX
8724
AC_OK#
D D
Page 47
V_CHG
BATTERY 6
SM BUS to KBC
*
C C
or 9 CELL
INSTALL THE BELOW NET TO +1.8V FOR M72M,M76M
INSTALL THE BELOW NET TO +2.5V FOR M66M,M71M
VDD_CT(GPU)
LPVDD(GPU)
DPLL_PVDD(GPU)
VDD1DI(GPU)
AVDD(GPU)
INSTALL THE BELOW NET TO +1.8V FOR M72M,M76M
INSTALL THE BELOW NET TO +1.2V FOR M66M,M71M
TXVDDR(GPU)
TPVDD(GPU)
ADAPTER &
BATTERY
SELECTOR
Page 46
BATTERY 12~16.8V
PWR_SRC
PCIE_PVDD(GPU)
INSTALL THE BELOW NET TO +3.3V FOR M72M,M76M
INSTALL THE BELOW NET TO +2.5V FOR M66M,M71M
A2VDD(GPU)
B B
0.28A
BL=MAX
VTT_VDDIO_EN
INVERTER
A A
5
VID(0~5)
VDD_EN
SUS_ON
+5VSUS
RUN_ON
4
+5VRUN
VDD
OZ826LN
Output Select
Enable
Page 42
System power TPS51120
VDD
LDO
Swicth Dual
Enable
Page 43
+5VSUS
VDD
OZ813LP
Enable
Enable
Page 45
+5VSUS
VDD
SC1485
Enable
Page 44
4
CPU_VDD_RUN(CPU)
ROM
+3VALW
RTCVCC
VCC(KBC)
+5VALW
+5VSUS
7A
+3VSUS
4A
AVDD_USB(SB)
+3.3V_AVDDC(SB)
S5_3.3V(SB)
VDD33(LAN)
VDD(LM86)
AVCC(PCI)
CORE_VCC(PCI)
XD_VCC(PCI)
+3.3VIN(PCI
+1.2VSUS
CPU_VDDIO_SUS(1.8V)
VDD_CORE(1.1V)
+1.8VRUN
POWER SWITCH)
10A
S5_1.2V(SB)
USB_PHY_1.2V(SB)
16A
8A
+5VRUN
VIN
EN
VIN
EN
APL5912
APL5912
OUT
Page 44
+5VRUN
+3.3VRUN
+5VRUN
3
+1_5VRUN
1.5VIN
EN
+5VRUN
RUN_ON
+5VIN(PCI
POWER SWITCH)
0.2A
0.01A
0.1A
0.22A
7.5A
VDDC(GPU 1.0-1.2V)
VDDCI(GPU 1.0-1.2V)
VDD
+1_5VRUN
Page 39
+2.5VRUN
3
APL5912
+1_5VRUN_PCIE
1.5OUT
Page 44
1.1V,31A,35W
RUND
Run power rail Swicth
+5VRUN
+3VRUN
+1.2VRUN
1A
RT9167A-25PB
VIN
+3VSUS
SHDN#
VDDA_EN
+5V_CAMERA
AVDD_5V
0.067A 1A
(CODEC&)
VLDT_EN
+1.2VRUN
VDD(DIMM 1.8V)
VDDIO(CPU 1.8V)
CPU_M_VREF_SUS(0.9V)
LPVDD(GPU)*
VDD1DI(GPU)*
AVDD(GPU)*
TXVDDR(GPU)*
TPVDD(GPU)*
VDD_CT(GPU)*
A2VDD(GPU)*
DPLL_PVDD(GPU)*
Page 41
Page 45
20mA
110mA
100mA
155mA
60mA
110mA
120mA
170mA
+VLDT(1.2V)
VCC_NB(1.2V)
A2VDDQ(GPU)
VDDR1(GPU)
VDDR(GPU)
VDDRH(GPU)
VDDQ(G_MEM)
VDD(G_MEM)
AVDDQ(NB)
PLLVDD(NB)
HTPVDD(NB)
VDD18(NB)
LVDDR18D(NB)
AVDDDI(NB)
2
OUT
Page 41
USB(2 PORT)
VRM
KEY
LED BOARD
HDD
ODD
+5VRUN_BT
FINGER PRINT
VCCFAN1
+5VRUN_HDMI
CRT5V
USB5V_C(2 PORT)
V5_VREF(SB)
1A
0.43A
0.43A
0.53A
2
+VDDA(2.5V)
1
PCIE power SW P2231
+3VRUN
3.3V IN
3.3VAUX_IN
+3VSUS
1A
PLLVDD12(NB)
VDDPLL(NB)
VDDA12(NB)
PCIE_VDDR(SB)
PCIE_PVDD(SB)
PLLVDD_ATA(SB)
AVDD_SATA(SB)
VDD(SB CORE)
PCIE_PVDD(GPU)*
0.6A
0.8A
0.01A
0.57A
+3VRUN
CPU_VDDIO_SUS
1_8V_REFEN
Title
Title
Title
POWER DELIVERY CHART
POWER DELIVERY CHART
POWER DELIVERY CHART
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-1634X
MS-1634X
MS-1634X
Date: Sheet of
Date: Sheet of
Date: Sheet of
+3VRUN_PCIE(NEW CARD)
3.3V PCIE
+3VSUS_PCIE(NEW CARD)
+3VSUS_PCIE
Page 30
VDDSPD(DIM)
XTLVDD_ATA(SB)
VDDQ(SB)
AVDD(NB)
VDDR3(NB)
CLK_VDD(CLK GEN)
CLK_VDDA(CLK GEN)
VDD_48(CLK GEN)
VDD_REF(CLK GEN)
PCI_VCC(PCI)
+3VRUN_WL(PCIE)
+3.3V_DELAY(GPU)
CODEC_3V
+3V_SPDIF
+V3.3S_LVDS_PANEL
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
0.035A
AME8804
VIN
EN
RT9173BPS
VIN
REFEN
0.4A
0.02A
OUT
Page 25
OUT
Page 45
1
+1.27VRUN
CPU_VTT_SUS(0.9V)
35 1 Thursday, May 31, 2007
35 1 Thursday, May 31, 2007
35 1 Thursday, May 31, 2007
A
A
A
5
D D
4
3
2
1
HTREFCLK
66MHZ
14.318MHZ
NB-OSC
SO-DIMM SO-DIMM
C C
NBSRC _ CLK-100MHZ
SBLINK_CLK-100MHZ
MEM_MB0_CLK1&2 +/-
133/166/200
ATHLON64 S1 CPU
MEM_MA0_CLK1&2 +/-
133/166/200
200MHZ
CPU CLK +/-
LGA638 PACKAGE
EXTERNAL
CLK GEN.
B B
SB-OSCIN-14.318MHZ
GXF_CLK4+/- 100MHZ
GPP_CLK0+/- 100MHZ
GPP_CLK1+/- 100MHZ
GPP_CLK2+/- 100MHZ
GPP_CLK3+/- 100MHZ
14.31818MHz
ATI NB
RX690
PCIE GFX SLOT - 16 LANES
PCIE GPP SLOT 1 - 1 LANE
PCIE GPP SLOT 2 - 1 LANE 3G
PCI EXPRESS CARD - 1 LANE
GIGABIT LAN - 1 LANE
SBSRC_CLK-100MHZ
CLK_48M_USB-48MHZ
ATI M66/7X
ATI SB
SB600
25MHZ OSC INPUT
PCI CLK5-33MHZ
PCI CLK0-33MHZ R5C833
AZ_BIT_CLK-24MHZ
25M Hz
SATA XTL
25 MHZ
RTC CLK
32.768 KHZ
32.768K Hz
KBC
(1394&CARD READER)
ALC 888
CODEC
MDC
32.768K Hz
27M Hz OSC
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
CLOCK DISTRIBUTION
CLOCK DISTRIBUTION
CLOCK DISTRIBUTION
MS-1634X
MS-1634X
MS-1634X
1
0B
0B
45 1 Thursday, May 31, 2007
45 1 Thursday, May 31, 2007
45 1 Thursday, May 31, 2007
0B
5
4
3
2
1
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
D D
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
+VLDT
D4
VLDT_A3
D3
VLDT_A2
D2
VLDT_A1
D1
VLDT_A0
HT_CADIN15_P 11
HT_CADIN15_N 11
HT_CADIN14_P 11
HT_CADIN14_N 11
HT_CADIN13_P 11
+VLDT
HT_CADIN13_N 11
HT_CADIN12_P 11
HT_CADIN12_N 11
HT_CADIN11_P 11
HT_CADIN11_N 11
HT_CADIN10_P 11
HT_CADIN10_N 11
HT_CADIN9_P 11
HT_CADIN9_N 11
HT_CADIN8_P 11
HT_CADIN8_N 11
HT_CADIN7_P 11
HT_CADIN7_N 11
HT_CADIN6_P 11
HT_CADIN6_N 11
HT_CADIN5_P 11
HT_CADIN5_N 11
HT_CADIN4_P 11
HT_CADIN4_N 11
HT_CADIN3_P 11
HT_CADIN3_N 11
HT_CADIN2_P 11
HT_CADIN2_N 11
HT_CADIN1_P 11
HT_CADIN1_N 11
HT_CADIN0_P 11
HT_CADIN0_N 11
HT_CLKIN1_P 11
HT_CLKIN1_N 11
HT_CLKIN0_P 11
HT_CLKIN0_N 11
R1 51R0402 R1 51R0402
R2 51R0402 R2 51R0402
HT_CTLIN0_P 11
HT_CTLIN0_N 11
5
HT_CTLIN1_P
HT_CTLIN1_N
C C
B B
A A
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
U1AU1A
L0_CADOUT_H15
L0_CADOUT_H14
L0_CADOUT_H13
L0_CADOUT_H12
L0_CADOUT_H11
L0_CADOUT_H10
Athlon 64 S1
Processor
Socket
VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0
L0_CADOUT_L15
L0_CADOUT_L14
L0_CADOUT_L13
L0_CADOUT_L12
L0_CADOUT_L11
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
4
AE5
AE4
C1
C1
AE3
AE2
C4.7U6.3X50603
C4.7U6.3X50603
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
Y4
Y3
Y1
W1
HT_CPU_CTLOUT1_P
T5
HT_CPU_CTLOUT1_N
R5
R2
R3
HT_CADOUT15_P 11
HT_CADOUT15_N 11
HT_CADOUT14_P 11
HT_CADOUT14_N 11
HT_CADOUT13_P 11
HT_CADOUT13_N 11
HT_CADOUT12_P 11
HT_CADOUT12_N 11
HT_CADOUT11_P 11
HT_CADOUT11_N 11
HT_CADOUT10_P 11
HT_CADOUT10_N 11
HT_CADOUT9_P 11
HT_CADOUT9_N 11
HT_CADOUT8_P 11
HT_CADOUT8_N 11
HT_CADOUT7_P 11
HT_CADOUT7_N 11
HT_CADOUT6_P 11
HT_CADOUT6_N 11
HT_CADOUT5_P 11
HT_CADOUT5_N 11
HT_CADOUT4_P 11
HT_CADOUT4_N 11
HT_CADOUT3_P 11
HT_CADOUT3_N 11
HT_CADOUT2_P 11
HT_CADOUT2_N 11
HT_CADOUT1_P 11
HT_CADOUT1_N 11
HT_CADOUT0_P 11
HT_CADOUT0_N 11
HT_CLKOUT1_P 11
HT_CLKOUT1_N 11
HT_CLKOUT0_P 11
HT_CLKOUT0_N 11
TP2TP2
TP1TP1
HT_CTLOUT0_P 11
HT_CTLOUT0_N 11
3
+VLDT
AMD check list 4-24~4-27
x_C180P50N0402
x_C180P50N0402
C5
C5
C6
C6
x_C0.22U10Y0402
x_C0.22U10Y0402
C7
C7
C180P50N0402
C180P50N0402
C2
C2
C4.7U6.3X50603
C4.7U6.3X50603
C0.22U10Y0402
C0.22U10Y0402
C3
C3
C4
C4
x_C4.7U6.3X50603
x_C4.7U6.3X50603
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
SOCKET S1 HT I/F
SOCKET S1 HT I/F
SOCKET S1 HT I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MS-1634X
MS-1634X
MS-1634X
2
MICRO-STAR INT'L CO.,LTD.
55 1 Thursday, May 31, 2007
55 1 Thursday, May 31, 2007
55 1 Thursday, May 31, 2007
1
0B
0B
0B
of
of
of
A
B
C
D
E
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
CPU_VTT_SUS
CPU_M_VREF_SUS
C8 x_C1000P50X0402 C8 x_C1000P50X0402
M_ZN
M_ZP
MEM_MA0_CS#3 9,10
MEM_MA0_CS#2 9,10
MEM_MA0_CS#1 9,10
MEM_MA0_CS#0 9,10
MEM_MB0_CS#3 9,10
MEM_MB0_CS#2 9,10
MEM_MB0_CS#1 9,10
MEM_MB0_CS#0 9,10
MEM_MB_CKE1 9,10
MEM_MB_CKE0 9,10
MEM_MA_CKE1 9,10
MEM_MA_CKE0 9,10
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2 9,10
MEM_MA_BANK1 9,10
MEM_MA_BANK0 9,10
MEM_MA_RAS# 9,10
MEM_MA_CAS# 9,10
MEM_MA_WE# 9,10
SNS_+0.9VTT
U1B
U1B
W17
MEMVREF
Y10
VTT_SENSE
AE10
MEMZN
AF10
MEMZP
V19
MA0_CS_L3
J22
MA0_CS_L2
V22
MA0_CS_L1
T19
MA0_CS_L0
Y26
MB0_CS_L3
J24
MB0_CS_L2
W24
MB0_CS_L1
U23
MB0_CS_L0
H26
MB_CKE1
J23
MB_CKE0
J20
MA_CKE1
J21
MA_CKE0
K19
MA_ADD15
K20
MA_ADD14
V24
MA_ADD13
K24
MA_ADD12
L20
MA_ADD11
R19
MA_ADD10
L19
MA_ADD9
L22
MA_ADD8
L21
MA_ADD7
M19
MA_ADD6
M20
MA_ADD5
M24
MA_ADD4
M22
MA_ADD3
N22
MA_ADD2
N21
MA_ADD1
R21
MA_ADD0
K22
MA_BANK2
R20
MA_BANK1
T22
MA_BANK0
T20
MA_RAS_L
U20
MA_CAS_L
U21
MA_WE_L
DDR II: CMD/CTRL/CLK
DDR II: CMD/CTRL/CLK
Athlon 64 S1
Processor Socket
CPU_VDDIO_SUS
4 4
R3
39.2R1%0402R339.2R1%0402
R4
39.2R1%0402R439.2R1%0402
PLACE THEM CLOSE TO
CPU WITHIN 1.5"
Trace:Space 5:10
3 3
2 2
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
MB_WE_L
CPU_VTT_SUS
D10
VTT1
C10
VTT2
B10
VTT3
AD10
VTT4
W10
VTT5
AC10
VTT6
AB10
VTT7
AA10
VTT8
A10
VTT9
Y16
MEM_MA0_CLK2_P 9
AA16
MEM_MA0_CLK2_N 9
E16
MEM_MA0_CLK1_P 9
F16
MEM_MA0_CLK1_N 9
AF18
MEM_MB0_CLK2_P 9
AF17
MEM_MB0_CLK2_N 9
A17
MEM_MB0_CLK1_P 9
A18
MEM_MB0_CLK1_N 9
W23
MEM_MB0_ODT1 9,10
W26
MEM_MB0_ODT0 9,10
V20
MEM_MA0_ODT1 9,10
U19
MEM_MA0_ODT0 9,10
J25
J26
W25
L23
L25
U25
L24
M26
L26
N23
N24
N25
N26
P24
P26
T24
K26
T26
U26
U24
V26
U22
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_ADD[15..0] 9,10 MEM_MA_ADD[15..0] 9,10
MEM_MB_BANK2 9,10
MEM_MB_BANK1 9,10
MEM_MB_BANK0 9,10
MEM_MB_RAS# 9,10
MEM_MB_CAS# 9,10
MEM_MB_WE# 9,10
VDD_VREF_SUS_CPU
CPU_VDDIO_SUS
1 1
A
R5
1KR1%0402R51KR1%0402
R6
1KR1%0402R61KR1%0402
C14
C14
C1000P50X0402
C1000P50X0402
CPU_M_VREF_SUS
C15
C15
C0.1U10X0402
C0.1U10X0402
LAYOUT:PLACE CLOSE TO CPU
MEM_MB0_CLK2_P 9
MEM_MB0_CLK2_N 9
MEM_MB0_CLK1_P 9
MEM_MB0_CLK1_N 9
AMD check list 2-1
MEM_MA0_CLK2_P 9
MEM_MA0_CLK2_N 9
MEM_MA0_CLK1_P 9
MEM_MA0_CLK1_N 9
B
C13
C13
C1.5P50N0402
C1.5P50N0402
C19
C19
C1.5P50N0402
C1.5P50N0402
C20
C20
C1.5P50N0402
C1.5P50N0402
C21
C21
C1.5P50N0402
C1.5P50N0402
Processor DDR2 Memory Interface
MEM_MB_DATA[63..0] 9
MEM_MB_DM[7..0] 9
MEM_MB_DQS7_P 9
MEM_MB_DQS7_N 9
MEM_MB_DQS6_P 9
MEM_MB_DQS6_N 9
MEM_MB_DQS5_P 9
MEM_MB_DQS5_N 9
MEM_MB_DQS4_P 9
MEM_MB_DQS4_N 9
MEM_MB_DQS3_P 9
MEM_MB_DQS3_N 9
MEM_MB_DQS2_P 9
MEM_MB_DQS2_N 9
MEM_MB_DQS1_P 9
MEM_MB_DQS1_N 9
MEM_MB_DQS0_P 9
MEM_MB_DQS0_N 9
PLACE CLOSE TO PROCESSOR
WITHIN 1.2 INCH
PLACE CLOSE TO PROCESSOR
WITHIN 1.2 INCH
MEM_MB_DATA63
AD11
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DM7
MEM_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
C
MB_DATA63
AF11
MB_DATA62
AF14
MB_DATA61
AE14
MB_DATA60
Y11
MB_DATA59
AB11
MB_DATA58
AC12
MB_DATA57
AF13
MB_DATA56
AF15
MB_DATA55
AF16
MB_DATA54
AC18
MB_DATA53
AF19
MB_DATA52
AD14
MB_DATA51
AC14
MB_DATA50
AE18
MB_DATA49
AD18
MB_DATA48
AD20
MB_DATA47
AC20
MB_DATA46
AF23
MB_DATA45
AF24
MB_DATA44
AF20
MB_DATA43
AE20
MB_DATA42
AD22
MB_DATA41
AC22
MB_DATA40
AE25
MB_DATA39
AD26
MB_DATA38
AA25
MB_DATA37
AA26
MB_DATA36
AE24
MB_DATA35
AD24
MB_DATA34
AA23
MB_DATA33
AA24
MB_DATA32
G24
MB_DATA31
G23
MB_DATA30
D26
MB_DATA29
C26
MB_DATA28
G26
MB_DATA27
G25
MB_DATA26
E24
MB_DATA25
E23
MB_DATA24
C24
MB_DATA23
B24
MB_DATA22
C20
MB_DATA21
B20
MB_DATA20
C25
MB_DATA19
D24
MB_DATA18
A21
MB_DATA17
D20
MB_DATA16
D18
MB_DATA15
C18
MB_DATA14
D14
MB_DATA13
C14
MB_DATA12
A20
MB_DATA11
A19
MB_DATA10
A16
MB_DATA9
A15
MB_DATA8
A13
MB_DATA7
D12
MB_DATA6
E11
MB_DATA5
G11
MB_DATA4
B14
MB_DATA3
A14
MB_DATA2
A11
MB_DATA1
C11
MB_DATA0
AD12
MB_DM7
AC16
MB_DM6
AE22
MB_DM5
AB26
MB_DM4
E25
MB_DM3
A22
MB_DM2
B16
MB_DM1
A12
MB_DM0
AF12
MB_DQS_H7
AE12
MB_DQS_L7
AE16
MB_DQS_H6
AD16
MB_DQS_L6
AF21
MB_DQS_H5
AF22
MB_DQS_L5
AC25
MB_DQS_H4
AC26
MB_DQS_L4
F26
MB_DQS_H3
E26
MB_DQS_L3
A24
MB_DQS_H2
A23
MB_DQS_L2
D16
MB_DQS_H1
C16
MB_DQS_L1
C12
MB_DQS_H0
B12
MB_DQS_L0
U1C
U1C
DDR: DATA
DDR: DATA
Athlon 64 S1
Processor Socket
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12
AB12
AA14
AB14
W11
Y12
AD13
AB13
AD15
AB15
AB17
Y17
Y14
W14
W16
AD17
Y18
AD19
AD21
AB21
AB18
AA18
AA20
Y20
AA22
Y22
W21
W22
AA21
AB22
AB24
Y24
H22
H20
E22
E21
J19
H24
F22
F20
C23
B22
F18
E18
E20
D22
C19
G18
G17
C17
F14
E14
H17
E17
E15
H15
E13
C13
H12
H11
G14
H14
F12
G12
Y13
AB16
Y19
AC24
F24
E19
C15
E12
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
MEM_MA_DATA63
MEM_MA_DATA62
MEM_MA_DATA61
MEM_MA_DATA60
MEM_MA_DATA59
MEM_MA_DATA58
MEM_MA_DATA57
MEM_MA_DATA56
MEM_MA_DATA55
MEM_MA_DATA54
MEM_MA_DATA53
MEM_MA_DATA52
MEM_MA_DATA51
MEM_MA_DATA50
MEM_MA_DATA49
MEM_MA_DATA48
MEM_MA_DATA47
MEM_MA_DATA46
MEM_MA_DATA45
MEM_MA_DATA44
MEM_MA_DATA43
MEM_MA_DATA42
MEM_MA_DATA41
MEM_MA_DATA40
MEM_MA_DATA39
MEM_MA_DATA38
MEM_MA_DATA37
MEM_MA_DATA36
MEM_MA_DATA35
MEM_MA_DATA34
MEM_MA_DATA33
MEM_MA_DATA32
MEM_MA_DATA31
MEM_MA_DATA30
MEM_MA_DATA29
MEM_MA_DATA28
MEM_MA_DATA27
MEM_MA_DATA26
MEM_MA_DATA25
MEM_MA_DATA24
MEM_MA_DATA23
MEM_MA_DATA22
MEM_MA_DATA21
MEM_MA_DATA20
MEM_MA_DATA19
MEM_MA_DATA18
MEM_MA_DATA17
MEM_MA_DATA16
MEM_MA_DATA15
MEM_MA_DATA14
MEM_MA_DATA13
MEM_MA_DATA12
MEM_MA_DATA11
MEM_MA_DATA10
MEM_MA_DATA9
MEM_MA_DATA8
MEM_MA_DATA7
MEM_MA_DATA6
MEM_MA_DATA5
MEM_MA_DATA4
MEM_MA_DATA3
MEM_MA_DATA2
MEM_MA_DATA1
MEM_MA_DATA0
MEM_MA_DM7
MEM_MA_DM6
MEM_MA_DM5
MEM_MA_DM4
MEM_MA_DM3
MEM_MA_DM2
MEM_MA_DM1
MEM_MA_DM0
D
MEM_MA_DATA[63..0] 9
MEM_MA_DM[7..0] 9
MEM_MA_DQS7_P 9
MEM_MA_DQS7_N 9
MEM_MA_DQS6_P 9
MEM_MA_DQS6_N 9
MEM_MA_DQS5_P 9
MEM_MA_DQS5_N 9
MEM_MA_DQS4_P 9
MEM_MA_DQS4_N 9
MEM_MA_DQS3_P 9
MEM_MA_DQS3_N 9
MEM_MA_DQS2_P 9
MEM_MA_DQS2_N 9
MEM_MA_DQS1_P 9
MEM_MA_DQS1_N 9
MEM_MA_DQS0_P 9
MEM_MA_DQS0_N 9
A1
Athlon 64 S1g1
uPGA638
Top View
AF1
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
SOCKET S1 DDR2 MEMORY I/F
SOCKET S1 DDR2 MEMORY I/F
SOCKET S1 DDR2 MEMORY I/F
MS-1634X
MS-1634X
MS-1634X
E
of
of
of
65 1 Thursday, May 31, 2007
65 1 Thursday, May 31, 2007
65 1 Thursday, May 31, 2007
A26
0B
0B
0B
5
+3VRUN
+1.8VRUN_NB
R18
R18
x_300R0402
x_300R0402
D D
SB_CPUPWRGD 23
07/01/05 0A->0B
+1.8VRUN_NB
R23
R23
x_300R0402
x_300R0402
LDT_STOP# 13,23
C C
B B
+3VSUS
A A
T_CRIT_CPU# 39
+1.8VRUN_NB
R25
R25
x_300R0402
x_300R0402
LDT_RST# 23
VDD_PG 39,42
RN1 8P4R-10KR0402 RN1 8P4R-10KR0402
1
3
5
7
Cap close to
thermal
sensor
CPU_TEST4_THERMDA
C2200P50X0402
C2200P50X0402
CPU_TEST5_THERMDC
x_0R0402
x_0R0402
2
4
6
8
C30
C30
CPU_VDDIO_SUS
x_4.7KR0402
x_4.7KR0402
R19
R19
2
1
CPU_VDDIO_SUS
2
1
CPU_VDDIO_SUS
R27
R27
T_CRIT_CPU#
CPU_THRM_ALERTÂSMB_THRMCPU_DATA
SMB_THRMCPU_CLK
+3VSUS
C31
C31
C0.1U10X0402
C0.1U10X0402
5
x_C0.1U10X0402
x_C0.1U10X0402
C25
C25
4
U2
U2
x_NC7SZ08M5X_SOT23-5
x_NC7SZ08M5X_SOT23-5
3 5
C28
C28
4
U3
U3
x_NC7SZ08M5X_SOT23-5
x_NC7SZ08M5X_SOT23-5
3 5
C29
C29
2
1
x_NC7SZ08M5X_SOT23-5
x_NC7SZ08M5X_SOT23-5
3 5
R475
R475
680R0402
680R0402
U5
U5
1
VDD
2
D+
3
D-
4
T_CRIT_A#
LM86CIMMXNOPB_MSOP8-RH
LM86CIMMXNOPB_MSOP8-RH
Close to CPU socket
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
x_C0.1U10X0402
x_C0.1U10X0402
R473
R473
680R0402
680R0402
x_C0.1U10X0402
x_C0.1U10X0402
CPU_HT_RESET#
4
U4
U4
JNC6 x_0R0402 JNC6 x_0R0402
R0402_6 ==> SHORT PAD FOOTPRINT
SMBCLK
SMBDATA
ALERT#
GND
4
+VDDA
AMD check list 4-22
CPU_VDDA_2.5_RUN
CPU_ALL_PWROK
JNC2 x_0R0402 JNC2 x_0R0402
R471
R471
680R0402
680R0402
CPU_LDTSTOP# CPULDTSTP#
JNC4 x_0R0402 JNC4 x_0R0402
CPU_PROCHOT#_1.8
SMB_THRMCPU_CLK
8
SMB_THRMCPU_DATA
7
6
5
CPU_VDDIO_SUS
07/01/05 0A->0B
place them to CPU within 1.5"
CPUCLK 22
CPUCLK# 22
Within <1.25 Inch
CPU_VDDIO_SUS
4
CPU_SIC_R 23
CPU_SID_R 23
C26 C3900P50X0603 C26 C3900P50X0603
C27 C3900P50X0603 C27 C3900P50X0603
R38
R38
10KR0402
10KR0402
CPU_PH_G
B
E C
Q3
Q3
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
SMB_THRMCPU_CLK 37
SMB_THRMCPU_DATA 37
CPU_THRM_ALERT- 37
R12 x_300R0402 R12 x_300R0402
R14 x_300R0402 R14 x_300R0402
R336 x_0R0402 R336 x_0R0402
R337 x_0R0402 R337 x_0R0402
+VLDT
Within <0.6 Inch
+3VRUN
R42 4.7K0402 R42 4.7K0402
Impedance 35 ohm
DC Resistance <40m ohm
Imax>500mA
Ferrite bead 30-300nH
L1
L1
10L1000m_50_0402-LF
10L1000m_50_0402-LF
C4.7U6.3X50603
C4.7U6.3X50603
300R0402
300R0402
R15 44.2R1% R15 44.2R1%
R16 44.2R1% R16 44.2R1%
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
R20
R20
169R1%0402
169R1%0402
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST 19
CPU_TEST 18
CPU_TEST5_THERMDC
CPU_TEST4_THERMDA
SB_TALERT# 25
3
C22
C22
R13
R13
CPU_VDD_RUN_FB_H 42
CPU_VDD_RUN_FB_L 42
TP3TP3
TP4TP4
TP5TP5
3
C23
C23
C3300P50X0402
C3300P50X0402
CPU_HT_RESET#
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_SIC
CPU_SID
CPU_HTREF1
CPU_HTREF0
CPU_VDDIO_SUS_FB_H
CPU_VDDIO_SUS_FB_L
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
TP10TP10
TP9TP9
TP12TP12
TP14TP14
TP16TP16
2
ATHLON Control and Debug
CPU_VDDIO_SUS
C24
C24
C0.22U10Y0402
C0.22U10Y0402
F8
VDDA2
F9
VDDA1
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
AF4
SIC
AF5
SID
P6
HT_REF1
R6
HT_REF0
F6
VDD_FB_H
E6
VDD_FB_L
W9
VDDIO_FB_H
Y9
VDDIO_FB_L
A9
CLKIN_H
A8
CLKIN_L
G10
DBRDY
AA9
TMS
JTAC
JTAC
AC9
TCK
AD9
TRST_L
AF9
TDI
TEST25_HE9TEST29_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
THERMDC
W8
THERMDA
Y6
TEST3
AB6
TEST2
P20
RSVD0
P19
RSVD1
N20
RSVD2
N19
RSVD3
R26
RSVD4
R25
RSVD5
P22
RSVD6
R22
RSVD7
AMD NPT S1 SOCKET
Processor Socket
U1D
U1D
THERMTRIP_L
PROCHOT_L
CPU_PRESENT_L
PSI_L
DBREQ_L
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
MISC
MISC
AF6
AC7
A5
VID5
C6
VID4
A6
VID3
A4
VID2
C5
VID1
B5
VID0
AC6
A3
E10
AE9
TDO
C9
C8
AE7
AD7
AE8
AB8
AF7
J7
H8
AF8
AE6
K8
C4
H16
B18
B3
C1
H6
G6
D5
R24
W18
R23
AA8
H18
H19
2
R8
300R0402R8300R0402
CPU_THERMTRIP#_R
CPU_PROCHOT#_1.8
CPU_VID5
CPU_VID4
CPU_VID3
CPU_VID2
CPU_VID1
CPU_VID0
CPU_PRESENT#
CPU_PSI#
CPU_DBREQ#
CPU_TDO
CPU_TEST29_H_FBCLKOUT_P
CPU_TEST29_L_FBCLKOUT_N
Trace impedance 80ohm
TP11TP11
TP13TP13
TP15TP15
TP18TP18
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet of
CPU_VDDIO_SUS
R7
R9
300R0402R9300R0402
CPU_PSI# 42
TP6TP6
CPU_TEST 21
CPU_TEST 26
CPU_TEST 26
CPU_DBREQ#
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_PRESENT#
CPU_TEST25_H_BYPASSCLK_H
CPU_TEST25_L_BYPASSCLK_L
CPU_TEST 18
CPU_TEST 19
CPU_TEST 21
SOCKET S1 CTRL
SOCKET S1 CTRL
SOCKET S1 CTRL
MS-1634X
MS-1634X
MS-1634X
10KR0402R710KR0402
R10
R10
B
300R0402
300R0402
E C
Q1
Q1
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
R22 80.6R1%0402 R22 80.6R1%0402
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
1
+3VSUS
R11 x_4.7KR0402 R11 x_4.7KR0402
CPU_THERMTRIP# 24
CPU_VID5 42
CPU_VID4 42
CPU_VID3 42
CPU_VID2 42
CPU_VID1 42
CPU_VID0 42
CPU_VDDIO_SUS
R2188 300R0402 R2188 300R0402
R28 x_510R0402 R28 x_510R0402
R29 x_510R0402 R29 x_510R0402
R30 x_510R0402 R30 x_510R0402
R31 x_510R0402 R31 x_510R0402
R33 x_510R0402 R33 x_510R0402
R35 1KR0402 R35 1KR0402
R36 510R0402 R36 510R0402
R39 510R0402 R39 510R0402
R2189 300R0402 R2189 300R0402
R2190 300R0402 R2190 300R0402
R2191 300R0402 R2191 300R0402
75 1 Thursday, May 31, 2007
75 1 Thursday, May 31, 2007
75 1 Thursday, May 31, 2007
1
0B
0B
0B
of
of
5
AA4
AA11
AA13
AA15
CPU_VDD_RUN CPU_VDD_RUN
AC4
AD2
D D
C C
G4
H2
J11
J13
K10
K12
K14
L11
L13
M2
M6
M8
M10
N7
N9
N11
P10
R4
R7
R9
R11
T10
T12
T14
U7
U9
U11
U13
V10
A1
B B
U1E
U1E
VDD1
VDD2
VDD3
VDD4
J9
VDD5
VDD6
VDD7
K6
VDD8
VDD9
VDD10
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
VDD15
VDD16
VDD17
VDD18
VDD19
VDD20
VDD21
VDD22
VDD23
P8
VDD24
VDD25
VDD26
VDD27
VDD28
VDD29
T2
VDD30
T6
VDD31
T8
VDD32
VDD33
VDD34
VDD35
VDD36
VDD37
VDD38
VDD39
V6
VDD40
V8
VDD41
VDD42
POWER
POWER
Athlon 64 S1
Processor
Socket
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
CPU_VDDIO_SUS
A26
Athlon 64 S1g1
uPGA638
Top View
AA17
AA19
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
AB2
AB7
AB9
AD6
AD8
B4
B6
B8
B9
B11
B13
B15
B17
B19
B21
B23
B25
D6
D8
D9
D11
D13
D15
D17
D19
D21
D23
D25
E4
F2
F11
F13
F15
F17
F19
F21
F23
F25
H7
H9
H21
H23
J4
AF1
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
U1F
U1F
GROUND
GROUND
Athlon 64 S1
Processor
Socket
4
J6
VSS66
J8
VSS67
J10
VSS68
J12
VSS69
J14
VSS70
J16
VSS71
J18
VSS72
K2
VSS73
K7
VSS74
K9
VSS75
K11
VSS76
K13
VSS77
K15
VSS78
K17
VSS79
L6
VSS80
L8
VSS81
L10
VSS82
L12
VSS83
L14
VSS84
L16
VSS85
L18
VSS86
M7
VSS87
M9
VSS88
M11
VSS89
M17
VSS90
N4
VSS91
N8
VSS92
N10
VSS93
N16
VSS94
N18
VSS95
P2
VSS96
P7
VSS97
P9
VSS98
P11
VSS99
P17
VSS100
R8
VSS101
R10
VSS102
R16
VSS103
R18
VSS104
T7
VSS105
T9
VSS106
T11
VSS107
T13
VSS108
T15
VSS109
T17
VSS110
U4
VSS111
U6
VSS112
U8
VSS113
U10
VSS114
U12
VSS115
U14
VSS116
U16
VSS117
U18
VSS118
V2
VSS119
V7
VSS120
V9
VSS121
V11
VSS122
V13
VSS123
V15
VSS124
V17
VSS125
W6
VSS126
Y21
VSS127
Y23
VSS128
N6
VSS129
3
2
BOTTOMSIDE DECOUPLING
CPU_VDD_RUN
C22U6.3X50805-RH
CPU_VDD_RUN
C41
C41
C0.22U10Y0402
C0.22U10Y0402
C22U6.3X50805-RH
C22U6.3X50805-RH
C33
C33
C32
C32
C22U6.3X50805-RH
C22U6.3X50805-RH
C42
C42
C0.22U10Y0402
C0.22U10Y0402
C22U6.3X50805-RH
C22U6.3X50805-RH
C34
C34
C0.01U16X0402
C0.01U16X0402
C43
C43
C22U6.3X50805-RH
C22U6.3X50805-RH
C35
C35
C36
C36
C22U6.3X50805-RH
C22U6.3X50805-RH
C44
C44
C180P50N0402
C180P50N0402
C22U6.3X50805-RH
C37
C37
C22U6.3X50805-RH
C22U6.3X50805-RH
AMD check list 4-16~4-20
C38
C38
C22U6.3X50805-RH
C22U6.3X50805-RH
C40
C40
C39
C39
C22U6.3X50805-RH
C22U6.3X50805-RH
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU_VDDIO_SUS
C22U6.3X50805-RH
C22U6.3X50805-RH
CPU_VTT_SUS
x_C4.7U6.3X50603
x_C4.7U6.3X50603
C61
C61
C45
C45
C4.7U6.3X50603
C4.7U6.3X50603
C62
C62
C4.7U6.3X50603
C4.7U6.3X50603
C0.22U10Y0402
C0.22U10Y0402
C47
C47
C46
C46
C22U6.3X50805-RH
C22U6.3X50805-RH
C63
C63
CPU_VDDIO_SUS
x_C4.7U6.3X50603
x_C4.7U6.3X50603
C48
C48
C49
C49
C0.22U10Y0402
C0.22U10Y0402
AMD Check list 4-1~4-5
C0.22U10Y0402
C0.22U10Y0402
C65
C65
C64
C64
C4.7U6.3X50603
C4.7U6.3X50603
AMD check list 4-6~4-8,4-11
C4.7U6.3X50603
C4.7U6.3X50603
C50
C50
C0.22U10Y0402
C0.22U10Y0402
C66
C66
C0.22U10Y0402
C0.22U10Y0402
C51
C51
C4.7U6.3X50603
C4.7U6.3X50603
C67
C67
C0.22U10Y0402
C0.22U10Y0402
x_C4.7U6.3X50603
x_C4.7U6.3X50603
C52
C52
C68
C68
C0.22U10Y0402
C0.22U10Y0402
C54
C54
C53
C53
C0.22U10Y0402
C0.22U10Y0402
C1000P50X0402
C1000P50X0402
C69
C69
C1000P50X0402
C1000P50X0402
C70
C70
C0.22U10Y0402
C0.22U10Y0402
C56
C56
C55
C55
C0.22U10Y0402
C0.22U10Y0402
C180P50N0402
C180P50N0402
x_C1000P50X0402
x_C1000P50X0402
C71
C71
C72
C72
C1000P50X0402
C1000P50X0402
C0.01U16X0402
C0.01U16X0402
C57
C57
x_C0.01U16X0402
x_C0.01U16X0402
C73
C73
C74
C74
x_C180P50N0402
x_C180P50N0402
1
C58
C58
C59
C59
C180P50N0402
C180P50N0402
C180P50N0402
C180P50N0402
C75
C75
C180P50N0402
C180P50N0402
x_C180P50N0402
x_C180P50N0402
C60
C60
C76
C76
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
SOCKET S1 PWR & GND
SOCKET S1 PWR & GND
SOCKET S1 PWR & GND
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
5
PROCESSOR POWER AND GROUND
4
3
2
B
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-1634X
MS-1634X
MS-1634X
0B
0B
85 1 Thursday, May 31, 2007
85 1 Thursday, May 31, 2007
85 1 Thursday, May 31, 2007
1
0B
of
of
of
5
CPU_VDDIO_SUS
MEM_MA_ADD[15..0] 6,10
D D
MEM_MA_BANK[2..0] 6,10
MEM_MA_DM[7..0] 6
MEM_MA_DQS0_P 6
MEM_MA_DQS1_P 6
MEM_MA_DQS2_P 6
MEM_MA_DQS3_P 6
C C
B B
A A
MEM_MA_DQS4_P 6
MEM_MA_DQS5_P 6
MEM_MA_DQS6_P 6
MEM_MA_DQS7_P 6
MEM_MA_DQS0_N 6
MEM_MA_DQS1_N 6
MEM_MA_DQS2_N 6
MEM_MA_DQS3_N 6
MEM_MA_DQS4_N 6
MEM_MA_DQS5_N 6
MEM_MA_DQS6_N 6
MEM_MA_DQS7_N 6
MEM_MA0_CLK1_P 6
MEM_MA0_CLK1_N 6
MEM_MA0_CLK2_P 6
MEM_MA0_CLK2_N 6
MEM_MA_CKE0 6,10
MEM_MA_CKE1 6,10
MEM_MA_RAS# 6,10
MEM_MA_CAS# 6,10
MEM_MA0_CS#0 6,10
MEM_MA0_CS#1 6,10
MEM_MA0_ODT0 6,10
MEM_MA0_ODT1 6,10
5
MEM_MA_WE# 6,10
SDATA0 22,24
SCLK0 22,24
+3VRUN
MEM_M_VREF_SUS
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
102
A0
101
A1
100
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14/NC
84
A15/NC
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
59
DIMM-200S_black-1
DIMM-200S_black-1
4
117
118
103
111
104
112
DQ0
DQ1
VDD8
VDD7
VDD9
DQ2
VDD10
VDD11
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
NC1
NC2
NC3
NC4
NC/TEST
SO-DIMM
(RVS)
SO-DIMM
(RVS)
VSS57
VSS58
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
132
128
127
122
121
4
J2
J2
MEM_MA_DATA0
5
MEM_MA_DATA1
7
MEM_MA_DATA2
17
MEM_MA_DATA3
19
MEM_MA_DATA4
4
MEM_MA_DATA5
6
MEM_MA_DATA6
14
MEM_MA_DATA7
16
MEM_MA_DATA8 MEM_MA_ADD8
23
MEM_MA_DATA9
25
MEM_MA_DATA10
35
MEM_MA_DATA11
37
MEM_MA_DATA12
20
MEM_MA_DATA13
22
MEM_MA_DATA14
36
MEM_MA_DATA15
38
MEM_MA_DATA16
43
MEM_MA_DATA17
45
MEM_MA_DATA18
55
MEM_MA_DATA19
57
MEM_MA_DATA20
44
MEM_MA_DATA21
46
MEM_MA_DATA22
56
MEM_MA_DATA23
58
MEM_MA_DATA24
61
MEM_MA_DATA25
63
MEM_MA_DATA26
73
MEM_MA_DATA27
75
MEM_MA_DATA28
62
MEM_MA_DATA29
64
MEM_MA_DATA30
74
MEM_MA_DATA31
76
MEM_MA_DATA32
123
MEM_MA_DATA33
125
MEM_MA_DATA34
135
MEM_MA_DATA35
137
MEM_MA_DATA36
124
MEM_MA_DATA37
126
MEM_MA_DATA38
134
MEM_MA_DATA39
136
MEM_MA_DATA40
141
MEM_MA_DATA41
143
MEM_MA_DATA42
151
MEM_MA_DATA43
153
MEM_MA_DATA44
140
MEM_MA_DATA45
142
MEM_MA_DATA46
152
MEM_MA_DATA47
154
MEM_MA_DATA48
157
MEM_MA_DATA49
159
MEM_MA_DATA50
173
MEM_MA_DATA51
175
MEM_MA_DATA52
158
MEM_MA_DATA53
160
MEM_MA_DATA54
174
MEM_MA_DATA55
176
MEM_MA_DATA56
179
MEM_MA_DATA57
181
MEM_MA_DATA58
189
MEM_MA_DATA59
191
MEM_MA_DATA60
180
MEM_MA_DATA61
182
MEM_MA_DATA62
192
MEM_MA_DATA63
194
50
69
83
120
163
201
202
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
MEM_MA_DATA[63..0] 6
MEM_MA0_CS#2 6,10
MEM_MA0_CS#3 6,10
3
MEM_MB_ADD[15..0] 6,10
MEM_MB_BANK[2..0] 6,10
MEM_MB_DM[7..0] 6
MEM_VREF_SUS
CPU_VDDIO_SUS
R44
R44
1KR1%0402
1KR1%0402
C90
C90
C0.1U10X0402
R45
R45
1KR1%0402
1KR1%0402
C0.1U10X0402
LAYOUT: PLACE CLOSE TO DIMMs
3
MEM_MB_DQS0_P 6
MEM_MB_DQS1_P 6
MEM_MB_DQS2_P 6
MEM_MB_DQS3_P 6
MEM_MB_DQS4_P 6
MEM_MB_DQS5_P 6
MEM_MB_DQS6_P 6
MEM_MB_DQS7_P 6
MEM_MB_DQS0_N 6
MEM_MB_DQS1_N 6
MEM_MB_DQS2_N 6
MEM_MB_DQS3_N 6
MEM_MB_DQS4_N 6
MEM_MB_DQS5_N 6
MEM_MB_DQS6_N 6
MEM_MB_DQS7_N 6
MEM_MB0_CLK1_P 6
MEM_MB0_CLK1_N 6
MEM_MB0_CLK2_P 6
MEM_MB0_CLK2_N 6
MEM_M_VREF_SUS
C92
C92
C1000P50X0402
C1000P50X0402
MEM_MB0_CS#0 6,10
MEM_MB0_CS#1 6,10
MEM_MB_CKE0 6,10
MEM_MB_CKE1 6,10
MEM_MB_RAS# 6,10
MEM_MB_CAS# 6,10
MEM_MB_WE# 6,10
MEM_MB0_ODT0 6,10
MEM_MB0_ODT1 6,10
+3VRUN
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
R43 4.7K0402 R43 4.7K0402
SDATA0 22,24
SCLK0 22,24
+3VRUN
MEM_M_VREF_SUS
CPU_VDDIO_SUS
2
117
118
103
111
104
112
J1
J1
MEM_MB_DATA0
102
A0
101
A1
100
VDD081VDD182VDD287VDD388VDD495VDD596VDD6
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14/NC
84
A15/NC
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
2
VDD7
SO-DIMM(RVS)
SO-DIMM(RVS)
VSS2878VSS2777VSS2672VSS2571VSS2466VSS2365VSS2260VSS21
59
5
DQ0
MEM_MB_DATA1
7
DQ1
MEM_MB_DATA2
17
VDD8
VDD9
DQ2
VDD10
VDD11
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA4
4
DQ4
MEM_MB_DATA5
6
DQ5
MEM_MB_DATA6
14
DQ6
MEM_MB_DATA7
16
DQ7
MEM_MB_DATA8
23
DQ8
MEM_MB_DATA9
25
DQ9
MEM_MB_DATA10
35
DQ10
MEM_MB_DATA11
37
DQ11
MEM_MB_DATA12
20
DQ12
MEM_MB_DATA13
22
DQ13
MEM_MB_DATA14
36
DQ14
MEM_MB_DATA15
38
DQ15
MEM_MB_DATA16
43
DQ16
MEM_MB_DATA17
45
DQ17
MEM_MB_DATA18
55
DQ18
MEM_MB_DATA19
57
DQ19
MEM_MB_DATA20
44
DQ20
MEM_MB_DATA21
46
DQ21
MEM_MB_DATA22
56
DQ22
MEM_MB_DATA23
58
DQ23
MEM_MB_DATA24
61
DQ24
MEM_MB_DATA25
63
DQ25
MEM_MB_DATA26
73
DQ26
MEM_MB_DATA27
75
DQ27
MEM_MB_DATA28
62
DQ28
MEM_MB_DATA29
64
DQ29
MEM_MB_DATA30
74
DQ30
MEM_MB_DATA31
76
DQ31
MEM_MB_DATA32
123
DQ32
MEM_MB_DATA33
125
DQ33
MEM_MB_DATA34
135
DQ34
MEM_MB_DATA35
137
DQ35
MEM_MB_DATA36
124
DQ36
MEM_MB_DATA37
126
DQ37
MEM_MB_DATA38
134
DQ38
MEM_MB_DATA39
136
DQ39
MEM_MB_DATA40
141
DQ40
MEM_MB_DATA41
143
DQ41
MEM_MB_DATA42
151
DQ42
MEM_MB_DATA43
153
DQ43
MEM_MB_DATA44
140
DQ44
MEM_MB_DATA45
142
DQ45
MEM_MB_DATA46
152
DQ46
MEM_MB_DATA47
154
DQ47
MEM_MB_DATA48
157
DQ48
MEM_MB_DATA49
159
DQ49
MEM_MB_DATA50
173
DQ50
MEM_MB_DATA51
175
DQ51
MEM_MB_DATA52
158
DQ52
MEM_MB_DATA53
160
DQ53
MEM_MB_DATA54
174
DQ54
MEM_MB_DATA55
176
DQ55
MEM_MB_DATA56
179
DQ56
MEM_MB_DATA57
181
DQ57
MEM_MB_DATA58
189
DQ58
MEM_MB_DATA59
191
DQ59
MEM_MB_DATA60
180
DQ60
MEM_MB_DATA61
182
DQ61
MEM_MB_DATA62
192
DQ62
MEM_MB_DATA63
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
NC/TEST
201
VSS57
202
VSS58
196
VSS56
193
VSS55
190
VSS54
187
VSS53
184
VSS52
183
VSS51
178
VSS50
177
VSS49
172
VSS48
171
VSS47
168
VSS46
165
VSS45
162
VSS44
161
VSS43
156
VSS42
155
VSS41
150
VSS40
149
VSS39
145
VSS38
144
VSS37
139
VSS36
138
VSS35
133
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
DIMM-200S_black
DIMM-200S_black
132
128
127
122
121
Title
Title
Title
DDR2 SODIMMS A/B CHANNEL
DDR2 SODIMMS A/B CHANNEL
DDR2 SODIMMS A/B CHANNEL
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
MS-1634X
MS-1634X
MS-1634X
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
MEM_MB_DATA[63..0] 6
MEM_MB0_CS#2 6,10
MEM_MB0_CS#3 6,10
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
95 1 Thursday, May 31, 2007
95 1 Thursday, May 31, 2007
95 1 Thursday, May 31, 2007
1
0B
0B
0B
5
MEM_MA_ADD[15..0] 6,9
D D
MEM_MA_BANK[2..0] 6,9
C C
MEM_MB_ADD[15..0] 6,9
B B
MEM_MB_BANK[2..0] 6,9
A A
MEM_MA_ADD[15..0]
MEM_MA_BANK[2..0]
MEM_MA_CAS# 6,9
MEM_MA_WE# 6,9
MEM_MA_RAS# 6,9
MEM_MA0_CS#0 6,9
MEM_MA0_CS#1 6,9
MEM_MA0_CS#2 6,9
MEM_MA0_CS#3 6,9
MEM_MA0_ODT0 6,9
MEM_MA0_ODT1 6,9
MEM_MA_CKE1 6,9
MEM_MA_CKE0 6,9
MEM_MB_ADD[15..0]
MEM_MB_BANK[2..0]
MEM_MB_CAS# 6,9
MEM_MB_WE# 6,9
MEM_MB_RAS# 6,9
MEM_MB0_CS#0 6,9
MEM_MB0_CS#1 6,9
MEM_MB0_CS#2 6,9
MEM_MB0_CS#3 6,9
MEM_MB0_ODT0 6,9
MEM_MB0_ODT1 6,9
MEM_MB_CKE1 6,9
MEM_MB_CKE0 6,9
5
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA_RAS#
MEM_MA0_CS#0
MEM_MA0_CS#1
MEM_MA0_CS#2
MEM_MA0_CS#3
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD4
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0 MEM_MB_ADD15
MEM_MB_CAS#
MEM_MB_WE#
MEM_MB_RAS#
MEM_MB0_CS#0
MEM_MB0_CS#1
MEM_MB0_CS#2
MEM_MB0_CS#3
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB_CKE1
MEM_MB_CKE0
4
MEM_MA_CKE0
MEM_MA_ADD12
MEM_MA_BANK2
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD3
MEM_MA_ADD5
MEM_MA_ADD2
MEM_MA_BANK0
MEM_MA_ADD10
MEM_MA_WE#
MEM_MA_CAS#
MEM_MA_ADD13
MEM_MA0_CS#3
MEM_MA0_ODT1
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_CKE1
MEM_MA0_CS#2
MEM_MA_ADD6
MEM_MA_ADD4
MEM_MA_ADD11
MEM_MA_ADD7
MEM_MA_RAS#
MEM_MA_BANK1
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA0_ODT0
MEM_MA0_CS#1
MEM_MA0_CS#0
MEM_MB_CKE0
MEM_MB0_CS#2
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD3
MEM_MB_ADD5
MEM_MB_ADD1
MEM_MB_BANK0
MEM_MB_WE#
MEM_MB0_CS#1
MEM_MB0_ODT1
MEM_MB_CAS#
MEM_MB_ADD11
MEM_MB_ADD14
MEM_MB_CKE1
MEM_MB_ADD0
MEM_MB_ADD2
MEM_MB_ADD6
MEM_MB_ADD4
MEM_MB0_CS#0
MEM_MB_RAS#
MEM_MB_ADD10
MEM_MB_BANK1
MEM_MB0_CS#3
MEM_MB_ADD13
MEM_MB0_ODT0
4
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
8P4R-47R0402
3
CPU_VTT_SUS
C93 C0.1U10X0402 C93 C0.1U10X0402
RN2
RN2
1
2
3
4
6
8
RN3
RN3
2
4
6
8
RN4
RN4
2
4
6
8
RN5
RN5
2
4
6
8
2
4
6
8
RN7
RN7
2
4
6
8
RN8
RN8
2
4
6
8
RN9
RN9
2
4
6
8
RN11
RN11
2
4
6
8
RN12
RN12
2
4
6
8
RN13
RN13
2
4
6
8
RN14
RN14
2
4
6
8
RN15
RN15
2
4
6
8
RN16
RN16
2
4
6
8
RN17
RN17
2
4
6
8
RN18
RN18
2
4
6
8
RN6
RN6
CPU_VTT_SUS
C94 C0.1U10X0402 C94 C0.1U10X0402
C95 C0.1U10X0402 C95 C0.1U10X0402
C96 C0.1U10X0402 C96 C0.1U10X0402
C97 C0.1U10X0402 C97 C0.1U10X0402
C98 C0.1U10X0402 C98 C0.1U10X0402
C106 C0.1U10X0402 C106 C0.1U10X0402
C107 C0.1U10X0402 C107 C0.1U10X0402
C108 C0.1U10X0402 C108 C0.1U10X0402
C116 C0.1U10X0402 C116 C0.1U10X0402
C117 C0.1U10X0402 C117 C0.1U10X0402
C118 C0.1U10X0402 C118 C0.1U10X0402
C119 C0.1U10X0402 C119 C0.1U10X0402
C127 C0.1U10X0402 C127 C0.1U10X0402
C128 C0.1U10X0402 C128 C0.1U10X0402
C129 C0.1U10X0402 C129 C0.1U10X0402
C144 C0.1U10X0402 C144 C0.1U10X0402
C145 C0.1U10X0402 C145 C0.1U10X0402
C153 C0.1U10X0402 C153 C0.1U10X0402
C154 C0.1U10X0402 C154 C0.1U10X0402
C155 C0.1U10X0402 C155 C0.1U10X0402
C163 C0.1U10X0402 C163 C0.1U10X0402
C164 C0.1U10X0402 C164 C0.1U10X0402
C165 C0.1U10X0402 C165 C0.1U10X0402
C173 C0.1U10X0402 C173 C0.1U10X0402
C174 C0.1U10X0402 C174 C0.1U10X0402
C175 C0.1U10X0402 C175 C0.1U10X0402
C176 C0.1U10X0402 C176 C0.1U10X0402
C181 C0.1U10X0402 C181 C0.1U10X0402
C182 C0.1U10X0402 C182 C0.1U10X0402
C183 C0.1U10X0402 C183 C0.1U10X0402
C184 C0.1U10X0402 C184 C0.1U10X0402
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
1
3
5
7
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
3
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
DDR2 SODIMMS TERMINATIONS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-1634X
MS-1634X
MS-1634X
1
0B
0B
0B
of
of
of
10 51 Thursday, May 31, 2007
10 51 Thursday, May 31, 2007
10 51 Thursday, May 31, 2007
1
5
HT_CADOUT15_P 5
D D
C C
B B
HT_CADOUT15_N 5
HT_CADOUT14_P 5
HT_CADOUT14_N 5
HT_CADOUT13_P 5
HT_CADOUT13_N 5
HT_CADOUT12_P 5
HT_CADOUT12_N 5
HT_CADOUT11_P 5
HT_CADOUT11_N 5
HT_CADOUT10_P 5
HT_CADOUT10_N 5
HT_CADOUT9_P 5
HT_CADOUT9_N 5
HT_CADOUT8_P 5
HT_CADOUT8_N 5
HT_CADOUT7_P 5
HT_CADOUT7_N 5
HT_CADOUT6_P 5
HT_CADOUT6_N 5
HT_CADOUT5_P 5
HT_CADOUT5_N 5
HT_CADOUT4_P 5
HT_CADOUT4_N 5
HT_CADOUT3_P 5
HT_CADOUT3_N 5
HT_CADOUT2_P 5
HT_CADOUT2_N 5
HT_CADOUT1_P 5
HT_CADOUT1_N 5
HT_CADOUT0_P 5
HT_CADOUT0_N 5
HT_CLKOUT1_P 5
HT_CLKOUT1_N 5
HT_CLKOUT0_P 5
HT_CLKOUT0_N 5
HT_CTLOUT0_P 5
HT_CTLOUT0_N 5
VDDHT_PKG
R48 49.9R1%0402 R48 49.9R1%0402
4
HT_RXCALP
HT_RXCALN
R19
R18
R21
R22
U22
U21
U18
U19
W19
W20
AC21
AB22
AB20
AA20
AA19
Y19
T24
R25
U25
U24
V23
U23
V24
V25
AA25
AA24
AB23
AA23
AB24
AB25
AC24
AC25
W21
W22
Y24
W25
P24
P25
A24
C24
U43A
U43A
HT_RXCAD15P
HT_RXCAD15N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD0P
HT_RXCAD0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCTLP
HT_RXCTLN
HT_RXCALP
HT_RXCALN
RX690 A12 HT
RX690 A12 HT
3
PART 1 OF 5
PART 1 OF 5
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCAD15P
HT_TXCAD15N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD0P
HT_TXCAD0N
HT_TXCLK1P
HT_TXCLK1N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCTLP
HT_TXCTLN
HT_TXCALP
HT_TXCALN
P21
P22
P18
P19
M22
M21
M18
M19
L18
L19
G22
G21
J20
J21
F21
F22
N24
N25
L25
M24
K25
K24
J23
K23
G25
H24
F25
F24
E23
F23
E24
E25
L21
L22
J24
J25
N23
P23
C25
D24
2
HT_TXCALP
HT_TXCALN
HT_CADIN15_P 5
HT_CADIN15_N 5
HT_CADIN14_P 5
HT_CADIN14_N 5
HT_CADIN13_P 5
HT_CADIN13_N 5
HT_CADIN12_P 5
HT_CADIN12_N 5
HT_CADIN11_P 5
HT_CADIN11_N 5
HT_CADIN10_P 5
HT_CADIN10_N 5
HT_CADIN9_P 5
HT_CADIN9_N 5
HT_CADIN8_P 5
HT_CADIN8_N 5
HT_CADIN7_P 5
HT_CADIN7_N 5
HT_CADIN6_P 5
HT_CADIN6_N 5
HT_CADIN5_P 5
HT_CADIN5_N 5
HT_CADIN4_P 5
HT_CADIN4_N 5
HT_CADIN3_P 5
HT_CADIN3_N 5
HT_CADIN2_P 5
HT_CADIN2_N 5
HT_CADIN1_P 5
HT_CADIN1_N 5
HT_CADIN0_P 5
HT_CADIN0_N 5
HT_CLKIN1_P 5
HT_CLKIN1_N 5
HT_CLKIN0_P 5
HT_CLKIN0_N 5
HT_CTLIN0_P 5
HT_CTLIN0_N 5
R47 100R0402 R47 100R0402 R46 49.9R1%0402 R46 49.9R1%0402
1
A A
Title
Title
Title
RX690 HT LINK I/F
RX690 HT LINK I/F
RX690 HT LINK I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
Date: Sheet
Date: Sheet
5
4
3
Date: Sheet
MS-1634X
MS-1634X
MS-1634X
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
of
of
of
11 51 Thursday, May 31, 2007
11 51 Thursday, May 31, 2007
11 51 Thursday, May 31, 2007
1
0B
0B
0B
5
GFX_RX15P 15
GFX_RX15N 15
GFX_RX14P 15
GFX_RX14N 15
D D
C C
B B
A A
GFX_RX13P 15
GFX_RX13N 15
GFX_RX12P 15
GFX_RX12N 15
GFX_RX11P 15
GFX_RX11N 15
GFX_RX10P 15
GFX_RX10N 15
GFX_RX9P 15
GFX_RX9N 15
GFX_RX8P 15
GFX_RX8N 15
GFX_RX7P 15
GFX_RX7N 15
GFX_RX6P 15
GFX_RX6N 15
GFX_RX5P 15
GFX_RX5N 15
GFX_RX4P 15
GFX_RX4N 15
GFX_RX3P 15
GFX_RX3N 15
GFX_RX2P 15
GFX_RX2N 15
GFX_RX1P 15
GFX_RX1N 15
GFX_RX0P 15
GFX_RX0N 15
A_RX2P 23
A_RX2N 23
A_RX3P 23
A_RX3N 23
GPP_RX2P 30
GPP_RX2N 30
GPP_RX3P 31
GPP_RX3N 31
A_RX0P 23
A_RX0N 23
A_RX1P 23
A_RX1N 23
5
4
U43B
U43B
G5
GFX_RX0P
G4
GFX_RX0N
J8
GFX_RX1P
J7
GFX_RX1N
J4
GFX_RX2P
J5
GFX_RX2N
L8
GFX_RX3P
L7
GFX_RX3N
L4
GFX_RX4P
L5
GFX_RX4N
M8
GFX_RX5P
M7
GFX_RX5N
M4
GFX_RX6P
M5
GFX_RX6N
P8
GFX_RX7P
P7
GFX_RX7N
P4
GFX_RX8P
P5
GFX_RX8N
R4
GFX_RX9P
R5
GFX_RX9N
R7
GFX_RX10P
R8
GFX_RX10N
U4
GFX_RX11P
U5
GFX_RX11N
W4
GFX_RX12P
W5
GFX_RX12N
Y4
GFX_RX13P
Y5
GFX_RX13N
V9
GFX_RX14P
W9
GFX_RX14N
AB7
GFX_RX15P
AB6
GFX_RX15N
W11
GPP_RX0P(SB_RX2P)
W12
GPP_RX0N(SB_RX2N)
AA11
GPP_RX1P(SB_RX3P)
AB11
GPP_RX1N(SB_RX3N)
Y7
GPP_RX2P
AA7
GPP_RX2N
AB9
GPP_RX3P
AA9
GPP_RX3N
W14
SB_RX0P
W15
SB_RX0N
AB12
SB_RX1P
AA12
SB_RX1N
AA14
PCE_ISET(NC)
AB14
PCE_TXISET(NC)
RX690 A12 HT
RX690 A12 HT
4
PART 2 OF 5
PART 2 OF 5
GPP_TX0P(SB_TX2P)
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0N(SB_TX2N)
GPP_TX1P(SB_TX3P)
GPP_TX1N(SB_TX3N)
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
PCE_PCAL(PCE_CALRP)
PCE_NCAL(PCE_CALRN)
3
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
3
J1
H2
K2
K1
K3
L3
L1
L2
N2
N1
P2
P1
P3
R3
R1
R2
T2
U1
V2
V1
V3
W3
W1
W2
Y2
AA1
AA2
AB2
AB1
AC1
AE3
AE4
AD8
AE8
AD7
AE7
AD4
AE5
AD5
AD6
AE9
AD10
AC8
AD9
AD11
AE11
R52 2KOhm
2
GFX_TX15P_C
GFX_TX15N_C
GFX_TX14P_C
GFX_TX14N_C
GFX_TX13P_C
GFX_TX13N_C
GFX_TX12P_C
GFX_TX12N_C
GFX_TX11P_C
GFX_TX11N_C
GFX_TX10P_C
GFX_TX10N_C
GFX_TX9P_C
GFX_TX9N_C
GFX_TX8P_C
GFX_TX8N_C
GFX_TX7P_C
GFX_TX7N_C
GFX_TX6P_C
GFX_TX6N_C
GFX_TX5P_C
GFX_TX5N_C
GFX_TX4P_C
GFX_TX4N_C
GFX_TX3P_C
GFX_TX3N_C
GFX_TX2P_C
GFX_TX2N_C
GFX_TX1P_C
GFX_TX1N_C
GFX_TX0P_C
GFX_TX0N_C
A_TX2P_C
A_TX2N_C
A_TX3P_C
A_TX3N_C
GPP_TX2P_C
GPP_TX2N_C
GPP_TX3P_C
GPP_TX3N_C
A_TX0P_C
A_TX0N_C
A_TX1P_C
A_TX1N_C
R50 562R1%0402 R50 562R1%0402
R52 2KR1%0402 R52 2KR1%0402
R50 562Ohm
C971 C0.1U10X0402 C971 C0.1U10X0402
C972 C0.1U10X0402 C972 C0.1U10X0402
C973 C0.1U10X0402 C973 C0.1U10X0402
C974 C0.1U10X0402 C974 C0.1U10X0402
C975 C0.1U10X0402 C975 C0.1U10X0402
C976 C0.1U10X0402 C976 C0.1U10X0402
C977 C0.1U10X0402 C977 C0.1U10X0402
C978 C0.1U10X0402 C978 C0.1U10X0402
C2001 C0.1U10X0402 C2001 C0.1U10X0402
C2002 C0.1U10X0402 C2002 C0.1U10X0402
C2004 C0.1U10X0402 C2004 C0.1U10X0402
C2003 C0.1U10X0402 C2003 C0.1U10X0402
C2005 C0.1U10X0402 C2005 C0.1U10X0402
C2007 C0.1U10X0402 C2007 C0.1U10X0402
C2006 C0.1U10X0402 C2006 C0.1U10X0402
C2008 C0.1U10X0402 C2008 C0.1U10X0402
C2009 C0.1U10X0402 C2009 C0.1U10X0402
C2011 C0.1U10X0402 C2011 C0.1U10X0402
C2010 C0.1U10X0402 C2010 C0.1U10X0402
C2013 C0.1U10X0402 C2013 C0.1U10X0402
C2012 C0.1U10X0402 C2012 C0.1U10X0402
C2015 C0.1U10X0402 C2015 C0.1U10X0402
C2014 C0.1U10X0402 C2014 C0.1U10X0402
C2016 C0.1U10X0402 C2016 C0.1U10X0402
C2017 C0.1U10X0402 C2017 C0.1U10X0402
C2018 C0.1U10X0402 C2018 C0.1U10X0402
C2020 C0.1U10X0402 C2020 C0.1U10X0402
C2019 C0.1U10X0402 C2019 C0.1U10X0402
C2021 C0.1U10X0402 C2021 C0.1U10X0402
C2022 C0.1U10X0402 C2022 C0.1U10X0402
C2023 C0.1U10X0402 C2023 C0.1U10X0402
C2024 C0.1U10X0402 C2024 C0.1U10X0402
C2026 C0.1U10X0402 C2026 C0.1U10X0402
C2025 C0.1U10X0402 C2025 C0.1U10X0402
C2027 C0.1U10X0402 C2027 C0.1U10X0402
C2028 C0.1U10X0402 C2028 C0.1U10X0402
C2030 C0.1U10X0402 C2030 C0.1U10X0402
C2029 C0.1U10X0402 C2029 C0.1U10X0402
C2031 C0.1U10X0402 C2031 C0.1U10X0402
C2032 C0.1U10X0402 C2032 C0.1U10X0402
C2034 C0.1U10X0402 C2034 C0.1U10X0402
C2033 C0.1U10X0402 C2033 C0.1U10X0402
C2036 C0.1U10X0402 C2036 C0.1U10X0402
C2035 C0.1U10X0402 C2035 C0.1U10X0402
Title
Title
Title
RX690 PCI-E LINK&HDMI I/F
RX690 PCI-E LINK&HDMI I/F
RX690 PCI-E LINK&HDMI I/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A
A
A
Date: Sheet
Date: Sheet
Date: Sheet
MS-1634X
MS-1634X
MS-1634X
2
GFX_TX15P 15
GFX_TX15N 15
GFX_TX14P 15
GFX_TX14N 15
GFX_TX13P 15
GFX_TX13N 15
GFX_TX12P 15
GFX_TX12N 15
GFX_TX11P 15
GFX_TX11N 15
GFX_TX10P 15
GFX_TX10N 15
GFX_TX9P 15
GFX_TX9N 15
GFX_TX8P 15
GFX_TX8N 15
GFX_TX7P 15
GFX_TX7N 15
GFX_TX6P 15
GFX_TX6N 15
GFX_TX5P 15
GFX_TX5N 15
GFX_TX4P 15
GFX_TX4N 15
GFX_TX3P 15
GFX_TX3N 15
GFX_TX2P 15
GFX_TX2N 15
GFX_TX1P 15
GFX_TX1N 15
GFX_TX0P 15
GFX_TX0N 15
A_TX2P 23
A_TX2N 23
A_TX3P 23
A_TX3N 23
GPP_TX2P 30
GPP_TX2N 30
GPP_TX3P 31
GPP_TX3N 31
A_TX0P 23
A_TX0N 23
A_TX1P 23
A_TX1N 23
VDDA12_PKG2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
1
0B
0B
0B
of
of
of
12 51 Thursday, May 31, 2007
12 51 Thursday, May 31, 2007
12 51 Thursday, May 31, 2007
1
5
AVDDQ
+1.8VRUN_NB
L3
L3
1 2
300L300m_350
300L300m_350
D D
1 2
300L300m_350
300L300m_350
x_C10U6.0805-RH
x_C10U6.0805-RH
L7
L7
1 2
300L300m_350
300L300m_350
x_C10U6.0805-RH
x_C10U6.0805-RH
C C
B B
PLLVDD
L4
L4
HTPVDD
L56
L56
1 2
300L300m_350
300L300m_350
C202
C202
C2.2U6.3Y0603
C2.2U6.3Y0603
C204
C204
C208
C208
PLLVDD12 +1.2VRUN
C205
C205
C2.2U6.3Y0603
C2.2U6.3Y0603
C209
C209
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C843
C843
C2.2U6.3Y0603
C2.2U6.3Y0603
x_2KR0402
x_2KR0402
x_2KR0402
x_2KR0402
+3VRUN
R76
R76
R78
R78
RS690M
RX690
07/01/02 0A->0B
LDT_STOP# 7,23
AVDD
+3VRUN
+1.8VRUN
4
10KR0402
10KR0402
+1.8VRUN_NB
R61
R61
E C
+1.8VRUN_NB
+3VRUN
R62
R62
10KR0402
10KR0402
B
Q4
Q4
N-MMBT3904_NL_SOT23
N-MMBT3904_NL_SOT23
HTREFCLK 22
NB_OSC 22
NBSRC_CLKP 22
NBSRC_CLKN 22
SBLINK_CLKP 22
SBLINK_CLKN 22
07/04/02 0B->0C
+3VRUN
L2
L113
L113
+1.8VRUN_NB
LDT_STOP#_NB
AVDD
0R0603L20R0603
X_300L600m_150
X_300L600m_150
PLLVDD12
R69 x_3KR0402 R69 x_3KR0402
R70 x_3KR0402 R70 x_3KR0402
R71 x_3KR0402 R71 x_3KR0402
R74 x_3KR0402 R74 x_3KR0402
R75 4.7K0402 R75 4.7K0402
AVDDQ
PLLVDD
HTPVDD
C200
C200
C2.2U6.3Y
C2.2U6.3Y
C203
C203
C2.2U6.3Y0603
C2.2U6.3Y0603
ALLOW_LDTSTOP 23
BMREQ# 23
3
AVDD
R60
R60
X_715R1%0402
X_715R1%0402
NB_RST# 23
NB_PWRGD 39
R65 10KR0402 R65 10KR0402
R49 x_10KR0402 R49 x_10KR0402
DFT_GPIO2
DFT_GPIO3
DFT_GPIO4
DFT_GPIO5
2
CPU_VDDIO_SUS
N-AO4446_SOIC8
GPP_TX0P_C
GPP_TX0N_C
GPP_TX1N_C
GPP_TX1P_C
N-AO4446_SOIC8
+1.8VRUN_NB
C206
C206
C2.2U6.3Y0603
C2.2U6.3Y0603
C210
C210
C2.2U6.3Y0603
C2.2U6.3Y0603
C2037 C0.1U10X0402 C2037 C0.1U10X0402
C2038 C0.1U10X0402 C2038 C0.1U10X0402
C2041 C0.1U10X0402 C2041 C0.1U10X0402
C2043 C0.1U10X0402 C2043 C0.1U10X0402
U43C
U43C
B22
AVDD1
C22
AVDD2
G17
AVSSN1
H17
AVSSN2
A20
AVDDDI
B20
AVSSDI
A21
AVDDQ
A22
AVSSQ
C21
C_R
C20
Y_G
D19
COMP_B
E19
RED
F19
GREEN
G19
BLUE
C6
DACVSYNC
A5
DACHSYNC
B21
RSET
B6
DACSCL
A6
DACSDA
A10
PLLVDD(PLLVDD18)
B10
PLLVSS
B24
HTPVDD
B25
HTPVSS
C10
SYSRESET#
C11
POWERGOOD
C5
LDTSTOP#
B5
ALLOW_LDTSTOP
C23
HTTSTCLK
B23
HTREFCLK
C2
TVCLKIN
B11
OSCIN
A11
OSCOUT(PLLVDD12)
F2
GFX_CLKP
E1
GFX_CLKN
G1
SB_CLKP
G2
SB_CLKN
D6
DFT_GPIO0
D7
DFT_GPIO1
C8
DFT_GPIO2
C7
DFT_GPIO3
B8
DFT_GPIO4
A8
DFT_GPIO5
B2
BMREQb
A2
I2C_CLK
B4
I2C_DATA
AA15
THERMALDIODE_P
AB15
THERMALDIODE_N
C14
TMDS_HPD
B3
DDC_DATA
C3
STRP_DATA STRP_DATA
TESTMODE
A3
STRP_DATA
RX690 A12 HT
RX690 A12 HT
PART 3 OF 5
PART 3 OF 5
CRT/TVOUT
CRT/TVOUT
PM
PM
PLL PWR
PLL PWR
CLOCKs
CLOCKs
MIS.
MIS.
LVDS
LVDS
LVDDR18A_1(LVDDR33_1)
LVDDR18A_2(LVDDR33_2)
DVO_D0(GPP_TX0P)
DVO_D1(GPP_TX0N)
DVO_D3(GPP_RX0P)
DVO_D4(GPP_RX0N)
DVO_D7(GPP_TX1N)
DVO_D8(GPP_TX1P)
DVO_D9(GPP_RX1N)
DVO
DVO
DVO_D10(GPP_RX1P)
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
LPVDD
LPVSS
LVDDR18D_1
LVDDR18D_2
LVSSR1
LVSSR3
LVSSR5
LVSSR6
LVSSR7
LVSSR8
LVSSR12
LVSSR13
LVDS_DIGON
LVDS_BLON
LVDS_BLEN
DVO_D2(NC)
DVO_D5(NC)
DVO_D6(NC)
DVO_D11(NC)
DVO_VSYNC(NC)
DVO_DE(NC)
DVO_HSYNC(NC)
DVO_IDCKP(NC)
DVO_IDCKN(NC)
B14
B15
B13
A13
H14
G14
D17
E17
A15
B16
C17
C18
B17
A17
A18
B18
E15
D15
H15
G15
D14
E14
A12
B12
C12
C13
A16
A14
D12
C19
C15
C16
F14
F15
E12
G12
F12
AD14
AD15
AE15
AD16
AE16
AC17
AD18
AE19
AD19
AE20
AD20
AE21
AD13
AC13
AE13
AE17
AD17
876
PQ59
PQ59
351
4
2
C2367
C2367
C2.2U6.3Y0603
C2.2U6.3Y0603
L5 300L300m_350 L5 300L300m_350
1 2
1 2
300L300m_350
300L300m_350
1
JNC46
JNC46
x_0R0402
x_0R0402
C2366
C2366
x_C0.1U10X0402
x_C0.1U10X0402
07/01/04 0A->0B
+1.8VRUN_NB
+1.8VRUN_NB +1.8VRUN_NB
GPP_TX0P 36
GPP_TX0N 36
GPP_RX0P 36
GPP_RX0N 36
GPP_TX1N 36
GPP_TX1P 36
GPP_RX1N 36
GPP_RX1P 36
RUND 32,41,43,45
RS690: LVDDR18A=3.3V
+3VRUN
L8
L8
L6
L6
1 2
300L300m_350
300L300m_350
C213
C213
C4.7U6.3X50603
C4.7U6.3X50603
DFT_GPIO[4:2]
4
RS690 only (NC for RS485)
Enable debug bus via the memory
IO pads, if available in the package
DEFAULT
use default values
use the memory data bus
to output the debug bus
DFT_GPIO5
3
DEFAULT
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
MICRO-STAR INT'L CO.,LTD.
RX690 SYSTEM I/F&CLK
RX690 SYSTEM I/F&CLK
RX690 SYSTEM I/F&CLK
MS-1634X
MS-1634X
MS-1634X
1
0B
0B
13 51 Thursday, May 31, 2007
13 51 Thursday, May 31, 2007
13 51 Thursday, May 31, 2007
0B
RS485/RS690
DFT_GPIO1
Bypass the loading
PULL HIGH
of EEPROM straps
(internally
A A
pulled
high)
PULL
LOW
5
and use Hardware
default values
DEFAULT
I2C Master can
load strap values
from EEPROM if
connected, or use
default values if
not connected
DFT_GPIO0
Memory
side port
not
available
Memory
side port
available
DEFAULT
These pin straps are used to configure PCI-E GPP mode:
111: register defined (register default to Config E)
110: 4-0-0-0-0 Config A
101: 4-4 Config B
100: 4-2-2 Config C
011: 4-2-1-1 Config D
010: 4-1-1-1-1 Config E
others: register defined (register default to Config E)
5
+1.2VRUN
L114
L114
80L6_30_0805
80L6_30_0805
C10U6.0805-RH
D D
C10U6.0805-RH
L10 0R_0603 L10 0R_0603
07/01/09 0A->0B
VDDA12
C10U6.0805-RH
C10U6.0805-RH
+3VRUN VDDR3
L12
L12
1 2
0R_0603
C C
+1.8VRUN_NB
For Side Port
+1.2VRUN VDDPLL
B B
A A
0R_0603
L13
L13
0R_0805
0R_0805
L73
L73
300L600m_150
300L600m_150
C4.7U6.3X50603
C4.7U6.3X50603
C2045
C2045
VDDR
5
C220
C220
C10U6.0805-RH
C10U6.0805-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C221
C221
x_C10U6.0805-RH
x_C10U6.0805-RH
C236
C236
C235
C235
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C245
C245
C2.2U6.3Y0603
C2.2U6.3Y0603
C846
C846
C2046
C2046
C1U6.3Y0402-RH
C1U6.3Y0402-RH
V12
V11
V14
M3
VSSA2
VSSA3
VSSA4
VSSA5F3VSSA6
VSSA1
PAR 5 OF 5
PAR 5 OF 5
VSS1
VSS2
VSS3
VSS4E9VSS5
F11
A25
D23
G11
C222
C222
C223
C223
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
VDD18 +1.8VRUN_NB
C228
C228
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C238
C238
C237
C237
C1U6.3Y0402-RH
C1U6.3Y0402-RH
VDDA12_PKG2 VDDHT_PKG
V15
G3
AE6
AE10
VSSA7A1VSSA8H1VSSA9
VSSA10J2VSSA11H3VSSA13J6VSSA15F1VSSA16L6VSSA17M2VSSA18M6VSSA19J3VSSA20P6VSSA21T1VSSA22N3VSSA24R6VSSA25U2VSSA26T3VSSA27U3VSSA28U6VSSA30Y1VSSA32W6VSSA33
VSSA14
VSSA12
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
J22
J12
L12
L14
Y23
P11
R24
L20
G23
M15
AE18
C224
C224
C225
C225
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C240
C240
C239
C239
VDDA12_PKG1
VSS17
VSS18
VSS19
VSS20
VSS21
L23
N12
M11
M20
M23
M25
4
C241
C241
x_C1U6.3Y0402-RH
x_C1U6.3Y0402-RH
C2047
C2047
0.1uF_0402
0.1uF_0402
P9
VSSA23
VSS22
VSS23
VSS25
VSS24
B7
L24
N14
4
VSS26
VSS27
P13
P20
P15
C226
C226
C1U6.3Y0402-RH
C1U6.3Y0402-RH
Y15
AC4
VSSA31
VSSA29
GROUND
GROUND
VSS28
VSS29
VSS30
VSS31
VSS32
R12
R14
R20
W23
3
U43D
U43D
AE24
AD24
AD22
AB17
AE23
AC18
AD21
AC19
AC20
AB19
AD23
AA17
AE25
AC12
AD12
AE12
AC11
AC2
Y11
AD1
AC5
VSSA34Y3VSSA35Y9VSSA36
VSSA37R9VSSA38
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
Y25
Y22
U20
H25
W24
AD25
AC23
VDD_HT1
VDD_HT2
VDD_HT3
VDD_HT4
VDD_HT5
Y17
VDD_HT6
W17
VDD_HT7
VDD_HT8
VDD_HT9
VDD_HT10
VDD_HT11
VDD_HT12
VDD_HT13
VDD_HT14
VDD_HT15
J14
VDD18_1
J15
VDD18_2
AE2
VDDA18_1(VDDA12_13)
AB3
VDDA18_2(VDDA12_14)
U7
VDDA18_3(VDDA12_15)
W7
VDDA18_4(VDDA12_16)
AB4
VDDA18_5(VDDA12_17)
AC3
VDDA18_6(VDDA12_18)
AD2
VDDA18_7(VDDA12_19)
AE1
VDDA18_8(VDDA12_20)
E11
VDDR3_1
D11
VDDR3_2
VDD_DVO1(VDDR_1)
VDD_DVO2(VDDR_2)
VDD_DVO3(VDDR_3)
E7
VDDA12_13(VDDPLL_1)
F7
VDDA12_14(VDDPLL_2)
F9
VSSA49(VSSPLL_1)
G9
VSSA50(VSSPLL_2)
D22
VDDHT_PKG
M1
VDDA12_PKG1
VDDA12_PKG2
RX690 A12 HT
RX690 A12 HT
AC6
AC7
AD3
AC9
AC10
VSSA39
VSSA40
VSSA41
VSSA42
VSSA43
VSSA44
VSS39
VSS40
VSS41
VSS42
VSS44
VSS43
D25
H12
G24
AC14
AC22
PART 4 OF 5
PART 4 OF 5
G6
Y12
Y14
VSSA45
VSSA46
VSSA47
VSS45
VSS46C4VSS47
R23
AE22
AA3
VSSA48
VSS48
VSS49
VSS50
VSS52
VSS51
T23
T25
H23
R17
M17
AE14
VDDA12_1
VDDA12_2
VDDA12_3
VDDA12_4
VDDA12_5
VDDA12_6
VDDA12_7
VDDA12_8
VDDA12_9
VDDA12_10
VDDA12_11
VDDA12_12
VDDC_1
VDDC_2
VDDC_3
POWER
POWER
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDDC_23
VDDC_24
VDDC_25
VDDC_26
VDDC_27
VDDC_28
VDDC_29
VDDC_30
VDDC_31
VDDC_32
VSS54
VSS56
VSS55
VSS53
F17
A23
AC15
3
VSS57D4VSS59
VSS58
AC16
M13
D1
G7
E2
C1
E3
D2
M9
F4
B1
D3
L9
E6
L11
L13
L15
M12
R15
M14
N11
N13
N15
J11
H11
P12
P14
R11
R13
A19
B19
U11
U14
P17
L17
J19
D20
G20
A9
B9
C9
D9
A7
A4
U12
U15
U43E
U43E
RX690 A12 HT
RX690 A12 HT
VDDA12
C215
C215
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C10U6.0805-RH
C10U6.0805-RH
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C216
C216
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C229
C229
C10U6.0805-RH
C10U6.0805-RH
2
C217
C217
C1U6.3Y0402-RH
C1U6.3Y0402-RH
C230
C230
C0.1U10X0402
C0.1U10X0402
C0.1U10X0402
C0.1U10X0402
2
1
+1.2VRUN
L9
C10U6.0805-RH
C10U6.0805-RH
C218
C218
C844
C844
x_C0.1U10X0402
x_C0.1U10X0402
C232
C232
C231
C231
C243
C243
C242
C242
C0.1U10X0402
C0.1U10X0402
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
Date: Sheet
L9
80L6_30_0805
80L6_30_0805
C219
C219
x_C10U6.0805-RH
x_C10U6.0805-RH
+1.2VRUN
C234
C234
C233
C233
C0.1U10X0402
C0.1U10X0402
C0.1U10X0402
RX690 POWER & GND
RX690 POWER & GND
RX690 POWER & GND
C0.1U10X0402
C244
C244
C0.1U10X0402
C0.1U10X0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MS-1634X
MS-1634X
MS-1634X
1
14 51 Thursday, May 31, 2007
14 51 Thursday, May 31, 2007
14 51 Thursday, May 31, 2007
0B
0B
0B
of
of
of
5
4
3
2
1
07/01/09 0A->0B
U51A
U51A
PART 1 OF 7
GFX_TX0P
GFX_TX0P 12
D D
GFX_TX0N 12
GFX_TX1P 12
GFX_TX1N 12
GFX_TX2P 12
GFX_TX2N 12
GFX_TX3P 12
GFX_TX3N 12
GFX_TX4P 12
GFX_TX4N 12
GFX_TX5P 12
GFX_TX5N 12
GFX_TX6P 12
GFX_TX6N 12
GFX_TX7P 12
GFX_TX7N 12
GFX_TX8P 12
GFX_TX8N 12
GFX_TX9P 12
GFX_TX9N 12
C C
GFX_TX10P 12
GFX_TX10N 12
GFX_TX11P 12
GFX_TX11N 12
GFX_TX12P 12
GFX_TX12N 12
GFX_TX13P 12
GFX_TX13N 12
GFX_TX14P 12
GFX_TX14N 12
GFX_TX15P 12
GFX_TX15N 12
GPP_CLK4P 22
GPP_CLK4N 22
PCIE_RST# 23
B B
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE_REFCLKP
PCIE_REFCLKN
PCIE_RST#
AK33
AJ33
AJ35
AJ34
AH35
AH34
AG35
AG34
AF33
AE33
AE35
AE34
AD35
AD34
AC35
AC34
AB33
AA33
AA35
AA34
Y35
Y34
W35
W34
V33
U33
U35
U34
T35
T34
R35
R34
AJ31
AJ30
AK34
AK35
AM32
PART 1 OF 7
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
Clock
Clock
PCIE_REFCLKP
PCIE_REFCLKN
RSVD_1
RSVD_2
PERSTB
M72M A14
M72M A14
PCIE_CALRP
PCIE_CALI
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
P
P
PCIE_TX1N
C
C
I
I
PCIE_TX2P
PCIE_TX2N
-
ÂE
E
X
X
PCIE_TX3P
PCIE_TX3N
P
P
R
R
PCIE_TX4P
E
E
PCIE_TX4N
S
S
S
S
PCIE_TX5P
PCIE_TX5N
I
I
N
N
PCIE_TX6P
PCIE_TX6N
T
T
E
E
R
R
PCIE_TX7P
PCIE_TX7N
F
F
A
A
PCIE_TX8P
C
C
PCIE_TX8N
E
E
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
Calibration
Calibration
PCIE_CALRN
PCIE_CALRP
PCIE_CALI
PIN M72M,M76M M66M,M71M
= R11-1271T12-W08
1.27K 1% 562 1%
= R11-0103T12-R01
10K 1% 1.47K 1%
AG31
AG30
AF31
AF30
AF28
AF27
AD31
AD30
AD28
AD27
AB31
AB30
AB28
AB27
AA31
AA30
AA28
AA27
W31
W30
W28
W27
V31
V30
V28
V27
U31
U30
U28
U27
R31
R30
AG26
AJ27
AK29
C_TX0P
C_TX0N
C_TX1P
C_TX1N
C_TX2P
C_TX2N
C_TX3P
C_TX3N
C_TX4P
C_TX4N
C_TX5P
C_TX5N
C_TX6P
C_TX6N
C_TX7P
C_TX7N
C_TX8P
C_TX8N
C_TX9P
C_TX9N
C_TX10P
C_TX10N
C_TX11P
C_TX11N
C_TX12P
C_TX12N
C_TX13P
C_TX13N
C_TX14P
C_TX14N
C_TX15P
C_TX15N
R2002 2KR1%0402 R2002 2KR1%0402
R2003 1.27k1%0402 R2003 1.27k1%0402
R2004 10KR1%0402 R2004 10KR1%0402
= R11-5620T12-W08
= R11-1471T12-W08
C_TX0P
C_TX0N
C_TX1P
C_TX1N
C_TX2P
C_TX2N
C_TX3P
C_TX3N
C_TX4P
C_TX4N
C_TX5P
C_TX5N
C_TX6P
C_TX6N
C_TX7P
C_TX7N
C_TX8P
C_TX8N
C_TX9P
C_TX9N
C_TX10P
C_TX10N
C_TX11P
C_TX11N
C_TX12P
C_TX12N
C_TX13P
C_TX13N
C_TX14P
C_TX14N
C_TX15P
C_TX15N
C2048 C0.1U10X0402 C2048 C0.1U10X0402
C2049 C0.1U10X0402 C2049 C0.1U10X0402
C2050 C0.1U10X0402 C2050 C0.1U10X0402
C2051 C0.1U10X0402 C2051 C0.1U10X0402
C2055 C0.1U10X0402 C2055 C0.1U10X0402
C2056 C0.1U10X0402 C2056 C0.1U10X0402
C2057 C0.1U10X0402 C2057 C0.1U10X0402
C2058 C0.1U10X0402 C2058 C0.1U10X0402
C2059 C0.1U10X0402 C2059 C0.1U10X0402
C2060 C0.1U10X0402 C2060 C0.1U10X0402
C2061 C0.1U10X0402 C2061 C0.1U10X0402
C2062 C0.1U10X0402 C2062 C0.1U10X0402
C2063 C0.1U10X0402 C2063 C0.1U10X0402
C2064 C0.1U10X0402 C2064 C0.1U10X0402
C2065 C0.1U10X0402 C2065 C0.1U10X0402
C2066 C0.1U10X0402 C2066 C0.1U10X0402
C2069 C0.1U10X0402 C2069 C0.1U10X0402
C2070 C0.1U10X0402 C2070 C0.1U10X0402
C2071 C0.1U10X0402 C2071 C0.1U10X0402
C2072 C0.1U10X0402 C2072 C0.1U10X0402
C2073 C0.1U10X0402 C2073 C0.1U10X0402
C2074 C0.1U10X0402 C2074 C0.1U10X0402
C2075 C0.1U10X0402 C2075 C0.1U10X0402
C2076 C0.1U10X0402 C2076 C0.1U10X0402
C2080 C0.1U10X0402 C2080 C0.1U10X0402
C2077 C0.1U10X0402 C2077 C0.1U10X0402
C2081 C0.1U10X0402 C2081 C0.1U10X0402
C2082 C0.1U10X0402 C2082 C0.1U10X0402
C2083 C0.1U10X0402 C2083 C0.1U10X0402
C2084 C0.1U10X0402 C2084 C0.1U10X0402
C2085 C0.1U10X0402 C2085 C0.1U10X0402
C2086 C0.1U10X0402 C2086 C0.1U10X0402
PCIE_VDD
07/01/09 0A->0B
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GFX_RX0P 12
GFX_RX0N 12
GFX_RX1P 12
GFX_RX1N 12
GFX_RX2P 12
GFX_RX2N 12
GFX_RX3P 12
GFX_RX3N 12
GFX_RX4P 12
GFX_RX4N 12
GFX_RX5P 12
GFX_RX5N 12
GFX_RX6P 12
GFX_RX6N 12
GFX_RX7P 12
GFX_RX7N 12
GFX_RX8P 12
GFX_RX8N 12
GFX_RX9P 12
GFX_RX9N 12
GFX_RX10P 12
GFX_RX10N 12
GFX_RX11P 12
GFX_RX11N 12
GFX_RX12P 12
GFX_RX12N 12
GFX_RX13P 12
GFX_RX13N 12
GFX_RX14P 12
GFX_RX14N 12
GFX_RX15P 12
GFX_RX15N 12
L74 x_120L500m_100 L74 x_120L500m_100
VGA_PW
+3.3V_DELAY
VGA_PW
1 2
L76 120L500m_100 L76 120L500m_100
1 2
For allow strap for possible
M66/71 NC
M76 install
L77 120L500m_100 L77 120L500m_100
1 2
+1.8VRUN
C10U6.0805-RH
C10U6.0805-RH
L79 120L500m_100 L79 120L500m_100
1 2
PIN M72M,M76M M66M,M71M
LPVDD
LVDDC
LVDDR33orLPVDD1.8
LVDDR
C10U6.0805-RH
C10U6.0805-RH
C2302
C2302
C2068
C0.1U10X0402
C0.1U10X0402
C2303
C2303
C10U6.0805-RH
C10U6.0805-RH
C2068
C1U10X0402
C1U10X0402
C2078
C2078
C1U10X0402
C1U10X0402
C2067
C2067
LPVDD18 LPVDD25
LVDDC18
NC
LVDDR25
LVDDR
C2052
C2052
C1U10X0402
C1U10X0402
C2079
C2079
C0.1U10X0402
C0.1U10X0402
LVDDR
C2053
C2053
C2054
C2054
C0.1U10X0402
C0.1U10X0402
10KR0402
LVDS_DIGON
LVDS_BTXCKP
LVDS_BTXCKN
LVDS_BTXD0P
LVDS_BTXD0N
LVDS_BTXD1P
LVDS_BTXD1N
LVDS_BTXD2P
LVDS_BTXD2N
TP117TP117
TP116TP116
LVDS_ATXCKP
LVDS_ATXCKN
LVDS_ATXD0P
LVDS_ATXD0N
LVDS_ATXD1P
LVDS_ATXD1N
LVDS_ATXD2P
LVDS_ATXD2N
TP118TP118
TP119TP119
10KR0402
R2001
R2001
LVDS_BLON 16,38
LVDS_DIGON 38
LVDS_BTXCKP 38
LVDS_BTXCKN 38
LVDS_BTXD0P 38
LVDS_BTXD0N 38
LVDS_BTXD1P 38
LVDS_BTXD1N 38
LVDS_BTXD2P 38
LVDS_BTXD2N 38
LVDS_ATXCKP 38
LVDS_ATXCKN 38
LVDS_ATXD0P 38
LVDS_ATXD0N 38
LVDS_ATXD1P 38
LVDS_ATXD1N 38
LVDS_ATXD2P 38
LVDS_ATXD2N 38
LVDS_BTXCKP LVDS_ATXCKP
LVDS_BTXD0P LVDS_ATXD0P
RI12 x_100R0402 RI12 x_100R0402
LVDS_BTXD1P
RI14 x_100R0402 RI14 x_100R0402
LVDS_BTXD1N
RI16 x_100R0402 RI16 x_100R0402
LVDS_BTXD2N
U51F
U51F
PART 7 OF 7
PART 7 OF 7
AJ26
LVDDR_1
Control
Control
AH26
LVDDR_2
AK27
LVDDC_1
AL27
LVDDC_2
AM24
LVSSR_1
AN28
LVSSR_2
AN21
LVSSR_3
AN24
LVSSR_4
AN25
LVSSR_5
AM22
LVSSR_6
AP21
LVSSR_7
AP26
LVSSR_8
AM27
LVSSR_9
AR21
LVSSR_10
AR26
LVSSR_11
AM26
LVSSR_12
AJ22
LVSSR_13
AJ24
LVSSR_14
AL22
LPVDD
AK22
LPVSS
M72M A14
M72M A14
JNC47 x_0R0402 JNC47 x_0R0402
AG7
VARY_BL
AJ6
DIGON
AK24
TXCLK_UP
AL24
TXCLK_UN
AN27
TXOUT_U0P
AN26
TXOUT_U0N
AP27
TXOUT_U1P
AR27
TXOUT_U1N
AG24
TXOUT_U2P
AH24
TXOUT_U2N
AK26
TXOUT_U3P
AL26
TXOUT_U3N
AR22
TXCLK_LP
AP22
TXCLK_LN
AN23
LVDS channel
LVDS channel
TXOUT_L0P
AN22
TXOUT_L0N
AP23
TXOUT_L1P
AR23
TXOUT_L1N
AP24
TXOUT_L2P
AR24
TXOUT_L2N
AP25
TXOUT_L3P
AR25
TXOUT_L3N
RI9 x_100R0402 RI9 x_100R0402 RI10 x_100R0402 RI10 x_100R0402
LVDS_ATXCKN LVDS_BTXCKN
RI11 x_100R0402 RI11 x_100R0402
LVDS_ATXD0N LVDS_BTXD0N
LVDS_ATXD1P
RI13 x_100R0402 RI13 x_100R0402
LVDS_ATXD1N
LVDS_ATXD2P LVDS_BTXD2P
RI15 x_100R0402 RI15 x_100R0402
LVDS_ATXD2N
FOR EMI
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
M7X PCIE BUS
M7X PCIE BUS
M7X PCIE BUS
MS-1634X
MS-1634X
MS-1634X
0B
0B
0B
of
of
of
15 51 Thursday, May 31, 2007
15 51 Thursday, May 31, 2007
15 51 Thursday, May 31, 2007
1
5
M66/71 3.3V/2=1.65V
M76 1.8V/3=0.6V
+3VRUN +1.8VRUN
R2005
VREFG
C2000
C2000
C0.1U10X0402
C0.1U10X0402
SIN
M66 NO STUFF
R2015 10KR0402 R2015 10KR0402
R2014 10KR0402 R2014 10KR0402
R2005
499R1%0402
499R1%0402
M76 M66/71
R2017
R2017
249R1%0402
249R1%0402
GPIO19
GPIO23
+3VRUN
LVDS_I2C_DAT 38
LVDS_I2C_CLK 38
R2010 4.7K0402 R2010 4.7K0402
R2011 4.7K0402 R2011 4.7K0402
R2016
R2016
x_499R1%0402
x_499R1%0402
D D
R2000
R2000
x_499R1%0402
x_499R1%0402
ATI_GPIO9 21
+3VRUN
C C
07/01/02 0A->0B
DVPDATA20 21
DVPDATA21 21
DVPDATA22 21
DVPDATA23 21
ATI_GPIO8 21
LVDS_BLON 15,38
SOUT
SOUT 21
SIN
SIN21
SCLK
SCLK 21
POW_SW1
POW_SW1 44
OSC_SPREAD
OSC_SPREAD 21
OTEMP#
B B
A A
07/01/09 0A->0B
VGA_PW
PCIE_VDD
+1.8VRUN
VDD_CORE
PCIE_VDD
1.2V M66/71
1.1V M76
120L500m_100
120L500m_100
L95 120L500m_100 L95 120L500m_100
L96 120L500m_100 L96 120L500m_100
OTEMP# 21
M66_THRAM# 21,39
POW_SW2 44
BB_ENA 21
SCS# 21
ATI_GPIO22 21
L88 120L500m_100 L88 120L500m_100
1 2
M66/71
L92 x_120L500m_100 L92 x_120L500m_100
1 2
C2309
C2309
M76
L94
L94
1 2
C10U6.0805-RH
C10U6.0805-RH
1 2
C2103
C2103
C2102
C2102
C1U10X0402
C1U10X0402
C10U10Y0805
C10U10Y0805
C2104
C2104
C1U10X0402
C1U10X0402
DPLL_VDDC
1 2
C2310
C2310
C0.1U10X0402
C0.1U10X0402
C0.1U10X0402
C0.1U10X0402
MPVDD
C2311
C2311
MPVSS
ATI_GPIO21
SCS#
C10U10Y0805
C10U10Y0805
C2101
C2101
C1U10X0402
C1U10X0402
ATI_GPIO0 21
ATI_GPIO1 21
ATI_GPIO2 21
ATI_GPIO3 21
ATI_GPIO4 21
ATI_GPIO5 21
ATI_GPIO6 21
ATI_GPIO11 21
ATI_GPIO12 21
ATI_GPIO13 21
R2245 x_0R0402 R2245 x_0R0402
C2099
C2099
C2098
C2098
C1U10X0402
C1U10X0402
27M_IN 21
TMDS_HPD_HDMI 38
VID_0 21
VID_1 21
VID_2 21
VID_3 21
VID_4 21
VID_5 21
VID_6 21
VID_7 21
VHAD0 21
PSYNC 21
DVALID 21
R2022 1KR1%0402 R2022 1KR1%0402
C2307
C2307
C0.1U10X0402
C0.1U10X0402
M66_D- 21
M66_D+ 21
4
R2254 0R0402 R2254 0R0402
R2255 0R0402 R2255 0R0402
TP63TP63
TP79TP79
TP78TP78
TP64TP64
TP65TP65
TP80TP80
TP66TP66
TP82TP82
TP81TP81
TP68TP68
TP67TP67
TP70TP70
TP69TP69
TP72TP72
TP71TP71
TP84TP84
TP83TP83
TP76TP76
TP75TP75
TP77TP77
ATI_GPIO0
ATI_GPIO1
ATI_GPIO2
ATI_GPIO3
ATI_GPIO4
ATI_GPIO5
ATI_GPIO6
R2223 x_0R0402 R2223 x_0R0402
ATI_GPIO11
ATI_GPIO12
ATI_GPIO13
GPIO19
TP89TP89
TP90TP90
TP91TP91
TP92TP92
TP93TP93
TP94TP94
VREFG
27M_IN
DPLL_VDDC
TMDS_HPD_HDMI
MPVDD
MPVSS
GPIO23
U51B
U51B
AM12
VID_0
AL12
VID_1
AJ12
VID_2
AH12
VID_3
AM10
VID_4
AL10
VID_5
AJ10
VID_6
AH10
VID_7
AM9
VHAD_0
AL9
VHAD_1
AJ9
VPHCTL
AL7
VPCLK0
AK7
VIPCLK
AM7
PSYNC
AJ7
DVALID
AK6
SDA
AM6
SCL
AK14
NC_1
AN8
DVPCNTL__MVP_0
AP8
DVPCNTL__MVP_1
AG1
DVPCNTL_0
AH3
DVPCNTL_1
AH2
DVPCNTL_2
AH1
DVPCLK
AJ3
DVPDATA_0
AJ2
DVPDATA_1
AJ1
DVPDATA_2
AK2
DVPDATA_3
AK1
DVPDATA_4
AL3
DVPDATA_5
AL2
DVPDATA_6
AL1
DVPDATA_7
AM3
DVPDATA_8
AM2
DVPDATA_9
AN2
DVPDATA_10
AP3
DVPDATA_11
AR3
DVPDATA_12
AN4
DVPDATA_13
AR4
DVPDATA_14
AP4
DVPDATA_15
AN5
DVPDATA_16
AR5
DVPDATA_17
AP5
DVPDATA_18
AP6
DVPDATA_19
AR6
DVPDATA_20
AN7
DVPDATA_21
AP7
DVPDATA_22
AR7
DVPDATA_23
AG2
GPIO_0
AF2
GPIO_1
AF1
GPIO_2
AE3
GPIO_3
AE2
GPIO_4
AE1
GPIO_5
AD3
GPIO_6
AD2
GPIO_7_BLON
AD1
GPIO_8_ROMSO
AD5
GPIO_9_ROMSI
AD4
GPIO_10_ROMSCK
AC3
GPIO_11
AC2
GPIO_12
AC1
GPIO_13
AB3
GPIO_14_HPD2
AB2
GPIO_15_PWRCNTL_0
AB1
GPIO_16_SSIN
AF5
GPIO_17_THERMAL_INT
AF4
GPIO_18_HPD3
AG4
GPIO_19_CTF
AG3
GPIO_20_PWRCNTL_1
AD9
GPIO_21_BBEN
AD8
GPIO_22_ROMCSB
AD7
GPIO_23_CLKREQB
AB4
GPIO_24_TRST
AB6
GPIO_25_TDI
AB7
GPIO_26_TCK
AB9
GPIO_27_TMS
AA9
GPIO_28_TDO
AF8
GENERICA
AF7
GENERICB
AG5
GENERICC
AD12
VREFG
AR20
DPLL_PVDD
AP20
DPLL_PVSS
AM35
PCIE_PVDD
AM34
PCIE_PVSS
A14
MPVDD
B15
MPVSS
AR33
XTALIN
AP33
XTALOUT
AG19
DPLL_VDDC
AG21
TS_FDO
AK4
DMINUS
AM4
DPLUS
AG6
HPD1
M72M A14
M72M A14
THERMAL
THERMAL
VIP / I2C
VIP / I2C
PLL
PLL
CLOCKS
CLOCKS
MULTI_GFX
MULTI_GFX
EXTERNAL
EXTERNAL
TMDS
TMDS
GENERAL
GENERAL
PURPOSE
PURPOSE
I/O
I/O
PART 2 OF 7
PART 2 OF 7
INTEGRATED
INTEGRATED
TMDS
TMDS
DAC1
DAC1
DAC2
DAC2
DDC
DDC
TXCAM
TXCAP
TXCBM
TXCBP
TPVDD
TXVDDR_1
TXVDDR_2
TXVDDR_3
TXVDDR_4
TXVSSR_1
TXVSSR_2
TXVSSR_3
TXVSSR_4
TXVSSR_5
TXVSSR_6
TXVSSR_7
TXVSSR_8
TXVSSR_9
TXVSSR_10
HSYNC
VSYNC
AVSSQ
VDD1DI
VSS1DI
V2SYNC
H2SYNC
A2VDD
A2VDDQ
A2VSSQ
VDD2DI
VSS2DI
DDC1DATA
DDC1CLK
DDC2DATA
DDC2CLK
DDC3DATA
DDC3CLK
DDC4DATA
DDC4CLK
NC_10
TPVSS
COMP
R2SET
TX0M
TX1M
TX2M
TX3M
TX4M
TX5M
NC_9
NC_2
NC_3
NC_4
NC_5
NC_6
NC_7
NC_8
RSET
AVDD
TX0P
TX1P
TX2P
TX3P
TX4P
TX5P
R
RB
G
GB
BB
R2
R2B
G2
G2B
B2
B2B
C
AN9
AN10
AR10
AP10
AR11
AP11
AR12
AP12
AR14
AP14
AR15
AP15
AR16
AP16
AR17
AP17
AR13
AP13
AM14
AL14
AN19
AN20
AP19
AR19
AN18
AP18
AR18
AN16
AN15
AN17
AN11
AN12
AN13
AN14
AH18
AG18
AH17
AG17
AP9
AR9
AG15
AR31
AP31
AR30
AP30
AR29
B
AP29
AN29
AN30
AN31
AR32
AP32
AR28
AP28
AM19
AL19
AM18
AL18
AM17
AL17
AK19
AK18
Y
AK17
AL15
AM15
AM21
AL21
AK21
AH22
AG22
AJ21
AM29
AL29
AJ15
AH15
AJ5
AJ4
AH14
AG14
3
C2089
C2089
C10U10Y0805
C10U10Y0805
C1U10X0402
C1U10X0402
JNC44 x_0R0402 JNC44 x_0R0402
R2021 499R1%0402 R2021 499R1%0402
VDD1DI
VSS1DI
TV_C_R_PR 40
TV_Y_G 40
TV_COMP_B_PB 40
VDD1DI
VSS1DI
R2023 715R1%0402 R2023 715R1%0402
R2260 X_0R0402 R2260 X_0R0402
R2259 X_0R0402 R2259 X_0R0402
C1000P2000X1808
C1000P2000X1808
C2087
C2087
C2088
C2088
07/04/09 0B->0C
JNC50 x_0R0402 JNC50 x_0R0402
C2333
C2333
C1000P2000X1808
C1000P2000X1808
VGA_DDC1DATA 38
VGA_DDC1CLK 38
DDC_DATA_HDMI 38
DDC_CLK_HDMI 38
LVDS_I2C_DAT
LVDS_I2C_CLK
R2006 180R0402 R2006 180R0402
R2008 180R0402 R2008 180R0402
C2090
C2090
C1000P2000X1808
C1000P2000X1808
R2248 x_0R0402 R2248 x_0R0402
R2249 x_0R0402 R2249 x_0R0402
C2308
C2308
C10U10Y0805
C10U10Y0805
R2007 180R0402 R2007 180R0402
R2009 180R0402 R2009 180R0402
C2305
C2305
C2304
C2304
C0.1U10X0402
C0.1U10X0402
C10U6.0805-RH
C10U6.0805-RH
+3VRUN
C2100
C2100
C0.1U10X0402
C0.1U10X0402
L80 120L500m_100 L80 120L500m_100
1 2
L82 120L500m_100 L82 120L500m_100
1 2
R2181 150R1%0402 R2181 150R1%0402
R2182 150R1%0402 R2182 150R1%0402
R2183 150R1%0402 R2183 150R1%0402
VGA_R 38
VGA_G 38
VGA_B 38
VGA_HSYNC 21,38
VGA_VSYNC 21,38
C10U10Y0805
C10U10Y0805
C2093
C2093
C0.1U10X0402
C0.1U10X0402
C2096
C2096
C10U10Y0805
C10U10Y0805
2
HDMI_CLKN 38
HDMI_CLKP 38
HDMI_DATA0N 38
HDMI_DATA0P 38
HDMI_DATA1N 38
HDMI_DATA1P 38
HDMI_DATA2N 38
HDMI_DATA2P 38
C1000P2000X1808
C1000P2000X1808
C2091
C2091
C10U10Y0805
C10U10Y0805
C2097
C2097
C0.1U10X0402
C0.1U10X0402
C2092
C2092
C2094
C2094
C2095
C2095
VGA_PW
VGA_PW
L84 120L500m_100 L84 120L500m_100
1 2
C2306
C2306
C0.1U10X0402
C0.1U10X0402
M66/71
L86 120L500m_100 L86 120L500m_100
1 2
M76
C1000P2000X1808
C1000P2000X1808
M66/71
L89 x_120L500m_100 L89 x_120L500m_100
1 2
C2332
C2332
M76
L91 120L500m_100 L91 120L500m_100
1 2
C1000P2000X1808
C1000P2000X1808
L93 120L500m_100 L93 120L500m_100
1 2
M66/71 NC
M76 Install
VGA_PW
VGA_PW
+2.5V_REG
+3.3V_DELAY
+1.8VRUN
VGA_PW
1
M66/71
R2220 x_0R0805 R2220 x_0R0805
R2221 0R0805 R2221 0R0805
M76
+2.5V_REG
+1.8VRUN
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
M7X Main
M7X Main
M7X Main
MS-1634X
MS-1634X
MS-1634X
0B
0B
0B
of
of
of
16 51 Thursday, May 31, 2007
16 51 Thursday, May 31, 2007
16 51 Thursday, May 31, 2007
1