5
4
3
2
1
MSI
D D
MS-16332
Ver:0A
GDDR3
16MX32bit*4PCS
AMD S1 PROCESSOR
638-Pin uFCPGA 638
DDR2 400 / 533 / 667 MHz
16 X 16 Bit
HyperTransport Link
UNBUFFERED
DDR2 NEAR
SODIMM
200-PIN DDR2 SODIMM
UNBUFFERED
DDR2 FAR
SODIMM
200-PIN DDR2 SODIMM
9,10
9,10
North Bridge
DVI
nVIDIA G73M
PCI Express
X16
LCD
TV OUT
C C
Mini PCI
nVIDIA
C51MV
PCI Express
HyperTransport Link
X 8 Bit
X1
New Card
MSI 6855B
PCI Bus
South Bridge
PCMCIA
O2 1394
OZ711MP1
nVIDIA
MCP51M
Flash Card
Microphone In
Line In
B B
Internal Microphone
Audio Codec
Realtek ALC883
Line Out & SPDIF
Azalia Interface
MDC
PHY
MAC
VSX8601
Internal SPK
Audio AMP
APA2030
LPC
SATA
two select one
Primary IDE Bus
Secondary IDE Bus
USB 0,1,4,5
USB Connectors
KBC
ene KB910 c1
HDD
HDD
ODD
USB 1.1 / 2.0
USB 2 USB 3
Camera
MiniPCI New C a r d
Internal Keyboard
Touch Pad
Smart Fan
USB 6 USB 7
ెᙃᢝ
LPC Debug Port
X-Bus
A A
5
4
3
BIOS ROM
Title
BLOCK DIAGRAM
Size Document Number Rev
C
2
Date: Sheet
MSI CORPORATION
MS-16332
1
14 0 Monday, April 10, 2006
0.A
of
5
4
3
2
1
PROCESSOR HYPERTRANSPORT INTERFACE
VLDT_Ax AND VLDT_Bx ARE CONNECTED TO THE LDT_RUN POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
D D
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
A1
A26
Athlon 64 S1g1
+VLDT
D4
VLDT_A3
D3
VLDT_A2
D2
VLDT_A1
D1
VLDT_A0
HT_CADIN15_P 8
HT_CADIN15_N 8
HT_CADIN14_P 8
HT_CADIN14_N 8
HT_CADIN13_P 8
+VLDT
HT_CADIN13_N 8
HT_CADIN12_P 8
HT_CADIN12_N 8
HT_CADIN11_P 8
HT_CADIN11_N 8
HT_CADIN10_P 8
HT_CADIN10_N 8
HT_CADIN9_P 8
HT_CADIN9_N 8
HT_CADIN8_P 8
HT_CADIN8_N 8
HT_CADIN7_P 8
HT_CADIN7_N 8
HT_CADIN6_P 8
HT_CADIN6_N 8
HT_CADIN5_P 8
HT_CADIN5_N 8
HT_CADIN4_P 8
HT_CADIN4_N 8
HT_CADIN3_P 8
HT_CADIN3_N 8
HT_CADIN2_P 8
HT_CADIN2_N 8
HT_CADIN1_P 8
HT_CADIN1_N 8
HT_CADIN0_P 8
HT_CADIN0_N 8
HT_CLKIN1_P 8
HT_CLKIN1_N 8
HT_CLKIN0_P 8
HT_CLKIN0_N 8
C C
B B
N5
L0_CADIN_H15
P5
L0_CADIN_L15
M3
L0_CADIN_H14
M4
L0_CADIN_L14
L5
L0_CADIN_H13
M5
L0_CADIN_L13
K3
L0_CADIN_H12
K4
L0_CADIN_L12
H3
L0_CADIN_H11
H4
L0_CADIN_L11
G5
L0_CADIN_H10
H5
L0_CADIN_L10
F3
L0_CADIN_H9
F4
L0_CADIN_L9
E5
L0_CADIN_H8
F5
L0_CADIN_L8
N3
L0_CADIN_H7
N2
L0_CADIN_L7
L1
L0_CADIN_H6
M1
L0_CADIN_L6
L3
L0_CADIN_H5
L2
L0_CADIN_L5
J1
L0_CADIN_H4
K1
L0_CADIN_L4
G1
L0_CADIN_H3
H1
L0_CADIN_L3
G3
L0_CADIN_H2
G2
L0_CADIN_L2
E1
L0_CADIN_H1
F1
L0_CADIN_L1
E3
L0_CADIN_H0
E2
L0_CADIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
U017A
VLDT_B3
VLDT_B2
VLDT_B1
VLDT_B0
L0_CADOUT_H15
L0_CADOUT_L15
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H0
L0_CADOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CLKOUT_H0
L0_CLKOUT_L0
AE5
AE4
AE3
AE2
T4
T3
V5
U5
V4
V3
Y5
W5
AB5
AA5
AB4
AB3
AD5
AC5
AD4
AD3
T1
R1
U2
U3
V1
U1
W2
W3
AA2
AA3
AB1
AA1
AC2
AC3
AD1
AC1
Y4
Y3
Y1
W1
+VLDT
4.7u_0805
C338
HT_CADOUT15_P 8
HT_CADOUT15_N 8
HT_CADOUT14_P 8
HT_CADOUT14_N 8
HT_CADOUT13_P 8
HT_CADOUT13_N 8
HT_CADOUT12_P 8
HT_CADOUT12_N 8
HT_CADOUT11_P 8
HT_CADOUT11_N 8
HT_CADOUT10_P 8
HT_CADOUT10_N 8
HT_CADOUT9_P 8
HT_CADOUT9_N 8
HT_CADOUT8_P 8
HT_CADOUT8_N 8
HT_CADOUT7_P 8
HT_CADOUT7_N 8
HT_CADOUT6_P 8
HT_CADOUT6_N 8
HT_CADOUT5_P 8
HT_CADOUT5_N 8
HT_CADOUT4_P 8
HT_CADOUT4_N 8
HT_CADOUT3_P 8
HT_CADOUT3_N 8
HT_CADOUT2_P 8
HT_CADOUT2_N 8
HT_CADOUT1_P 8
HT_CADOUT1_N 8
HT_CADOUT0_P 8
HT_CADOUT0_N 8
HT_CLKOUT1_P 8
HT_CLKOUT1_N 8
HT_CLKOUT0_P 8
HT_CLKOUT0_N 8
uPGA638
Top View
AF1
+VLDT
4.7u_0805
C417
C428
4.7u_0805
0.22u_0603
C416
0.22u_0603
C174
0.01u_0402
C160
C415
0.01u_0402
LAYOUT: Place bypass cap on topside of board
NEAR HT POWER PINS THAT ARE NOT CONNECTED DIRECTLY
TO DOWNSTREAM HT DEVICE, BUT CONNECTED INTERNALLY
TO OTHER HT POWER PINS
PLACE CLOSE TO VLDT0 POWER PINS
R034 49.9_1%
A A
R036 49.9_1%
HT_CTLIN0_P 8
HT_CTLIN0_N 8
HT_CTLIN1_P
HT_CTLIN1_N
P3
P4
N1
P1
L0_CTLIN_H1
L0_CTLIN_L1
L0_CTLIN_H0
L0_CTLIN_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
HT_CPU_CTLOUT1_P
T5
HT_CPU_CTLOUT1_N
R5
R2
R3
TP021
TP022
HT_CTLOUT0_P 8
HT_CTLOUT0_N 8
MSI CORPORATION
Title
AMD S1 HT I/F
Athlon 64 S1 Processor Socket
5
4
3
Size Document Number Rev
Custom
Date: Sheet of
MS-16332
2
24 0 Monday, April 10, 2006
1
0A
5
VDD_VTT_SUS_CPU IS CONNECTED TO THE VDD_VTT_SUS POWER
SUPPLY THROUGH THE PACKAGE OR ON THE DIE. IT IS ONLY CONNECTED
ON THE BOARD TO DECOUPLING NEAR THE CPU PACKAGE
CPU_VDDIO_SUS
D D
CPU_VTT_SUS
R201
39.2_0402 1%
R202
39.2_0402 1%
PLACE THEM CLOSE TO
CPU WITHIN 1"
MEM_MA_ADD[15..0] 6,7
C C
B B
CPU_VDDIO_SUS CPU_M_VREF_SUS
R033
1K_0402 1%
R029
1K_0402 1%
A A
C057
1n_0402
CPU_M_VREF_SUS
CPU_M_VREF
C055
SNS_+0.9VTT
1000PF_NC
M_ZN
M_ZP
MEM_MA0_CS#3 6,7 MEM_MA0_CLK2_P 6
MEM_MA0_CS#2 6,7
MEM_MA0_CS#1 6,7
MEM_MA0_CS#0 6,7
MEM_MB0_CS#3 6,7
MEM_MB0_CS#2 6,7
MEM_MB0_CS#1 6,7
MEM_MB0_CS#0 6,7
MEM_MB_CKE1 6,7
MEM_MB_CKE0 6,7
MEM_MA_CKE1 6,7
MEM_MA_CKE0 6,7
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2 6,7
MEM_MA_BANK1 6,7 MEM_MB_BANK1 6,7
MEM_MA_BANK0 6,7
MEM_MA_RAS# 6,7
MEM_MA_CAS# 6,7
MEM_MA_WE# 6,7
C076
1n_0402
W17
AE10
AF10
W24
U23
K19
K20
M19
M20
M24
M22
N22
N21
R21
K22
R20
U20
U21
Y10
V19
J22
V22
T19
Y26
J24
H26
J23
J20
J21
V24
K24
L20
R19
L19
L22
L21
T22
T20
MEMVREF
VTT_SENSE
MEMZN
MEMZP
MA0_CS_L3
MA0_CS_L2
MA0_CS_L1
MA0_CS_L0
MB0_CS_L3
MB0_CS_L2
MB0_CS_L1
MB0_CS_L0
MB_CKE1
MB_CKE0
MA_CKE1
MA_CKE0
MA_ADD15
MA_ADD14
MA_ADD13
MA_ADD12
MA_ADD11
MA_ADD10
MA_ADD9
MA_ADD8
MA_ADD7
MA_ADD6
MA_ADD5
MA_ADD4
MA_ADD3
MA_ADD2
MA_ADD1
MA_ADD0
MA_BANK2
MA_BANK1
MA_BANK0
MA_RAS_L
MA_CAS_L
MA_WE_L
MEM_MB0_CLK2_P 6
MEM_MB0_CLK2_N 6
MEM_MB0_CLK1_P 6
MEM_MB0_CLK1_N 6
MEM_MA0_CLK2_P 6
MEM_MA0_CLK2_N 6
MEM_MA0_CLK1_P 6
Athlon 64 S1
Processor
Socket
LAYOUT:PLACE CLOSE TO CPU
MEM_MA0_CLK1_N 6
5
4
CPU_M_VREF
SNS_+0.9VTT
U017B
MA0_CLK_H2
MA0_CLK_L2
MA0_CLK_H1
MA0_CLK_L1
MB0_CLK_H2
MB0_CLK_L2
MB0_CLK_H1
MB0_CLK_L1
MB0_ODT1
MB0_ODT0
MA0_ODT1
MA0_ODT0
MB_ADD15
MB_ADD14
MB_ADD13
MB_ADD12
MB_ADD11
MB_ADD10
MB_ADD9
MB_ADD8
MB_ADD7
MB_ADD6
MB_ADD5
MB_ADD4
MB_ADD3
MB_ADD2
MB_ADD1
MB_ADD0
MB_BANK2
MB_BANK1
MB_BANK0
MB_RAS_L
MB_CAS_L
MB_WE_L
4
15MIL trace, 20MIL spac e,
shorter than 1"
VTT_SENSE
should be routed as a 10-mil trace with 10 mils
spacing.
CPU_VTT_SUS
D10
VTT1
C10
VTT2
B10
VTT3
AD10
VTT4
W10
VTT5
AC10
VTT6
AB10
VTT7
AA10
VTT8
A10
VTT9
Y16
AA16
E16
F16
AF18
AF17
A17
A18
W23
W26
V20
U19
MEM_MB_ADD15
J25
MEM_MB_ADD14
J26
MEM_MB_ADD13
W25
MEM_MB_ADD12
L23
MEM_MB_ADD11
L25
MEM_MB_ADD10
U25
MEM_MB_ADD9
L24
MEM_MB_ADD8
M26
MEM_MB_ADD7
L26
MEM_MB_ADD6
N23
MEM_MB_ADD5
N24
MEM_MB_ADD4
N25
MEM_MB_ADD3
N26
MEM_MB_ADD2
P24
MEM_MB_ADD1
P26
MEM_MB_ADD0
T24
K26
T26
U26
U24
V26
U22
Differential CTT termination
C044
1.5p_0402
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C182
1.5p_0402
Differential CTT termination
C051
1.5p_0402
PLACE CLOSE TO PROCESSOR
WITHIN 1.5 INCH
C156
1.5p_0402
MEM_MA0_CLK2_N 6
MEM_MA0_CLK1_P 6
MEM_MA0_CLK1_N 6
MEM_MB0_CLK2_P 6
MEM_MB0_CLK2_N 6
MEM_MB0_CLK1_P 6
MEM_MB0_CLK1_N 6
MEM_MB0_ODT1 6,7
MEM_MB0_ODT0 6,7
MEM_MA0_ODT1 6,7
MEM_MA0_ODT0 6,7
MEM_MB_BANK2 6,7
MEM_MB_BANK0 6,7
MEM_MB_RAS# 6,7
MEM_MB_CAS# 6,7
MEM_MB_WE# 6,7
3
MEM_MB_ADD[15..0] 6,7
3
2
1
Processor DDR2 Memory Interface
MEM_MB_DATA[63..0] 6
MEM_MB_DM[7..0] 6
MEM_MB_DQS7_P 6
MEM_MB_DQS7_N 6
MEM_MB_DQS6_P 6
MEM_MB_DQS6_N 6
MEM_MB_DQS5_P 6
MEM_MB_DQS5_N 6
MEM_MB_DQS4_P 6
MEM_MB_DQS4_N 6
MEM_MB_DQS3_P 6
MEM_MB_DQS3_N 6
MEM_MB_DQS2_P 6
MEM_MB_DQS2_N 6
MEM_MB_DQS1_P 6
MEM_MB_DQS1_N 6
MEM_MB_DQS0_N 6
MEM_MB_DATA63
MEM_MB_DATA62
MEM_MB_DATA61
MEM_MB_DATA60
MEM_MB_DATA59
MEM_MB_DATA58
MEM_MB_DATA57
MEM_MB_DATA56
MEM_MB_DATA55
MEM_MB_DATA54
MEM_MB_DATA53
MEM_MB_DATA52
MEM_MB_DATA51
MEM_MB_DATA50
MEM_MB_DATA49
MEM_MB_DATA48
MEM_MB_DATA47
MEM_MB_DATA46
MEM_MB_DATA45
MEM_MB_DATA44
MEM_MB_DATA43
MEM_MB_DATA42
MEM_MB_DATA41
MEM_MB_DATA40
MEM_MB_DATA39
MEM_MB_DATA38
MEM_MB_DATA37
MEM_MB_DATA36
MEM_MB_DATA35
MEM_MB_DATA34
MEM_MB_DATA33
MEM_MB_DATA32
MEM_MB_DATA31
MEM_MB_DATA30 MEM_MA_DATA30
MEM_MB_DATA29
MEM_MB_DATA28
MEM_MB_DATA27
MEM_MB_DATA26 MEM_MA_DATA26
MEM_MB_DATA25
MEM_MB_DATA24
MEM_MB_DATA23
MEM_MB_DATA22
MEM_MB_DATA21 MEM_MA_DATA21
MEM_MB_DATA20
MEM_MB_DATA19
MEM_MB_DATA18
MEM_MB_DATA17
MEM_MB_DATA16
MEM_MB_DATA15
MEM_MB_DATA14
MEM_MB_DATA13
MEM_MB_DATA12
MEM_MB_DATA11
MEM_MB_DATA10
MEM_MB_DATA9
MEM_MB_DATA8
MEM_MB_DATA7
MEM_MB_DATA6
MEM_MB_DATA5
MEM_MB_DATA4
MEM_MB_DATA3
MEM_MB_DATA2
MEM_MB_DATA1
MEM_MB_DATA0
MEM_MB_DM7
M_MB_DM6
MEM_MB_DM5
MEM_MB_DM4
MEM_MB_DM3
MEM_MB_DM2
MEM_MB_DM1
MEM_MB_DM0
AD11
AF11
AF14
AE14
Y11
AB11
AC12
AF13
AF15
AF16
AC18
AF19
AD14
AC14
AE18
AD18
AD20
AC20
AF23
AF24
AF20
AE20
AD22
AC22
AE25
AD26
AA25
AA26
AE24
AD24
AA23
AA24
G24
G23
D26
C26
G26
G25
E24
E23
C24
B24
C20
B20
C25
D24
A21
D20
D18
C18
D14
C14
A20
A19
A16
A15
A13
D12
E11
G11
B14
A14
A11
C11
AD12
AC16
AE22
AB26
E25
A22
B16
A12
AF12
AE12
AE16
AD16
AF21
AF22
AC25
AC26
F26
E26
A24
A23
D16
C16
C12
B12
MB_DATA63
MB_DATA62
MB_DATA61
MB_DATA60
MB_DATA59
MB_DATA58
MB_DATA57
MB_DATA56
MB_DATA55
MB_DATA54
MB_DATA53
MB_DATA52
MB_DATA51
MB_DATA50
MB_DATA49
MB_DATA48
MB_DATA47
MB_DATA46
MB_DATA45
MB_DATA44
MB_DATA43
MB_DATA42
MB_DATA41
MB_DATA40
MB_DATA39
MB_DATA38
MB_DATA37
MB_DATA36
MB_DATA35
MB_DATA34
MB_DATA33
MB_DATA32
MB_DATA31
MB_DATA30
MB_DATA29
MB_DATA28
MB_DATA27
MB_DATA26
MB_DATA25
MB_DATA24
MB_DATA23
MB_DATA22
MB_DATA21
MB_DATA20
MB_DATA19
MB_DATA18
MB_DATA17
MB_DATA16
MB_DATA15
MB_DATA14
MB_DATA13
MB_DATA12
MB_DATA11
MB_DATA10
MB_DATA9
MB_DATA8
MB_DATA7
MB_DATA6
MB_DATA5
MB_DATA4
MB_DATA3
MB_DATA2
MB_DATA1
MB_DATA0
MB_DM7
MB_DM6
MB_DM5
MB_DM4
MB_DM3
MB_DM2
MB_DM1
MB_DM0
MB_DQS_H7
MB_DQS_L7
MB_DQS_H6
MB_DQS_L6
MB_DQS_H5
MB_DQS_L5
MB_DQS_H4
MB_DQS_L4
MB_DQS_H3
MB_DQS_L3
MB_DQS_H2
MB_DQS_L2
MB_DQS_H1
MB_DQS_L1
MB_DQS_H0
MB_DQS_L0
2
U017C
Athlon 64 S1
Processor
Socket
MEM_MA_DATA63
MA_DATA63
MA_DATA62
MA_DATA61
MA_DATA60
MA_DATA59
MA_DATA58
MA_DATA57
MA_DATA56
MA_DATA55
MA_DATA54
MA_DATA53
MA_DATA52
MA_DATA51
MA_DATA50
MA_DATA49
MA_DATA48
MA_DATA47
MA_DATA46
MA_DATA45
MA_DATA44
MA_DATA43
MA_DATA42
MA_DATA41
MA_DATA40
MA_DATA39
MA_DATA38
MA_DATA37
MA_DATA36
MA_DATA35
MA_DATA34
MA_DATA33
MA_DATA32
MA_DATA31
MA_DATA30
MA_DATA29
MA_DATA28
MA_DATA27
MA_DATA26
MA_DATA25
MA_DATA24
MA_DATA23
MA_DATA22
MA_DATA21
MA_DATA20
MA_DATA19
MA_DATA18
MA_DATA17
MA_DATA16
MA_DATA15
MA_DATA14
MA_DATA13
MA_DATA12
MA_DATA11
MA_DATA10
MA_DQS_H7
MA_DQS_L7
MA_DQS_H6
MA_DQS_L6
MA_DQS_H5
MA_DQS_L5
MA_DQS_H4
MA_DQS_L4
MA_DQS_H3
MA_DQS_L3
MA_DQS_H2
MA_DQS_L2
MA_DQS_H1
MA_DQS_L1
MA_DQS_H0
MA_DQS_L0
AA12
MEM_MA_DATA62
AB12
MEM_MA_DATA61
AA14
MEM_MA_DATA60
AB14
MEM_MA_DATA59
W11
MEM_MA_DATA58
Y12
MEM_MA_DATA57
AD13
MEM_MA_DATA56
AB13
MEM_MA_DATA55
AD15
MEM_MA_DATA54
AB15
MEM_MA_DATA53
AB17
MEM_MA_DATA52
Y17
MEM_MA_DATA51
Y14
MEM_MA_DATA50
W14
MEM_MA_DATA49
W16
MEM_MA_DATA48
AD17
MEM_MA_DATA47
Y18
MEM_MA_DATA46
AD19
MEM_MA_DATA45
AD21
MEM_MA_DATA44
AB21
MEM_MA_DATA43
AB18
MEM_MA_DATA42
AA18
MEM_MA_DATA41
AA20
MEM_MA_DATA40
Y20
MEM_MA_DATA39
AA22
MEM_MA_DATA38
Y22
MEM_MA_DATA37
W21
MEM_MA_DATA36
W22
MEM_MA_DATA35
AA21
MEM_MA_DATA34
AB22
MEM_MA_DATA33
AB24
MEM_MA_DATA32
Y24
MEM_MA_DATA31
H22
H20
MEM_MA_DATA29
E22
MEM_MA_DATA28
E21
MEM_MA_DATA27
J19
H24
MEM_MA_DATA25
F22
MEM_MA_DATA24
F20
MEM_MA_DATA23
C23
MEM_MA_DATA22
B22
F18
MEM_MA_DATA20
E18
MEM_MA_DATA19
E20
MEM_MA_DATA18
D22
MEM_MA_DATA17
C19
MEM_MA_DATA16
G18
MEM_MA_DATA15
G17
MEM_MA_DATA14
C17
MEM_MA_DATA13
F14
MEM_MA_DATA12
E14
MEM_MA_DATA11
H17
MEM_MA_DATA10
E17
MEM_MA_DATA9
E15
MA_DATA9
MA_DATA8
MA_DATA7
MA_DATA6
MA_DATA5
MA_DATA4
MA_DATA3
MA_DATA2
MA_DATA1
MA_DATA0
MA_DM7
MA_DM6
MA_DM5
MA_DM4
MA_DM3
MA_DM2
MA_DM1
MA_DM0
Title
Size Document Number Rev
Custom
Date: Sheet of
MEM_MA_DATA8
H15
MEM_MA_DATA7
E13
MEM_MA_DATA6
C13
MEM_MA_DATA5
H12
MEM_MA_DATA4
H11
MEM_MA_DATA3
G14
MEM_MA_DATA2
H14
MEM_MA_DATA1
F12
MEM_MA_DATA0
G12
MEM_MA_DM7
Y13
MEM_MA_DM6 ME
AB16
MEM_MA_DM5
Y19
MEM_MA_DM4
AC24
MEM_MA_DM3
F24
MEM_MA_DM2
E19
MEM_MA_DM1
C15
MEM_MA_DM0
E12
W12
W13
Y15
W15
AB19
AB20
AD23
AC23
G22
G21
C22
C21
G16
G15
G13
H13
MSI CORPORATION
AMD S1 HT I/F
MS-16332
MEM_MA_DATA[63..0] 6
MEM_MA_DM[7..0] 6
MEM_MA_DQS7_P 6
MEM_MA_DQS7_N 6
MEM_MA_DQS6_P 6
MEM_MA_DQS6_N 6
MEM_MA_DQS5_P 6
MEM_MA_DQS5_N 6
MEM_MA_DQS4_P 6
MEM_MA_DQS4_N 6
MEM_MA_DQS3_P 6
MEM_MA_DQS3_N 6
MEM_MA_DQS2_P 6
MEM_MA_DQS2_N 6
MEM_MA_DQS1_P 6
MEM_MA_DQS1_N 6
MEM_MA_DQS0_P 6 MEM_MB_DQS0_P 6
MEM_MA_DQS0_N 6
34 0 Monday, April 10, 2006
1
0A
5
LAYOUT: ROUTE VDDA TRACE APPROX.
50 mils WIDE (USE 2x25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
+2.5VRUN
D D
HTCPU_PWRGD 8
1K_0402
R233
De-Glitching Circuit
1/21 Change to OD gate
+2.5VRUN
R241
1K_0402
HTCPU_STOP# 8
C C
+2.5VRUN CPU_VDDIO_SUS
R237
1K_0402
HTCPU_RST# 8
B B
A A
RUN_PWRGD 13,18,22
THERMDA
THERMDC
2200p_0402
C191
0.1u_0402
5
+3VSUS
U019A
1 2
74LCX07(Open Drain)
U019B
3 4
74LCX07(Open Drain)
U019C
5 6
74LCX07(Open Drain)
U019D
13 12
74LCX07(Open Drain)
U019E
11 10
74LCX07(Open Drain)
U019F
9 8
74LCX07(Open Drain)
+3VRUN
C189
CPU_VDDIO_SUS
14
7
U003
2
D+
3
D-
4
T_CRIT_A#
LM86CIMMXNOPB_MSOP8-RH
R239
300_0402
CPU_VDDIO_SUS
R234
300_0402
R242
300_0402
SMBCLK VDD
SMBDATA
ALERT#
GND
Close to CPU socket
8 1
7
6
5
4
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_HT_RESET#
SMB_THRMCPU_CLK
SMB_THRMCPU_DATA
4
+3VALW
+VLDT
CPU_CLK_P 8
CPU_CLK_N 8
+2.5VRUN
R311
8.2K_1%_0402
CPU_FETGATE
R312
34.8K_1%_0402
SMB_THRMCPU_CLK 21
SMB_THRMCPU_DATA 21
R047 10K_0402
R046 10K_0402
+2.5VRUN
L010
300L600m
R198
300_0402
R037 44.2_0603 1%
R035 44.2_0603 1%
CPU_VDD_RUN_FB_H 37
CPU_VDD_RUN_FB_L 37
C443 3.9n_0602
R225
169_0402 1%
C442 3.9n_0602
CPU_FETGATE 37
SMB_THRMCPU_DATA
SMB_THRMCPU_CLK
C149
4.7u_0805
CPU_SIC_R
3
ATHLON Control and Debug
VDDA_L
C159
3300p_0603
CPU_HT_RESET#
CPU_ALL_PWROK
CPU_LDTSTOP#
CPU_VDD_RUN_FB_H
CPU_VDD_RUN_FB_L
TP101
TP102
CPU_CLKIN_SC_P
CPU_CLKIN_SC_N
TEST25_H
TEST25_L
TEST19
TEST18
3
TP103
TP104
TP105
TP106
TP107
0.22u_0603
CPU_HTREF1
CPU_HTREF0
VDDIO_FB_H
VDDIO_FB_L
DBRDY
TMS
TCK
TRST#
TDI
TP042
TP040
TP038
TP044
TP012
THERMDC
THERMDA
C166
F8
VDDA2
F9
VDDA1
B7
RESET_L
A7
PWROK
F10
LDTSTOP_L
AF4
SIC
AF5
SID
P6
HT_REF1
R6
HT_REF0
F6
VDD_FB_H
E6
VDD_FB_L
W9
VDDIO_FB_H
Y9
VDDIO_FB_L
A9
CLKIN_H
A8
CLKIN_L
G10
DBRDY
AA9
TMS
AC9
TCK
AD9
TRST_L
AF9
TDI
E9 C9
TEST25_H TEST29_H
E8
TEST25_L
G9
TEST19
H10
TEST18
AA7
TEST13
C2
TEST9
D7
TEST17
E7
TEST16
F7
TEST15
C7
TEST14
AC8
TEST12
C3
TEST7
AA6
TEST6
W7
THERMDC
W8
THERMDA
Y6
TEST3
AB6
TEST2
P20
RSVD0
P19
RSVD1
N20
RSVD2
N19
RSVD3
R26
RSVD4
R25
RSVD5
P22
RSVD6
R22
RSVD7
AMD NPT S1 SOCKET
Processor Socket
CPU_PRESENT_L
JTAC
U017D
THERMTRIP_L
PROCHOT_L
VID5
VID4
VID3
VID2
VID1
VID0
PSI_L
DBREQ_L
TDO
TEST29_L
TEST24
TEST23
TEST22
TEST21
TEST20
TEST28_H
TEST28_L
TEST27
TEST26
TEST10
TEST8
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
2
CPU_THERMTRIP#
AF6
CPU_PROCHOT#_1.8
AC7
CPU_VID5
A5
CPU_VID4
C6
CPU_VID3
A6
CPU_VID2
A4
CPU_VID1
C5
CPU_VID0
B5
CPU_PRESENT#
AC6
CPU_PSI#
A3
DBREQ#
E10
TDO
AE9
TEST29_H_FBCLKOUT_P
TEST29_L_FBCLKOUT_N
C8
AE7
AD7
AE8
AB8
AF7
J7
H8
AF8
TEST26
AE6
K8
C4
H16
B18
B3
C1
H6
G6
D5
R24
W18
R23
AA8
H18
H19
2
1
CPU_VDDIO_SUS
R023 300_0402
R192 300_0402
CPU_PSI# 37
TP039
TP006
TP004
TP007
TP005
TEST21
TP002
Title
AMD S1 HT I/F
Size Document Number Rev
B
Date: Sheet
MS-16332
CPU_FETGATE
R226 300_0402
G
D9
D S
Q007
BSS138N_SOT23
R045 80.6_0603 1%
TEST26
CPU_PRESENT#
TEST25_H
BAS40WS
ROUTE AS 80 Ohm DIFFERENTIAL PAIR
PLACE IT CLOSE TO CPU WITHIN 1"
TEST21
TEST25_L
TEST19
TEST18
MSI CORPORATION
A C
CPU_THERMTRIP_D# 17
CPU_VID5 37
CPU_VID4 37
CPU_VID3 37
CPU_VID2 37
CPU_VID1 37
CPU_VID0 37
CPU_VDDIO_SUS
R025 300_0402
R026 1K_0402_NC
R230 510_0402
R028 300_0402
R229 510_0402
R039 300_0402
R038 300_0402
44 0 Monday, April 10, 2006
1
of
0A
5
AA4
VSS1
AA11
VSS2
AA13
VSS3
AA15
VSS4
AA17
CPU_VDD_RUN
AC4
VDD1
AD2
VDD2
G4
A1
K10
K12
K14
L11
L13
M10
N11
P10
R11
T10
T12
T14
U11
U13
V10
VDD3
H2
VDD4
J9
VDD5
J11
VDD6
J13
VDD7
K6
VDD8
VDD9
VDD10
VDD11
L4
VDD12
L7
VDD13
L9
VDD14
VDD15
VDD16
M2
VDD17
M6
VDD18
M8
VDD19
VDD20
N7
VDD21
N9
VDD22
VDD23
P8
VDD24
VDD25
R4
VDD26
R7
VDD27
R9
VDD28
VDD29
T2
VDD30
T6
VDD31
T8
VDD32
VDD33
VDD34
VDD35
U7
VDD36
U9
VDD37
VDD38
VDD39
V6
VDD40
V8
VDD41
VDD42
Athlon 64 S1
Processor
Socket
D D
C C
B B
U017E
VDD43
VDD44
VDD45
VDD46
VDD47
VDD48
VDD49
VDD50
VDD51
VDD52
VDD53
VDD54
VDDIO1
VDDIO2
VDDIO3
VDDIO4
VDDIO5
VDDIO6
VDDIO7
VDDIO8
VDDIO9
VDDIO10
VDDIO11
VDDIO12
VDDIO13
VDDIO14
VDDIO15
VDDIO16
VDDIO17
VDDIO18
VDDIO19
VDDIO20
VDDIO21
VDDIO22
VDDIO23
VDDIO24
VDDIO25
VDDIO26
VDDIO27
CPU_VDD_RUN
V12
V14
W4
Y2
J15
K16
L15
M16
P16
T16
U15
V16
CPU_VDDIO_SUS
H25
J17
K18
K21
K23
K25
L17
M18
M21
M23
M25
N17
P18
P21
P23
P25
R17
T18
T21
T23
T25
U17
V18
V21
V23
V25
Y25
A26
Athlon 64 S1g1
uPGA638
Top View
AA19
AB2
AB7
AB9
AB23
AB25
AC11
AC13
AC15
AC17
AC19
AC21
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
F11
F13
F15
F17
F19
F21
F23
F25
H21
H23
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
B4
VSS28
B6
VSS29
B8
VSS30
B9
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
D6
VSS40
D8
VSS41
D9
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
E4
VSS51
F2
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
H7
VSS61
H9
VSS62
VSS63
VSS64
J4
VSS65
4
Athlon 64 S1
Processor
Socket
U017F
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
M11
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
3
2
CPU_VTT_SUS CPU_VDDIO_SUS CPU_VDD_RUN CPU_VDDIO_SUS
BOTTOMSIDE DECOUPLING
CPU_VDD_RUN
22u_0805
22u_0805
C128
C114
22u_0805
CPU_VDD_RUN
C047
C037
0.22u_0603
CPU_VDDIO_SUS
C140
C117
22u_0805
C137
22u_0805
C058
0.22u_0603
C135
22u_0805
C079
22u_0805
0.01u_0402
C116
0.22u_0603
C124
22u_0805
CPU_VDD_RUN
C088
10PF_0402
1n_0402
0.22u_0603
22u_0805
22u_0805
C473
C078
1n_0402
22u_0805
C474
1n_0402
C095
C475
1n_0402
C100
C476
1n_0402
C111
C477
CPU_VDD_RUN
DECOUPLING BETWEEN PROCESSOR AND DIMMs
PLACE CLOSE TO PROCESSOR AS POSSIBLE
CPU_VDDIO_SUS
C091
4.7u_0805
CPU_VTT_SUS
4.7u_0805
C064
4.7u_0805
C093
4.7u_0805
C134
0.22u_0603
C092
0.22u_0603
C115
0.22u_0603
C126
0.22u_0603
C065
0.01u_0402
C089
0.01u_0402
C118
0.01u_0402
C104
CI10
0.1u_0402_NC
CI12
0.1u_0402_NC
CI14
0.1u_0402_NC
CI16
0.1u_0402_NC
CI84 0.1u_0402_NC
CI86 0.1u_0402_NC
CI87 0.1u_0402_NC
C066
10PF_0402
1
CI11
0.1u_0402_NC
CI13
0.1u_0402_NC
CI15
0.1u_0402_NC
CI17
0.1u_0402_NC
CI83
0.1u_0402_NC
CI85
0.1u_0402_NC
FOR EMI
AF1
4.7u_0805
C335
4.7u_0805
C334
4.7u_0805
C441
4.7u_0805
C440
0.22u_0603
C439
0.22u_0603
C438
0.22u_0603
C437
0.22u_0603
C436
1n_0402
C068
1n_0402
C048
1n_0402
C045
1n_0402
C043
0.01u_0402
C042
0.01u_0402
C180
0.01u_0402
C172
0.01u_0402
C170
A A
Title
AMD S1 HT I/F
Size Document Number Rev
5
PROCESSOR POWER AND GROUND
4
3
2
B
Date: Sheet
MSI CORPORATION
MS-16332
1
of
54 0 Monday, April 10, 2006
0A
5
CPU_VDDIO_SUS
MEM_MA_ADD[15..0] 3,7
D D
MEM_MA_BANK[2..0] 3,7
MEM_MA_DM[7..0] 3
MEM_MA_DQS0_P 3
MEM_MA_DQS1_P 3
MEM_MA_DQS2_P 3
MEM_MA_DQS3_P 3
C C
B B
A A
MEM_MA_DQS4_P 3
MEM_MA_DQS5_P 3
MEM_MA_DQS6_P 3
MEM_MA_DQS7_P 3
MEM_MA_DQS0_N 3
MEM_MA_DQS1_N 3
MEM_MA_DQS2_N 3
MEM_MA_DQS3_N 3
MEM_MA_DQS4_N 3
MEM_MA_DQS5_N 3
MEM_MA_DQS6_N 3
MEM_MA_DQS7_N 3
MEM_MA0_CLK1_P 3
MEM_MA0_CLK1_N 3
MEM_MA0_CLK2_P 3
MEM_MA0_CLK2_N 3
MEM_MA_CKE0 3,7
MEM_MA_CKE1 3,7
MEM_MA_RAS# 3,7
MEM_MA_CAS# 3,7
MEM_MA_WE# 3,7
MEM_MA0_CS#0 3,7
MEM_MA0_CS#1 3,7
MEM_MA0_ODT0 3,7
MEM_MA0_ODT1 3,7
5
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
MEM_MA_BANK0
MEM_MA_BANK1
MEM_MA_BANK2
MEM_MA_DM0
MEM_
MA_DM1
MEM_MA_DM2
MEM_MA_DM3
MEM_MA_DM4
MEM_MA_DM5
MEM_MA_DM6
MEM_MA_DM7
SDATA0 19
SCLK0 19
+3VRUN
MEM_M_VREF_SUS
SDATA0
SCLK0
818287889596103
102
A0
101
A1
VDD0
VDD1
VDD2
VDD3
VDD4
100
A2
99
A3
98
A4
97
A5
94
A6
92
A7
93
A8
91
A9
105
A10
90
A11
89
A12
116
A13
86
A14/NC
84
A15/NC
107
BA0
106
BA1
85
BA2
10
DM0
26
DM1
52
DM2
67
DM3
130
DM4
147
DM5
170
DM6
185
DM7
13
DQS0
31
DQS1
51
DQS2
70
DQS3
131
DQS4
148
DQS5
169
DQS6
188
DQS7
11
DQS0
29
DQS1
49
DQS2
68
DQS3
129
DQS4
146
DQS5
167
DQS6
186
DQS7
30
CK0
32
CK0
164
CK1
166
CK1
79
CKE0
80
CKE1
108
RAS
113
CAS
109
WE
110
S0
115
S1
114
ODT0
119
ODT1
198
SA0
200
SA1
195
SDA
197
SCL
199
VDDspd
1
VREF
2
VSS0
3
VSS1
8
VSS2
9
VSS3
12
VSS4
15
VSS5
18
VSS6
21
VSS7
24
VSS8
27
VSS9
28
VSS10
33
VSS11
34
VSS12
39
VSS13
40
VSS14
41
VSS15
42
VSS16
47
VSS17
48
VSS18
53
VSS19
54
VSS20
VDD5
SO-DIMM
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
4
111
104
112
117
118
VDD6
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
(RVS)
VSS56
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
132
128
127
122
1217877727166656059
4
J016
DDR2_SO-DIMM_STD1
5
DQ0
7
DQ1
17
DQ2
19
DQ3
4
DQ4
6
DQ5
14
DQ6
16
DQ7
23
DQ8
25
DQ9
35
DQ10
37
DQ11
20
DQ12
22
DQ13
36
DQ14
38
DQ15
43
DQ16
45
DQ17
55
DQ18
57
DQ19
44
DQ20
46
DQ21
56
DQ22
58
DQ23
61
DQ24
63
DQ25
73
DQ26
75
DQ27
62
DQ28
64
DQ29
74
DQ30
76
DQ31
123
DQ32
125
DQ33
135
DQ34
137
DQ35
124
DQ36
126
DQ37
134
DQ38
136
DQ39
141
DQ40
143
DQ41
151
DQ42
153
DQ43
140
DQ44
142
DQ45
152
DQ46
154
DQ47
157
DQ48
159
DQ49
173
DQ50
175
DQ51
158
DQ52
160
DQ53
174
DQ54
176
DQ55
179
DQ56
181
DQ57
189
DQ58
191
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
50
NC1
69
NC2
83
NC3
120
NC4
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
MEM_MA_DATA0
MEM_MA_DATA1
MEM_MA_DATA2
MEM_MA_DATA3
MEM_MA_DATA4
MEM_MA_DATA5
MEM_MA_DATA6
MEM_MA_DATA7
MEM_MA_DATA8 MEM_MA_ADD8
MEM_MA_DATA9
MEM_MA_DATA10
MEM_MA_DATA11
MEM_MA_DATA12
MEM_MA_DATA13
MEM_MA_DATA14
MEM_MA_DATA15
MEM_MA_DATA16
MEM_MA_DATA17
MEM_MA_DATA18
MEM_MA_DATA19
MEM_MA_DATA20
MEM_MA_DATA21
MEM_MA_DATA22
MEM_MA_DATA23
MEM_MA_DATA24
MEM_MA_DATA25
MEM_MA_DATA26
MEM_MA_DATA27
MEM_MA_DATA28
MEM_MA_DATA29
MEM_MA_DATA30
MEM_MA_DATA31
MEM_MA_DATA32
MEM_MA_DATA33
MEM_MA_DATA34
MEM_MA_DATA35
MEM_MA_DATA36
MEM_MA_DATA37
MEM_MA_DATA38
MEM_MA_DATA39
MEM_MA_DATA40
MEM_MA_DATA41
MEM_MA_DATA42
MEM_MA_DATA43
MEM_MA_DATA44
MEM_MA_DATA45
MEM_MA_DATA46
MEM_MA_DATA47
MEM_MA_DATA48
MEM_MA_DATA49
MEM_MA_DATA50
MEM_MA_DATA51
MEM_MA_DATA52
MEM_MA_DATA53
MEM_MA_DATA54
MEM_MA_DATA55
MEM_MA_DATA56
MEM_MA_DATA57
MEM_MA_DATA58
MEM_MA_DATA59
MEM_MA_DATA60
MEM_MA_DATA61
MEM_MA_DATA62
MEM_MA_DATA63
MEM_MA_DATA[63..0] 3
CPU_VDDIO_SUS
C402 0.1u_0402
C365 0.1u_0402
C381 0.1u_0402
C376 0.1u_0402
C373 1UF_0402
C367 4.7UF
MEM_MA0_CS#2 3,7
MEM_MA0_CS#3 3,7
CPU_VDDIO_SUS
R231
1K_0402 1%
R236
1K_0402 1%
3
MEM_MB_ADD[15..0] 3,7
MEM_MB_BANK[2..0] 3,7
MEM_MB_DM[7..0] 3
MEM_MB_DQS0_P 3
MEM_MB_DQS1_P 3
MEM_MB_DQS2_P 3
MEM_MB_DQS3_P 3
MEM_MB_DQS4_P 3
MEM_MB_DQS5_P 3
MEM_MB_DQS6_P 3
MEM_MB_DQS7_P 3
MEM_MB_DQS0_N 3
MEM_MB_DQS1_N 3
MEM_MB_DQS2_N 3
MEM_MB_DQS3_N 3
MEM_MB_DQS4_N 3
MEM_MB_DQS5_N 3
MEM_MB_DQS6_N 3
MEM_MB_DQS7_N 3
MEM_VREF_SUS
MEM_M_VREF_SUS
1n_0402
C451
C448
C450
0.1u_0402
LAYOUT: PLACE CLOSE TO DIMMs
3
1n_0402
MEM_MB0_CLK1_P 3
MEM_MB0_CLK1_N 3
MEM_MB0_CLK2_P 3
MEM_MB0_CLK2_N 3
MEM_MB_CKE0 3,7
MEM_MB_CKE1 3,7
MEM_MB_RAS# 3,7
MEM_MB_CAS# 3,7
MEM_MB_WE# 3,7
MEM_MB0_CS#0 3,7
MEM_MB0_CS#1 3,7
MEM_MB0_ODT0 3,7
MEM_MB0_ODT1 3,7
+3VRUN
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_BANK0
MEM_MB_BANK1
MEM_MB_BANK2
MEM_MB_DM0
MEM_MB_DM1
MEM_MB_DM2
MEM_MB_DM3
MEM_MB_DM4
MEM_MB_DM5
MEM_MB_DM6
MEM_MB_DM7
R238 4.7K_0603
SDATA0 19
SCLK0 19
+3VRUN
MEM_M_VREF_SUS
CPU_VDDIO_SUS
102
101
100
105
116
107
106
130
147
170
185
131
148
169
188
129
146
167
186
164
166
108
113
109
110
115
114
119
198
200
SDATA0
195
SCLK0
197
199
99
98
97
94
92
93
91
90
89
86
84
85
10
26
52
67
13
31
51
70
11
29
49
68
30
32
79
80
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
2
1
2
3
8
9
2
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14/NC
A15/NC
BA0
BA1
BA2
DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
CK0
CK0
CK1
CK1
CKE0
CKE1
RAS
CAS
WE
S0
S1
ODT0
ODT1
SA0
SA1
SDA
SCL
VDDspd
VREF
VSS0
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
818287889596103
VDD0
VDD1
VDD2
VDD3
VDD4
VDD5
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
1
111
104
112
117
118
J017
MEM_MB_DATA0
5
DQ0
MEM_MB_DATA1
7
DQ1
VDD6
VDD8
VDD7
VDD9
VDD10
VDD11
NC/TEST
VSS56
SO-DIMM(RVS)
VSS55
VSS54
VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
132
128
127
122
1217877727166656059
Title
Size Document Number Rev
Custom
Date: Sheet of
MEM_MB_DATA2
17
DQ2
MEM_MB_DATA3
19
DQ3
MEM_MB_DATA4
4
DQ4
MEM_MB_DATA5
6
DQ5
MEM_MB_DATA6
14
DQ6
MEM_MB_DATA7
16
DQ7
MEM_MB_DATA8
23
DQ8
MEM_MB_DATA9
25
DQ9
MEM_MB_DATA10
35
DQ10
MEM_MB_DATA11
37
DQ11
MEM_MB_DATA12
20
DQ12
MEM_MB_DATA13
22
DQ13
MEM_MB_DATA14
36
DQ14
MEM_MB_DATA15
38
DQ15
MEM_MB_DATA16
43
DQ16
MEM_MB_DATA17
45
DQ17
MEM_MB_DATA18
55
DQ18
MEM_MB_DATA19
57
DQ19
MEM_MB_DATA20
44
DQ20
MEM_MB_DATA21
46
DQ21
MEM_MB_DATA22
56
DQ22
MEM_MB_DATA23
58
DQ23
MEM_MB_DATA24
61
DQ24
MEM_MB_DATA25
63
DQ25
MEM_MB_DATA26
73
DQ26
MEM_MB_DATA27
75
DQ27
MEM_MB_DATA28
62
DQ28
MEM_MB_DATA29
64
DQ29
MEM_MB_DATA30
74
DQ30
MEM_MB_DATA31
76
DQ31
MEM_MB_DATA32
123
DQ32
MEM_MB_DATA33
125
DQ33
MEM_MB_DATA34
135
DQ34
MEM_MB_DATA35
137
DQ35
MEM_MB_DATA36
124
DQ36
MEM_MB_DATA37
126
DQ37
MEM_MB_DATA38
134
DQ38
MEM_MB_DATA39
136
DQ39
MEM_MB_DATA40
141
DQ40
MEM_MB_DATA41
143
DQ41
MEM_MB_DATA42
151
DQ42
MEM_MB_DATA43
153
DQ43
MEM_MB_DATA44
140
DQ44
MEM_MB_DATA45
142
DQ45
MEM_MB_DATA46
152
DQ46
MEM_MB_DATA47
154
DQ47
MEM_MB_DATA48
157
DQ48
MEM_MB_DATA49
159
DQ49
MEM_MB_DATA50
173
DQ50
MEM_MB_DATA51
175
DQ51
MEM_MB_DATA52
158
DQ52
MEM_MB_DATA53
160
DQ53
MEM_MB_DATA54
174
DQ54
MEM_MB_DATA55
176
DQ55
MEM_MB_DATA56
179
DQ56
MEM_MB_DATA57
181
DQ57
MEM_MB_DATA58
189
DQ58
MEM_MB_DATA59
191
DQ59
MEM_MB_DATA60
180
DQ60
MEM_MB_DATA61
182
DQ61
MEM_MB_DATA62
192
DQ62
MEM_MB_DATA63
194
DQ63
50
NC1
69
NC2
NC3
NC4
DDR2-STD
83
120
163
196
193
190
187
184
183
178
177
172
171
168
165
162
161
156
155
150
149
145
144
139
138
133
MEM_MB0_CS#2 3,7
MEM_MB0_CS#3 3,7
MSI CORPORATION
DDR2 SODIMMS: A/B CHANNEL
MS-16332
1
MEM_MB_DATA[63..0] 3
CPU_VDDIO_SUS
C362 0.1u_0402
C397 0.1u_0402
C390 0.1u_0402
C370 0.1u_0402
C368 1UF_0402
C400 4.7UF
0A
64 0 Monday, April 10, 2006
5
MEM_MA_ADD[15..0] 3,6
D D
MEM_MA_BANK[2..0] 3,6
C C
MEM_MB_ADD[15..0] 3,6
B B
MEM_MB_BANK[2..0] 3,6
A A
MEM_MA_ADD[15..0]
MEM_MA_BANK[2..0]
MEM_MA_CAS# 3,6
MEM_MA_WE# 3,6
MEM_MA_RAS# 3,6
MEM_MA0_CS#0 3,6
MEM_MA0_CS#1 3,6
MEM_MA0_CS#2 3,6
MEM_MA0_CS#3 3,6
MEM_MA0_ODT0 3,6
MEM_MA0_ODT1 3,6
MEM_MA_CKE1 3,6
MEM_MA_CKE0 3,6
MEM_MB_ADD[15..0]
MEM_MB_BANK[2..0]
MEM_MB_CAS# 3,6
MEM_MB_WE# 3,6
MEM_MB_RAS# 3,6
MEM_MB0_CS#0 3,6
MEM_MB0_CS#1 3,6
MEM_MB0_CS#2 3,6
MEM_MB0_CS#3 3,6
MEM_MB0_ODT0 3,6
MEM_MB0_ODT1 3,6
MEM_MB_CKE1 3,6
MEM_MB_CKE0 3,6
5
MEM_MA_ADD15
MEM_MA_ADD14
MEM_MA_ADD13
MEM_MA_ADD12
MEM_MA_ADD11
MEM_MA_ADD10
MEM_MA_ADD9
MEM_MA_ADD8
MEM_MA_ADD7
MEM_MA_ADD6
MEM_MA_ADD5
MEM_MA_ADD4
MEM_MA_ADD3
MEM_MA_ADD2
MEM_MA_ADD1
MEM_MA_ADD0
MEM_MA_BANK2
MEM_MA_BANK1
MEM_MA_BANK0
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA_RAS#
MEM_MA0_CS#0
MEM_MA0_CS#1
MEM_MA0_CS#2
MEM_MA0_CS#3
MEM_MA0_ODT0
MEM_MA0_ODT1
MEM_MA_CKE1
MEM_MA_CKE0
MEM_MB_ADD15
MEM_MB_ADD14
MEM_MB_ADD13
MEM_MB_ADD12
MEM_MB_ADD11
MEM_MB_ADD10
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD7
MEM_MB_ADD6
MEM_MB_ADD5
MEM_MB_ADD
MEM_MB_ADD3
MEM_MB_ADD2
MEM_MB_ADD1
MEM_MB_ADD0
MEM_MB_BANK2
MEM_MB_BANK1
MEM_MB_BANK0
MEM_MB_CAS#
MEM_MB_WE#
MEM_MB_RAS#
MEM_MB0_CS#0
MEM_MB0_CS#1
MEM_MB0_CS#2
MEM_MB0_CS#3
MEM_MB0_ODT0
MEM_MB0_ODT1
MEM_MB_CKE1
MEM_MB_CKE0
4
4
MEM_MA_CKE0
MEM_MA_BANK2
MEM_MA_ADD15
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD3
MEM_MA_ADD5
MEM_MA_ADD2
MEM_MA_BANK0
MEM_MA_ADD10
MEM_MA_CAS#
MEM_MA_WE#
MEM_MA0_ODT1
MEM_MA0_CS#3
MEM_MA_ADD12
MEM_MA_ADD14
MEM_MA0_CS#2
MEM_MA_CKE1
MEM_MA_ADD4
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD11
MEM_MA_RAS#
MEM_MA_BANK1
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD13
MEM_MA0_ODT0
MEM_MA0_CS#1
MEM_MA0_CS#0
MEM_MB_CKE0
MEM_MB0_CS#2
MEM_MB_BANK2
MEM_MB_ADD12
MEM_MB_ADD9
MEM_MB_ADD8
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_RAS#
MEM_MB_WE#
MEM_MB_BANK0
MEM_MB0_ODT1
MEM_MB0_CS#1
MEM_MB_ADD7
MEM_MB_ADD14
MEM_MB_ADD15
MEM_MB_CKE1
MEM_MB_ADD0
MEM_MB_ADD3
MEM_MB_ADD6
MEM_MB_ADD11
MEM_MB0_CS#0
MEM_MB_ADD10
MEM_MB_BANK1
MEM_MB0_CS#3
MEM_MB_ADD13
MEM_MB0_ODT0
MEM_MB_CAS#
4
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
8P4R-47_RN0402
3
CPU_VTT_SUS
RN014
RN010
RN006
RN002
RN015
RN011
RN007
RN003
CPU_VTT_SUS
RN016
RN012
RN008
RN004
RN013
RN009
RN005
RN001
C070 0.1u_0402
C059 0.1u_0402
C053 0.1u_0402
C075 0.1u_0402
C082 0.1u_0402
C097 0.1u_0402
C109 0.1u_0402
C120 0.1u_0402
C119 0.1u_0402
C107 0.1u_0402
C096 0.1u_0402
C081 0.1u_0402
C074 0.1u_0402
C063 0.1u_0402
C056 0.1u_0402
C050 0.1u_0402
C105 0.1u_0402
C101 0.1u_0402
C084 0.1u_0402
C077 0.1u_0402
C067 0.1u_0402
C061 0.1u_0402
C052 0.1u_0402
C049 0.1u_0402
C110 0.1u_0402
C121 0.1u_0402
C083 0.1u_0402
C098 0.1u_0402
C071 0.1u_0402
C060 0.1u_0402
C054 0.1u_0402
C046 0.1u_0402
3
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
CPU_VDDIO_SUS
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
CPU_VTT_SUS CPU_VDDIO_SUS
2
CI89 0.1u_0402_NC
CI92 0.1u_0402_NC
CI95 0.1u_0402_NC
CI98 0.1u_0402_NC
CI101 0.1u_0402_NC
CI104 0.1u_0402_NC
CI107 0.1u_0402_NC
CI110 0.1u_0402_NC
CI113 0.1u_0402_NC
CI116 0.1u_0402_NC
CI118 0.1u_0402_NC
CI120 0.1u_0402_NC
CI121 0.1u_0402_NC
CI122 0.1u_0402_NC
CI123 0.1u_0402_NC
CI124 0.1u_0402_NC
CI125 0.1u_0402_NC
2
1
CI90 0.1u_0402_NC
CI93 0.1u_0402_NC
CI96 0.1u_0402_NC
CI99 0.1u_0402_NC
CI102 0.1u_0402_NC
CI105 0.1u_0402_NC
CI108 0.1u_0402_NC
CI111 0.1u_0402_NC
CI114 0.1u_0402_NC
CI88 0.1u_0402_NC
CI91 0.1u_0402_NC
CI94 0.1u_0402_NC
CI97 0.1u_0402_NC
CI100 0.1u_0402_NC
CI103 0.1u_0402_NC
CI106 0.1u_0402_NC
CI109 0.1u_0402_NC
CI112 0.1u_0402_NC
CI115 0.1u_0402_NC
CI117 0.1u_0402_NC
CI119 0.1u_0402_NC
FOR EMI
Title
DDR2 SODIMMS TERMINATIONS
Size Document Number Rev
Custom
Date: Sheet
MSI CORPORATION
MS-16332
74 0 Monday, April 10, 2006
1
of
0A
5
4
3
2
1
U018A
C51MV
HT_CADOUT0_P 2
+VLDT
+1.2VRUN
HT_CADOUT0_N 2
HT_CADOUT1_P 2
HT_CADOUT1_N 2
HT_CADOUT2_P 2
HT_CADOUT2_N 2
HT_CADOUT3_P 2
HT_CADOUT3_N 2
HT_CADOUT4_P 2
HT_CADOUT4_N 2
HT_CADOUT5_P 2
HT_CADOUT5_N 2
HT_CADOUT6_P 2
HT_CADOUT6_N 2
HT_CADOUT7_P 2
HT_CADOUT7_N 2
HT_CADOUT8_P 2
HT_CADOUT8_N 2
HT_CADOUT9_P 2
HT_CADOUT9_N 2
HT_CADOUT10_P 2
HT_CADOUT10_N 2
HT_CADOUT11_P 2
HT_CADOUT11_N 2
HT_CADOUT12_P 2
HT_CADOUT12_N 2
HT_CADOUT13_P 2
HT_CADOUT13_N 2
HT_CADOUT14_P 2
HT_CADOUT14_N 2
HT_CADOUT15_P 2
HT_CADOUT15_N 2
HT_CLKOUT0_P 2
HT_CLKOUT0_N 2
HT_CLKOUT1_P 2
HT_CLKOUT1_N 2
HT_CTLOUT0_P 2
HT_CTLOUT0_N 2
R032
150_0402 1%
150_0402 1%
L006
+1.2VPLL_HT
30ohm 600mA
1u_0402_X5R
HPCPUCAL_1P2V
HPCPUCAL_GND
HPCPUCAL_1P2V
HPCPUCAL_GND
R031
C086
5
D D
C C
B B
A A
Y23
HT_CPU_RXD0_P
Y22
HT_CPU_RXD0_N
W24
HT_CPU_RXD1_P
W23
HT_CPU_RXD1_N
V24
HT_CPU_RXD2_P
V23
HT_CPU_RXD2_N
U22
HT_CPU_RXD3_P
U21
HT_CPU_RXD3_N
R24
HT_CPU_RXD4_P
R23
HT_CPU_RXD4_N
P24
HT_CPU_RXD5_P
P23
HT_CPU_RXD5_N
P22
HT_CPU_RXD6_P
P21
HT_CPU_RXD6_N
N22
HT_CPU_RXD7_P
N21
HT_CPU_RXD7_N
Y21
HT_CPU_RXD8_P
Y20
HT_CPU_RXD8_N
V21
HT_CPU_RXD9_P
W20
HT_CPU_RXD9_N
W21
HT_CPU_RXD10_P
W22
HT_CPU_RXD10_N
T21
HT_CPU_RXD11_P
U20
HT_CPU_RXD11_N
R18
HT_CPU_RXD12_P
R19
HT_CPU_RXD12_N
P16
HT_CPU_RXD13_P
P17
HT_CPU_RXD13_N
N20
HT_CPU_RXD14_P
N19
HT_CPU_RXD14_N
M17
HT_CPU_RXD15_P
N18
HT_CPU_RXD15_N
T23
HT_CPU_RX_CLK0_P
T22
HT_CPU_RX_CLK0_N
R21
HT_CPU_RX_CLK1_P
R20
HT_CPU_RX_CLK1_N
M23
HT_CPU_RXCTL_P
M22
HT_CPU_RXCTL_N
W19
HT_CPU_CAL_1P2V
Y19
HT_CPU_CAL_GND
N16
+1.2V_PLLHTCPU
T13
+1.2V_PLLHTMCP
C103
nVIDIA_C51MV
0.1u_0402
Place within 500 mils of ball,
route 5/10
CPU-HT
PART 1 OF 5
HT_CPU_TXD0_P
HT_CPU_TXD0_N
HT_CPU_TXD1_P
HT_CPU_TXD1_N
HT_CPU_TXD2_P
HT_CPU_TXD2_N
HT_CPU_TXD3_P
HT_CPU_TXD3_N
HT_CPU_TXD4_P
HT_CPU_TXD4_N
HT_CPU_TXD5_P
HT_CPU_TXD5_N
HT_CPU_TXD6_P
HT_CPU_TXD6_N
HT_CPU_TXD7_P
HT_CPU_TXD7_N
HT_CPU_TXD8_P
HT_CPU_TXD8_N
HT_CPU_TXD9_P
HT_CPU_TXD9_N
HT_CPU_TXD10_P
HT_CPU_TXD10_N
HT_CPU_TXD11_P
HT_CPU_TXD11_N
HT_CPU_TXD12_P
HT_CPU_TXD12_N
HT_CPU_TXD13_P
HT_CPU_TXD13_N
HT_CPU_TXD14_P
HT_CPU_TXD14_N
HT_CPU_TXD15_P
HT_CPU_TXD15_N
HT_CPU_TX_CLK0_P
HT_CPU_TX_CLK0_N
HT_CPU_TX_CLK1_P
HT_CPU_TX_CLK1_N
HT_CPU_TXCTL_P
HT_CPU_TXCTL_N
CLKOUT_PRI_200MHZ_P
CLKOUT_PRI_200MHZ_N
CLKOUT_SEC_200MHZ_P
CLKOUT_SEC_200MHZ_N
HT_CPU_REQ#
HT_CPU_STOP#
HT_CPU_RESET#
HT_CPU_PWRGD
+2.5V_PLLHTCPU
4
C23
C24
D23
D24
E22
E23
F23
F24
H22
H23
J21
J22
K21
K22
K23
K24
D21
D22
F19
E20
F21
E21
G20
G19
J19
J18
L17
K17
L20
K19
L18
L19
G23
G24
G22
G21
L23
L24
B24
B23
A22
B21
HTCPU_REQ#
F18
G18
D20
E19
L16
C123
0.1u_0402
HTMCPCAL_1P2V
HTMCPCAL_GND
HT_CADIN0_P 2
HT_CADIN0_N 2
HT_CADIN1_P 2
HT_CADIN1_N 2
HT_CADIN2_P 2
HT_CADIN2_N 2
HT_CADIN3_P 2
HT_CADIN3_N 2
HT_CADIN4_P 2
HT_CADIN4_N 2
HT_CADIN5_P 2
HT_CADIN5_N 2
HT_CADIN6_P 2
HT_CADIN6_N 2
HT_CADIN7_P 2
HT_CADIN7_N 2
HT_CADIN8_P 2
HT_CADIN8_N 2
HT_CADIN9_P 2
HT_CADIN9_N 2
HT_CADIN10_P 2
HT_CADIN10_N 2
HT_CADIN11_P 2
HT_CADIN11_N 2
HT_CADIN12_P 2
HT_CADIN12_N 2
HT_CADIN13_P 2
HT_CADIN13_N 2
HT_CADIN14_P 2
HT_CADIN14_N 2
HT_CADIN15_P 2
HT_CADIN15_N 2
HT_CLKIN0_P 2
HT_CLKIN0_N 2
HT_CLKIN1_P 2
HT_CLKIN1_N 2
HT_CTLIN0_P 2
HT_CTLIN0_N 2
CPU_CLK_P 4
CPU_CLK_N 4
22K_0402
HTCPU_STOP# 4
HTCPU_RST# 4
HTCPU_PWRGD 4
1u_0402_X5R
R041
L007
30ohm 600mA
C122
Place within 500 mils
of ball; route
5/5/10.
+2.5VRUN
+2.5VRUN
HT_MCP_RX0_P 17
HT_MCP_RX0_N 17
HT_MCP_RX1_P 17
HT_MCP_RX1_N 17
HT_MCP_RX2_P 17
HT_MCP_RX2_N 17
HT_MCP_RX3_P 17
HT_MCP_RX3_N 17
HT_MCP_RX4_P 17
HT_MCP_RX4_N 17
HT_MCP_RX5_P 17
HT_MCP_RX5_N 17
HT_MCP_RX6_P 17
HT_MCP_RX6_N 17
HT_MCP_RX7_P 17
HT_MCP_RX7_N 17
HT_MCP_RX_CLK0_P 17
HT_MCP_RX_CLK0_N 17
HT_MCP_RX_CTL_P 17
HT_MCP_RX_CTL_N 17
HT_MCP_REQ# 17
HT_MCP_STOP# 17
HT_MCP_RST# 17
HT_MCP_PWRGD 17
MCPOUT_25MHZ 19
MCPOUT_200MHZ 19
MCPOUT_200MHZ# 19
3
U018B
C51MV
PART 2 OF 5
MCP-HT
AD6
HT_MCP_RXD0_P
AC6
HT_MCP_RXD0_N
AC7
HT_MCP_RXD1_P
AB7
HT_MCP_RXD1_N
AA8
HT_MCP_RXD2_P
AB8
HT_MCP_RXD2_N
AA9
HT_MCP_RXD3_P
AB9
HT_MCP_RXD3_N
AD10
HT_MCP_RXD4_P
AC10
HT_MCP_RXD4_N
AD11
HT_MCP_RXD5_P
AC11
HT_MCP_RXD5_N
AC12
HT_MCP_RXD6_P
AB12
HT_MCP_RXD6_N
AC13
HT_MCP_RXD7_P
AB13
HT_MCP_RXD7_N
AA6
HT_MCP_RXD8_P
Y6
HT_MCP_RXD8_N
W7
HT_MCP_RXD9_P
Y7
HT_MCP_RXD9_N
Y8
HT_MCP_RXD10_P
AA7
HT_MCP_RXD10_N
V9
HT_MCP_RXD11_P
W9
HT_MCP_RXD11_N
Y10
HT_MCP_RXD12_P
W10
HT_MCP_RXD12_N
AA11
HT_MCP_RXD13_P
Y12
HT_MCP_RXD13_N
V11
HT_MCP_RXD14_P
W11
HT_MCP_RXD14_N
W12
HT_MCP_RXD15_P
V13
HT_MCP_RXD15_N
AD9
HT_MCP_RX_CLK0_P
AC9
HT_MCP_RX_CLK0_N
U10
HT_MCP_RX_CLK1_P
T10
HT_MCP_RX_CLK1_N
AD14
HT_MCP_RXCTL_P
AC14
HT_MCP_RXCTL_N
AB5
HT_MCP_REQ#
AA5
HT_MCP_STOP#
AC5
HT_MCP_RESET#
AD5
HT_MCP_PWRGD
SCLKIN_MCLKOUT_200MHZ_P
AC4
CLKIN_25MHZ
Y5
CLKIN_200MHZ_P
W5 AB24
CLKIN_200MHZ_N HT_MCP_CAL_GND
nVIDIA_C51MV
SCLKIN_MCLKOUT_200MHZ_N
2
HT_MCP_TXD0_P
HT_MCP_TXD0_N
HT_MCP_TXD1_P
HT_MCP_TXD1_N
HT_MCP_TXD2_P
HT_MCP_TXD2_N
HT_MCP_TXD3_P
HT_MCP_TXD3_N
HT_MCP_TXD4_P
HT_MCP_TXD4_N
HT_MCP_TXD5_P
HT_MCP_TXD5_N
HT_MCP_TXD6_P
HT_MCP_TXD6_N
HT_MCP_TXD7_P
HT_MCP_TXD7_N
HT_MCP_TXD8_P
HT_MCP_TXD8_N
HT_MCP_TXD9_P
HT_MCP_TXD9_N
HT_MCP_TXD10_P
HT_MCP_TXD10_N
HT_MCP_TXD11_P
HT_MCP_TXD11_N
HT_MCP_TXD12_P
HT_MCP_TXD12_N
HT_MCP_TXD13_P
HT_MCP_TXD13_N
HT_MCP_TXD14_P
HT_MCP_TXD14_N
HT_MCP_TXD15_P
HT_MCP_TXD15_N
HT_MCP_TX_CLK0_P
HT_MCP_TX_CLK0_N
HT_MCP_TX_CLK1_P
HT_MCP_TX_CLK1_N
HT_MCP_TXCTL_P
HT_MCP_TXCTL_N
CLKOUT_CTERM_GND
HT_MCP_CAL_1P2V
Title
C51MV/D HT CPU/SB
Size Document Number Rev
B
Date: Sheet
MS-16322
AC24
AC23
AD23
AD22
AC22
AC21
AC20
AD20
AB18
AC18
AA17
AB17
AB16
AB15
AC16
AD16
AB21
AB22
AB20
AA20
AB19
AA19
W18
V17
W15
V15
AA15
Y15
Y14
W14
W13
Y13
AC19
AD19
Y17
W17
AC15
AD15
B22
A20
B20
AB23
CLKOUT_CTERM
HTMCPCAL_1P2V
HTMCPCAL_GND
HT_MCP_TX0_P 17
HT_MCP_TX0_N 17
HT_MCP_TX1_P 17
HT_MCP_TX1_N 17
HT_MCP_TX2_P 17
HT_MCP_TX2_N 17
HT_MCP_TX3_P 17
HT_MCP_TX3_N 17
HT_MCP_TX4_P 17
HT_MCP_TX4_N 17
HT_MCP_TX5_P 17
HT_MCP_TX5_N 17
HT_MCP_TX6_P 17
HT_MCP_TX6_N 17
HT_MCP_TX7_P 17
HT_MCP_TX7_N 17
HT_MCP_TX_CLK0_P 17
HT_MCP_TX_CLK0_N 17
HT_MCP_TX_CTL_P 17
HT_MCP_TX_CTL_N 17
2.37K_1%
150_0402 1%
150_0402 1%
MSI CORPORATION
1
R221
R210
R208
TP100
TP099
+1.2VRUN
0A
84 0 Monday, April 10, 2006
of
5
4
U018C
3
2
1
D D
NB_RXP15 11
NB_RXN15 11
NB_RXP14 11
NB_RXN14 11
NB_RXP13 11
NB_RXN13 11
NB_RXP12 11
NB_RXN12 11
NB_RXP11 11
NB_RXN11 11
NB_RXP10 11
NB_RXN10 11
NB_RXP9 11
NB_RXN9 11
NB_RXP8 11
NB_RXN8 11
NB_RXP7 11
NB_RXN7 11
NB_RXP6 11
NB_RXN6 11
C C
B B
CLK_NEW_CARD 24
CLK_NEW_CARD# 24
NB_RXP5 11
NB_RXN5 11
NB_RXP4 11
NB_RXN4 11
NB_RXP3 11
NB_RXN3 11
NB_RXP2 11
NB_RXN2 11
NB_RXP1 11
NB_RXN1 11
NB_RXP0 11
NB_RXN0 11
PE1_RXP 24
PE1_RXN 24
PE1_TXP 24
PE1_TXN 24
NEWCARD_CPPE# 24
NEWCARD_CLKREQ# 24
NB_RXP15
NB_RXN15
NB_RXP14
NB_RXN14
NB_RXP13
NB_RXN13
NB_RXP12
NB_RXN12
NB_RXP11
NB_RXN11
NB_RXP10
NB_RXN10
NB_RXP9
NB_RXN9
NB_RXP8
NB_RXN8
NB_RXP7
NB_RXN7
NB_RXP6
NB_RXN6
NB_RXP5
NB_RXN5
NB_RXP4
NB_RXN4
NB_RXP3
NB_RXN3
NB_RXP2
NB_RXN2
NB_RXP1
NB_RXN1
NB_RXP0
NB_RXN0
PE0_PRESENT#
PE1_RXP
PE1_RXN
PE1_TXP
PE1_TXN
CLK_NEW_CARD
CLK_NEW_CARD#
NEWCARD_CPPE#
NEWCARD_CLKREQ#
PE2_PRESENT#
J8
PE0_RX0_P
J7
PE0_RX0_N
J6
PE0_RX1_P
J5
PE0_RX1_N
K9
PE0_RX2_P
J9
PE0_RX2_N
L6
PE0_RX3_P
L5
PE0_RX3_N
L7
PE0_RX4_P
L8
PE0_RX4_N
M9
PE0_RX5_P
M8
PE0_RX5_N
N8
PE0_RX6_P
N7
PE0_RX6_N
N6
PE0_RX7_P
N5
PE0_RX7_N
R6
PE0_RX8_P
R5
PE0_RX8_N
P3
PE0_RX9_P
P4
PE0_RX9_N
R8
PE0_RX10_P
R7
PE0_RX10_N
U6
PE0_RX11_P
U5
PE0_RX11_N
T8
PE0_RX12_P
T9
PE0_RX12_N
U7
PE0_RX13_P
U8
PE0_RX13_N
V4
PE0_RX14_P
V3
PE0_RX14_N
Y3
PE0_RX15_P
AA3
PE0_RX15_N
D1
PE0_PRSNT#
G6
PE1_RX_P
H6
PE1_RX_N
G4
PE1_TX_P
G5
PE1_TX_N
G2
PE1_REFCLK_P
G3
PE1_REFCLK_N
E2
PE1_PRSNT#
D3
PE1_CLKREQ#/CLK
E4
PE2_CLKREQ#/DATA
PCI EXPRESS
C51MV
PART 3 OF 5
PE0_TX0_P
PE0_TX0_N
PE0_TX1_P
PE0_TX1_N
PE0_TX2_P
PE0_TX2_N
PE0_TX3_P
PE0_TX3_N
PE0_TX4_P
PE0_TX4_N
PE0_TX5_P
PE0_TX5_N
PE0_TX6_P
PE0_TX6_N
PE0_TX7_P
PE0_TX7_N
PE0_TX8_P
PE0_TX8_N
PE0_TX9_P
PE0_TX9_N
PE0_TX10_P
PE0_TX10_N
PE0_TX11_P
PE0_TX11_N
PE0_TX12_P
PE0_TX12_N
PE0_TX13_P
PE0_TX13_N
PE0_TX14_P
PE0_TX14_N
PE0_TX15_P
PE0_TX15_N
PE0_REFCLK_P
PE0_REFCLK_N
PE2_RX_P
PE2_RX_N
PE2_TX_P
PE2_TX_N
PE2_REFCLK_P
PE2_REFCLK_N
PE2_PRSNT#
PE_TSTCLK_P
PE_TSTCLK_N
NB_TXP15
L1
L2
L3
M2
L4
M3
M4
N3
P1
P2
R1
R2
R3
T2
R4
T3
U4
U3
V1
V2
W1
W2
W3
Y2
AA1
AA2
AB1
AB2
AC1
AC2
AD2
AD3
K1
K2
J4
K3
H4
J3
H2
H3
E3
F1
F2
C353 0.1UF_0402
NB_TXN15 VGA_RXN15
C354 0.1UF_0402
NB_TXP14
C351 0.1UF_0402
NB_TXN14
C352 0.1UF_0402
NB_TXP13 VGA_RXP13
C341 0.1UF_0402
NB_TXN13
C342 0.1UF_0402
NB_TXP12
C349 0.1UF_0402
NB_TXN12
C350 0.1UF_0402
NB_TXP11
C348 0.1UF_0402
NB_TXN11
C347 0.1UF_0402
NB_TXP10
C371 0.1UF_0402
NB_TXN10
C366 0.1UF_0402
NB_TXP9
C374 0.1UF_0402
NB_TXN9
C372 0.1UF_0402
NB_TXP8
C375 0.1UF_0402
NB_TXN8
C379 0.1UF_0402
NB_TXP7
C382 0.1UF_0402
NB_TXN7
C380 0.1UF_0402
NB_TXP6
C388 0.1UF_0402
NB_TXN6
C386 0.1UF_0402
NB_TXP5
C393 0.1UF_0402
NB_TXN5
C389 0.1UF_0402
NB_TXP4 VGA_RXP4
C398 0.1UF_0402
NB_TXN4
C396 0.1UF_0402
NB_TXP3
C401 0.1UF_0402
NB_TXN3
C403 0.1UF_0402
NB_TXP2
C406 0.1UF_0402
NB_TXN2
C405 0.1UF_0402
NB_TXP1
C409 0.1UF_0402
NB_TXN1
C408 0.1UF_0402
C410 0.1UF_0402
NB_TXN0
C412 0.1UF_0402
PE0_REFCLK_P
PE0_REFCLK_N
PE0_REFCLK_P 11
PE0_REFCLK_N 11
VGA_RXP15
VGA_RXP14
VGA_RXN14
VGA_RXN13
VGA_RXP12
VGA_RXN12
VGA_RXP11
VGA_RXN11
VGA_RXP10
VGA_RXN10
VGA_RXP9
VGA_RXN9
VGA_RXP8
VGA_RXN8
VGA_RXP7
VGA_RXN7
VGA_RXP6
VGA_RXN6
VGA_RXP5
VGA_RXN5
VGA_RXN4
RXP3
VGA_
VGA_RXN3
VGA_RXP2
VGA_RXN2
VGA_RXP1
VGA_RXN1
VGA_RXP0 NB_TXP0
VGA_RXN0
VGA_RXP15 11
VGA_RXN15 11
VGA_RXP14 11
VGA_RXN14 11
VGA_RXP13 11
VGA_RXN13 11
VGA_RXP12 11
VGA_RXN12 11
VGA_RXP11 11
VGA_RXN11 11
VGA_RXP10 11
VGA_RXN10 11
VGA_RXP9 11
VGA_RXN9 11
VGA_RXP8 11
VGA_RXN8 11
VGA_RXP7 11
VGA_RXN7 11
VGA_RXP6 11
VGA_RXN6 11
VGA_RXP5 11
VGA_RXN5 11
VGA_RXP4 11
VGA_RXN4 11
VGA_RXP3 11
VGA_RXN3 11
VGA_RXP2 11
VGA_RXN2 11
VGA_RXP1 11
VGA_RXN1 11
VGA_RXP0 11
VGA_RXN0 11
PE2_PRESENT# PE2_PRESENT#
PE0_PRESENT#
PE0_PRESENT#
1 2
1 2
1 2
+3VRUN
R214 10K
R042 10K_NC
R217 10K
AC3
+1.2VPLL_PWR
+1.2VPLL_PWR
A A
L004
30ohm 600mA
C080
1u_0402_X5R
+1.2VPLL_PE
C090
0.1u_0402
AB3
PE_REFCLKIN_P
PE_REFCLKIN_N
nVIDIA_C51MV
PE_RESET#
PE_CTERM_GND +1.2V_PLLPE
PE_CTERM_GND
5
4
PE_RESET_R#
G1
PE_CTERM_GND
D2 T11
R218
2.37K_1%
Place 2.37 kȍ 1% pull down to GND
within 500 mils of C51
3
PE_RESET_R# 11
R313 0R
NEWCARD_RST# 24
2
Title
C51MV/D PCI-E GRAPH
Size Document Number Rev
B
Date: Sheet
MSI CORPORATION
MS-16322
94 0 Monday, April 10, 2006
1
of
0A
5
4
+1.2VRUN
3
2
1
+1.2VRUN
L015
40Ohm,3000mA
+1.2VRUN
L005
40Ohm,3000mA
+2.5VRUN
L045
+2.5VRUN
C183
1U10X
C422
0.1u_0402
+1.2VPLL_PWR
C153
0.1u_0402
C154
+2.5V_C51_CORE
C420
0.1u_0402
+3VRUN
C165
+1.2V_PEA_PWR
C169
22UF/6.3V_0805
C167
0.1u_0402
+1.2VPLL_PWR
C112
47UF_1206
C132
0.1u_0402
C430
1U10X
C429
22UF/6.3V_0805
C179
0.1u_0402
C127
4.7u_0805_X5R
C125
0.1u_0402
+2.5V_C51_CORE
80ohm RDC=0.07Ohm,3000mA
C433
22UF/6.3V_0805
C181
U018D
D D
A5
DAC_RED
B6
DAC_GREEN
A6
DAC_BLUE
B7
DAC_HSYNC
C7
DAC_VSYNC
D8
DAC_RSET
D9
R044
124_1%
4.7u_0805_X5R
4.7u_0805_X5R
0.1u_0402
0.1u_0402
C142
C431
C138
C099
0.1u_0402
0.01UF
0.1u_0402
0.1u_0402
C147
+3VRUN
L046
40Ohm,3000mA
+2.5VRUN
C C
+1.2VPLL_PWR
B B
C432
L011
30ohm 600mA
C145
+1.2VPLL_PWR
C102
+2.5V_PLLCORE
C423
0.1u_0402
4.7u_0805_X5R
C146
C8
A9
H13
C9
B9
F12
E11
E17
F17
G17
R9
P9
H16
DAC_VREF
DAC_IDUMP
+3.3V_DAC
+2.5V_PLLGPU
XTAL_IN
XTAL_OUT
NC1
NC2
NC3
NC4
NC5
+1.2V_PLLGPU
+1.2V_PLLCORE
+1.2V_PLLIFP
nVIDIA_C51MV
L009
30ohm 600mA
C51MV
FLAT PANEL
+2.5VRUN
PART 4 OF 5
IFPA_TXC_P
IFPA_TXC_N
IFPA_TXD0_P
IFPA_TXD0_N
IFPA_TXD1_P
IFPA_TXD1_N
IFPA_TXD2_P
IFPA_TXD2_N
IFPA_TXD3_P
IFPA_TXD3_N
IFPB_TXC_P
IFPB_TXC_N
IFPB_TXD4_P
IFPB_TXD4_N
IFPB_TXD5_P
IFPB_TXD5_N
IFPB_TXD6_P
IFPB_TXD6_N
IFPB_TXD7_P
IFPB_TXD7_N
IFPAB_VPROBE
IFPAB_RSET
+2.5V_PLLIFP
+2.5V_PLLCORE
PKG_TEST
TEST_MODE_EN
JTAG_TCK
JTAG_TDI
JTAG_TDO
JTAG_TMS
JTAG_TRST#
C14
B13
A15
B15
D15
C15
A14
B14
F14
E14
A10
B10
B11
A11
E13
F13
D13
C13
B12
C12
A16
F15
E16
H12
D17
C17
R224
1K_0402 1%
C18
B19
C19
B18
A19
IFPAB_RSET
C419
0.1u_0402
+2.5VRUN
+2.5V_PLLCORE
+VLDT
Place 1.0 kȍ 1% pull
down to GND within 500
mils of C51
+1.2VRUN
22UF/6.3V_0805
C173
1U10X
C178
1U10X
C164
1U10X
C161
0.1u_0402
C143
47UF_1206
C184
22UF/6.3V_0805
C426
1U10X
C171
0.1u_0402
C072
1U10X
C168
0.1u_0402
C087
47UF_1206
C113
0.1u_0402
C163
0.1u_0402
C085
1U10X
C176
1U10X
C186
0.1u_0402
+1.2V_C51_HTMCP
C069
1U10X
+1.2V_C51_PED
C162
0.1u_0402
C073
0.1u_0402
C130
0.1u_0402
C148
0.1u_0402
C175
1U10X
C177
1U10X
C152
0.1u_0402
C062
1U10X
C094
0.1u_0402
C108
0.1u_0402
C151
0.1u_0402
AB11
AA18
AA21
AA13
AB10
B5
C6
D7
E8
E9
E10
F10
F11
G11
H11
J11
J12
J13
J14
T15
U13
U11
Y9
W16
U16
U15
B4
C5
D6
E7
K16
M16
R16
M21
J20
T16
U17
C21
H17
C1
U14
H14
C11
AB4
AA4
J15
E12
Y18
E18
U18
E15
Y11
U19
N17
F16
J17
L13
B1
T17
D11
T12
J16
D19
H19
L21
M19
P19
T19
L14
F3
L9
P8
N9
K4
N4
T4
W4
Y4
U9
H9
U018E
+1.2V_CORE_1
+1.2V_CORE_2
+1.2V_CORE_3
+1.2V_CORE_4
+1.2V_CORE_5
+1.2V_CORE_6
+1.2V_CORE_7
+1.2V_CORE_8
+1.2V_CORE_9
+1.2V_CORE_10
+1.2V_CORE_11
+1.2V_CORE_12
+1.2V_CORE_13
+1.2V_CORE_14
+1.2V_HTMCP_1
+1.2V_HTMCP_2
+1.2V_HTMCP_3
+1.2V_HTMCP_4
+1.2V_HTMCP_5
+1.2V_HTMCP_6
+1.2V_HTMCP_7
+1.2V_HTMCP_8
+1.2V_HTMCP_9
+1.2V_PED_1
+1.2V_PED_2
+1.2V_PED_3
+1.2V_PED_4
+1.2V_HT_1
+1.2V_HT_2
+1.2V_HT_3
+1.2V_HT_4
+1.2V_HT_5
+1.2V_HT_6
+1.2V_HT_7
+1.2V_HT_8
+1.2V_HT_9
GND_1
GND_2
GND_3
GND_4
GND_5
GND_6
GND_7
GND_8
GND_9
GND_10
GND_11
GND_12
GND_13
GND_14
GND_15
GND_16
GND_17
GND_18
GND_19
GND_20
GND_21
GND_22
GND_23
GND_24
GND_25
GND_26
GND_27
GND_28
GND_29
GND_30
GND_31
GND_32
GND_33
PE_GND_1
PE_GND_2
PE_GND_3
PE_GND_4
PE_GND_5
PE_GND_6
PE_GND_7
PE_GND_8
PE_GND_9
PE_GND_10
PE_GND_11
nVIDIA_C51MV
C51MV
POWER
PART 5 OF 5
+1.2V_PEA_1
+1.2V_PEA_2
+1.2V_PEA_3
+1.2V_PEA_4
+1.2V_PEA_5
+1.2V_PEA_6
+1.2V_PEA_7
+1.2V_PEA_8
+1.2V_PLL_1
+1.2V_PLL_2
+1.2V_PLL_3
+1.2V_PLL_4
+1.2V_PLL_5
+1.2V_PLL_6
+1.2V_PLL_7
+1.2V_PLL_8
+1.2V_PLL_9
+1.2V_PLL_10
+1.2V_PLL_11
+1.2V_PLL_12
+2.5V_CORE_1
+2.5V_CORE_2
+2.5V_IFPA
+2.5V_IFPB
PE_GND_12
PE_GND_13
PE_GND_14
PE_GND_15
PE_GND_16
PE_GND_17
PE_GND_18
PE_GND_19
PE_GND_20
PE_GND_21
PE_GND_22
+3.3V_1
+3.3V_2
GND_34
GND_35
GND_36
GND_37
GND_38
GND_39
GND_40
GND_41
GND_42
GND_43
GND_44
GND_45
GND_46
GND_47
GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
A3
B3
C4
D5
E6
F7
F8
F9
A2
B2
C2
C3
D4
E5
F6
G7
G8
G9
H10
J10
C16
B16
G15
H15
D18
C10
V19
T14
C20
R17
AB14
U12
G13
Y16
H21
C22
AB6
F22
L22
R22
V22
AA22
A23
AA23
AA24
L11
M11
N11
P11
M12
N12
P12
M13
N13
P13
M14
N14
P14
L12
K6
M6
P6
T6
W6
W8
H8
K8
V6
F4
V8
C427
1U10X
C421
0.1u_0402
C1011
0.1u_0402
C150
0.1u_0402
+1.2V_PEA_PWR
0.1u_0402
C418
0.1u_0402
0.1u_0402
A A
Title
Size Document Number Rev
C
5
4
3
2
Date: Sheet
MSI CORPORATION
C51MV/D POWER
MS-16322
1
10 40 Monday, April 10, 2006
0A
of
5
U21A
V
VGA_RXP0
VGA_RXP0 9
VGA_RXN0 9
VGA_RXP1 9
VGA_RXN1 9
VGA_RXP2 9
VGA_RXN2 9
D D
C C
B B
PE_RESET_R# 9
XTALINBUFF
A A
VGA_RXP3 9
VGA_RXN3 9
VGA_RXP4 9
VGA_RXN4 9
VGA_RXP5 9
VGA_RXN5 9
VGA_RXP6 9
VGA_RXN6 9
VGA_RXP7 9
VGA_RXN7 9
VGA_RXP8 9
VGA_RXN8 9
VGA_RXP9 9
VGA_RXN9 9
VGA_RXP10 9
VGA_RXN10 9
VGA_RXP11 9
VGA_RXN11 9
VGA_RXP12 9
VGA_RXN12 9
VGA_RXP13 9
VGA_RXN13 9
VGA_RXP14 9
VGA_RXN14 9
VGA_RXP15 9
VGA_RXN15 9
R338
22R_0402
R339
L59
1 2
FB_180_1.5A
PE0_REFCLK_P
PE0_REFCLK_N
PE_RESET#
XTAL_OUTBUFF
XTL_VDD
XTAL_INBUFF
PE0_REFCLK_P 9
PE0_REFCLK_N 9
10K_0402
+3VRUN +2.5VRUN_G73M
C564
4.7UF
AK13
VGA_RXN0
VGA_RXP1
VGA_RXN1
VGA_RXP2
VGA_RXN2
VGA_RXP3
VGA_RXN3
VGA_RXP4
VGA_RXN4
VGA_RXP5
VGA_RXN5
VGA_RXP6
VGA_RXN6
VGA_RXP7
VGA_RXN7
VGA_RXP8
VGA_RXN8
VGA_RXP9
VGA_RXN9
VGA_RXP10 VGA_TXP10
VGA_RXN10
VGA_RXP11
VGA_RXN11
VGA_RXP12
VGA_RXN12
VGA_RXP13
VGA_RXN13
VGA_RXP14
VGA_RXN14
VGA_RXP15
VGA_RXN15
2
1
4.7UF
5
PEX_RX0
AK14
PEX_RX0_N
AM14
PEX_RX1
AM15
PEX_RX1_N
AL15
PEX_RX2
AL16
PEX_RX2_N
AK16
PEX_RX3
AK17
PEX_RX3_N
AL17
PEX_RX4
AL18
PEX_RX4_N
AM18
PEX_RX5
AM19
PEX_RX5_N
AK19
PEX_RX6
AK20
PEX_RX6_N
AL20
PEX_RX7
AL21
PEX_RX7_N
AM21
PEX_RX8
AM22
PEX_RX8_N
AK22
PEX_RX9
AK23
PEX_RX9_N
AL23
PEX_RX10
AL24
PEX_RX10_N
AM24
PEX_RX11
AM25
PEX_RX11_N
AK25
PEX_RX12
AK26
PEX_RX12_N
AL26
PEX_RX13
AL27
PEX_RX13_N
AM27
PEX_RX14
AM28
PEX_RX14_N
AL28
PEX_RX15
AL29
PEX_RX15_N
AM12
PEX_TSTCLK_OUT
AM11
PEX_TSTCLK_OUT_N
AH14
PEX_REFCLK
AJ14
PEX_REFCLK_N
AH15
PEX_RST
G73M_8
+3VRUN
C533
1u_0402_X5R
R329 100
4
U22
NC7S08_SC70_5
3 5
0R_NC
R335
U24
1
CLKIN
2
VDD
3
GND
4 5
CLKOUT REF_OUT/FS_IN1*
ICS91730BM_SOIC8
C560
C561
0.1UF_0402
C562
4700PF_0402
PEX_TX0
PEX_TX0_N
PEX_TX1
PEX_TX1_N
PEX_TX2
PEX_TX2_N
PEX_TX3
PEX_TX3_N
PEX_TX4
PEX_TX4_N
PEX_TX5
PEX_TX5_N
PEX_TX6
PEX_TX6_N
PEX_TX7
PEX_TX7_N
PEX_TX8
PEX_TX8_N
PEX_TX9
PEX_TX9_N
PEX_TX10
PCIEXPRESS INTERFACE
PEX_TX10_N
PEX_TX11
PEX_TX11_N
PEX_TX12
PEX_TX12_N
PEX_TX13
PEX_TX13_N
PEX_TX14
PEX_TX14_N
PEX_TX15
PEX_TX15_N
NV_PLLA VDD
PEX_PLLAVDD
PEX_PLLDVDD
PEX_PLLGND
R330
10K
1 2
8
PD#*
7
SCLK
6
SDATA
XTL_VDD
C563
470PF_0402
AJ15
AK15
AH16
AG16
AG17
AH17
AG18
AH18
AK18
AJ18
AJ19
AH19
AG20
AH20
AG21
AH21
AK21
AJ21
AJ22
AH22
AG23
AH23
AK24
AJ24
AJ25
AH25
AH26
AG26
AK27
AJ27
AJ28
AH27
AH13
NC_0
AG12
NC_1
AM8
NC_2
AM9
NC_3
B32
NC_4
J6
SPDIF
T13
AF15
AE15
AE16
PE_RESET#
+3VRUN
SMB_91730_CLK
SMB_91730_DATA
R340 10K_0402
GA_TXP0
VGA_TXN0
VGA_TXP1
VGA_TXN1
VGA_TXP2
VGA_TXN2
VGA_TXP3
VGA_TXN3
VGA_TXP4
VGA_TXN4
VGA_TXP5
VGA_TXN5
VGA_TXP6
VGA_TXN6
VGA_TXP7
VGA_TXN7
VGA_TXP8
VGA_TXN8
VGA_TXP9
VGA_TXN9
VGA_TXN10
VGA_TXP11
VGA_TXN11
VGA_TXP12
VGA_TXN12
VGA_TXP13
VGA_TXN13
VGA_TXP14
VGA_TXN14
VGA_TXP15
VGA_TXN15
GPU_XTALIN
GPU_XTALOUT
C555
4
+3VRUN
C478 0.1UF_0402
C479 0.1UF_0402
C480 0.1UF_0402
C481 0.1UF_0402
C482 0.1UF_0402
C483 0.1UF_0402
C487 0.1UF_0402
C488 0.1UF_0402
C489 0.1UF_0402
C490 0.1UF_0402 TP112
C491 0.1UF_0402
C492 0.1UF_0402
C493 0.1UF_0402
C494 0.1UF_0402
C495 0.1UF_0402
C496 0.1UF_0402
C497 0.1UF_0402
C499 0.1UF_0402
C500 0.1UF_0402
C501 0.1UF_0402
C502 0.1UF_0402
C503 0.1UF_0402
C504 0.1UF_0402
C505 0.1UF_0402
C506 0.1UF_0402
C507 0.1UF_0402
C508 0.1UF_0402
C512 0.1UF_0402
C513 0.1UF_0402
C514 0.1UF_0402
C515 0.1UF_0402
C516 0.1UF_0402
1UF
0.01UF_0402
0.01UF_0402
PLACE NEAR BALLS
0R_0402 R336
0R_0402 R337
+3VRUN
Y5
1 2
27MHZ20P_S
18p_0402
NB_RXP0
NB_RXP0 9
NB_RXN0
NB_RXN0 9
NB_RXP1
NB_RXP1 9
NB_RXN1
NB_RXN1 9
NB_RXP2
NB_RXP2 9
NB_RXN2
NB_RXN2 9
NB_RXP3
NB_RXP3 9
NB_RXN3
NB_RXN3 9
NB_RXP4
NB_RXP4 9
NB_RXN4
NB_RXN4 9
NB_RXP5
NB_RXP5 9
NB_RXN5
NB_RXN5 9
NB_RXP6
NB_RXP6 9
NB_RXN6
NB_RXN6 9
NB_RXP7
NB_RXP7 9
NB_RXN7
NB_RXN7 9
NB_RXP8
NB_RXP8 9
NB_RXN8
NB_RXN8 9
NB_RXP9
NB_RXP9 9
NB_RXN9
NB_RXN9 9
NB_RXP10
NB_RXP10 9
NB_RXN10
NB_RXN10 9
NB_RXP11
NB_RXP11 9
NB_RXN11
NB_RXN11 9
NB_RXP12
NB_RXP12 9
NB_RXN12
NB_RXN12 9
NB_RXP13
NB_RXP13 9
NB_RXN13
NB_RXN13 9
NB_RXP14
NB_RXP14 9
NB_RXN14
NB_RXN14 9
NB_RXP15
NB_RXP15 9
NB_RXN15
NB_RXN15 9
L50
1 2
C526
C530
4.7UF
4.7UF
10nH_0.4A
L51
1 2
10nH_0.4A
C527
L52
1 2
10nH_0.4A
C531
NEAR BGA
C518
C519
4.7UF
1UF
C524
C525
0.1UF_0402
1UF
C529
C528
0.1UF_0402
I2CC_SCL
I2CC_SDA
C556
18p_0402
4
+2.5VRUN_G73M
+1_2VRUN_G73M
DADC_VDD
DADB_VDD
IFPAB_PLLVDD
IFPAB_PLLGND
IFPCD_PLLVDD
IFPCD_PLLGND
C534
4.7UF
+2.5VRUN_G73M
C542
470PF_0402
C552
470PF_0402
470PF_0402
470PF_0402
L53
1 2
4.7UF
C543
4.7UF
C553
4.7UF
C484
4.7UF
C557
4.7UF
R314 2.2K_0402
R315 2.2K_0402
FB_180_1.5A
1 2
4.7UF
L54
FB_180_1.5A
C539
0.1UF_0402
1 2
C544
470PF_0402
1 2
C554
470PF_0402
C485
470PF_0402
C558
470PF_0402
3
EDID_CLK
EDID_DATA
EDID_CLK 16
EDID_DATA 16
C535
0.1UF_0402
C540
4700PF_0402
XTAL_OUTBUFF
L55
FB_180_1.5A
L57
FB_180_1.5A
+2.5VRUN_G73M
L47
1 2
FB_180_1.5A
C486
L58
1 2
FB_180_1.5A
C559
3
LVDS_DIGON 13,16
C536
4700PF_0402
VID_PLLVDD
C541
+3VRUN
+3VRUN
DVI_A_HPD 13,16
TP108
LVDS_BLON 16
G73_ALERT#
I2CC_SCL
I2CC_SDA
R580 10K_0402
PLLVDD
C537
R324
22R_0402
TP109
TP110
TP111
M26_THRMDC
M26_THRMDA
R321 10K_0402
R322 10K_0402
PLLVDD
VID_PLLVDD
GPU_XTALIN
XTALINBUFF
GPU_XTALOUT
XTALOUTBUFF
R581
10K_0402
M26_THRMDA
C545
2200p_0402X7R
M26_THRMDC
C551
0.1UF_0402
2
U21B
K3
GPIO0
H1
GPIO1
K5
GPIO2
G5
GPIO3
E2
GPIO4
J5
GPIO5
G6
GPIO6
K6
GPIO7
E1
GPIO8
D2
GPIO9
H5
GPIO10
F4
GPIO11
E3
GPIO12
R316 33_0402
G2
I2CC_SCL
R317 33_0402
G1
I2CC_SDA
F6
NC_22/CLAMP
AJ11
JTAG_TCK
AK11
JTAG_TMS
AK12
JTAG_TDI
AL12
JTAG_TDO
AL13
JTAG_TRST_N
J1
THERMDN
K1
THERMDP
U3
NC_7
V3
NC_8
U6
NC_9
U5
NC_10
U4
NC_11
V4
NC_12
V6
NC_13
AE26
MEMSTRAPSEL0/NC
AD26
MEMSTRAPSEL1/NC
AH31
MEMSTRAPSEL2/NC
AH32
MEMSTRAPSEL3/NC
F1
STRAP
AA4
ROMCS_N
W2
ROM_SI
AA6
ROM_SO
AA7
ROM_SCLK
F3
BUFRST
T3
STEREO
M6
SWAPROY_A
A26
TESTMEMCLK/NC
H2
TESTMODE
G3
I2CH_SCL
H3
I2CH_SDA
T9
PLLVDD
T10
VID_PLLVDD
U10
PLLGND
U1
XTALIN
T1
XTALSSIN
U2
XTALOUT
T2
XTALOUTBUFF
J4
I2CB_SDA
H4
I2CB_SCL
AF5
DACC_RSET
AH4
DACC_VREF
AD7
DACC_VDD
AG4
DACC_IDUMP
AE5
DACC_BLUE
AG6
DACC_GREEN
AF6
DACC_RED
AG5
DACC_VSYNC
AG7
DACC_HSYNC
G73M_8
IFPC_IOVDD
C546
470PF_0402
+3VRUN
U23
2
D+
3
D-
4
T_CRIT_A#
LM86CIMMXNOPB_MSOP8-RH
LVDS
MISC1 MISC2
TMDS
DACA DACB(TV)
DACC
C547
0.1UF_0402
4700PF_0402
R341
2.2K_0402
SMBCLK VDD
SMBDATA
ALERT#
GND
IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N
IFPAB_VPROBE
IFPAB_RSET
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPB_IOVDD
IFPC_TXC
IFPC_TXC_N
IFPC_TXD0
IFPC_TXD0_N
IFPC_TXD1
IFPC_TXD1_N
IFPC_TXD2
IFPC_TXD2_N
IFPD_TXC
IFPD_TXC_N
IFPD_TXD4
IFPD_TXD4_N
IFPD_TXD5
IFPD_TXD5_N
IFPD_TXD6
IFPD_TXD6_N
IFPCD_VPROBE
IFPCD_RSET
IFPCD_PLLVDD
IFPCD_PLLGND
IFPC_IOVDD
IFPD_IOVDD
DACA_HSYNC
DACA_VSYNC
DACA_RED
DACA_GREEN
DACA_BLUE
DACA_IDUMP
DACA_VDD
DACA_VREF
DACA_RSET
I2CA_SCL
I2CA_SDA
DACB_RED
DACB_GREEN
DACB_BLUE
DACB_IDUMP
DACB_VDD
DACB_VREF
DACB_RSET
C548
4.7UF
8 1
7
6
5
2
AK9
AJ9
AH6
AJ6
AH8
AH7
AJ8
AK8
AJ5
AH5
AK4
AL4
AM6
AM5
AM7
AL7
AK6
AK5
AK7
AL8
AM4
AL5
AC9
AD9
AF9
AF8
AM2
AM3
AE2
AE1
AF1
AF2
AG1
AH1
AG3
AH2
AK1
AJ1
AL2
AL1
AJ2
AJ3
AK3
AH3
AA10
AB10
AD6
AE7
AF10
AK10
AH11
AJ12
AH12
AG9
AD10
AH10
AH9
K2
J3
R6
T5
T6
V7
V8
R5
R7
L56
1 2
FB_180_1.5A
C549
R342
2.2K_0402
R582 0
LVDS_ATXCKP
LVDS_ATXCKN
LVDS_ATXD0P
LVDS_ATXD0N
LVDS_ATXD1P
LVDS_ATXD1N
LVDS_ATXD2P
LVDS_ATXD2N
LVDS_BTXCKP
LVDS_BTXCKN
LVDS_BTXD0P
LVDS_BTXD0N
LVDS_BTXD1P
LVDS_BTXD1N
LVDS_BTXD2P
LVDS_BTXD2N
IFPAB_PLLVDD
IFPAB_PLLGND
IFPA_IOVDD
IFPB_IOVDD
IFPC_TXCP
IFPC_TXCN
IFPC_TXD0P
IFPC_TXD0N
IFPC_TXD1P
IFPC_TXD1N
IFPC_TXD2P
IFPC_TXD2N
C523
0.01UF_0402
R323 1K_1%_0402
IFPCD_PLLVDD
IFPCD_PLLGND
IFPC_IOVDD
R609 10K_0402
CRT_HSYNC
CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
DADC_VDD
C532 0.01UF_0402
R328
124_1%_0402
I2CA_SCL
I2CA_SDA
TV_C_R_PR
TV_Y_G
TV_COMP_B_PB
DADB_VDD
C538 0.01UF_0402
R334
124_1%_0402
IFPCD IOVDD
C550
4.7UF
VGA_THERMAL_CLK 21
VGA_THERMAL_DATA 21
G73_ALERT#
C498 0.01UF_0402
R318
1K_1%_0402
FOR EMI
DVI_CLK 16
DVI_DATA 16
150_1%_0402
150_1%_0402
Title
G73M HOST INTERFACE
Size Document Number Rev
C
MS-16322
Date: Sheet
1
LVDS_ATXCKP
RI14 0_0402_NC
LVDS_ATXCKN
LVDS_ATXD0P
RI15 0_0402_NC
LVDS_ATXD0N
LVDS_ATXD1P
RI16 0_0402_NC
LVDS_ATXD1N
LVDS_ATXD2P
RI17 0_0402_NC
LVDS_ATXD2N
LVDS_BTXCKP
RI18 0_0402_NC
LVDS_BTXCKN
LVDS_BTXD0P
RI19 0_0402_NC
LVDS_BTXD0N
LVDS_BTXD1P
RI20 0_0402_NC
LVDS_BTXD1N
LVDS_BTXD2P
RI21 0_0402_NC
LVDS_BTXD2N
IFPC_TXCP
RI22 0_0402_NC
IFPC_TXCN
IFPC_TXD0P
RI23 0_0402_NC
IFPC_TXD0N
IFPC_TXD1P
RI24 0_0402_NC
IFPC_TXD1N
IFPC_TXD2P
RI25 0_0402_NC
IFPC_TXD2N
CRT_HSYNC 16
CRT_VSYNC 16
CRT_RED 16
CRT_GREEN 16
CRT_BLUE 16
150_1%_0402
150_1%_0402
R326
R325
R327
TV_C_R_PR 16
TV_Y_G 16
TV_COMP_B_PB 16
150_1%_0402
150_1%_0402
R332
R331
R333
IFPA_IOVDD
C509
470PF_0402
4700PF_0402
IFPB_IOVDD
C520
470PF_0402
4700PF_0402
MSI CORPORATION
1
LVDS_ATXCKP 16
LVDS_ATXCKN 16
LVDS_ATXD0P 16
LVDS_ATXD0N 16
LVDS_ATXD1P 16
LVDS_ATXD1N 16
LVDS_ATXD2P 16
LVDS_ATXD2N 16
LVDS_BTXCKP 16
LVDS_BTXCKN 16
LVDS_BTXD0P 16
LVDS_BTXD0N 16
LVDS_BTXD1P 16
LVDS_BTXD1N 16
LVDS_BTXD2P 16
LVDS_BTXD2N 16
DVI_TXCP 16
DVI_TXCN 16
DVI_TXD0P 16
DVI_TXD0N 16
DVI_TXD1P 16
DVI_TXD1N 16
DVI_TXD2P 16
DVI_TXD2N 16
IFPAB_IOVDD
1 2
FB_180_1.5A
4.7UF
C511
C510
1 2
4.7UF
C521
11 40 Monday, April 10, 2006
L48
IFPAB_IOVDD
L49
FB_180_1.5A
C522
of
0A
5
4
3
2
1
U21C
FBB_A[5..2] 14
R344
R346
+1_2VRUN_G73M
FBCD[63..0] 15
10K_0402
10K_0402
+1.8VRUN
R349
1.05K_1%_0402
R352
2.49K_1%_0402
FBCD0
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63
C569
0.22UF_0402
FBAD[63..0] 14
D D
C C
+1.8VRUN
1.05K_1%_0402
R350
2.49K_1%_0402 R354 40.2_1%_0402
B B
C568
0.22UF_0402
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
AD29
AE29
AD28
AC28
AB29
AA30
AB30
AM30
AF30
AJ31
AJ30
AJ32
AK29
AM31
AL30
AE32
AE30
AE31
AD30
AC31
AC32
AB32
AB31
AG27
AF28
AH28
AG28
AG29
AD27
AF27
AE28
N27
M27
N28
L29
K27
K28
J29
J28
P30
N31
N30
N32
L31
L30
J30
L32
H30
K30
H31
F30
H32
E31
D30
E30
H28
H29
E29
J27
F27
E27
E28
F28
Y28
E32
FBAD0
FBAD1
FBAD2
FBAD3
FBAD4
FBAD5
FBAD6
FBAD7
FBAD8
FBAD9
FBAD10
FBAD11
FBAD12
FBAD13
FBAD14
FBAD15
FBAD16
FBAD17
FBAD18
FBAD19
FBAD20
FBAD21
FBAD22
FBAD23
FBAD24
FBAD25
FBAD26
FBAD27
FBAD28
FBAD29
FBAD30
FBAD31
FBAD32
FBAD33
FBAD34
FBAD35
FBAD36
FBAD37
FBAD38
FBAD39
FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD48
FBAD49
FBAD50
FBAD51
FBAD52
FBAD53
FBAD54
FBAD55
FBAD56
FBAD57
FBAD58
FBAD59
FBAD60
FBAD61
FBAD62
FBAD63
FB_VREF1/NC
G73M_8
FBA
FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8
FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26/NC
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
FBA_CLK_0
FBA_CLK_0_N
FBA_CLK_1
FBA_CLK_1_N
FBA_REFCLK
FBA_REFCLK_N
FBA_DEBUG
FBA_PLLVDD/NC
FBA_PLLAVDD
FBA_PLLGND
NC_5
NC_6
P32
U27
P31
U30
Y31
W32
W31
T32
V27
T28
T31
U32
W29
W30
T27
V28
V30
U31
R27
V29
T30
W28
R29
R30
P29
U28
Y32
M29
M30
G30
F29
AA29
AK30
AC30
AG30
L28
K31
G32
G28
AB28
AL32
AF32
AH30
M28
K32
G31
G27
AA28
AL31
AF31
AH29
P28
R28
Y27
AA27
Y30
AC26
D32
D31
AC27
G23
G25
G24
FBA_A4
FBA_RAS#
FBA_A5
FBA_BA1
FBB_A2
FBB_A4
FBB_A3
FBA_BA2_CS1#
FBA_CS0#
FBA_A11
FBA_CAS#
FBA_WE#
FBA_BA0
FBB_A5
FBA_A12
FBA_RST
FBA_A7
FBA_A10
FBA_CKE
FBA_A0
FBA_A9
FBA_A6
FBA_A2
FBA_A8
FBA_A3
FBA_A1
FBADQM0
FBADQM1
FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7
FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7
FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7
FBA_CLK_0
FBA_CLK_0#
FBA_CLK_1
FBA_CLK_1#
FBA_RAS# 14
FBA_BA1 14
FBA_BA2_CS1# 14
FBA_CS0# 14
FBA_CAS# 14
FBA_WE# 14
FBA_BA0 14
TP115
FBA_RST 14
FBA_CKE 14
TP117
FBA_CLK_0 14 FBC_CLK_0# 15
FBA_CLK_0# 14
FBA_CLK_1 14
FBA_CLK_1# 14
TP120
TP122
TP123
C576
0.22UF_0402
470PF_0402
FBA_A[11..0] 14
FBA_RST
FBA_CKE
FBADQM[7..0] 14
FBADQS_WP[7..0] 14
FBADQS_RN[7..0] 14
L63
1 2
FB_180_1.5A
1UF
C577
C578
F10
D12
E12
D11
C10
B10
A10
C11
C12
A11
B11
B28
C27
C26
B26
C30
B31
C29
A31
D28
D27
F26
D24
E23
E26
E24
F23
B23
A23
C25
C23
A22
C22
C21
B22
E22
D22
D21
E21
E18
D19
D18
E19
A28
B7
A7
C7
A2
B2
C4
A5
B5
F9
D9
E8
D8
E7
F7
D6
D5
D3
E4
C3
B4
C8
G73M_8
U21D
FBCD0
FBC
FBCD1
FBCD2
FBCD3
FBCD4
FBCD5
FBCD6
FBCD7
FBCD8
FBCD9
FBCD10
FBCD11
FBCD12
FBCD13
FBCD14
FBCD15
FBCD16
FBCD17
FBCD18
FBCD19
FBCD20
FBCD21
FBCD22
FBCD23
FBCD24
FBCD25
FBCD26
FBCD27
FBCD28
FBCD29
FBCD30
FBCD31
FBCD32
FBCD33
FBCD34
FBCD35
FBCD36
FBCD37
FBCD38
FBCD39
FBCD40
FBCD41
FBCD42
FBCD43
FBCD44
FBCD45
FBCD46
FBCD47
FBCD48
FBCD49
FBCD50
FBCD51
FBCD52
FBCD53
FBCD54
FBCD55
FBCD56
FBCD57
FBCD58
FBCD59
FBCD60
FBCD61
FBCD62
FBCD63
FBCD_VREF2/NC
FBC_CMD_0
FBC_CMD_1
FBC_CMD_2
FBC_CMD_3
FBC_CMD_4
FBC_CMD_5
FBC_CMD_6
FBC_CMD_7
FBC_CMD_8
FBC_CMD_9
FBC_CMD_10
FBC_CMD_11
FBC_CMD_12
FBC_CMD_13
FBC_CMD_14
FBC_CMD_15
FBC_CMD_16
FBC_CMD_17
FBC_CMD_18
FBC_CMD_19
FBC_CMD_20
FBC_CMD_21
FBC_CMD_22
FBC_CMD_23
FBC_CMD_24
FBC_CMD_25
FBC_CMD_26/NC
FBCDQM0
FBCDQM1
FBCDQM2
FBCDQM3
FBCDQM4
FBCDQM5
FBCDQM6
FBCDQM7
FBCDQS_WP0
FBCDQS_WP1
FBCDQS_WP2
FBCDQS_WP3
FBCDQS_WP4
FBCDQS_WP5
FBCDQS_WP6
FBCDQS_WP7
FBCDQS_RN0
FBCDQS_RN1
FBCDQS_RN2
FBCDQS_RN3
FBCDQS_RN4
FBCDQS_RN5
FBCDQS_RN6
FBCDQS_RN7
FBC_CLK0
FBC_CLK0_N
FBC_CLK1
FBC_CLK1_N
NC_23
NC_24
FBC_DEBUG
FBC_REFCLK
FBC_REFCLK_N
FBC_PLLVDD/NC
FBC_PLLAVDD
FBC_PLLGND
FBCAL_PD_VDDQ
FBCAL_PU_GND
FBCAL_TERM_GND
FBC_A4
C13
FBC_RAS#
A16
FBC_A5
A13
FBC_BA1
B17
FBD_A2
B20
FBD_A4
A19
FBD_A3
B19
FBC_BA2_CS1#
B14
FBC_CS0#
E16
FBC_A11
A14
FBC_CAS#
C15
FBC_WE#
B16
FBC_BA0
F17
FBD_A5
C19
FBC_A12
D15
FBC_RST
C17
FBC_A7
A17
FBC_A10
C16
FBC_CKE
D14
FBC_A0
F16
FBC_A9
C14
FBC_A6
C18
FBC_A2
E14
FBC_A8
B13
FBC_A3
E15
FBC_A1
F15
FBC_A13
A20
FBCDQM0
A4
FBCDQM1
E11
FBCDQM2
F5
FBCDQM3
C9
FBCDQM4
C28
FBCDQM5
F24
FBCDQM6
C24
FBCDQM7
E20
FBCDQS_WP0
C5
FBCDQS_WP1
E10
FBCDQS_WP2
E5
FBCDQS_WP3
B8
FBCDQS_WP4
A29
FBCDQS_WP5
D25
FBCDQS_WP6
B25
FBCDQS_WP7
F20
FBCDQS_RN0
C6
FBCDQS_RN1
E9
FBCDQS_RN2
E6
FBCDQS_RN3
A8
FBCDQS_RN4
B29
FBCDQS_RN5
E25
FBCDQS_RN6
A25
FBCDQS_RN7
F21
FBC_CLK_0
E13
FBC_CLK_0#
F13
FBC_CLK_1
F18
FBC_CLK_1#
E17
C20
D1
F12
B1
C1
G8
G10
G9
R351 49.9_1%_0402
K26
R353 40.2_1%_0402
H26
J26
TP118
TP119 R348
TP121
FBC_RAS# 15
FBC_BA1 15
FBC_BA2_CS1# 15
FBC_CS0# 15
FBC_CAS# 15
FBC_WE# 15
FBC_BA0 15
TP114
FBC_RST 15
FBC_CKE 15
FBC_CLK_0 15
FBC_CLK_1 15
FBC_CLK_1# 15
+1.8VRUN
TP116
FBCDQM[7..0] 15
FBCDQS_WP[7..0] 15
FBCDQS_RN[7..0] 15
0.22UF_0402
FBC_A[11..0] 15
FBD_A[5..2] 15
1UF
C573
C574
470PF_0402
FBC_RST
FBC_CKE
L62
1 2
FB_180_1.5A
C575
10K_0402
R345
10K_0402
R347
+1_2VRUN_G73M
A A
Title
Size Document Number Rev
C
5
4
3
2
Date: Sheet
MSI CORPORATION
G73M MEM INTERFACE
MS-16322
1
12 40 Monday, April 10, 2006
0A
of
5
U21F
K16
VDD0
K17
G73M_CORE
NEAR BGA PLACE NEAR BALLS
D D
C C
+1.8VRUN
0.1UF_0402
0.1UF_0402
1UF
C584
1UF
C597
1UF
C603
C628
C629
0.1UF_0402
0.1UF_0402
C642
C643
0.1UF_0402
0.1UF_0402
0.47UF_0402
0.47UF_0402
0.47UF_0402
0.47UF_0402
C586
C588
0.1UF_0402
0.1UF_0402
0.1UF_0402
0.1UF_0402
C589
0.1UF_0402
C602
C601
0.1UF_0402
C608
C607
0.1UF_0402
C620
C619
0.1UF_0402
TP124
TP125
C634
C633
4.7UF
C647
C648
4.7UF
C587
C585
0.1UF_0402
0.47UF_0402
C600
C599
C598
0.1UF_0402
0.47UF_0402
C606
C605
C604
0.47UF_0402
0.47UF_0402
C618
C616
C617
0.47UF_0402
0.47UF_0402
C630
C631
C632
0.1UF_0402
0.47UF_0402
0.47UF_0402
C644
C645
C646
0.1UF_0402
0.47UF_0402
0.47UF_0402
NEAR BGA
B B
PC339
4.7u_0805
+1_2VG73M_PG
+1_8VRUN_PG 36
A A
RUN_PWRGD 4,18,22
PR254
0R0402
D25
A C
S-BAS40WS
5
7
8
POK
EN
PU12
APL5912
6
5
VIN
VCNTL
9
VIN
4
VOUT
3
VOUT
2
FB
GND
PR295
1
2K0402 1%
+1_5VRUN_PG 36
+1_2VG73M_PG RUN_PWRGD
RUN_ON 21,34,35
VDD1
N13
VDD2
N14
VDD3
N16
VDD4
N17
VDD5
N19
VDD6
P13
VDD7
P14
VDD8
P16
VDD9
P17
VDD10
P19
VDD11
R16
VDD12
R17
VDD13
T14
VDD14
T15
VDD15
T18
VDD16
T19
VDD17
U13
VDD18
U14
VDD19
U15
VDD20
U18
VDD21
U19
VDD22
V16
VDD23
V17
VDD24
W13
VDD25
W14
VDD26
W16
VDD27
W17
VDD28
W19
VDD29
Y13
VDD30
Y14
VDD31
Y16
VDD32
Y17
VDD33
Y19
VDD34
Y20
VDD35
P20
VDD_LP_0
T20
VDD_LP_1
T23
VDD_LP_2
U20
VDD_LP_3
U23
VDD_LP_4
W20
VDD_LP_5
N20
VDD_SENSE
M21
GND_SENSE
AA23
FBVTT_0
AB23
FBVTT_1
H16
FBVTT_2
H17
FBVTT_3
J10
FBVTT_4
J23
FBVTT_5
J24
FBVTT_6
J9
FBVTT_7
K11
FBVTT_8
K12
FBVTT_9
K21
FBVTT_10
K22
FBVTT_11
K24
FBVTT_12
K9
FBVTT_13
L23
FBVTT_14
M23
FBVTT_15
T25
FBVTT_16
U25
FBVTT_17
G73M_8
PC340
4.7u_0805
PR294
1K0402 1%
1 2
PC342
0.01u_0402
1 2
+5VRUN
+1.8VRUN
PEX_IOVDD0
PEX_IOVDD1
PEX_IOVDD2
PEX_IOVDD3
PEX_IOVDD4
PEX_IOVDD5
PEX_IOVDDQ0
PEX_IOVDDQ1
PEX_IOVDDQ2
PEX_IOVDDQ3
PEX_IOVDDQ4
PEX_IOVDDQ5
PEX_IOVDDQ6
PEX_IOVDDQ7
PEX_IOVDDQ8
PEX_IOVDDQ9
PEX_IOVDDQ10
VDD3.3_0
VDD3.3_1
VDD3.3_2
VDD3.3_3
VDD3.3_4
VDD3.3_5
VDD3.3_6
VDD3.3_7
VDD3.3_8
VDD3.3_9
VDD3.3_10
VDD3.3_11
VDD3.3_12
FBVDD_0
FBVDD_1
FBVDD_2
FBVDD_3
FBVDD_4
FBVDD_5
FBVDD_6
FBVDD_7
FBVDD_8
FBVDD_9
FBVDD_10
FBVDD_11
FBVDD_12
FBVDD_13
FBVDD_14
FBVDD_15
FBVDD_16
FBVDD_17
FBVDD_18
FBVDD_19
FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9
FBVDDQ_10
FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
PC341
100u_3528
4
4
AD23
AF23
AF24
AF25
AG24
AG25
AC16
AC17
AC21
AC22
AE18
AE21
AE22
AF12
AF18
AF21
AF22
AC11
AC12
AC24
AD24
AE11
AE12
H7
J7
K7
L10
L7
L8
M10
A12
A15
A18
A21
A24
A27
A3
A30
A6
A9
AA32
AD32
AG32
AK32
C32
F32
J32
M32
R32
V32
AA25
AA26
AB25
AB26
G11
G12
G15
G18
G21
G22
H11
H12
H15
H18
H21
H22
L25
L26
M25
M26
R25
R26
V25
V26
GB2
2 1
3
NEAR BGA
PLACE NEAR BALLS
1UF
1UF
C581
C579
0.1UF_0402
0.1UF_0402
C590
0.1UF_0402
0.1UF_0402
PLACE NEAR BALLS NEAR BGA
C609
C610
0.1UF_0402
0.1UF_0402
0.47UF_0402
C582
C580
C591
C592
0.47UF_0402
0.47UF_0402
C611
C612
0.1UF_0402
0.47UF_0402
C583
4.7UF
1UF
1UF
C594
C595
C593
C613
0.47UF_0402
C596
4.7UF
+3VRUN
1UF
C615
C614
PLACE NEAR BALLS
+1.8VRUN
+1.8VRUN
0.1UF_0402
0.1UF_0402
C622
0.1UF_0402
0.1UF_0402
C623
0.1UF_0402
C637
C636
0.1UF_0402
C621
C635
0.1UF_0402
0.1UF_0402
C625
0.47UF_0402
0.47UF_0402
C626
C627
4.7UF
0.47UF_0402
C641
C640
C639
4.7UF
0.47UF_0402
C624
C638
PLACE NEAR BALLS
C1021
1u_0402_X5R
LVDS_DIGON 11,16
+1_2VRUN_G73M
Q33
S1
DVI_A_HPD 11,16
RUN_PWRGD
G1
S2
G2
2N7002DW
3
+1_2VRUN_G73M
NEAR BGA
+5VRUN
2
1
3 5
D1
D2
10K_0402
FOR EMI
R364 10K_0402
4
U47
NC7S08_SC70_5
G
R610
+1_2VRUN_G73M
MIOAD0
MIOAD1
MIOAD6
MIOAD8
MIOAD9
+3VRUN
D S
Q34
AO3415-P
IFPCD IOVDD
W5
W4
+1.8VRUN
G
U21E
P2
MIOAD0
N2
MIOAD1
N1
MIOAD2
N3
MIOAD3
M1
MIOAD4
M3
MIOAD5
P5
MIOAD6
N6
MIOAD7
N5
MIOAD8
M4
MIOAD9
L4
MIOAD10
L5
MIOAD11
R3
MIOA_HSYNC
R1
MIOA_VSYNC
P1
MIOA_DE
P3
MIOA_CTL3
R4
MIOA_CLKOUT
P4
MIOA_CLKOUT_N
M5
MIOA_CLKIN
M7
MIOA_VDDQ_0
M8
MIOA_VDDQ_1
R8
MIOA_VDDQ_2
T8
MIOA_VDDQ_3
U9
MIOA_VDDQ_4
L1
MIOACAL_PD_VDDQ
L3
MIOACAL_PU_GND
L2
MIOA_VREF
Y6
NC_14
V5
NC_15
NC_16
NC_17
G73M_8
D S
Q32
AO3400-N
IFPAB_IOVDD
2
+3VRUN +3VRUN +3VRUN +3VRUN
CI53
CI54
0.1UF_0402_NC
0.1UF_0402_NC
CI56
CI55
0.1UF_0402_NC
0.1UF_0402_NC
FOR EMI
MIOBD0
AC3
MIOBD0
MIOBD1
MIOBD2
MIOBD3
MIOBD4
MIOBD5
MIOBD6
MIOBD7
MIOBD8
MIOBD9
MIOBD10
MIOBD11
MIOB_HSYNC
MIOB_VSYNC
MIOB_DE
MIOB_CTL3
MIOB_CLKOUT
MIOB_CLKOUT_N
MIOB_CLKIN
MIOB_VDDQ_0
MIOB_VDDQ_1
MIOB_VDDQ_2
MIOB_VDDQ_3
MIOB_VDDQ_4
MULTIUSE INTRERFACE
MIOBCAL_PD_VDDQ
MIOBCAL_PU_GND
MIOB_VREF
NC_18
NC_19
NC_20
NC_21
2
AC1
AC2
AB2
AB1
AA1
AB3
AA3
AC5
AB5
AB4
AA5
AF3
AE3
AD1
AD3
AD4
AD5
AE4
AA8
AB7
AB8
AC6
AC7
Y1
Y3
Y2
W3
V1
Y5
W1
1
2
3
4
5
6
22
7
8
12
13
20
21
29
30
11
12
13
14
MIOBD1
MIOBD3
MIOBD4
MIOBD5
MIOBD8
MIOBD9
MIOBD11
MIOB_HSYNC
R365 10K_0402
MIOB_CLKIN MIOA_CLKIN
+3VRUN +3VRUN
LOGIC 0
2K_0402 R355
R357 10K_0402
R359 10K_0402
1
U21G
AA12
GND_0
AA2
GND_1
AA21
GND_2
AA31
GND_3
AB27
GND_4
AB6
GND_5
AC10
GND_6
AC23
GND_7
AC29
GND_8
AC4
GND_9
AD16
GND_10
AD17
GND_11
AD2
GND_151
AD31
GND_152
AE17
GND_153
AE27
GND_12
AE6
GND_13
AF11
GND_14
AF26
GND_15
AF29
GND_16
AF4
GND_17
AF7
GND_18
AG10
GND_19
AG11
GND_20
AG14
GND_21
AG15
GND_22
AG19
GND_23
AG2
GND_24
AG22
GND_25
AG31
GND_26
AG8
GND_27
AH24
GND_28
AJ10
GND_29
AJ13
GND_30
AJ16
GND_31
AJ17
GND_32
AJ20
GND_33
AJ23
GND_34
AJ26
GND_35
AJ29
GND_36
AJ4
GND_37
AJ7
GND_38
AK2
GND_39
AK28
GND_40
AK31
GND_41
AL11
GND_42
AL14
GND_43
AL19
GND_44
AL22
GND_45
AL25
GND_46
AL3
GND_47
AL6
GND_48
AL9
GND_49
AM13
GND_50
AM16
GND_51
AM17
GND_52
AM20
R583 10K_0402_NC
LOGIC 1 STRAP BIT
MIOAD1
R356 10K_0402
MIOBD0
MIOBD1
MIOBD8
R358 10K_0402
MIOBD9
MIOBD4
MIOBD5
MIOBD3
MIOBD11
MIOAD0
MIOAD6
MIOAD8
MIOAD9
Title
G73M POWER
Size Document Number Rev
C
Date: Sheet
GND_53
AM23
GND_54
AM26
GND_55
AM29
GND_56
B12
GND_57
B15
GND_58
B18
GND_59
B21
GND_60
B24
GND_61
B27
GND_62
B3
GND_63
B30
GND_64
B6
GND_65
B9
GND_66
C2
GND_67
C31
GND_68
D10
GND_69
D13
GND_70
D16
GND_71
D17
GND_76
D20
GND_75
D23
GND_74
D26
GND_73
D29
GND_72
G73M_8
+3VRUN
2K_0402_NC R360
2K_0402_NC R361
2K_0402_NC R362
2K_0402 R363
2K_0402_NC R366
2K_0402_NC R367
2K_0402 R368
2K_0402_NC R369
MSI CORPORATION
MS-16332
REG: NV_STRAP_0
SUB_VENDOR
ROM_CFG0
ROM_CFG1
ROM_CFG2
ROM_CFG3
PCI_DEVID_0
PCI_DEVID_1
PCI_DEVID_2
PCI_DEVID_3
PEX_PLL_EN_TERM100
3GIO_PADCFG_LUT_ADR[0]
3GIO_PADCFG_LUT_ADR[1]
3GIO_PADCFG_LUT_ADR[2]
1
D4
GND_77
D7
GND_78
F11
GND_79
F14
GND_80
F19
GND_81
F2
GND_82
F22
GND_83
F25
GND_84
F31
GND_85
F8
GND_86
G26
GND_87
G29
GND_88
G4
GND_89
G7
GND_90
H27
GND_91
H6
GND_92
J16
GND_93
J17
GND_94
J2
GND_95
J31
GND_96
K10
GND_97
K23
GND_98
K29
GND_99
K4
GND_100
L27
GND_101
L6
GND_102
M12
GND_103
M2
GND_104
M31
GND_105
N15
GND_106
N18
GND_107
N29
GND_108
N4
GND_109
P15
GND_110
P18
GND_111
P27
GND_112
P6
GND_113
R13
GND_114
R14
GND_115
R15
GND_116
R18
GND_117
R19
GND_118
R2
GND_119
R20
GND_120
R31
GND_121
T16
GND_122
T17
GND_123
T24
GND_124
T29
GND_125
T4
GND_126
U16
GND_127
U17
GND_128
U24
GND_129
U29
GND_130
U8
GND_131
V13
GND_132
V14
GND_133
V15
GND_134
V18
GND_135
V19
GND_136
V2
GND_137
V20
GND_138
V31
GND_139
W15
GND_140
W18
GND_141
W27
GND_142
W6
GND_143
Y15
GND_144
Y18
GND_145
Y29
GND_146
Y4
GND_147
AL10
GND_148
AM10
GND_149
AG13
GND_150
0: SYSTEM BIOS
1: ADAPTER BIOS
RAM_CFG[3:0]
RAM_CFG[3:0]=
8MX32 DDR3
128bit
infineon
13 40 Monday, April 10, 2006
0A
of