MSI MS-14B3 Schematics revB

5

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smd.db-x7.ru

4

3

2

1

WhiskeyLake - U Processor Platform

D D

VER : B

MS-14B3KP02113

Whiskey Lake - U
(BGA1528)

4 Core

16G DDR4
SODIMM

Page 6

eDP CON

C C

HDMI CON

Page 17

Audio Combo JACK

2G GDDR5

8Gb(256Mx32bit) * 2

B B

Page 21

Page 35~36

M.2 KEY-M Combo SSD

TMDS

HP-OUT

MIC-IN

Frame Buffer

AUDIO CODEC

Realtek ALC298Q-CG

M.2 KEY-E WLAN

INTEL 9260
CNVi

CardReader

Realtek RTS5170

Page 19

Page 16

Level shift

SN75DP139

Page 17

Page 21

GPU

NVIDIA N17S-G2

Page 33~42

Page 20

Page 22

PCI-E Gen3/SATA Gen3 PCI-E Port 13,14,15,16

Channel A

DDR4

2400 MHZ

eDp

TMDS

HDA

PCIE Gen3

PCIE Gen2/USB2

CNVi

USB2

DDR CH A

eDP Port

DDI Port 1

HDA

PCIE Port 9,10,11,12

PCIE Port 7
USB 2.0 Port 10

CNVi

USB 2.0 Port 5

SATA Port 2

GT2

USB 3.0 Port 3
USB 2.0 Port 1

USB 3.0 Port 4
USB 2.0 Port 2

USB 3.0 Port 1,2
USB 2.0 Port 3

USB 3.0 Port 5,6
USB 2.0 Port 4

ME

LPC

SMBus

USB3.1 Gen1/USB2

USB3.1 Gen1/USB2

USB3.1 Gen1/USB2

USB3.1 Gen1/USB2

SPI

LPC

TPM

SLB9665

SMbus

USB3-Type-A Port1

USB3-Type-A Port2

USB3 Re-Driver*2

TUSB1002A

Page 25

USB3-Type-C Port4

Page 28

BIOS/EC ROM

W25Q128JVSIQ-HF

KBC

ENE KB9028GC

Page 23

Page 7

SPI/Share ROM

Page 18

Click PAD

Page 24

Page 24

USB3.1 Gen1/USB2 USB3-Type-C Port3

Type-C PD Controller

TI TPS25810

PS2

Page 29

Page 28

Keyboard

Page 18

FAN

Page 30

LED

Page 31

Page 27

Type-C Controller

TI TPS25810

Page 27

A A

5

Camera

Page 31

USB2

USB 2.0 Port 7

Page 03~05, 07~15

4

USB 2.0 Port 6

3

USB2

Fingerprint

Page 29

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Title

Title

Title

Size Document Number Re v

Size Document Number Re v

Size Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

MICRO-STAR INT'L CO.,LTD.

BLOCK DIAGRAM

BLOCK DIAGRAM

BLOCK DIAGRAM

MS-14B3

MS-14B3

MS-14B3

1

0A

0A

0A

of

157Friday, November 16, 2018

of

157Friday, November 16, 2018

of

157Friday, November 16, 2018

A

戶服務

smd.db-x7.ru

B

C

SCHEMATIC ANNOTATIONS AND BOARD INFORMATION

D

E

Voltage Rails

1 1

Voltage Description Control Signal

PWR_SRC

+5VALW 5.0V always on power rail

+3VALW

+5VSUS

+3VSUS

+1_8VSUS

2 2

+1_05VSUS

+2_5VMEM_VPP

+VCCST 1.05V power rail CPU (off in S4-S5)

+VCCPLL 1.05V power rail CPU (off in S4-S5) +VCCST

+1_2VDIMM 1.2V power rail DDR (off in S4-S5)

+VDDQC

+VCCPLL_OC +1_2VDIMM1.2V power rail CPU (off in S4-S5)

+5VRUN

AC ADAPTER OR BATTERY IN

3.3V always on power rail

5.0V power rail

3.3V power rail

1.8V power rail

1.05V power rail

2.5V power rail DDR (off in S4-S5)

5.0V switched power rail (off in S3-S5)

PWR_SRC

PWR_SRC

SUS_ON

SUS_ON

3V5VSUSPWRGD

1_8VSUSPWRGD

DIMM_ON_VPP

DIMM_ON_VPP

DIMM_ON_VDDQ

+1_2VDIMM1.2V power rail CPU DRAM (off in S4-S5)

RUND

POWER STATES

SLP_S3#SLP_S5# SLP_S4#

H

L

LL L

LL L

LL L

LL L

LL L

H

H

H

H

H

H

H

L

L

LL

LL

LL

LL

LL

H

HH

L

L

L

3 3

+3VRUN

+1_8VRUN

+VCC_IO

+VCCSTG

+0_6VTT_RUN

+VCC_SA 0.55V to 1.15V Voltage for Processor

+VCC_CORE

+VCC_GT

3.3V switched power rail (off in S3-S5 / M0)

1.8V power rail AUDIO (off in S3-S5)

1.05V rail for Processor & PCH (off in S3-S5)

1.05V power rail CPU (off in S3-S5)

0.6V DDR Termination voltage (off in S3-S5)

0.55V to 1.5V Voltage for Processor

0.55V to 1.52V Core Voltage for Processor

RUND

RUND

RUND

+VCC_IO

DDR_VTT_CTRL

VR_ON

VR_ON

VR_ON

H

H

HH

HH

H

H

HH

HH

HH

HH

L

L

L

L

L

L

L

L

4 4

Note: WHEN AC MODE, System turn on then +*VSUS will always keep high
S4( Suspend to Disk)

S3( Suspend to RAM)
S0( Full ON)

A

B

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Title

Title

Title

PLATFORM

PLATFORM

PLATFORM

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

MS-14B3

MS-14B3

MS-14B3

Date : Sheet

Date : Sheet

C

Date : Sheet

D

MICRO-STAR INT'L CO.,LTD.

of

257Friday, November 16, 2018

of

257Friday, November 16, 2018

of

257Friday, November 16, 2018

E

0A

0A

0A

A

戶服務

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B

C

D

E

Reference 16S1

CPU1A

AL5

HDMI1_TX2_DN<17>
HDMI1_TX2_DP<17>
HDMI1_TX1_DN<17>

4 4

HDMI
DDI1

3 3

+VCC_IO

R359 24.9R1%0402

DDI1_CTRL_CLK<17>

Port B

2 2

CPU2

CPU

X_WHL-U_i5-8265U

OAC-13G3001-I06

CPU4

1 1

DDI1_CTRL_DATA<17>

Remove DDI2 #2018.08.28

CPU3

CPU

X_WHL-U_i7-8565U

OAD-13G3001-I06

HDMI1_TX1_DP<17>
HDMI1_TX0_DN<17>
HDMI1_TX0_DP<17>
HDMI1_CLK_DN<17>
HDMI1_CLK_DP<17>

Remove DDI2 #2018.08.28

Pull up on level shift page

CPU5

X_WHL-U_i3-8145U

OAB-13M1001-I06

DISP_RCOMP

CPU

DDI1_TXN_0

AL6

DDI1_TXP_0

AJ5

DDI1_TXN_1

AJ6

DDI1_TXP_1

AF6

DDI1_TXN_2

AF5

DDI1_TXP_2

AE5

DDI1_TXN_3

AE6

DDI1_TXP_3

AC4

DDI2_TXN_0

AC3

DDI2_TXP_0

AC1

DDI2_TXN_1

AC2

DDI2_TXP_1

AE4

DDI2_TXN_2

AE3

DDI2_TXP_2

AE1

DDI2_TXN_3

AE2

DDI2_TXP_3

Port C

GPP_E13/DDPB_HPD0/DISP_MISC0
GPP_E14/DDPC_HPD1/DISP_MISC1
GPP_E15/DPPD_HPD2/DISP_MISC2

GPP_E16/DPPE_HPD3/DISP_MISC3

GPP_E17/EDP_HPD/DISP_MISC4

AM6

DISP_RCOMP

CC8

GPP_E18/DPPB_CTRLCLK/CNV_BT_HOST_WAKE#

CC9

GPP_E19/DPPB_CTRLDATA

CH4

GPP_E20/DPPC_CTRLCLK

CH3

GPP_E21/DPPC_CTRLDATA

CP4

GPP_E22/DPPD_CTRLCLK

CN4

GPP_E23/DPPD_CTRLDATA

CR26

GPP_H16/DDPF_CTRLCLK

CP26

GPP_H17/DDPF_CTRLDATA

WHL-i7-8565U

A0D-8565U05-I06

1 of 20

Port B
Port C

EDP_TXN_0
EDP_TXP_0
EDP_TXN_1
EDP_TXP_1
EDP_TXN_2
EDP_TXP_2
EDP_TXN_3
EDP_TXP_3

EDP_AUX

EDP_AUX_P

DISP_UTILS

DDI1_AUX

DDI1_AUX_P

DDI2_AUX

DDI2_AUX_P

DDI3_AUX

DDI3_AUX_P

EDP_BKLTEN

EDP_VDDEN

EDP_BKLTCTL

CPU
INTERPOSER

X_WHISKEY LAKE,CPU INTERPOSER

OS1-16S1001-I06

A

B

C

EDP_TX0_DN

AG4

EDP_TX0_DP

AG3

EDP_TX1_DN

AG2

EDP_TX1_DP

AG1
AJ4
AJ3
AJ2
AJ1

EDP_AUX_DN

AH4

EDP_AUX_DP

AH3

EDP_DISP_UTIL

AM7

AC7
AC6
AD4
AD3
AG7
AG6

CN6
CM6
CP7
CP6
CM7

CK11
CG11
CH11

R64

100KR0402

Remove DP_HDP Pull-Down #2018.08.28

CPU6

CPU

X_WHL-U_i7-8565U

A0D-8565U05-I06

EDP_TX0_DN <16>
EDP_TX0_DP <16>
EDP_TX1_DN <16>
EDP_TX1_DP <16>

EDP_AUX_DN <16>
EDP_AUX_DP <16>

TPJNC47

Remove DDI2 #2018.08.08

HDMI_HPD <17>

KBSMI# <18>
KBSCI# <18>

EDP_HPD <16>

EDP_BKLT_EN <18>

EDP_VDDEN <16>

EDP_BKLTCTL <16>

R74

R98

100KR0402

100KR0402

Title

Title

Title

Whiskey lake U(EDP,DDI)

Whiskey lake U(EDP,DDI)

Size

Size

Size

Date: Sheet

Date: Sheet

Date: Sheet

Whiskey lake U(EDP,DDI)

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

D

Port A

eDP
DDI0

Internal pull-down with 130k ohm

Remove DP_HDP #2018.08.28

KBSMI#/SCI#
Follow MS-N1131

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MS-14B3

MS-14B3

MS-14B3

0A

0A

0A

of

of

of

357Friday, November 16, 2018

357Friday, November 16, 2018

357Friday, November 16, 2018

E

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

B

C

D

E

SODIMM_A

CPU1B

M_A_DQ_0_[0:7]<6>

4 4

M_A_DQ_1_[0:7]<6>

M_A_DQ_2_[0:7]<6>

M_A_DQ_3_[0:7]<6>

3 3

M_A_DQ_4_[0:7]<6>

M_A_DQ_5_[0:7]<6>

M_A_DQ_6_[0:7]<6>

2 2

M_A_DQ_7_[0:7]<6>

1 1

A

M_A_DQ_0_0
M_A_DQ_0_1
M_A_DQ_0_2
M_A_DQ_0_3
M_A_DQ_0_4
M_A_DQ_0_5
M_A_DQ_0_6
M_A_DQ_0_7
M_A_DQ_1_0
M_A_DQ_1_1
M_A_DQ_1_2
M_A_DQ_1_3
M_A_DQ_1_4
M_A_DQ_1_5
M_A_DQ_1_6
M_A_DQ_1_7
M_A_DQ_2_0
M_A_DQ_2_1
M_A_DQ_2_2
M_A_DQ_2_3
M_A_DQ_2_4
M_A_DQ_2_5
M_A_DQ_2_6
M_A_DQ_2_7
M_A_DQ_3_0
M_A_DQ_3_1
M_A_DQ_3_2
M_A_DQ_3_3
M_A_DQ_3_4
M_A_DQ_3_5
M_A_DQ_3_6
M_A_DQ_3_7
M_A_DQ_4_0
M_A_DQ_4_1
M_A_DQ_4_2
M_A_DQ_4_3
M_A_DQ_4_4
M_A_DQ_4_5
M_A_DQ_4_6
M_A_DQ_4_7
M_A_DQ_5_0
M_A_DQ_5_1
M_A_DQ_5_2
M_A_DQ_5_3
M_A_DQ_5_4
M_A_DQ_5_5
M_A_DQ_5_6
M_A_DQ_5_7
M_A_DQ_6_0
M_A_DQ_6_1
M_A_DQ_6_2
M_A_DQ_6_3
M_A_DQ_6_4
M_A_DQ_6_5
M_A_DQ_6_6
M_A_DQ_6_7
M_A_DQ_7_0
M_A_DQ_7_1
M_A_DQ_7_2
M_A_DQ_7_3
M_A_DQ_7_4
M_A_DQ_7_5
M_A_DQ_7_6
M_A_DQ_7_7

DDR_VTT_CTRL<45>

A26

DDR0_DQ_0/DDR0_DQ_0

D26

DDR0_DQ_1/DDR0_DQ_1

D28

DDR0_DQ_2/DDR0_DQ_2

C28

DDR0_DQ_3/DDR0_DQ_3

B26

DDR0_DQ_4/DDR0_DQ_4

C26
B28
A28
B30
D30
B33
D32
A30
C30
B32
C32
H37
H34
K34
K35
H36
H35
K36
K37
N36
N34
R37
R34
N37
N35
R36

R35
AN35
AN34
AR35
AR34
AN37
AN36
AR36
AR37
AU35
AU34

AW35
AW34

AU37
AU36

AW36
AW37

BA35
BA34
BC35
BC34
BA37
BA36
BC36
BC37
BE35
BE34
BG35
BG34
BE37
BE36
BG36
BG37

+3VRUN

R196

220KR0402-1

DDR0_DQ_5/DDR0_DQ_5
DDR0_DQ_6/DDR0_DQ_6
DDR0_DQ_7/DDR0_DQ_7
DDR0_DQ_8/DDR0_DQ_8
DDR0_DQ_9/DDR0_DQ_9
DDR0_DQ_10/DDR0_DQ_10
DDR0_DQ_11/DDR0_DQ_11
DDR0_DQ_12/DDR0_DQ_12
DDR0_DQ_13/DDR0_DQ_13
DDR0_DQ_14/DDR0_DQ_14
DDR0_DQ_15/DDR0_DQ_15
DDR0_DQ_16/DDR0_DQ_32
DDR0_DQ_17/DDR0_DQ_33
DDR0_DQ_18/DDR0_DQ_34
DDR0_DQ_19/DDR0_DQ_35
DDR0_DQ_20/DDR0_DQ_36
DDR0_DQ_21/DDR0_DQ_37
DDR0_DQ_22/DDR0_DQ_38
DDR0_DQ_23/DDR0_DQ_39
DDR0_DQ_24/DDR0_DQ_40
DDR0_DQ_25/DDR0_DQ_41
DDR0_DQ_26/DDR0_DQ_42
DDR0_DQ_27/DDR0_DQ_43
DDR0_DQ_28/DDR0_DQ_44
DDR0_DQ_29/DDR0_DQ_45
DDR0_DQ_30/DDR0_DQ_46
DDR0_DQ_31/DDR0_DQ_47
DDR0_DQ_32/DDR1_DQ_0
DDR0_DQ_33/DDR1_DQ_1
DDR0_DQ_34/DDR1_DQ_2
DDR0_DQ_35/DDR1_DQ_3
DDR0_DQ_36/DDR1_DQ_4
DDR0_DQ_37/DDR1_DQ_5
DDR0_DQ_38/DDR1_DQ_6
DDR0_DQ_39/DDR1_DQ_7
DDR0_DQ_40/DDR1_DQ_8
DDR0_DQ_41/DDR1_DQ_9
DDR0_DQ_42/DDR1_DQ_10
DDR0_DQ_43/DDR1_DQ_11
DDR0_DQ_44/DDR1_DQ_12
DDR0_DQ_45/DDR1_DQ_13
DDR0_DQ_46/DDR1_DQ_14
DDR0_DQ_47/DDR1_DQ_15
DDR0_DQ_48/DDR1_DQ_32
DDR0_DQ_49/DDR1_DQ_33
DDR0_DQ_50/DDR1_DQ_34
DDR0_DQ_51/DDR1_DQ_35
DDR0_DQ_52/DDR1_DQ_36
DDR0_DQ_53/DDR1_DQ_37
DDR0_DQ_54/DDR1_DQ_38
DDR0_DQ_55/DDR1_DQ_39
DDR0_DQ_56/DDR1_DQ_40
DDR0_DQ_57/DDR1_DQ_41
DDR0_DQ_58/DDR1_DQ_42
DDR0_DQ_59/DDR1_DQ_43
DDR0_DQ_60/DDR1_DQ_44
DDR0_DQ_61/DDR1_DQ_45
DDR0_DQ_62/DDR1_DQ_46
DDR0_DQ_63/DDR1_DQ_47

WHL-i7-8565U

A0D-8565U05-I06

+1_2VDIMM

B

2 of 20

C147

C0.1u25X50402

5

VCC

4

Y

DDR0_CKN_0/DDR0_CKN_0
DDR0_CKP_0/DDR0_CKP_0

DDR0_CKN_1/DDR0_CKN_1

DDR0_CKP_1/DDR0_CKP_1

DDR0_CKE_0/DDR0_CKE_0
DDR0_CKE_1/DDR0_CKE_1

DDR0_CKE_2/NC
DDR0_CKE_3/NC

DDR0_CS#_0/DDR0_CS#_0
DDR0_CS#_1/DDR0_CS#_1

DDR0_ODT_0/DDR0_ODT_0

NC/DDR0_ODT_1

DDR0_CAB_9/DDR0_MA_0
DDR0_CAB_8/DDR0_MA_1
DDR0_CAB_5/DDR0_MA_2

NC/DDR0_MA_3

NC/DDR0_MA_4
DDR0_CAA_0/DDR0_MA_5
DDR0_CAA_2/DDR0_MA_6
DDR0_CAA_4/DDR0_MA_7
DDR0_CAA_3/DDR0_MA_8
DDR0_CAA_1/DDR0_MA_9

DDR0_CAB_7/DDR0_MA_10
DDR0_CAA_7/DDR0_MA_11
DDR0_CAA_6/DDR0_MA_12
DDR0_CAB_0/DDR0_MA_13

DDR0_CAB_2/DDR0_MA_14
DDR0_CAB_1/DDR0_MA_15
DDR0_CAB_3/DDR0_MA_16

DDR0_CAB_4/DDR0_BA_0
DDR0_CAB_6/DDR0_BA_1
DDR0_CAA_5/DDR0_BG_0

DDR0_CAA_8/DDR0_ACT#
DDR0_CAA_9/DDR0_BG_1

DDR0_DQSN_0/DDR0_DQSN_0
DDR0_DQSP_0/DDR0_DQSP_0
DDR0_DQSN_1/DDR0_DQSN_1
DDR0_DQSP_1/DDR0_DQSP_1
DDR0_DQSN_2/DDR0_DQSN_4
DDR0_DQSP_2/DDR0_DQSP_4
DDR0_DQSN_3/DDR0_DQSN_5
DDR0_DQSP_3/DDR0_DQSP_5
DDR0_DQSN_4/DDR1_DQSN_0
DDR0_DQSP_4/DDR1_DQSP_0
DDR0_DQSN_5/DDR1_DQSN_1
DDR0_DQSP_5/DDR1_DQSP_1
DDR0_DQSN_6/DDR1_DQSN_4
DDR0_DQSP_6/DDR1_DQSP_4
DDR0_DQSN_7/DDR1_DQSN_5
DDR0_DQSP_7/DDR1_DQSP_5

NC/DDR0_ALERT#

DDR_VREF_CA
DDR0_VREF_DQ_0
DDR0_VREF_DQ_1

DDR1_VREF_DQ

U14

1

GND

NC

2

A

3

DDR_PG_CTRL

SN74AUP1G07DCKR_SC70-5-RH

NC/DDR0_PAR

DDR_VTT_CTL

V32
V31
T32
T31

U36
U37
U34
U35

AE32
AF32
AE31
AF31

AC37
AC36
AC34
AC35
AA35
AB35
AA37
AA36
AB34
W36
Y31
W34
AA34
AC32

AC31
AB32
Y32

W32
AB31
V34

V35
W35

C27
D27
D31
C31
J35
J34
P34
P35
AP35
AP34
AV34
AV35
BB35
BB34
BF34
BF35

W37
W31

F36
D35
D37
E36
C35

C

M_A_CLK_DDRN0 <6>
M_A_CLK_DDRP0 <6>
M_A_CLK_DDRN1 <6>
M_A_CLK_DDRP1 <6>

M_A_CKE0 <6>
M_A_CKE1 <6>

TPJNC59
TPJNC60

M_A_CSN0 <6>
M_A_CSN1 <6>
M_A_ODT0 <6>
M_A_ODT1 <6>

M_A_A0 <6>
M_A_A1 <6>
M_A_A2 <6>
M_A_A3 <6>
M_A_A4 <6>
M_A_A5 <6>
M_A_A6 <6>
M_A_A7 <6>
M_A_A8 <6>
M_A_A9 <6>
M_A_A10 <6>
M_A_A11 <6>
M_A_A12 <6>
M_A_A13 <6>

M_A_A14_WEN <6>
M_A_A15_CASN <6>
M_A_A16_RASN <6>

M_A_BA0 <6>
M_A_BA1 <6>
M_A_BG0 <6>

M_A_ACTN <6>
M_A_BG1 <6>

M_A_DQS_DN0 <6>
M_A_DQS_DP0 <6>
M_A_DQS_DN1 <6>
M_A_DQS_DP1 <6>
M_A_DQS_DN2 <6>
M_A_DQS_DP2 <6>
M_A_DQS_DN3 <6>
M_A_DQS_DP3 <6>
M_A_DQS_DN4 <6>
M_A_DQS_DP4 <6>
M_A_DQS_DN5 <6>
M_A_DQS_DP5 <6>
M_A_DQS_DN6 <6>
M_A_DQS_DP6 <6>
M_A_DQS_DN7 <6>
M_A_DQS_DP7 <6>

DDR0_A_ALERTN <6>
DDR0_A_PARITY <6>

+VREF_DDR_CA <6>

CLK enable

CTRL

CLK

CMD

Strobe

Alert
CMD

Remove DDR1_VREF_DQ #2018.08.28
14B3 only supprot DDR0

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Title

Title

Title

Whiskey lake (DDR4)CHA

Whiskey lake (DDR4)CHA

Whiskey lake (DDR4)CHA

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date : Sheet

Date : Sheet

Date : Sheet

D

MS-14B3

MS-14B3

MS-14B3

MICRO-STAR INT'L CO.,LTD.

457Friday, November 16, 2018

457Friday, November 16, 2018

457Friday, November 16, 2018

E

0A

0A

0A

of

of

of

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

B

C

D

E

SODIMM_B

CPU1C

J22

DDR1_DQ_0/DDR0_DQ_16

H25

4 4

3 3

2 2

1 1

A

DDR1_DQ_1/DDR0_DQ_17

G22

DDR1_DQ_2/DDR0_DQ_18

H22

DDR1_DQ_3/DDR0_DQ_19

F25

J25
G25
F22
D22
C22
C24
D24
A22
B22
A24
B24
G31
G32
H29
H28
G28
G29
H31
H32

L31

L32
N29
N28

L28

L29
N31
N32

AJ29

AJ30
AM32
AM31
AM30
AM29

AJ31

AJ32

AR31
AR32
AV30
AV29
AR30
AR29
AV32
AV31
BA32
BA31
BD31
BD32
BA30
BA29
BD29
BD30
BG31
BG32
BK32
BK31
BG29
BG30
BK30
BK29

DDR1_DQ_4/DDR0_DQ_20
DDR1_DQ_5/DDR0_DQ_21
DDR1_DQ_6/DDR0_DQ_22
DDR1_DQ_7/DDR0_DQ_23
DDR1_DQ_8/DDR0_DQ_24
DDR1_DQ_9/DDR0_DQ_25
DDR1_DQ_10/DDR0_DQ_26
DDR1_DQ_11/DDR0_DQ_27
DDR1_DQ_12/DDR0_DQ_28
DDR1_DQ_13/DDR0_DQ_29
DDR1_DQ_14/DDR0_DQ_30
DDR1_DQ_15/DDR0_DQ_31
DDR1_DQ_16/DDR0_DQ_48
DDR1_DQ_17/DDR0_DQ_49
DDR1_DQ_18/DDR0_DQ_50
DDR1_DQ_19/DDR0_DQ_51
DDR1_DQ_20/DDR0_DQ_52
DDR1_DQ_21/DDR0_DQ_53
DDR1_DQ_22/DDR0_DQ_54
DDR1_DQ_23/DDR0_DQ_55
DDR1_DQ_24/DDR0_DQ_56
DDR1_DQ_25/DDR0_DQ_57
DDR1_DQ_26/DDR0_DQ_58
DDR1_DQ_27/DDR0_DQ_59
DDR1_DQ_28/DDR0_DQ_60
DDR1_DQ_29/DDR0_DQ_61
DDR1_DQ_30/DDR0_DQ_62
DDR1_DQ_31/DDR0_DQ_63
DDR1_DQ_32/DDR1_DQ_16
DDR1_DQ_33/DDR1_DQ_17
DDR1_DQ_34/DDR1_DQ_18
DDR1_DQ_35/DDR1_DQ_19
DDR1_DQ_36/DDR1_DQ_20
DDR1_DQ_37/DDR1_DQ_21
DDR1_DQ_38/DDR1_DQ_22
DDR1_DQ_39/DDR1_DQ_23
DDR1_DQ_40/DDR1_DQ_24
DDR1_DQ_41/DDR1_DQ_25
DDR1_DQ_42/DDR1_DQ_26
DDR1_DQ_43/DDR1_DQ_27
DDR1_DQ_44/DDR1_DQ_28
DDR1_DQ_45/DDR1_DQ_29
DDR1_DQ_46/DDR1_DQ_30
DDR1_DQ_47/DDR1_DQ_31
DDR1_DQ_48/DDR1_DQ_48
DDR1_DQ_49/DDR1_DQ_49
DDR1_DQ_50/DDR1_DQ_50
DDR1_DQ_51/DDR1_DQ_51
DDR1_DQ_52/DDR1_DQ_52
DDR1_DQ_53/DDR1_DQ_53
DDR1_DQ_54/DDR1_DQ_54
DDR1_DQ_55/DDR1_DQ_55
DDR1_DQ_56/DDR1_DQ_56
DDR1_DQ_57/DDR1_DQ_57
DDR1_DQ_58/DDR1_DQ_58
DDR1_DQ_59/DDR1_DQ_59
DDR1_DQ_60/DDR1_DQ_60
DDR1_DQ_61/DDR1_DQ_61
DDR1_DQ_62/DDR1_DQ_62
DDR1_DQ_63/DDR1_DQ_63

WHL-i7-8565U

A0D-8565U05-I06

3 of 20

B

DDR1_CKN_0/DDR1_CKN_0
DDR1_CKP_0/DDR1_CKP_0
DDR1_CKN_1/DDR1_CKN_1
DDR1_CKP_1/DDR1_CKP_1

DDR1_CKE_0/DDR1_CKE_0
DDR1_CKE_1/DDR1_CKE_1

DDR1_CKE_2/NC
DDR1_CKE_3/NC

DDR1_CS#_0/DDR1_CS#_0
DDR1_CS#_1/DDR1_CS#_1

DDR1_ODT_0/DDR1_ODT_0

NC/DDR1_ODT_1

DDR1_CAB_9/DDR1_MA_0
DDR1_CAB_8/DDR1_MA_1
DDR1_CAB_5/DDR1_MA_2

NC/DDR1_MA_3

NC/DDR1_MA_4
DDR1_CAA_0/DDR1_MA_5
DDR1_CAA_2/DDR1_MA_6
DDR1_CAA_4/DDR1_MA_7
DDR1_CAA_3/DDR1_MA_8
DDR1_CAA_1/DDR1_MA_9

DDR1_CAB_7/DDR1_MA_10
DDR1_CAA_7/DDR1_MA_11
DDR1_CAA_6/DDR1_MA_12
DDR1_CAB_0/DDR1_MA_13

DDR1_CAB_2/DDR1_MA_14
DDR1_CAB_1/DDR1_MA_15
DDR1_CAB_3/DDR1_MA_16

DDR1_CAB_4/DDR1_BA_0
DDR1_CAB_6/DDR1_BA_1
DDR1_CAA_5/DDR1_BG_0

DDR1_CAA_9/DDR1_BG_1
DDR1_CAA_8/DDR1_ACT#

DDR1_DQSN_0/DDR0_DQSN_2
DDR1_DQSP_0/DDR0_DQSP_2
DDR1_DQSN_1/DDR0_DQSN_3
DDR1_DQSP_1/DDR0_DQSP_3
DDR1_DQSN_2/DDR0_DQSN_6
DDR1_DQSP_2/DDR0_DQSP_6
DDR1_DQSN_3/DDR0_DQSN_7
DDR1_DQSP_3/DDR0_DQSP_7
DDR1_DQSN_4/DDR1_DQSN_2
DDR1_DQSP_4/DDR1_DQSP_2
DDR1_DQSN_5/DDR1_DQSN_3
DDR1_DQSP_5/DDR1_DQSP_3
DDR1_DQSN_6/DDR1_DQSN_6
DDR1_DQSP_6/DDR1_DQSP_6
DDR1_DQSN_7/DDR1_DQSN_7
DDR1_DQSP_7/DDR1_DQSP_7

NC/DDR1_ALERT#

NC/DDR1_PAR

DRAM_RESET#

DDR_RCOMP_0

DDR_RCOMP_1

DDR_RCOMP_2

AF28
AF29
AE28
AE29

T28
T29
V28
V29

AL37
AL35
AL36
AL34

AG36
AG35
AF34
AG37
AE35
AF35
AE37
AC29
AE36
AB29
AG34
AC28
AB28
AK35

AJ35
AK34
AJ34

AJ37
AJ36
W29

Y28
W28

H24
G24
C23
D23
G30
H30
L30
N30
AL31
AL30
AU31
AU30
BC31
BC30
BH31
BH30

Y29
AE34
BU31

BN28
BN27
BN29

DDR_RCOMP_0
DDR_RCOMP_1
DDR_RCOMP_2

C

Remove DDR1 #2018.08.28
14B3 only supprot DIMMA

+1_2VDIMM

R207
470R1%0402

DDR4_DRAMRST#

R417 121R1%0402
R407 80.6R1%0402
R428 100R1%0402

Width 15 mils, Spacing 20, < 500 mils

D

R208 0R1%0402

Title

Title

Title

Whiskey lake (DDR4)CHB

Whiskey lake (DDR4)CHB

Whiskey lake (DDR4)CHB

Size

Size

Size

Document Number R e v

Document Number R e v

Document Number R e v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MS-14B3

MS-14B3

MS-14B3

DDR4_DRAMRST#_R <6>

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

557Friday, November 16, 2018

557Friday, November 16, 2018

557Friday, November 16, 2018

E

0A

0A

0A

of

of

of

SODIMM_A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

5

DDR4 SODIMM Interleave (IL)

4

Follow 14B1 to change location for placement #2018.08.22

3

2

1

VDDQ

M_A_DQ_0_[0:7]<4>

D D

M_A_DQ_1_[0:7]<4>

M_A_DQ_2_[0:7]<4>

M_A_DQ_3_[0:7]<4>

M_A_DQ_4_[0:7]<4>

C C

M_A_DQ_5_[0:7]<4>

M_A_DQ_6_[0:7]<4>

M_A_DQ_7_[0:7]<4>

B B

A A

M_A_DQ_0_4
M_A_DQ_0_2
M_A_DQ_0_3
M_A_DQ_0_1
M_A_DQ_0_0
M_A_DQ_0_5
M_A_DQ_0_6
M_A_DQ_0_7
M_A_DQ_1_5
M_A_DQ_1_2
M_A_DQ_1_1
M_A_DQ_1_7
M_A_DQ_1_4
M_A_DQ_1_0
M_A_DQ_1_3
M_A_DQ_1_6
M_A_DQ_2_5
M_A_DQ_2_4
M_A_DQ_2_6
M_A_DQ_2_3
M_A_DQ_2_0
M_A_DQ_2_1
M_A_DQ_2_2
M_A_DQ_2_7
M_A_DQ_3_4
M_A_DQ_3_5
M_A_DQ_3_6
M_A_DQ_3_7
M_A_DQ_3_1
M_A_DQ_3_0
M_A_DQ_3_2
M_A_DQ_3_3
M_A_DQ_4_5
M_A_DQ_4_1
M_A_DQ_4_3
M_A_DQ_4_2
M_A_DQ_4_0
M_A_DQ_4_4
M_A_DQ_4_6
M_A_DQ_4_7
M_A_DQ_5_1
M_A_DQ_5_0
M_A_DQ_5_6
M_A_DQ_5_7
M_A_DQ_5_3
M_A_DQ_5_5
M_A_DQ_5_2
M_A_DQ_5_4
M_A_DQ_6_0
M_A_DQ_6_1
M_A_DQ_6_6
M_A_DQ_6_3
M_A_DQ_6_5
M_A_DQ_6_4
M_A_DQ_6_2
M_A_DQ_6_7
M_A_DQ_7_7
M_A_DQ_7_5
M_A_DQ_7_4
M_A_DQ_7_3
M_A_DQ_7_1
M_A_DQ_7_6
M_A_DQ_7_2
M_A_DQ_7_0

M_A_BG0<4>
M_A_BG1<4>

Width 20 mils, Spacing 20

+VREF_DDR_CA<4>

5

SOCKET1A

8

DQ0

7

DQ1

20

DQ2

21

DQ3

4

DQ4

3

DQ5

16

DQ6

17

DQ7

28

DQ8

29

DQ9

41

DQ10

42

DQ11

24

DQ12

25

DQ13

38

DQ14

37

DQ15

50

DQ16

49

DQ17

62

DQ18

63

DQ19

46

DQ20

45

DQ21

58

DQ22

59

DQ23

70

DQ24

71

DQ25

83

DQ26

84

DQ27

66

DQ28

67

DQ29

79

DQ30

80

DQ31

174

DQ32

173

DQ33

187

DQ34

186

DQ35

170

DQ36

169

DQ37

183

DQ38

182

DQ39

195

DQ40

194

DQ41

207

DQ42

208

DQ43

191

DQ44

190

DQ45

203

DQ46

204

DQ47

216

DQ48

215

DQ49

228

DQ50

229

DQ51

211

DQ52

212

DQ53

224

DQ54

225

DQ55

237

DQ56

236

DQ57

249

DQ58

250

DQ59

232

DQ60

233

DQ61

245

DQ62

246

DQ63

115

BG0

113

BG1

DDR4SODIMM-260PS_BLACK-HF-20

N13-2600220-L41

DDR4_SODIMM260P_H4_5

C140

C0.022u25X0402

R170

24.9R1%0402

GND

144

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9

A10/AP

A11
A12
A13

A14/WE#
A15/CAS#
A16/RAS#

BA0

BA1
CS0#
CS1#

CK0
CK0#

CK1
CK1#

CKE0
CKE1

SCL

SDA

ODT0
ODT1

DM0#/DBIO#

DM1#/DBI1#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#

DBI8#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

DQS8
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS8#

SA0
SA1

RFU

M_A_A0 <4>

133

M_A_A1 <4>

132

M_A_A2 <4>

131

M_A_A3 <4>

128

M_A_A4 <4>

126

M_A_A5 <4>

127

M_A_A6 <4>

122

M_A_A7 <4>

125

M_A_A8 <4>

121

M_A_A9 <4>

146

M_A_A10 <4>

120

M_A_A11 <4>

119

M_A_A12 <4>

158

M_A_A13 <4>

151

M_A_A14_WEN <4>

156

M_A_A15_CASN <4>

152

M_A_A16_RASN <4>

150

M_A_BA0 <4>

145

M_A_BA1 <4>

149

M_A_CSN0 <4>

157

M_A_CSN1 <4>

137

M_A_CLK_DDRP0 <4>

139
138
140
109
110
253
254
155
161

12
33
54
75
178
199
220
241
96

13
34
55
76
179
200
221
242
97
11
32
53
74
177
198
219
240
95

256
260

166

SA0_DIMA0_0_0
SA1_DIMA0_0_0

SA2_DIMA0_0_0

M_A_CLK_DDRN0 <4>
M_A_CLK_DDRP1 <4>
M_A_CLK_DDRN1 <4>
M_A_CKE0 <4>
M_A_CKE1 <4>
SMBCLK_DIMM_Q <7,29>

SMBDATA_DIMM_Q <7,29>
M_A_ODT0 <4>
M_A_ODT1 <4>

+1_2VDIMM

M_A_DQS_DP0 <4>
M_A_DQS_DP1 <4>
M_A_DQS_DP2 <4>
M_A_DQS_DP3 <4>
M_A_DQS_DP4 <4>
M_A_DQS_DP5 <4>
M_A_DQS_DP6 <4>
M_A_DQS_DP7 <4>

M_A_DQS_DN0 <4>
M_A_DQS_DN1 <4>
M_A_DQS_DN2 <4>
M_A_DQS_DN3 <4>
M_A_DQS_DN4 <4>
M_A_DQS_DN5 <4>
M_A_DQS_DN6 <4>
M_A_DQS_DN7 <4>

1 2

TPJNC64 X_0402

1 2

TPJNC63 X_0402

1 2

TPJNC65 X_0402

GND

M_A_DQS_DP8

M_A_DQS_DN8

+2_5VMEM_VPP

Width 20 mils, Spacing 20

Close SODIMM

+0_6VTT_RUN

+1_2VDIMM

R494
240R1%0402

+1_2VDIMM

R493
240R1%0402

GND
GND

GND

2A

1A

+VREF_DDR_CA_R

C647X_C10u10X5-HF
C643C1u25X50402-HF

750mA

A0 ( 0 0 0 )

+1_2VDIMM

R177

GND

1KR1%0402

R182
1KR1%0402

4

R176 2R1%0402

X_C0.1u25X50402-HF

+VREF_DDR_CA_R

C143

GND

SOCKET1B

111

VDD-1

112

VDD-2

117

VDD-3

118

VDD-4

123

VDD-5

124

VDD-6

129

VDD-7

130

VDD-8

135

VDD-9

136

VDD-10

141

VDD-11

142

VDD-12

147

VDD-13

148

VDD-14

153

VDD-15

154
159
160
163

257
259

164

258

167
168
171
172
175
176
180
181
184
185
188
189
192
193
196
197
201
202
205
206
209
210
213
214
217
218
222
223
226
227
230
231
234
235
238
239
243
244
247
248
251
252

261
262

GND GND

C1/CS3#/NC10
VDD-16
VDD-17
VDD-18
VDD-19

VPP-1
VPP-2

VREF_CA

VTT

VSS-53
VSS-54
VSS-55
VSS-56
VSS-57
VSS-58
VSS-59
VSS-60
VSS-61
VSS-62
VSS-63
VSS-64
VSS-65
VSS-66
VSS-67
VSS-68
VSS-69
VSS-70
VSS-71
VSS-72
VSS-73
VSS-74
VSS-75
VSS-76
VSS-77
VSS-78
VSS-79
VSS-80
VSS-81
VSS-82
VSS-83
VSS-84
VSS-85
VSS-86
VSS-87
VSS-88
VSS-89
VSS-90
VSS-91
VSS-92
VSS-93
VSS-94

261
262

MEC1

MEC2

MEC1

MEC2

DDR4SODIMM-260PS_BLACK-HF-20

N13-2600220-L41

DDR4_SODIMM260P_H4_5

3

VDDSPD

CB0/NC4
CB1/NC3
CB2/NC6
CB3/NC8
CB4/NC2
CB5/NC1
CB6/NC5
CB7/NC7

C0/CS2#/NC9

RESET#

ACT#
ALERT#
EVENT#

Parity

VSS-1
VSS-2
VSS-3
VSS-4
VSS-5
VSS-6
VSS-7
VSS-8

VSS-9
VSS-10
VSS-11
VSS-12
VSS-13
VSS-14
VSS-15
VSS-16
VSS-17
VSS-18
VSS-19
VSS-20
VSS-21
VSS-22
VSS-23
VSS-24
VSS-25
VSS-26
VSS-27
VSS-28
VSS-29
VSS-30
VSS-31
VSS-32
VSS-33
VSS-34
VSS-35
VSS-36
VSS-37
VSS-38
VSS-39
VSS-40
VSS-41
VSS-42
VSS-43
VSS-44
VSS-45
VSS-46
VSS-47
VSS-48
VSS-49
VSS-50
VSS-51
VSS-52

255

92
91
101
105

DIMM ECC check bits

88
87
100
104

162
165

108

114
116
134

Delete. 20170920

143

1
2
5
6
9
10
14
15
18
19
22
23
26
27
30
31
35
36
39
40
43
44
47
48
51
52
56
57
60
61
64
65
68
69
72
73
77
78
81
82
85
86
89
90
93
94
98
99
102
103
106
107

Close to VDD pin

+3VRUN+1_2VDIMM

< 200 mils

C639 X_C0.1u25X50402-HF

DDR4_DRAMRST#_R <5>

M_A_ACTN <4>

DDR0_A_ALERTN <4>

DDR0_A_PARITY <4>

GND

VTT

+0_6VTT_RUN

VDDSPD

+1_2VDIMM

C615 C1u25X50402-HF
C609 C1u25X50402-HF
C605 C1u25X50402-HF
C600 C1u25X50402-HF
C616 C1u25X50402-HF
C613 C1u25X50402-HF
C607 C1u25X50402-HF
C633 C1u25X50402-HF
C638 C1u25X50402-HF
C637 C1u25X50402-HF
C606 C1u25X50402-HF
C640 C1u25X50402-HF
C626 C1u25X50402-HF
C614 C1u25X50402-HF
C630 C1u25X50402-HF
C612 C1u25X50402-HF

C617 C10u10X5-HF
C629 C10u10X5-HF
C598 C10u10X5-HF
C628 C10u10X5-HF
C634 C10u10X5-HF
C621 C10u10X5-HF
C608 C10u10X5-HF
C641 C10u10X5-HF
C636 C10u10X5-HF
C620 C10u10X5-HF
C625 C10u10X5-HF
C627 C10u10X5-HF
C632 C10u10X5-HF
C601 C10u10X5-HF
C597 C10u10X5-HF
C599 C10u10X5-HF

+

1 2

C284 C330u2SO-HF-3

VPP

+2_5VMEM_VPP

C610 C1u25X50402-HF
C618 C1u25X50402-HF

C611 C10u10X5-HF
C619 C10u10X5-HF

GND

C271 C1u25X50402-HF
C272 C1u25X50402-HF
C270 C1u25X50402-HF
C273 C1u25X50402-HF

C278 C10u25X50805-HF C11-1067614-W08
C277 C10u25X50805-HF C11-1067614-W08

+3VRUN

C596 C0.1u25X50402-HF
C602 C2.2u10X5-HF

2

Place VTT plane to close SODIMM

Placehoder Place VTT plane to close SODIMM

GND

Place close to DRAM

GND

1 placehoder

GND

DRAM Side

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Title

Title

Title

DDR4_SODIMM_A

DDR4_SODIMM_A

DDR4_SODIMM_A

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

MS-14B3

MS-14B3

MS-14B3

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-STAR INT'L CO.,LTD.

1

0A

0A

0A

of

657Friday, November 16, 2018

of

657Friday, November 16, 2018

of

657Friday, November 16, 2018

+3VRUN

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

R431 10KR1%0402
R125 10KR1%0402
R416 10KR1%0402

Remove CLKOUT #2018.08.28

1 1

Add CLK for WLAN #2018.08.28

WLAN

CLKOUT_PCIEN_WLAN<20>
CLKOUT_PCIEP_WLAN<20>

PCIE_CLK_WLAN_REQ#<20>

GPU

COMBO SSD

CLKOUT_PCIEN_SSD<19>
CLKOUT_PCIEP_SSD<19>
PCIE_CLK_SSD_REQ#<19>

SUS

2 2

SMBCLK_DIMM

SMBDATA_DIMM

A

PCIE_CLK_SSD_REQ#
GPU_CLKREQ#

PCIE_CLK_WLAN_REQ#

Add WLAN REQ# for WLAN #2018.08.28

PCIE_CLK_WLAN_REQ#

GFX_REFCLK#<33>
GFX_REFCLK<33>

GPU_CLKREQ#<33>

Vgs(th) = 0.5, 1.2, 1.5V
ID = 0.2A

GPU_CLKREQ#

PCIE_CLK_SSD_REQ#

Q16

NN-BSS138DW-7-F_SOT363-6-RH

D03-138DW19-D07

SOT_363

S1

D1

G1
S2
G2

D2

AW2

CLKOUT_PCIE_N0

AY3

CLKOUT_PCIE_P0

CF32

GPP_B5/SRCCLKREQ0#

BC1

CLKOUT_PCIE_N1

BC2

CLKOUT_PCIE_P1

CE32

GPP_B6/SRCCLKREQ1#

BD3

CLKOUT_PCIE_N2

BC3

CLKOUT_PCIE_P2

CF30

GPP_B7/SRCCLKREQ2#

BH3

CLKOUT_PCIE_N3

BH4

CLKOUT_PCIE_P3

CE31

GPP_B8/SRCCLKREQ3#

BA1

CLKOUT_PCIE_N4

BA2

CLKOUT_PCIE_P_4

CE30

GPP_B9/SRCCLKREQ4#

BE1

CLKOUT_PCIE_N5

BE2

CLKOUT_PCIE_P5

CF31

GPP_B10/SRCCLKREQ5#

SMBCLK_DIMM_Q

SMBDATA_DIMM_Q

C114 C0.1u25X50402-HF

+3VRUN

100Mhz

CPU1J

WHL-i7-8565U

A0D-8565U05-I06

10 of 20

RUN

SMBCLK_DIMM_Q <6,29>

SMBDATA_DIMM_Q <6,29>

GND

+3VSUS+3VSUS+3VSUS +3VSUS+3VSUS

R157
100KR0402

0B. Remove BIOS ROM socket & place BIOS ROM M31-2512893-W03 #2018.11.09

3 3

EC11

X_C10p50N0402

Add CS Pin PU

R139
10KR0402

SPI_CS0#
SPI_MISO SPI_HOLD#_B

SPI_CLK
SPI_MISO
SPI_MOSI
SPI_WP#
SPI_HOLD#_B

1
2
3
4

SPI resistance form 15ohm change to 49.9ohm

R149 49.9R1%0402
R171 49.9R1%0402
R174 49.9R1%0402
R156 49.9R1%0402
R153 49.9R1%0402

+3VRUN

R479

10KR0402

4 4

SERIRQ<18,23>

C118 C0.1u25X50402

U12

CS
DO(IO1)
WP(IO2)
GND

W25Q128JVSIQ-HF

M31-2512893-W03

ROM from 8M change to 16MB

SPI_MISO<18>

VCC

HOLD(IO3)

CLK

DI(IO0)

SPI_CLK_R
SPI_MISO_R
SPI_MOSI_R
SPI_WP#_R
SPI_HOLD#_B_R
SPI_CS0#

SPI_CLK<18>
SPI_CS0#<18>

SPI_MOSI<18>

SPI_CLK
SPI_CS0#
SPI_MISO
SPI_MOSI

KBRST#<18>

R154

8
7

SPI_CLKSPI_WP#

6

SPI_MOSI

5

100KR0402

SPI_CLK_R

For glitch free implementation requirements

CPU1E

CH37

SPI0_CLK

CF37

SPI0_MISO

CF36

SPI0_MOSI

CF34

SPI0_IO2

CG34

SPI0_IO3

CG36

SPI0_CS0#

CG35

SPI0_CS1#

CH34

SPI0_CS2#

CF20

GPP_D1/SPI1_CLK/BK1/SBK1

CG22

GPP_D2/SPI1_MISO_IO1/BK2/SBK2

CF22

GPP_D3/SPI1_MOSI_IO0/BK3/SBK3

CG23

GPP_D21/SPI1_IO2

CH23

GPP_D22/SPI1_IO3

CG20

GPP_D0/SPI1_CS0#/BK0/SBK0

CH7

CL_CLK

CH8

CL_DATA

CH9

CL_RST#

BV29

GPP_A0/RCIN#/TIME_SYNC1

BV28

GPP_A6/SERIRQ

WHL-i7-8565U

A0D-8565U05-I06

B

Debug port

CLKOUT_ITP#

XTAL_IN

XTAL_OUT

RTCX1
RTCX2

SRTCRST#

RTCRST#

5 of 20

AU1

CLKOUT_ITP

AU2

Add SUSCLK_WLAN to M.2 WLAN #2018.08.28

BT32

SUSCLK

XTAL24_IN

CK3

XTAL24_OUT

CK2

XCLK_BIASREF

CJ1

CLKIN_LCP

CM3

RTC_X1

BN31

RTC_X2

BN32

SRTC_RST_N

BR37

RTC_RST_N

BR34

C567

+3VALW

R248

1.5KR0402

R243

X_45.3KR1%0402

GND

GPP_B23/SML1ALERT#/PCHHOT#

GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3

GPP_A5/LFRAME#/ESPI_CS#

GPP_A14/SUS_STAT#/ESPI_RESET#

GPP_A9/CLKOUT_LPC0/ESPI_CLK

GPP_A10/CLKOUT_LPC1

CLKOUT_ITPXDP

CLKOUT_ITPXDP_P

GPD8/SUSCLK

XCLK_BIASREF

CLKIN_XTAL

Strap Pin requireStrap Pin require

R175
100KR0402

R145 100KR0402

TPJNC8
TPJNC4

SUSCLK_WLAN <20>

R48 60.4R1%0402

CLKIN_LCP <20>

C581

C1u25X50402-HF

C1u25X50402-HF

+3VALW_R

S-BAT54C_SOT23

1KR1%0402

Remove SMBCLK_DIMM & SMBDATA_DIMM off-page #2018.08.28

GPP_C0/SMBCLK

GPP_C1/SMBDATA

GPP_C2/SMBALERT#

GPP_C3/SML0CLK

GPP_C4/SML0DATA

GPP_C5/SML0ALERT#

GPP_C6/SML1CLK

GPP_C7/SML1DATA

GPP_A8/CLKRUN#

EC_CLKRUN#

Add 0 ohm
Close to PCH

R51 0R0402
R55 0R0402

XCLK_BIASREF change form PU to 60.4 ohm PD

Add CNVi function

R46720KR1%0402
R45120KR1%0402

0B. Change C580 & C584 from 4.7pF to 3.9pF(C11-39A1822-W08) by Vender matching report #2018.11.12

Follow 16S1 0B add discharge circuit on
SRTC_RST & RTC_RST #2018.09.13

R512 & R246 place on CPU side and close ball out

SRTC_RST_N
RTC_RST_N

Y

+RTC_D

Z

D5

R247

GND

X

CK14
CH15
CJ15

CH14
CF15
CG15

CN15
CM15
CC34

CA29
BY29
BY27
BV27
CA28
CA27

BV32
BV30
BY30

S-BAS40WS_SOD323-RH

D01-BAS4000-P15

DIODE_SOD323

+RTC_R

+RTC

1
2

6 5

CON7
BH1X2#S-1.25PITCH_BLACK-HF

N32-10200Q0-A81

SD_53261_0210_2P

SMBCLK_DIMM
SMBDATA_DIMM
SMBALERT#

SML0_CLK
SML0_DATA
SML0ALERT#

SMB_CLK_R
SMB_DATA_R
SML1ALERT#

Follow PDG resistor can be up to 22 ohm

LPC_AD0_R
LPC_AD1_R
LPC_AD2_R
LPC_AD3_R
LPC_FRAME#_R
SUS_STAT#

CLKOUT_PCI0
CLKOUT_BLF

EC_CLKRUN# <18>

R190 8.2KR0402

C

Resistor form 1M ohm to 200K ohm

XTAL24_IN_R

R52
200KR1%0402

XTAL24_OUT_R

RTCVCC

Follow PDG change BIAS R from 10M 5% to 10M 1% #2018.08.23

D4

R463

10MR1%0402

2018.05.30 Update Crystal 24M component (<30 ohm)

R512 0R0402
R246 0R0402
R253 X_0R0402

NOT used

SML0ALERT# (eSPI/LPC):This
signal has a weak internal
pull-down.

0 = LPC is selected for EC (Default) ;
1 = eSPI is selected for EC

R472 22R0402
R475 22R0402
R457 22R0402
R480 22R0402
R460 22R0402

R185 22R1%0402
R465 22R1%0402

+3VRUN

C60

C12p50N0402

34

Y1
24MHZ12p_S-HF-8

D04-3904000-SC6

1 2

C62

C12p50N0402

12

Y3

32.768KHZ7p_S-HF-2

D04-0307000-C11

OSC_3_2X1_5_1

Vgs(th) = 0.5, 1.2, 1.5V
ID = 0.2A

Q30
NN-BSS138DW-7-F_SOT363-6-RH

D03-138DW19-D07

SOT_363

D1

D2

RTCVCC

BAT1
BCR1220H2

D06-0105701-K26

EC12

S1
G1
S2
G2

GND

C174
C1u25X5-HF

GND

Follow 14B1

SML1ALERT# :
This signal has an internal pull-down.
0 = Disable IntelR DCI-OOB (Default)
1 = Enable IntelR DCI-OOB

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3
LPC_FRAME#

TPJNC50

CLK_PCI_KBC <18>

EC42

C580C3.9p50N0402

C584C3.9p50N0402

GND

GND

R240
100KR1%0402

LPC_AD0 <18,23>
LPC_AD1 <18,23>
LPC_AD2 <18,23>
LPC_AD3 <18,23>
LPC_FRAME# <18,23>

CLK_PCI_TPM

EC_RTC_RST <18>

CLK_PCI_TPM <23>

D

+3VRUN

SMBCLK_DIMM_Q

SMBDATA_DIMM_Q

SMBCLK_DIMM

SMBDATA_DIMM

SMBALERT#

SML1ALERT#

SML0ALERT#

SML0_CLK
SML0_DATA
SMB_CLK_R
SMB_DATA_R

SMBCLK_DIMM_Q

SMBDATA_DIMM_Q

SMBCLK_DIMM

SMBDATA_DIMM

SML0ALERT#

CLKIN_LCP

close to SOC

2018.05.29 Change CLKIN_LCP PD resistor to PCH side

R129 2.2KR1%0402

R114 2.2KR1%0402

R103 2.2KR0402

R118 2.2KR0402

R113 X_4.7KR0402

R447 X_4.7KR0402

R89 X_4.7KR0402

RN1 8P4R-2.2KR0402

1
3
5
7

EC9 X_C100p50N0402

EC7 X_C100p50N0402

EC6 X_C100p50N0402

EC8 X_C100p50N0402

R90 X_20KR1%0402

R59 10KR0402

LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

Follow PDG(P.294) reserve capacitor to GND for EMI issue #2018.08.15

+3VSUS

2
4
6
8

EC43

EC40

EC44

EC45

X_C10p50N0402

X_C10p50N0402

X_C10p50N0402

X_C10p50N0402

E

Reference 16S1

EC41

Can be up to 27pF

X_C10p50N0402

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

X_C10p50N0402

X_C10p50N0402

A

B

C

D

Title

Title

Title

Whiskey lake U (RTC;LPC;CLOCK)

Whiskey lake U (RTC;LPC;CLOCK)

Whiskey lake U (RTC;LPC;CLOCK)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-STAR INT'L CO.,LTD.

MS-14B3

MS-14B3

MS-14B3

E

0A

0A

0A

of

of

of

757Friday, November 16, 2018

757Friday, November 16, 2018

757Friday, November 16, 2018

follow 13H1 reserve MB ID[0:3] #2018.08.10

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

MB_ID0
MB_ID1
MB_ID2
MB_ID3

MB_ID0
MB_ID1
MB_ID2
MB_ID3

1 1

CNVI_BRI_RSP<20>
CNVI_RGI_DT<20>
CNVI_BRI_DT<20>
CNVI_RGI_RSP<20>

Follow MOW Table 5-1 change R7042 & R7034 from 75 to 33ohm #2018.08.29

GPU

Change netname to GPIO1_GC6_FB_EN #2018.08.28

2 2

A

R411 X_10KR0402
R456 X_10KR0402
R423 X_10KR0402
R430 X_10KR0402

R412 10KR0402
R441 10KR0402
R422 10KR0402
R429 10KR0402

GPIO2_GPU_EVENT_PCH<40>

GPIO1_GC6_FB_EN<40,41>

DGPU_PWRGD<18,33,41>

DGPU_HOLD_RST#<40>

DGPU_PWR_EN<41>

+3VRUN

TPJNC53

R438 33R0402
R437 33R0402

Remove USB-SMI# #2018.08.28

I2C_DATA_TP
I2C_CLK_TP

Remove TP_INT# #2018.08.28

Active HI

R435 100KR1%0402

GND

R126 100KR1%0402

GND

MB_ID2
PIRQA#

MB_ID3
MB_ID0

MB_ID1

CNVI_RGI_DT_R
CNVI_BRI_DT_R

TPJNC52

TPJNC20

CC27
CC32
CE28
CE27
CE29

CA31
CA32

PME#

CC29
CC30
CA30

CK20
CG19

CJ20

CH19

CR12
CP12
CN12
CM12

CM11
CN11

CK12

CJ12

CF27
CF29

CH27
CH28

CJ30

3.3V

CJ31

Follow 14B1 reserve R657 for CFG_UMA sku. #2018.08.10

Remove level shift

B

C

D

Reference 16S1

CPU1F

GPP_B15/GSPI0_CS0#
GPP_A7/PIRQA#/GSPI0_CS1#
GPP_B16/GSPI0_CLK
GPP_B17/GSPI0_MISO
GPP_B18/GSPI0_MOSI

GPP_B19/GSPI1_CS0#
GPP_A11/PME#/GSPI1_CS1#/SD_VDD2_PWR_EN#
GPP_B20/GSPI1_CLK
GPP_B21/GSPI1_MISO
GPP_B22/GSPI1_MOSI

GPP_F5/CNV_BRI_RSP
GPP_F6/CNV_RGI_DT
GPP_F4/CNV_BRI_DT
GPP_F7/CNV_RGI_RSP

GPP_C20/UART2_RXD
GPP_C21/UART2_TXD
GPP_C22/UART2_RTS#
GPP_C23/UART2_CTS#

GPP_C16/I2C0_SDA
GPP_C17/I2C0_SCL

GPP_C18/I2C1_SDA
GPP_C19/I2C1_SCL

GPP_H4/I2C2_SDA
GPP_H5/I2C2_SCL

GPP_H6/I2C3_SDA
GPP_H7/I2C3_SCL

GPP_H8/I2C4_SDA
GPP_H9/I2C4_SCL

WHL-i7-8565U

A0D-8565U05-I06

1.8V

SMI# / NMI

6 of 20

NN-BSS138DW-7-F_SOT363-6-RH

D03-138DW19-D07

SUS

I2C_CLK_TP

I2C_DATA_TP

D1

D2

Vgs(th) = 0.5V,1.2V,1.5V

GPP_A12/ISH_GP6/BM_BUSY#/SX_EXIT_HOLDOFF#

SOT_363

GPP_D9/ISH_SPI_CS#/GSPI2_CS0#

GPP_D10/ISH_SPI_CLK/GSPI2_CLK
GPP_D11/ISH_SPI_MISO/GSPI2_MISO
GPP_D12/ISH_SPI_MOSI/GSPI2_MOSI

GPP_D15/ISH_UART0_RTS#/GSPI2_CS1#

GPP_D16/ISH_UART0_CTS#/SML0BALERT#

GPP_C12/UART1_RXD/ISH_UART1_RXD

GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#

Q11

S1
G1
S2
G2

GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL

GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL

GPP_H10/I2C5_SDA/ISH_I2C2_SDA

GPP_H11/I2C5_SCL/ISH_I2C2_SCL

GPP_D13/ISH_UART0_RXD
GPP_D14/ISH_UART0_TXD

GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5

RUN

I2C_CLK_TP_Q

I2C_DATA_TP_Q

+3VRUN

I2C_CLK_TP_Q <29>

I2C_DATA_TP_Q <29>

C87 C0.1u25X50402-HF

CN22

GPP_D10

CR22
CM22

GPP_D12

CP22

Follow PDG DCI OOB implementation

CK22
CH20

CH22
CJ22

GPP_H10

CJ27

GPP_H11

CJ29

CM24
CN23
CM23
CR24

CG12
CH12
CF12
CG14

BW35
BW34
CA37
CA36
CA35
CA34
BW37

GND

TPJNC16

TPJNC22
TPJNC51

2018.06.14 PCIE_WAKE# signal follow CRB Pull up 8.2k ohm

2018.06.14 Del PM_SLP_S0# and EXT_PWR_GATE# pull up resistor
Becasue function pin is output pin and isn`t be used

Change R7051 from 10k to 4.7k #2018.08.24
SOC Internal Pull Down 15k~40k ohm

2018.06.13 Del SUSPWRDNACK pull up resistor for PDG suggest

I2C_CLK_TP
I2C_DATA_TP

Remove USB-SMI# & TP_INT# PU #2018.08.28

GPP_D12

I2C_CLK_TP_Q
I2C_DATA_TP_Q

Remove USB-SMI# & TP_INT# PU #2018.08.28

I2C_CLK_TP_Q
I2C_DATA_TP_Q

Remove USB-SMI# & TP_INT# Cap to GND #2018.08.28

CNVI_BRI_RSP
CNVI_RGI_RSP

DT resistance close to module
RSP resistance close to SOC

For glitch free implementation requirements

PCIE_WAKE#

AC_PRESENT

PM_BATLOW#

EC_PWRBTN#

PIRQA#

RSMRST#

PCH_PWROK

AC_PRESENT

For glitch free implementation requirements

PM_SLP_S3#

PM_SLP_S4#

R78 2.2KR0402
R73 2.2KR0402

R96 100KR0402

R67 2.2KR0402
R66 2.2KR0402

EC5 X_C100p50N0402
EC4 X_C100p50N0402

+1_8VSUS

R400 X_20KR0402-2
R391 X_20KR0402-2

R464 8.2KR0402

R454 4.7KR0402

R462 8.2KR0402

R217 X_10KR0402

R425 10KR0402

R459 10KR0402

R478 10KR0402

R455 X_100KR0402

R200 100KR0402

R184 100KR0402

E

+3VSUS

+3VRUN

GND

+3VSUS

+3VRUN

CPU1K

PLT_RST#

3 3

+3VSUS

C163C0.1u25X50402

U16

74HC1G08GW_TSSOP5-HF

BUF_PLT_RST#<18,19,23,40>

R198

100KR0402

Follow 14B1 add WLAN_RST to GPU #2018.08.28

4 4

WLAN_RST#<20>

R218

100KR1%0402

GND

GND

C165C0.1u25X50402-HF

4

Y

A

53

VCC

4

Y

GND

+3VSUS

53

VCC

1

A

2

B

GND

U17
NL17SZ08DFT2G_SC70-5-HF

T70-7SZ0870-O05

GND

SC70_5

Follow 14B1 add SUS_PWR_ACK# #2018.08.28

1

A

2

B

R204

61.9KR1%0402-RH

For glitch free implementation requirements

EC_WLAN_RST# <18>

R75 10KR0402

+3VRUN

RSMRST#<18>

TPJNC3

SYS_PWROK<18>
PCH_PWROK<18>

TPJNC30

SUS_PWR_ACK<18>

WLAN_WAKE#<20>

Follow 14B1 add WLAN_WAKE#
#2018.08.28

DSWROK can be tied to RSMRST# for platforms
that dose not support the Deep Sx state.

DSW_PWROK

SYS_RESET#_JNC

PROCPWRGD
VCCST_PWRGD

R76 0R0402
R471 0R0402

DSW_PWROK

SUS_PWR_ACK

R468 0R0402

R458 0R0402

B

PCIE_WAKE#

RSMRST#

EC_ALLSYSPG<18,48>

BJ35

GPP_B13/PLTRST#

CN10

SYS_RESET#

BR36

RSMRST#

AR2

PROCPWRGD

BJ2

VCCST_PWRGOOD

CR10

SYS_PWROK

BP31

PCH_PWROK

BP30

DSW_PWROK

BV34

GPP_A13/SUSWARN#/SUSPWRDACK

BY32

GPP_A15/SUSACK#

BU30

WAKE#

BU32

GPD2/LAN_WAKE#

BU34

GPD11/LANPHYPC

WHL-i7-8565U

A0D-8565U05-I06

+3VSUS +VCCST

U3

1

AY

2

GPP_B11/EXT_PWR_GATE#

11 of 20

C45

53

VCC

GND

74AHC1G07GW_SOT353-RH

R38
1KR0402

C0.1u25X50402

VCCST_PWRGD_R

4

2018.06.13 VCCST_PWRGD of signal add series resistor to follow PDG suggest

C

GPP_B12/SLP_S0#

GPD4/SLP_S3#
GPD5/SLP_S4#

GPD10/SLP_S5#

SLP_SUS#
SLP_LAN#

GPD9/SPL_WLAN#

GPD6/SLP_A#

GPD3/PWRBTN#

GPD1/ACPRESENT

GPD0/BATLOW#

INTRUDER#

GPP_B2/VRALERT#

INPUT3VSEL

R42 60.4R1%0402

Remove SLP_S0# function, 14B3 did not support #2018.08.09

PM_SLP_S0#

BJ37

PM_SLP_S3#

BU36

PM_SLP_S4#

BU27

PM_SLP_S5#_R

BT29

BU29
BT31
BT30
BU37

EC_PWRBTN#

BU28

AC_PRESENT

BU35

PM_BATLOW#

BV36

SM_INTRUDER_N

BR35

EXT_PWR_GATE#

CC37
CC36

BT27

INPUT3VSEL

2018/01/30 3V Select Strap
Low ->3.3V +-5%
High -> 3.0V +-5%

VCCST_PWRGD

TPJNC29

R439 0R0402

Follow 13H1 add SLP_S5# to EC #2018.08.28

Change PM_PWRBTN# to EC_PWRBTN# #2018.08.28

EC_PWRBTN# <18>

AC_PRESENT <18>

TPJNC57

R4661MR0402

D

PM_SLP_S3# <18,46>
PM_SLP_S4# <18,45,47>
PM_SLP_S5# <18>

+3VSUS

RTCVCC

R469
X_4.7KR0402

R470

4.7KR0402

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Title

Title

Title

Whiskey lake U (LPSS;ISH;I2C)

Whiskey lake U (LPSS;ISH;I2C)

Whiskey lake U (LPSS;ISH;I2C)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MICRO-STAR INT'L CO.,LTD.

MS-14B3

MS-14B3

MS-14B3

E

857Friday, November 16, 2018

857Friday, November 16, 2018

857Friday, November 16, 2018

0A

0A

0A

of

of

of

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

B

C

D

E

Flash Descriptor Security Override

+3VSUS

U5

1

AY

2

Low = Disable
High = Enable

HDA_SDOUT_PCH

R201 1KR0402

from 4.7K change to 1K for PDG

Follow 14B1 change HDA R/C value for SA #2018.08.15

EC15

EC33

X_C2p50N0402

Cap close to PCH

EC13

X_C2p50N0402

X_C2p50N0402

HDA_SDIN_PCH<21>

CNVI_RF_RESET<20>

MODEN_CLKREQ<20>

R192 33R0402
R197 33R0402
R195 10R1%0402
R179 22R0402

EC14

X_C10p50N0402

+VCCSTG+3VRUN

C56

53

VCC

C0.1u25X50402

EC_PROCHOT#_OD

4

74AHC1G07GW_SOT353-RH

GND

2018.05.25 add EC_PROCHOT#_OD signal

2016/04/14 add dumping
resistor for nec request

IMVP_PROCHOT#<44,48>

R50

100R0402

HDA_SYNC_PCH
HDA_BIT_CLK_PCH

HDA_RST#_PCH

Add CNVi function

CNVI_RF_RESET

HDA_SYNC_PCH

HDA_BIT_CLK_PCH

HDA_SDOUT_PCH
HDA_RST#_PCH

Add CNVI_RF_RESET pull down resistor position from module side to PCH side #2018.08.24

+VCCST

PDG 561280 Page 243

R39
1KR0402

TPJNC5

H_PECI<18>

R54 499R1%0402

2018.06.11 Change SCI wake up function pin from GPP_C2 to GP P_E3

SCI_WAKE_UP#<18>

ACPI_RadioSW<18>

R41549.9R1%0402
R40649.9R1%0402

CPU1G

BN34

HDA_SYNC/I2S0_SFRM

BN37

HDA_BCLK/I2S0_SCLK

BN36

HDA_SDO/I2S0_TXD

BN35

HDA_SDI0/I2S0_RXD

BL36

HDA_SDI1/I2S1_RXD/SNDW1_DATA

BL35

HDA_RST#/I2S1_SCLK/SNDW1_CLK

CK23

GPP_D23/I2S_MCLK

BL37

I2S1_SFRM/SNDW2_CLK

BL34

I2S1_TXD/SNDW2_DATA

CJ32

GPP_H1/I2S2_SFRM/CNV_BT_I2S_BCLK/CNV_RF_RESET#

CH32

GPP_H0/I2S2_SCLK/CNV_BT_I2S_SCLK

CH29

GPP_H2/I2S2_TXD/CNV_BT_I2S_SDI/MODEM_CLKREQ

CH30

GPP_H3/I2S2_RXD/CNV_BT_I2S_SDO

CP24

GPP_D19/DMIC_CLK0/SNDW4_CLK

CN24

GPP_D20/DMIC_DATA0/SNDW4_DATA

CK25

GPP_D17/DMIC_CLK1/SNDW3_CLK

CJ25

GPP_D18/DMIC_DATA1/SNDW3_DATA

CF35

GPP_B14/SPKR

WHL-i7-8565U

A0D-8565U05-I06

CNVI_RF_RESET

R35
1KR0402

THERMTRIP#

H_CATERR#

H_PROCHOT#_R
THERMTRIP#

SCI_WAKE_UP#

Del ASM1142 cap

PROC_POPIRCOMP
PCH_OPIRCOMP

close to SOC

R215
75KR1%0402

GND

AA4
AR1

Y4

BJ1

U1
U2
U3
U4

CE9

CN3
CB34
CC35

BP27

BW25

7 of 20

CPU1D

CATERR#
PECI
PROCHOT#
THRMTRIP#

BPM#_0
BPM#_1
BPM#_2
BPM#_3

GPP_E3/CPU_GP0
GPP_E7/CPU_GP1
GPP_B3/CPU_GP2
GPP_B4/CPU_GP3

PROC_POPIRCOMP
PCH_OPIRCOMP

GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3

GPP_G5/SD_CD#

GPP_G6/SD_CLK

GPP_G7/SD_WP

GPP_A17/SD_VDD1_PWR_EN#/ISH_GP7

GPP_A16/SD_1P8_SEL

PROC_TCK

PROC_TDI
PROC_TDO
PROC_TMS

PROC_TRST#

PCH_TCK

PCH_TDI
PCH_TDO
PCH_TMS

PCH_TRST#
PCH_JTAGX

PROC_PREQ#
PROC_PRDY#

SD_1P8_RCOMP
SD_3P3_RCOMP

JTAG_TCK_JNC

T6

JTAG_TDI_JNC

U6

JTAG_TDO_JNC

Y5

JTAG_TMS_JNC

T5

JTAG_TRST#_JNC

AB6

PCH_JTAG_TCK

W6

JTAG_TDI_JNC

U5

JTAG_TDO_JNC

W5

JTAG_TMS_JNC

P5

JTAG_TRST#_JNC

Y6

JTAG_TCK_JNC

P6

PROC_PREQ#

W2

PROC_PRDY#

W1

2016/04/22 It deleted S0ix signal is
not support CS mode for nec request

CH36
CL35
CL36
CM35
CN35
CH35
CK36
CK34

2018.06.11 Remove Sensor INT function pin

BW36
BY31

CK33

SD_RCOMP

CM34

SD_RCOMP can combine with a resistor

2018.06.04 Follow PDG 575412 Figure 13-6 for DCI debug

R445 200R1%0402

R360 51R1%0402

R40 51R1%0402

TPJNC45

TPJNC46
TPJNC13

TPJNC14

TPJNC11
TPJNC9

2018.06.14 PCH_JTAG_TCK signal add Test Point

HDA_SDO

1 1

FLASH_SECURITY<18>

HDA_SYNC<21>
HDA_BIT_CLK<21>
HDA_SDOUT<21>
HDA_RST#<21>

2 2

0B. Change R195 form 22R to 10R (R11-0100T12-W08) and unstuff EC14 for SA #2018.11.09

R49

10KR0402

3 3

EC_PROCHOT#<18>

Reference 16S1

+VCCSTG

4 4

A

B

+3VSUS

SCI_WAKE_UP#

R9210KR0402

C

4 of 20

WHL-i7-8565U

A0D-8565U05-I06

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Title

Title

Title

Whiskey lake U(HDA;MISC,JTAG)

Whiskey lake U(HDA;MISC,JTAG)

Whiskey lake U(HDA;MISC,JTAG)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date : Sheet

Date : Sheet

Date : Sheet

D

MS-14B3

MS-14B3

MS-14B3

MICRO-STAR INT'L CO.,LTD.

0A

0A

0A

of

of

of

957Friday, November 16, 2018

957Friday, November 16, 2018

957Friday, November 16, 2018

E

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

AC coupling capacitors on motherboard are recommended to be placed
closer to either the connector or processor side.
Avoid placing AC caps at the center of the motherboard.

1 1

Change to 14B3 configuration #2018.08.28

USB3_RXN_TYPEC3<28>
USB3_RXP_TYPEC3<28>
USB3_TXN_TYPEC3<28>

Port5,6 : USB3.1 TypeC Port4

Port7 : M.2 WLAN

USB3_TXP_TYPEC3<28>

USB3_RXN_TYPEC4<28>
USB3_RXP_TYPEC4<28>
USB3_TXN_TYPEC4<28>

USB3_TXP_TYPEC4<28>

PCIE_RXN_WLAN<20>
PCIE_RXP_WLAN<20>
PCIE_TXN_WLAN<20>
PCIE_TXP_WLAN<20>

PCIE9_RXN<33>

2 2

Port9~12: PCI-E 1 x 4 GPU

3 3

Port13~16/SATA2 : PCI-E SSD

4 4

Reference 16S1

A

PCIE9_RXP<33>
PCIE9_TXN<33>
PCIE9_TXP<33>

PCIE10_RXN<33>
PCIE10_RXP<33>
PCIE10_TXN<33>
PCIE10_TXP<33>

PCIE11_RXN<33>
PCIE11_RXP<33>
PCIE11_TXN<33>
PCIE11_TXP<33>

PCIE12_RXN<33>
PCIE12_RXP<33>
PCIE12_TXN<33>
PCIE12_TXP<33>

PCIE_RXN_SSD1<19>
PCIE_RXP_SSD1<19>
PCIE_TXN_SSD1<19>
PCIE_TXP_SSD1<19>

PCIE_RXN_SSD2<19>
PCIE_RXP_SSD2<19>
PCIE_TXN_SSD2<19>
PCIE_TXP_SSD2<19>

PCIE_RXN_SSD3<19>
PCIE_RXP_SSD3<19>
PCIE_TXN_SSD3<19>
PCIE_TXP_SSD3<19>

PCIE_SATA_RXN_SSD<19>
PCIE_SATA_RXP_SSD<19>
PCIE_SATA_TXN_SSD<19>
PCIE_SATA_TXP_SSD<19>

4 mils min (breakout) 12-15 mils (trace)
At least 12 mils to any adjacent high speed I/O.

R370 100R1%0402

B

PCIE_RCOMPN
PCIE_RCOMPP

B

CPU1H

BW9

PCIE5_RXN/USB31_5_RXN

BW8

PCIE5_RXP/USB31_5_RXP

BW4

PCIE5_TXN/USB31_5_TXN

BW3

PCIE5_TXP/USB31_5_TXP

BU6

PCIE6_RXN/USB31_6_RXN

BU5

PCIE6_RXP/USB31_6_RXP

BU4

PCIE6_TXN/USB31_6_TXN

BU3

PCIE6_TXP/USB31_6_TXP

BT7

PCIE7_RXN

BT6

PCIE7_RXP

BU2

PCIE7_TXN

BU1

PCIE7_TXP

BU9

PCIE8_RXN

BU8

PCIE8_RXP

BT4

PCIE8_TXN

BT3

PCIE8_TXP

BP5

PCIE9_RXN

BP6

PCIE9_RXP

BR2

PCIE9_TXN

BR1

PCIE9_TXP

BN6

PCIE10_RXN

BN5

PCIE10_RXP

BR4

PCIE10_TXN

BR3

PCIE10_TXP

BN10

PCIE11_RXN/SATA0_RXN

BN8

PCIE11_RXP/SATA0_RXP

BN4

PCIE11_TXN/SATA0_TXN

BN3

PCIE11_TXP/SATA0_TXP

BL6

PCIE12_RXN/SATA1A_RXN

BL5

PCIE12_RXP/SATA1A_RXP

BN2

PCIE12_TXN/SATA1A_TXN

BN1

PCIE12_TXP/SATA1A_TXP

BK6

PCIE13_RXN

BK5

PCIE13_RXP

BM4

PCIE13_TXN

BM3

PCIE13_TXP

BJ6

PCIE14_RXN

BJ5

PCIE14_RXP

BL2

PCIE14_TXN

BL1

PCIE14_TXP

BG5

PCIE15_RXN/SATA1B_RXN

BG6

PCIE15_RXP/SATA1B_RXP

BL4

PCIE15_TXN/SATA1B_TXN

BL3

PCIE15_TXP/SATA1B_TXP

BE5

PCIE16_RXN/SATA2_RXN

BE6

PCIE16_RXP/SATA2_RXP

BJ4

PCIE16_TXN/SATA2_TXN

BJ3

PCIE16_TXP/SATA2_TXP

CE6

PCIE_RCOMP

CE5

PCIE_RCOMP_P

CR28

GPP_H12/M2_SKT2_CFG0

CP28

GPP_H13/M2_SKT2_CFG1

CN28

GPP_H14/M2_SKT2_CFG2

CM28

GPP_H15/M2_SKT2_CFG3

WHL-i7-8565U

A0D-8565U05-I06

PCIE1_RXN/USB31_1_RXN
PCIE1_RXP/USB31_1_RXP
PCIE1_TXN/USB31_1_TXN

PCIE1_TXP/USB31_1_TXP

PCIE2_RXN/USB31_2_RXN/SSIC_1_RXN

PCIE2_RXP/USB31_2_RXP/SSIC_1_RXP
PCIE2_TXN/USB31_2_TXN/SSIC_1_TXN

PCIE2_TXP/USB31_2_TXP/SSIC_1_TXP

PCIE3_RXN/USB31_3_RXN
PCIE3_RXP/USB31_3_RXP
PCIE3_TXN/USB31_3_TXN

PCIE3_TXP/USB31_3_TXP

PCIE4_RXN/USB31_4_RXN
PCIE4_RXP/USB31_4_RXP
PCIE4_TXN/USB31_4_TXN

PCIE4_TXP/USB31_4_TXP

USB2N_1
USB2P_1

USB2N_2
USB2P_2

USB2N_3
USB2P_3

USB2N_4
USB2P_4

USB2N_5
USB2P_5

USB2N_6
USB2P_6

USB2N_7
USB2P_7

USB2N_8
USB2P_8

USB2N_9
USB2P_9

USB2N_10
USB2P_10

USB2_COMP

GPP_E9/USB2_OC0#/GP_BSSB_CLK

8 of 20

USB_VBUSSENSE

GPP_E10/USB2_OC1#/GP_BSSB_DI

GPP_E11/USB2_OC2#
GPP_E12/USB2_OC3#

GPP_E4/DEVSLP0
GPP_E5/DEVSLP1
GPP_E6/DEVSLP2

GPP_E0/SATAXPCIE0/SATAGP0
GPP_E1/SATAXPCIE1/SATAGP1
GPP_E2/SATAXPCIE2/SATAGP2

GPP_E8/SATALED#/SPI1_CS1#

RSVD_1/FS_RESET#/RSVD_1

USB_ID

C

CB5
CB6
CA4
CA3

BY8
BY9
CA2
CA1

BY7
BY6
BY4
BY3

BW6
BW5
BW2
BW1

CE3
CE4

CE1
CE2

CG3
CG4

CD3
CD4

CG5
CG6

CC1
CC2

CG8
CG9

CB8
CB9

CH5
CH6

CC3
CC4

CC5
CE8
CC6

CK6
CK5
CK8
CK9

CP8
CR8
CM8

CN8
CM10
CP10

CN7

AR3

C

Change USB3.1 port1/2/3/4 order for layout #2018.09.04

USB3_RXN_TYPEC1 <25>
USB3_RXP_TYPEC1 <25>
USB3_TXN_TYPEC1 <25>
USB3_TXP_TYPEC1 <25>

USB3_RXN_TYPEC2 <25>
USB3_RXP_TYPEC2 <25>
USB3_TXN_TYPEC2 <25>
USB3_TXP_TYPEC2 <25>

USB3_RXN_TYPEA1 <24>
USB3_RXP_TYPEA1 <24>
USB3_TXN_TYPEA1 <24>
USB3_TXP_TYPEA1 <24>

USB3_RXN_TYPEA2 <24>
USB3_RXP_TYPEA2 <24>
USB3_TXN_TYPEA2 <24>
USB3_TXP_TYPEA2 <24>

USB2N_TYPEA1 <24>
USB2P_TYPEA1 <24>

USB2N_TYPEA2 <24>

USB2P_TYPEA2 <24>

USB2N_TYPEC1 <27>
USB2P_TYPEC1 <27>

USB2N_TYPEC2 <28>
USB2P_TYPEC2 <28>

USB2N_CardReader <22>
USB2P_CardReader <22>

USB2N_FP <29>
USB2P_FP <29>

USB2N_CAMERA <31>
USB2P_CAMERA <31>

USB2N_BT <20>

USB2_RCOMP

USB2_VBUSSENSE

USB2_OC0#
USB2_OC1#
USB2_OC2#

Remove DEVSLP0 #2018.08.28

USB2P_BT <20>

R356 113R1%0402

R381 1KR0402

R68 0R1%0402 R69 10KR1%0402
R72 0R1%0402
R81 0R1%0402
R84 0R1%0402 R83 10KR1%0402

DEVSLP2_SSD <19>

SSD_CFG <19>

SATAXPCIE0 -> SATA Port 0
SATAXPCIE1 -> SATA Port 1
SATAXPCIE2 -> SATA Port 2

OC0# <24>
OC1# <24>
OC2# <27>
OC3# <28>

Note.
The OC0# is USB3 Port 1, USB2 Port 1
The OC1# is USB3 Port 2, USB2 Port 2
The OC2# is USB3 Port 3,4, USB2 Port 3
The OC3# is USB3 Port 5,6, USB2 Port 4

D

Port3,4 : USB3.1 TypeC Port3

Port1 : USB3.1 TypeA Port1

Port2 : USB3.1 TypeA Port2

Port1 : USB3.1 TypeA Port1

Port2 : USB3.1 TypeA Port2

Port3 : USB3.1 TypeC Port3

Port4 : USB3.1 TypeC Port4

Port5 : Card reader

Port6 : Finger printer

Port7 : Camera

Port10: M.2 BT

USB2_OC0#
USB2_OC1#
USB2_OC2#

Follow 14B1 add OC[0:3]# funciton #2018.08.28

USB2_OC3#USB2_OC3#

D

R71 10KR1%0402
R80 10KR1%0402

+3VSUS

Title

Title

Title

Whiskey lake U(PCIE;USB;SATA)

Whiskey lake U(PCIE;USB;SATA)

Whiskey lake U(PCIE;USB;SATA)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

E

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MS-14B3

MS-14B3

MS-14B3

E

0A

0A

0A

of

10 57Friday, November 16, 2018

of

10 57Friday, November 16, 2018

of

10 57Friday, November 16, 2018

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

CPU1Q

T4

AB5

CG2
CG1

BV24
BV25

R4

T3

R3

J4

M4

J3
M3
R2
N2
R1
N1

J2

L2

J1

L1

L3
N3

L4
N4

W4

H4
H3

2018.06.04 ADD TP for DCI

TPJNC7

1 1

CFG4

2 2

R47 1KR0402

TPJNC10
TPJNC12

CFG4 - Display Port Presence

1:Disabled; No Physical Display Port
attached to Embedded Display Port (NC in
DG)

0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
(Pull down to GND through a 1K ± 5 % resistor)

R363 49.9R1%0402

TPJNC6

CFG3
CFG4
CFG5
CFG6

CFG_RCOMP

ITP_PMODE

WHL QS/CFL/WHL_ES1_CNL U

CFG_0

CFG_1
CFG_2
CFG_3
CFG_4
CFG_5
CFG_6
CFG_7
CFG_8
CFG_9
CFG_10
CFG_11
CFG_12
CFG_13
CFG_14
CFG_15

CFG_16
CFG_18

CFG_17
CFG_19

CFG_RCOMP

ITP_PMODE

RSVD_8
RSVD_9

RSVD_10
RSVD_11

RSVD_12
RSVD_13

RSVD_TP_3/RSVD/RSVD_TP_3
RSVD_TP_4/RSVD/RSVD_TP_4

RSVD_TP_8/RSVD/RSVD_TP_8
RSVD_TP_9/RSVD/RSVD_TP_9

RSVD_TP_10/RSVD/RSVD_TP_10
RSVD_TP_11/RSVD/RSVD_TP_11

RSVD_TP_13/RSVD/RSVD_TP_13

RSVD_TP_1/RSVD/RSVD_TP_1

IST_TRIG_0/RSVD/IST_TRIG_0

3 3

BK36

RSVD_18

BK35

RSVD_17

W3

RSVD_4

AM4

RSVD_5

AM3

RSVD_TP_7/RSVD/RSVD_TP_7

IST_TRIG_1/RSVD/IST_TRIG_1

RSVD_TP_2/RSVD/RSVD_TP_2

B

RSVD_TP_5
RSVD_TP_6

IST_TRIG

RSVD_TP_12

TP_3
TP_4

RSVD_14

RSVD_15
RSVD_16

RSVD_2
RSVD_3

RSVD_6
RSVD_7

IST_TP_0/RSVD/IST_TP_0
IST_TP_1/RSVD/IST_TP_1

TP_2

VSS_1/TP/VSS_1

TP_1

F37
F34

CP36
CN36

BJ36
BJ34

BK34
BR18

BT9
BT8

BP8
BP9

CR4

CP3
CR3

AT3
AU3

AN1
AN2

AN4
AN3

AL2
AL1

AL4
AL3

BP34
BP36
BP35

CR35

ADD TP

IST_TRIG

BP36 : VSS

C

CNVI_WR_D0N<20>

GPP_H21

CNVI_WR_D0P<20>

CNVI_WR_D1N<20>

CNVI_WR_D1P<20>

CNVI_WT_D0N<20>
CNVI_WT_D0P<20>

CNVI_WT_D1N<20>
CNVI_WT_D1P<20>

CNVI_WR_CLK_DN<20>
CNVI_WR_CLK_DP<20>

CNVI_WT_CLK_DN<20>
CNVI_WT_CLK_DP<20>

CNV_WT_RCOMP

A4WP_PRESENT

R452 4.7KR0402

R453 X_20KR1%0402

+3VSUS

TPJNC27

R138 150R1%0402

2018.07.05 LTE datasheet suggest the M.2_LTE_DEV_EN signal pull to OD pin

GPP_H21

This signal has a weak internal pull-down.
An external pull-up is required on this strap since 38.4

MHz XTAL is not supported on the PCH.
0 = 38.4 XTAL frequency selected. (Default)
1 = 24MHz XTAL frequency selected.

GND

D

CPU1I

CR30

CNV_WR_D0N

CP30

CNV_WR_D0P

CM30

CNV_WR_D1N

CN30

CNV_WR_D1P

CN32

CNV_WT_D0N

CM32

CNV_WT_D0P

CP33

CNV_WT_D1N

CN33

CNV_WT_D1P

CN31

CNV_WR_CLKN

CP31

CNV_WR_CLKP

CP34

CNV_WT_CLKN

CN34

CNV_WT_CLKP

CP32

CNV_WT_RCOMP_1

CR32

CNV_WT_RCOMP_2

CP20

GPP_F0/CNV_PA_BLANKING

CK19

GPP_F1

CG17

GPP_F2

CR14

GPP_C8/UART0_RXD

CP14

GPP_C9/UART0_TXD

CN14

GPP_C10/UART0_RTS#

CM14

GPP_C11/UART0_CTS#

CJ17

GPP_F8/CNV_MFUART2_RXD

CH17

GPP_F9/CNV_MFUART2_TXD

CF17

GPP_F23/A4WP_PRESENT

WHL-i7-8565U

A0D-8565U05-I06

0 = 3.3V supply is 3.3V +-5%
1 = 3.3V supply is 3.0V +-5%
This strap should only be used for specific targeted 1S battery systems.

A4WP_PRESENT

9 of 20

+1_8VSUS

CPU_C10_GATE# for VCCIO low power mode control s ignal
High : normal
Low : low power mode

CPU_C10_GATE#

GPP_H21
GPP_H22
GPP_H23
GPP_F10

GPD7

GPP_F3

CN27

TIMESYNC_0

CM27

GPP_H21

CF25
CN26
CM26
CK17

BV35

GPD7

CN20

CG25

Pin : CG25.CH25 RVP for Camera I2C

CH25

CR20
CM20
CN19
CM19
CN18
CR18
CP18
CM18

CM16
CP16
CR16
CN16

EMMC_RCOMP

CK15

GPD7

GPP_H18/CPU_C10_GATE#

GPP_H19/TIMESYNC_0

GPP_D4/IMGCLKOUT0/BK4/SBK4

GPP_H20/IMGCLKOUT1

GPP_F12/EMMC_DATA0

1.8V

GPP_F13/EMMC_DATA1
GPP_F14/EMMC_DATA2
GPP_F15/EMMC_DATA3
GPP_F16/EMMC_DATA4
GPP_F17/EMMC_DATA5
GPP_F18/EMMC_DATA6
GPP_F19/EMMC_DATA7

GPP_F20/EMMC_RCLK

GPP_F21/EMMC_CLK

GPP_F11/EMMC_CMD

GPP_F22/EMMC_RESET#

EMMC_RCOMP

R101
X_100KR0402

R102
100KR0402

E

Follow 13H1 add TP #2018.08.28

TPJNC23

TPJNC24

CNVi Strap Pin

R87

200R1%0402

Strap Pin require

R461 100KR0402

+3VSUS

E1

SKTOCC#

20 of 20

WHL-i7-8565U

A0D-8565U05-I06

4 4

SKTOCC#JNC

Reference 16S1

A

B

TPJNC15

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Titl e

Titl e

Titl e

Whiskey lake U (CFG;CSI;RSVD)

Whiskey lake U (CFG;CSI;RSVD)

Whiskey lake U (CFG;CSI;RSVD)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

C

D

Date: Sheet

MS-14B3

MS-14B3

MS-14B3

MICRO-STAR INT'L CO.,LTD.

of

of

of

11 57Friday, November 16, 2018

11 57Friday, November 16, 2018

11 57Friday, November 16, 2018

E

0A

0A

0A

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

Reference 16S1

C399

C457

1 1

C10u6.3X50402

C10u6.3X50402

C326

C354

C10u6.3X50402

C400

22x10 uf 0402

C472

C10u6.3X50402

C10u6.3X50402

C398

C402

C328

C349

C10u6.3X50402

C10u6.3X50402

C490

ZRB15XR60J106ME12D

C394

C397

C10u6.3X50402

C360

C401

C10u6.3X50402

C10u6.3X50402

C371

C10u6.3X50402

C10u6.3X50402

+VCC_CORE

C6P38 C1u6.3X50201
C6P26 C1u6.3X50201
C6P15 C1u6.3X50201
C6P31 C1u6.3X50201
C6P3 C1u6.3X50201
C6P5 C1u6.3X50201

2 2

C6P32 C1u6.3X50201

2018.06.11 Refer to PDG 575412 Table 11-2

+VCC_CORE

C10u6.3X50402

42x1uf 0201

C5P10 C1u6.3X50201
C5P4 C1u6.3X50201
C5P6 C1u6.3X50201
C5P2 C1u6.3X50201
C5P9 C1u6.3X50201
C5P3 C1u6.3X50201
C5P7 C1u6.3X50201
C5P8 C1u6.3X50201
C5P5 C1u6.3X50201
C5P1 C1u6.3X50201

C6P6 C1u6.3X50201
C6P42 C1u6.3X50201
C6P44 C1u6.3X50201
C6P18 C1u6.3X50201
C6P16 C1u6.3X50201
C6P36 C1u6.3X50201
C6P27 C1u6.3X50201
C6P22 C1u6.3X50201

C10u6.3X50402

C10u6.3X50402

+VCC_CORE

C10u6.3X50402

C6P10 C1u6.3X50201
C6P25 C1u6.3X50201
C6P40 C1u6.3X50201
C6P37 C1u6.3X50201
C6P11 C1u6.3X50201
C6P9 C1u6.3X50201
C6P41 C1u6.3X50201
C6P43 C1u6.3X50201

C6P45 C1u6.3X50201
C6P35 C1u6.3X50201
C6P28 C1u6.3X50201
C6P12 C1u6.3X50201
C6P23 C1u6.3X50201
C6P17 C1u6.3X50201
C6P24 C1u6.3X50201
C6P14 C1u6.3X50201
C6P39 C1u6.3X50201

1x22 uf 0603
9x10 uf 0402
4x1 uf 0201

C154

C572

C568

C563

3 3

C1u6.3X50201

4 4

Remove RUN_ON_C10 & SLP_S0# control, 14B3 did not support #2018.08.09
Follow 13H1 add RUN_ON control

C558

C1u6.3X50201

C1u6.3X50201

RUN_ON<18,45,46>

C573

C564

C1u6.3X50201

A

C10u6.3X50402

C10u6.3X50402

+1_2VDIMM +VCCSFR

R203 X_0R0402

X_C0.1u25X50402

C10u6.3X50402

R216 0R0603

D

C162

C574

C570

C10u6.3X50402

C444

C1u6.3X50201

Q23

S

X_N-AO3416_SOT23

G

VCCSFR_RUN_ON

C10u6.3X50402

+VCCST

C1u6.3X50201

C571

C10u6.3X50402

+VCCSTG

C54

NA

C582

70A

C357

C10u6.3X50402

C475

C352

C10u6.3X50402

C156

C10u6.3X50402

C10u6.3X50402

+VCCSFR

C541

C1u6.3X50201

B

+VCC_CORE

C327

C6P34

C10u6.3X50402

C10u6.3X50402

C346

C10u6.3X50402

C10u6.3X50402

+1_2VDIMM

C579

C155

C10u6.3X50402

0.06A

0.02A

0.12A

+VCCSFR

+VCCST

C443

EDS 544924 7.1:In case of direct connection (VCCpll_oc
is shorted to VDDQ,no laod switch ),platform should
ensure that VCCst is ON while VCCpll_oc is ON.

B

CPU1L

AN9

VCCCORE_28

AN10

VCCCORE_29

AN24

VCCCORE_30

AN26

VCCCORE_31

AN27

VCCCORE_32

AP2

VCCCORE_33

AP9

VCCCORE_34

AP24

VCCCORE_35

AP26

VCCCORE_36

AR5

VCCCORE_37

AR6

VCCCORE_38

AR7

VCCCORE_39

AR8

VCCCORE_40

AR10

VCCCORE_41

AR25

VCCCORE_42

AR27

VCCCORE_43

AT9

VCCCORE_44

AT24

VCCCORE_45

AT26

VCCCORE_46

AU5

VCCCORE_47

AU6

VCCCORE_48

AU7

VCCCORE_49

AU8

VCCCORE_50

AU9

VCCCORE_51

AU24

VCCCORE_52

AU25

VCCCORE_53

AU26

VCCCORE_54

AU27

VCCCORE_55

AV2

VCCCORE_56

AV5

VCCCORE_57

AV7

VCCCORE_58

AV10

VCCCORE_59

AV27

VCCCORE_60

AW5

VCCCORE_61

AW6

VCCCORE_62

AW7

VCCCORE_63

AW8

VCCCORE_64

AW9

VCCCORE_65

AW10

VCCCORE_66

BB9

RSVD_61

BC24

RSVD_62

AY9

RSVD_63

BB24

RSVD_64

WHL-i7-8565U

A0D-8565U05-I06

AD36
AH32
AH36
AM36
AN32

AW32

AY36
BE32
BH36

C22u6.3X

R32
Y36

BC28

BP11

BP2

BG1
BG2

BL27
BM26

BR11
BT11

0.13A

C437

C368

C1u6.3X50201

X_C47u4X

0.1u10X50201-HF

VCCCORE_100
VCCCORE_101

12 of 20

CPU1N

VDDQ_1
VDDQ_2
VDDQ_3
VDDQ_4
VDDQ_5
VDDQ_6
VDDQ_7
VDDQ_8
VDDQ_9

VCCIO_OUT_10

VDDQ_10

VCCIO_OUT_11

VDDQ_11

VCCIO_OUT_12
VCCIO_OUT_13
VCCIO_OUT_14
VCCIO_OUT_15

RSVD_60

VCCIO_OUT_16

VCCST_2
VCCST_1

VCCSTG_1
VCCSTG_2

VCCPLL_OC_1
VCCPLL_OC_2

VCCPLL_1
VCCPLL_2

14 of 20

WHL-i7-8565U

A0D-8565U05-I06

VCCCORE_67
VCCCORE_68
VCCCORE_69
VCCCORE_70
VCCCORE_71
VCCCORE_72
VCCCORE_73
VCCCORE_74
VCCCORE_75
VCCCORE_76
VCCCORE_77
VCCCORE_78
VCCCORE_79
VCCCORE_80
VCCCORE_81
VCCCORE_82
VCCCORE_83
VCCCORE_84
VCCCORE_85
VCCCORE_86
VCCCORE_87
VCCCORE_88
VCCCORE_89
VCCCORE_90
VCCCORE_91
VCCCORE_92
VCCCORE_93
VCCCORE_94
VCCCORE_95
VCCCORE_96
VCCCORE_97
VCCCORE_98
VCCCORE_99

VCC_SENSE
VSS_SENSE

VIDALERT#

VIDSCK

VIDSOUT

RSVD_65

VCCSTG_3

VCCIO_OUT_1
VCCIO_OUT_2
VCCIO_OUT_3
VCCIO_OUT_4
VCCIO_OUT_5
VCCIO_OUT_6
VCCIO_OUT_7
VCCIO_OUT_8
VCCIO_OUT_9

VCCSA_1
VCCSA_2
VCCSA_3
VCCSA_4
VCCSA_5
VCCSA_6
VCCSA_7
VCCSA_8

VCCSA_9
VCCSA_10
VCCSA_11
VCCSA_12
VCCSA_13
VCCSA_14
VCCSA_15
VCCSA_16

VCCIO_SENSE

VSSIO_SENSE

VSSSA_SENSE
VCCSA_SENSE

AW24
AW25
AW26
AW27
AY24
AY26
BA5
BA7
BA8
BA25
BA27
BB2
BB26
BC5
BC6
BC7
BC9
BC10
BC26
BC27
BD5
BD8
BD10
BD25
BD27
BE9
BE24
BE25
BE26
BE27
BF2
BF9
BF24
BF26
BG27

CORE_SENSE

AN6

CORE_GSENSE

AN5

VR_SVID_ALERT#_R

AA3

VR_SVID_CLK_R

AA1

VR_SVID_DATA_R

AA2

Y3

BG3

0.12A

VCCSTG_G20

+VCC_IO

AK24
AK26
AL24
AL25
AL26
AL27
AM25
AM27
BH24
BH25
BH26
BH27
BJ24
BJ26
BP16
BP18

BG8
BG10
BH9
BJ8
BJ9
BJ10
BK8
BK25
BK27
BL8
BL9
BL10
BL24
BL26
BM24
BN25

BP28
BP29

BE7
BG7

+VCC_SA

C

+VCC_CORE

+VCCSTG

R44
0R0402

4A

+VCC_SA

Add Reserve Cap, refer to PDG 575412 Table 11-2 #2018.08.23

R369
100R1%0402

R377
100R1%0402

C

18x47uf 0603
9x22uf 0603

C338

C363

C51

C47u4X

C47u4X

C47u4X

C359

C12

C356

C22u6.3X

C22u6.3X

C22u6.3X

R36 220R1%0402-RH

1 2

JNC1 X_0402

1 2

JNC2 X_0402

6x10 uF 0402
4x1 uf 0201
4x 0402 reserve

C544 C1u6.3X50201
C512 C1u6.3X50201
C535 C1u6.3X50201
C465 C1u6.3X50201

C516 C10u6.3X50402
C486 C10u6.3X50402
C515 C10u6.3X50402
C536 C10u6.3X50402
C499 C10u6.3X50402
C498 C10u6.3X50402

6A

C491 C10u6.3X50402
C395 C10u6.3X50402
C34 C10u6.3X50402
C439 C10u6.3X50402
C521 C10u6.3X50402

C30 X_C10u6.3X50402
C28 X_C10u6.3X50402
C33 X_C10u6.3X50402
C38 X_C10u6.3X50402

SA_GSENSE <48>
SA_SENSE <48>

C355

C47u4X

C23

C22u6.3X

+VCCST

R37

56.2R1%0402

X_C10p50N0402

D

ZRB18AR60G476ME01L
ZRB18AR60J226ME01L

C470

C47u4X

C11

C22u6.3X

+VCCST

C55

Add Reserve Cap, refer to PDG 575412 Table 11-2 #2018.08.23

C469

C362

C47u4X

C47u4X

C31

C40

C22u6.3X

C22u6.3X

VR_SVID_ALERT# <48>

R46
100R1%0402

VR_SVID_DATA <48>

2015/07/01 Follow NEC
design rule 4-2-39 SVID

C551

C552

X_C10u6.3X50402

+VCC_SA

C36 C10u6.3X50402
C37 C10u6.3X50402
C32 C10u6.3X50402
C497 C10u6.3X50402
C35 C10u6.3X50402
C453 C10u6.3X50402
C392 C10u6.3X50402
C462 C10u6.3X50402
C21 C47u4X
C16 C47u4X

C19 X_C47u4X
C24 X_C47u4X

2x47 uf 0805
13x10uf 0402
7x1uf 0201
2x0805 reserve
4x0402 reserve

D

C358

C47u4X

C10

C22u6.3X

X_C10u6.3X50402

C466

C47u4X

C39

C22u6.3X

X_45.3R1%0402

X_C10p50N0402

+VCC_IO

C390

X_C10u6.3X50402

C351

C47u4X

+VCCST

R43

C50

C510

X_C10u6.3X50402

E

C467

C47u4X

R357
100R1%0402

R358
100R1%0402

C18

C366

C47u4X

CORE_SENSE <48>
CORE_GSENSE <48>

C468

C47u4X

C383

C43

C364

C47u4X

C47u4X

2015/07/01 Follow NEC
design rule 4-2-39 SVID

VR_SVID_CLK <48>

C47u4X

+VCC_CORE

Refer to PDG 575412 Table 11-2

Domain

Primary
side cap

8x10uF 0402

VCC

VCCSA

VCCIO

VDDQ

Title

Title

Title

Whiskey lake U (CPU POWER)

Whiskey lake U (CPU POWER)

Whiskey lake U (CPU POWER)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

MS-14B3

MS-14B3

Date: Sheet

Date: Sheet

Date: Sheet

MS-14B3

18x47uF 0805

6x10uF 0402
2x47uF 0805
2x0805

4x1uF 0201
4x0402

6x10uF 0402

1x22uF 0603
6x10uF 0402

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

E

C365

C47u4X

C47u4X

Secondary
Side cap

42x1uF 0201
14x10uF 0402
9x22uF 0603

7x10uF 0402
4x0402

4x1uF 0201
3x10uF 0402

12 57Friday, November 16, 2018

12 57Friday, November 16, 2018

12 57Friday, November 16, 2018

of

of

of

0A

0A

0A

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

ZRB18AR60G476ME01L
ZRB18AR60J226ME01L

1 1

2018.06.11 Refer to PDG 575412 Table 11-2

C526

C22u6.3X

4x47 uf 0603
15x22 uf 0603

C405

C408

C22u6.3X

C22u6.3X

C69

C71

C22u6.3X

C22u6.3X

C450

C22u6.3X

C72

C22u6.3X

2 2

C407

C441

C529

+VCC_GT

C70

C22u6.3X

C22u6.3X

C404

C22u6.3X

C22u6.3X

C527

C47u4X

C47u4X

3 3

C409

C406

C528

B

31A

C459

C22u6.3X

C22u6.3X

C531

C22u6.3X

C22u6.3X

C473

C47u4X

C47u4X

CPU1M

A5
A6

A8
A11
A12
A14
A15
A17
A18
A20

B3

B4

B6

B8
B11
B14
B17
B20

C2

C3

C6

C7

C8
C11
C12
C14
C15
C17
C18
C20

D4

D7
D11
D12
D14
D15
D17
D18
D20

E4

F5

F6

F7

F8
F11
F14
F17
F20
G11
G12
G14
G15
G17
G18
G20

H5

H6

H7

H8
H11

WHL QS/CFL/WHL_ES1_CNL U

VCCGT_1
VCCGT_2
VCCGT_3
VCCGT_4
VCCGT_5
VCCGT_6
VCCGT_7
VCCGT_8
VCCGT_9
VCCGT_10
VCCGT_11
VCCGT_12
VCCGT_13
VCCGT_14
VCCGT_15
VCCGT_16
VCCGT_17
VCCGT_18
VCCGT_19
VCCGT_20
VCCGT_21
VCCGT_22
VCCGT_23
VCCGT_24
VCCGT_25
VCCGT_26
VCCGT_27
VCCGT_28
VCCGT_29
VCCGT_30
VCCGT_31
VCCGT_32
VCCGT_33
VCCGT_34
VCCGT_35
VCCGT_36
VCCGT_37
VCCGT_38
VCCGT_39
VCCGT_40
VCCGT_41
VCCGT_42
VCCGT_43
VCCGT_44
VCCGT_45
VCCGT_46
VCCGT_47
VCCGT_48
VCCGT_49
VCCGT_50
VCCGT_51
VCCGT_52
VCCGT_53
VCCGT_54
VCCGT_55
VCCGT_56
VCCGT_57
VCCGT_58
VCCGT_59
VCCGT_0

13 of 20

WHL-i7-8565U

A0D-8565U05-I06

VCCCORE_1/VCCGT_93/VCCGT_93
VCCCORE_2/VCCGT_94/VCCGT_94
VCCCORE_3/VCCGT_95/VCCGT_95
VCCCORE_4/VCCGT_96/VCCGT_96
VCCCORE_5/VCCGT_97/VCCGT_97
VCCCORE_6/VCCGT_98/VCCGT_98

VCCCORE_7/VCCGT_99/VCCGT_99
VCCCORE_8/VCCGT_100/VCCGT_100
VCCCORE_9/VCCGT_101/VCCGT_101

VCCCORE_10/VCCGT_102/VCCGT_102
VCCCORE_11/VCCGT_103/VCCGT_103
VCCCORE_12/VCCGT_104/VCCGT_104
VCCCORE_13/VCCGT_105/VCCGT_105
VCCCORE_14/VCCGT_106/VCCGT_106
VCCCORE_15/VCCGT_107/VCCGT_107
VCCCORE_16/VCCGT_108/VCCGT_108
VCCCORE_17/VCCGT_109/VCCGT_109
VCCCORE_18/VCCGT_110/VCCGT_110
VCCCORE_19/VCCGT_111/VCCGT_111
VCCCORE_20/VCCGT_112/VCCGT_112
VCCCORE_21/VCCGT_113/VCCGT_113
VCCCORE_22/VCCGT_114/VCCGT_114
VCCCORE_23/VCCGT_115/VCCGT_115
VCCCORE_24/VCCGT_116/VCCGT_116
VCCCORE_25/VCCGT_117/VCCGT_117
VCCCORE_26/VCCGT_118/VCCGT_118
VCCCORE_27/VCCGT_119/VCCGT_119

C

VCCGT_60
VCCGT_61
VCCGT_62
VCCGT_63
VCCGT_64
VCCGT_65
VCCGT_66
VCCGT_67
VCCGT_68
VCCGT_69
VCCGT_70
VCCGT_71
VCCGT_72
VCCGT_73
VCCGT_74
VCCGT_75
VCCGT_76
VCCGT_77
VCCGT_78
VCCGT_79
VCCGT_80
VCCGT_81
VCCGT_82
VCCGT_83
VCCGT_84
VCCGT_85
VCCGT_86
VCCGT_87
VCCGT_88
VCCGT_89
VCCGT_90
VCCGT_91
VCCGT_92

VCCGT_SENSE

VSSGT_SENSE

H12
H14
H15
H17
H18
H20
J7
J8
J11
J14
J17
J20
K2
K11
L7
L8
L10
M9
N7
N8
N9
N10
P2
P8
R9
T8
T9
T10
U8
U10
V9
W8
W9
AA9
AB2
AB8
AB9
AB10
AC8
AD9
AE8
AE9
AE10
AF2
AF8
AF10
AG8
AG9
AH9
AJ8
AJ10
AK2
AK9
AL8
AL9
AL10
AM8
V2
Y8
Y10

E3
D2

15x10 uf 0402

C6P33 C10u6.3X50402
C6P2 C10u6.3X50402
C6P1 C10u6.3X50402
C6P8 C10u6.3X50402
C389 C10u6.3X50402
C506 C10u6.3X50402
C411 C10u6.3X50402
C449 C10u6.3X50402
C461 C10u6.3X50402
C429 C10u6.3X50402
C451 C10u6.3X50402
C532 C10u6.3X50402
C478 C10u6.3X50402
C396 C10u6.3X50402
C423 C10u6.3X50402

+VCC_CORE

+VCC_GT

R53

100R1%0402

R58

100R1%0402

D

ZRB15XR60J106ME12D

+VCC_GT+VCC_GT

PWR short to Vcore for WHL ES2 Pin out
Cap close to Pin out

Refer to PDG 575412 Table 11-6

Domain

Primary
side cap

VCCGT

GT_SENSE <48>

GT_GSENSE <48>

11x1 uf 0201

C6P21 C1u6.3X50201
C6P20 C1u6.3X50201
C6P13 C1u6.3X50201
C6P29 C1u6.3X50201
C6P30 C1u6.3X50201
C6P7 C1u6.3X50201
C6P4 C1u6.3X50201
C6P19 C1u6.3X50201
C403 C1u6.3X50201
C421 C1u6.3X50201
C448 C1u6.3X50201

15x22uF 0603
4x47uF 0805

E

Reference 16S1

Secondary
Side cap

11x1uF 0201
15x10uF 0402

VCCOPC/VCCOPC_1P8 . VCCEOPIO for U43e only

CPU1O

WHL QS/CFL U/WHL ES1_CNL U22

K12

RSVD_25/VCC_OPC_1/RSVD_25

K14

RSVD_26/VCC_OPC_2/RSVD_26

K15

RSVD_27/VCC_OPC_3/RSVD_27

K17

RSVD_28/VCC_OPC_4/RSVD_28

K18

RSVD_29/VCC_OPC_5/RSVD_29

K20

RSVD_30/VCC_OPC_6/RSVD_30

L25

RSVD_31/VCC_OPC_7/RSVD_31

M24

RSVD_32/VCC_OPC_8/RSVD_32

M26

RSVD_33/VCC_OPC_9/RSVD_23

P24

RSVD_34/VCC_OPC_10/RSVD_34

P26

RSVD_35/VCC_OPC_11/RSVD_35

R24

RSVD_36/VCC_OPC_12/RSVD_36

R25

RSVD_37/VCC_OPC_13/RSVD_37

R26

RSVD_38/VCC_OPC_14/RSVD_38

V24

RSVD_21/VCC_OPC_1P8_3/RSVD_21

W25

RSVD_22/VCC_OPC_1P8_4/RSVD_22

Y24

RSVD_23/VCC_OPC_1P8_1/RSVD_23

Y25

RSVD_24/VCC_OPC_1P8_2/RSVD_24

G2

RSVD_47

G1

RSVD_48

C34

RSVD_49/VSS_435/RSVD_49

G3

RSVD_50/VSS_436/RSVD_50

4 4

R353X_49.9R1%0402

MSM#
LPM_ZVM#
OPCE_RCOMP

TPJNC48

TPJNC49

For Coffee lake

A

G4

RSVD_51/VSS_437/RSVD_51

A34

RSVD_52/RSVD_TP/RSVD_52

B35

RSVD_53/RSVD_TP/RSVD_53

AJ27

RSVD_54/MSM#/RSVD_54

AH26

RSVD_55/ZVM#/RSVD_55

L5

RSVD_59/OPCE_RCOMP/RSVD_59

WHL-i7-8565U

A0D-8565U05-I06

B

15 of 20

WHL QS/CFL U/WHL ES1_CNL U22

RSVD_39/VCCEOPIO_1/RSVD_39
RSVD_40/VCCEOPIO_2/RSVD_40
RSVD_41/VCCEOPIO_3/RSVD_41
RSVD_42/VCCEOPIO_4/RSVD_42
RSVD_43/VCCEOPIO_5/RSVD_43
RSVD_44/VCCEOPIO_6/RSVD_44
RSVD_45/VCCEOPIO_7/RSVD_45

RSVD_46/VCCEOPIO_8/RSVD_46
RSVD_19/VCCEOPIO_SENSE/RSVD_19
RSVD_20/VSSEOPIO_SENSE/RSVD_20

RSVD_58/OPC_RCOMP/RSVD_58

RSVD_56
RSVD_57

AA24
AA26
AB25
AC24
AC25
AC26
AD24
AD26
V25
T25
A35
D34
N5

All O package pinout is RSVD in WHL

C

OPC_RCOMP

For Coffee lake

R354X_49.9R1%0402

Title

Title

Title

Whiskey lake U (GT POWER)

Whiskey lake U (GT POWER)

Whiskey lake U (GT POWER)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

D

MS-14B3

MS-14B3

MS-14B3

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

of

of

of

13 57Friday, November 16, 2018

13 57Friday, November 16, 2018

13 57Friday, November 16, 2018

E

0A

0A

0A

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

Reference 16S1

Follow PDG Table11-4, add
decoupling 1uF 0201 *1
#2018.09.07

+3VSUS

Close to CP29

C533
X_C1u6.3X50201

+1_8VSUS

1 1

2 2

3 3

4 4

+1_05VSUS

2016/03/24 stuff 47u
CAP For PLL point& RF

2016/03/24 stuff 47u
CAP For PLL point

+1_05VSUS

Follow PDG Table11-4, add
decoupling 1uF 0201 *1
#2018.09.07

+3VSUS

+1_05VSUS

+1_05VSUS

2018.06.21 Cap close to BV12 , from 47uF change to 22uF by PDF suggest

+1_05VSUS

L14 2.2u1A-HF

L3 220L2A-50

A

C370
C47u6.3X

C507

C1u6.3X50201

C455
C47u6.3X

Close to BV12

C445

C410

C1u6.3X50201

C22u6.3X

Close to BV2

C386
C1u6.3X50201

Close to BT20

C412
C1u6.3X50201

+1_05VSUS

Close to CP17

C103
C1u6.3X50201

C519
X_0.1u10X50201-HF

+1_05VSUS

C471
X_C2.5p25N0201

C372
C1u6.3X50201

C513

0.1u10X50201-HF

Close to BR24

Close to BV18

C502
X_C1u6.3X50201

+3VSUS

X_C1u6.3X50201

Close to BP20

C511

C492

C1u6.3X50201

0.024A

Close to BT24

C537 C1u6.3X50201

PCIE GEN2 x1
PCIE GEN3 x4
USB3.1 GEN2 x1
USB3.1 GEN3 x3

+1_05VSUS

C542

B

1.625A

C1u6.3X50201

0.696A

0.199A

4.26A

VCCDSW_1P05_C

0.102A

1.217A

VCCAMPHYPLL_1P05

0.152A

0.28A

0.004A

0.006A

VCCHDA

0.002A

B

CPU1P

BP20

VCCPRIM_1P05_5

BW16

VCCPRIM_1P05_6

BW18

VCCPRIM_1P05_7

BW19

VCCPRIM_1P05_8

BY16

VCCPRIM_1P05_9

CA14

VCCPRIM_1P05_10

CC15

VCCPRIM_1P8_6

CD15

VCCPRIM_1P8_7

CD16

VCCPRIM_1P8_8

CP17

VCCPRIM_1P8_9

CB22

VCCPRIM_3P3_4

CB23

VCCPRIM_3P3_5

CC22

VCCPRIM_3P3_6

CC23

VCCPRIM_3P3_7

CD22

VCCPRIM_3P3_8

CD23

VCCPRIM_3P3_9

CP29

VCCPRIM_3P3_10

BU15

VCCPRIM_CORE_1

BU22

VCCPRIM_CORE_2

BV15

VCCPRIM_CORE_3

BV16

VCCPRIM_CORE_4

BV18

VCCPRIM_CORE_5

BV19

VCCPRIM_CORE_6

BV20

VCCPRIM_CORE_7

BV22

VCCPRIM_CORE_8

BW20

VCCPRIM_CORE_9

BW22

VCCPRIM_CORE_10

CA12

VCCPRIM_CORE_11

CA16

VCCPRIM_CORE_12

CA18

VCCPRIM_CORE_13

CA19

VCCPRIM_CORE_14

CA20

VCCPRIM_CORE_15

CB12

VCCPRIM_CORE_16

CB14

VCCPRIM_CORE_17

CB15

VCCPRIM_CORE_18

BT24

VCCDSW_1P05

BU14

VCCAPLL_1P05_4

BV12

VCCPRIM_MPHY_1P05_2

BW12

VCCPRIM_MPHY_1P05_3

BW14

VCCPRIM_MPHY_1P05_4

BY12

VCCPRIM_MPHY_1P05_5

BY14

VCCPRIM_MPHY_1P05_6

BV2

VCCAMPHYPLL_1P05

BR15

VCCAPLL_1P05_3

CC12

VCCDUSB_1P05

BR24

VCCDSW_3P3_1

BT20

VCCHDA

BV23

VCCSPI

BT18

VCCPRIM_1P05_11

BT19

VCCPRIM_1P05_12

BU18

VCCPRIM_1P05_13

BU19

VCCPRIM_1P05_14

BT22

VCCPRIM_1P05_1

BP22

VCCPRIM_1P05_2

BV14

VCCPRIM_MPHY_1P05_1

WHL-i7-8565U

A0D-8565U05-I06

16 of 20

C

VCCPRIM_3P3_3

VCCRTC

VCCPRIM_1P05_3

DCPRTC

VCCPRIM_1P05_4

VCCAPLL_1P05_1

VCCA_BCLK_1P05

VCCAPLL_1P05_2

VCCA_SRC_1P05

VCCA_XTAL_1P05

VCCDPHY_1P24_4
VCCDPHY_1P24_5

VCCDPHY_1P24_1
VCCDPHY_1P24_2
VCCDPHY_1P24_3

VCCDSW_3P3_2

VCCA_19P2_1P05

VCCPRIM_1P8_1
VCCPRIM_1P8_2
VCCPRIM_1P8_3
VCCPRIM_1P8_4
VCCPRIM_1P8_5

VCCPRIM_3P3_2

VCCPRIM_3P3_1

GPP_B0/CORE_VID0
GPP_B1/CORE_VID1

C

D

+3VSUS

CB16

0.002A

BR23

BY20

DCPRTC_C

BP24

C534 X_C1u6.3X50201

Close to BP24

BR20

BT12

0.009A

BP14

BR14

0.042A

BU12

0.002A

CP5

0.61A

BY24
CA24

BY23
CA23
CP25

BT23

0.027A

BR12

CC18
CC19
CD18
CD19
CP23

BW23

BP23

CORE_VID0

CB36

CORE_VID1

CB35

ADD TP

HSIO power control :used to control powet to
VCCMPHYGT_1P0,VCCMPHYPLL_1P0 and VCCSRAM_1P0
in S0&Sx.PCH will drive EXT_PWR_GATE# low
when all the high speed I/Ocontrollers (XHCI
,SATA and PCIE )are idle or no device
attached .

C553

C1u6.3X50201

L1 2.2u1A-HF

VCCA_XTAL_1P05_L

Close to CP5

C67

C1u6.3X50201

Close to BR23 Cl ose to BR23

C76

C1u6.3X50201

+3VSUS

If Deep Sx is not supported on the platform , VCCDSW tie to VCCPRIM_3P3

C518
C1u6.3X50201

+3VSUS

C549
C1u6.3X50201

TPJNC28
TPJNC31

RTCVCC

C586
C1u6.3X50201

+1_05VSUS

C488
C47u6.3X

Follow PDG Table11-4, add
decoupling 1uF 0201 *1
#2018.09.07

Internel PCH power LDO for CNVi

C68

+VCCLDOSRAM_1P24 +VCCDPHY_1P24

C47u6.3X

+1_8VSUS

Close to CP23

C111
X_C1u6.3X50201

D

C587

0.1u10X50201-HF

E

When CNVi is not used in the design.
VCCDPHY_1P24 pin shall be disconnected from the VCCLDOSRAM_IN_1P24

Internel PCH power LDO for CNVi

+VCCLDOSRAM_1P24 +VCCDPHY_1P24

R401 0R0603

Close to CP25

C530
C4.7u6.3X50402-HF

2018.06.08 Change Power name form +VCCMPHYGT_1P0 to +VCCMPHYGT_1P05

+1_05VSUS

C433

C1u25X50402-HF

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Titl e

Titl e

Titl e

Whiskey lake U (PCH POWER )

Whiskey lake U (PCH POWER )

Whiskey lake U (PCH POWER )

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MS-14B3

MS-14B3

MS-14B3

MICRO-STAR INT'L CO.,LTD.

C483

C1u25X50402-HF

E

14 57Friday, November 16, 2018

14 57Friday, November 16, 2018

14 57Friday, November 16, 2018

0A

0A

0A

of

of

of

A

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

B

C

D

E

B37

CB3

P10

CB33

CB4

P33

CB7

P36
BA10
CC11

BA28

BA3

CC20

R27
BB3

CC25

R28
BB33
CC28

R29
BB36
CC31

R30

BB4

CC7

R31
BC25
CD11

T27

CD12

T30
BC29
CD14

T33

T35
BC32
CD24

T36
CD25

BC8

CE33

U26
BD28
CE35

BD33
CE36

V26

BD35

CE7

V27
BD36
CF11

BE10
CF14

V30
BE28
CF19

V33
BE29

CF2

V36

BE3

N6

B5

P3
B7

B9

P4

P7

T7

U7

V3

CPU1T

VSS_66
VSS_73
VSS_79
VSS_84
VSS_89
VSS_95
VSS_102
VSS_110
VSS_120
VSS_132
VSS_145
VSS_14
VSS_25
VSS_35
VSS_44
VSS_52
VSS_59
VSS_65
VSS_72
VSS_78
VSS_131
VSS_144
VSS_13
VSS_24
VSS_34
VSS_43
VSS_51
VSS_58
VSS_64
VSS_71
VSS_119
VSS_130
VSS_143
VSS_12
VSS_23
VSS_33
VSS_42
VSS_50
VSS_57
VSS_63
VSS_109
VSS_118
VSS_129
VSS_142
VSS_11
VSS_22
VSS_32
VSS_41
VSS_49
VSS_56
VSS_101
VSS_108
VSS_117
VSS_128
VSS_141
VSS_10
VSS_21
VSS_31
VSS_40
VSS_48
VSS_94
VSS_100
VSS_107
VSS_116
VSS_127
VSS_140
VSS_9
VSS_20
VSS_30
VSS_39
VSS_88
VSS_93

VSS_106
VSS_115
VSS_126
VSS_139

VSS_105
VSS_114
VSS_125
VSS_138
VSS_500

VSS_104
VSS_113
VSS_124
VSS_137

VSS_103
VSS_112
VSS_123
VSS_136

VSS_135

VSS_122
VSS_134

VSS_111
VSS_121
VSS_133

19 of 20

WHL-i7-8565U

A0D-8565U05-I06

VSS_99

VSS_8
VSS_19
VSS_29
VSS_83
VSS_87
VSS_92
VSS_98

VSS_18
VSS_77
VSS_82
VSS_86
VSS_91
VSS_97

VSS_6
VSS_70
VSS_76
VSS_81
VSS_85
VSS_90
VSS_96

VSS_5
VSS_17
VSS_28
VSS_38
VSS_47
VSS_55
VSS_62
VSS_69
VSS_75
VSS_80

VSS_4
VSS_16
VSS_27
VSS_37
VSS_46
VSS_54
VSS_61
VSS_68
VSS_74

VSS_3
VSS_15
VSS_26
VSS_36
VSS_45
VSS_53
VSS_60
VSS_67

VSS_2

CF23
V4
BE30
CF28
W10
BE31
CF3
W27
CF4
W30
BF3
CG33
W7
BF33
CG7
BF36
Y26
BF4
CH31
Y27
BG25
Y30
BG28
CJ11
Y33
CJ14
Y35
BH28
CJ19
Y7
BH29
CJ23
BH32
CJ28
BH33
CJ33
BH35
CJ35
BP19
BR16
BY18
BY19
CC16
BU16
CC14
BR22
BU20
CD20
BT14
BP12
CB24
CC24
J5
U24
BD7
AR4
AU4
AW4
BA6
BC4
BE4
BE8
BA4
BD4
BG4
CJ2
CJ3
AM5
CM4
AC5
AG5
CR6

BT35

AL32
BT36

AL7

AM10

BU11

E23

AM28

E27
AM33
BU23

E29
AM35
BU24

E31

BU25

E33

AN25

BU7

AN28

BV11

F12
AN29

F15

AN30

F18

AN31

BV3

AN7

BV31

F21

AN8

BV33

F24

BV4

AP3

BW11

AP33

BW15

G21

AP36

G27

AP4

G33
AR28

G35

G36

AT33

BW24

AT35

H21

AT36

BW7

H27

AT4

BY11

AU10

BY15

AU28

BY22

J12

AU29

J15

D6

D8

D9

E9

F2

F3

F4

G9

H9

CPU1S

VSS_277
VSS_290
VSS_156
VSS_165
VSS_172
VSS_208
VSS_217
VSS_227
VSS_238
VSS_250
VSS_263
VSS_276
VSS_289
VSS_155
VSS_164
VSS_200
VSS_207
VSS_216
VSS_226
VSS_237
VSS_249
VSS_262
VSS_275
VSS_288
VSS_154
VSS_194
VSS_199
VSS_206
VSS_215
VSS_225
VSS_236
VSS_248
VSS_261
VSS_274
VSS_287
VSS_189
VSS_193
VSS_198
VSS_205
VSS_214
VSS_224
VSS_235
VSS_247
VSS_260
VSS_273
VSS_185
VSS_188
VSS_192
VSS_197
VSS_204
VSS_213
VSS_223
VSS_234
VSS_246
VSS_259
VSS_272
VSS_286
VSS_153
VSS_163
VSS_171
VSS_177
VSS_181
VSS_184
VSS_187
VSS_191
VSS_258
VSS_271
VSS_285
VSS_152
VSS_162
VSS_170
VSS_176

VSS_180
VSS_183
VSS_186
VSS_245
VSS_257
VSS_270
VSS_284
VSS_151
VSS_161
VSS_169
VSS_175
VSS_179
VSS_182
VSS_233
VSS_244
VSS_256
VSS_269
VSS_283
VSS_150
VSS_160
VSS_168
VSS_174
VSS_178
VSS_222
VSS_232
VSS_243
VSS_255
VSS_268
VSS_282
VSS_149
VSS_159
VSS_167
VSS_173
VSS_212
VSS_221
VSS_231
VSS_242
VSS_254
VSS_267
VSS_281
VSS_148
VSS_158
VSS_166
VSS_203
VSS_211
VSS_220
VSS_230
VSS_241
VSS_253
VSS_266
VSS_280
VSS_147
VSS_157
VSS_196
VSS_202
VSS_210
VSS_219
VSS_229
VSS_240
VSS_252
VSS_265
VSS_279
VSS_146
VSS_190
VSS_195
VSS_201
VSS_209
VSS_218
VSS_228
VSS_239
VSS_251
VSS_264
VSS_278

18 of 20

WHL-i7-8565U

A0D-8565U05-I06

BY25
J18
AU32
BY28
J21
AV25
BY33
J24
AV28
BY35
J33
AV3
BY36
J36
AV33
J6
AV36
C1
K21
AV4
C21
K22
AV6
C25
K24
AV8
C29
K25
AW28
C33
K27
AW29
C4
K28
AW3
C9
K29
AW30
CA11
K3
AW31
CA15
K30
AY33
CA22
K31
AY35
K32
B12
K4
B15
CA25
K9
B18
CB11
L27
B21
L33
B23
L35
B25
CB18
L36
B27
CB19
L6
B29
CB2
N25
B31
CB20
N27
CB25

CPU1R

CR34

VSS_342

BT5

VSS_351

BY5

VSS_361

CP35

VSS_371

CM37

VSS_381

CK37

VSS_391

AW1

VSS_401

1 1

2 2

3 3

CM1

VSS_411

BD6

VSS_421

AY4

VSS_360

B34

VSS_370

E35

VSS_380

A4

VSS_390

AE24

VSS_400

AE26

AF25
AG24
AG26
AH24
AH25

B36
C36

C37
CN1
CN2

CN37

CP2

A32

F33

BJ7

CJ36

A36

BK10

CJ4

AB27

BK2
CK1
AB3

BK28
AB30

BK3
CK4

AB33
BK33

CK7

AB36

BK4

CL2
AB4
BK7

CM13

AB7

BL25
CM17
AC10

BL28
CM21
AC27

BL29
CM25
AC30

BL30
CM29

BL31
CM31
AD33

BL32
CM33
AD35

B2

D1

A3

VSS_410
VSS_420
VSS_428
VSS_434
VSS_296
VSS_350
VSS_359
VSS_369
VSS_379
VSS_389
VSS_399
VSS_409
VSS_419
VSS_427
VSS_433
VSS_341
VSS_349
VSS_358
VSS_368
VSS_378
VSS_388
VSS_398
VSS_408
VSS_418
VSS_426
VSS_333
VSS_340
VSS_348
VSS_357
VSS_367
VSS_377
VSS_387
VSS_397
VSS_407
VSS_417
VSS_325
VSS_332
VSS_339
VSS_347
VSS_356
VSS_366
VSS_376
VSS_386
VSS_396
VSS_406
VSS_317
VSS_324
VSS_331
VSS_338
VSS_346
VSS_355
VSS_365
VSS_375
VSS_385
VSS_395
VSS_309
VSS_316
VSS_323

17 of 20

WHL-i7-8565U

A0D-8565U05-I06

VSS_330
VSS_337
VSS_345
VSS_354
VSS_364
VSS_374
VSS_384
VSS_302
VSS_308
VSS_315
VSS_322
VSS_329
VSS_336
VSS_344
VSS_353
VSS_363
VSS_373
VSS_295
VSS_301
VSS_307
VSS_314
VSS_321
VSS_328
VSS_335
VSS_343
VSS_352
VSS_362
VSS_416
VSS_425
VSS_432
VSS_294
VSS_300
VSS_306
VSS_313
VSS_320
VSS_327
VSS_334
VSS_405
VSS_415
VSS_424
VSS_431
VSS_293
VSS_299
VSS_305
VSS_312
VSS_319
VSS_326
VSS_394
VSS_404
VSS_414
VSS_423
VSS_430
VSS_292
VSS_298
VSS_304
VSS_311
VSS_318
VSS_383
VSS_393
VSS_403
VSS_413
VSS_422
VSS_429
VSS_291
VSS_297
VSS_303
VSS_310
VSS_372
VSS_382
VSS_392
VSS_402
VSS_412

BL7
AE25
BM33
CM5
AE27
BM35
CM9
AE30
BM36
CN13
AE7
BM9
CN17
AF27
BN30
CN21
AF3
BN7
CN25
AF30
CN29
AF33
BP15
AF36
AF4
CN5
AF7
BP25
CN9
AG10
BP3
CP1
BP32
CP11
AH27
BP33
CP13
AH28
BP4
CP15
AH29
BP7
CP19
AH30
CP21
AH31
BR19
CP27
AH33
BR25
AH35
CP37
AJ25
BT15
AJ28
BT16
CP9
AJ7
CR2
AK3
CR36
AK33
D21
AK36
BT25
D25
AK4
BT28
AL28
BT33
D5
AL29

4 4

Reference 16S1

A

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

Titl e

Titl e

Titl e

Whiskey lake U (GND)

Whiskey lake U (GND)

Whiskey lake U (GND)

Size

Size

Size

Document Number Re v

Document Number Re v

Document Number Re v

Custom

Custom

Custom

Date: Sheet

Date: Sheet

B

C

Date: Sheet

D

MS-14B3

MS-14B3

MS-14B3

MICRO-STAR INT'L CO.,LTD.

of

of

of

15 57Friday, November 16, 2018

15 57Friday, November 16, 2018

15 57Friday, November 16, 2018

E

0A

0A

0A

5

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

4

3

CON15
FPC40P-0.5PITCH_NATURAL-HF

N5A-40F0180-A81

FPC_S40_10

4142

GND

2

1

D D

C C

Check cable arrange with ME

< 750 mills

eDP

EDP_TX1_DN<3>
EDP_TX1_DP<3>

EDP_TX0_DN<3>
EDP_TX0_DP<3>

EDP_AUX_DP<3>
EDP_AUX_DN<3>

C642 C0.1u25X50402-HF
C644 C0.1u25X50402-HF

C645 C0.1u25X50402-HF
C648 C0.1u25X50402-HF

C603 C0.1u25X50402-HF
C604 C0.1u25X50402-HF

+3V_LCD

EDP_TX1_DN_C
EDP_TX1_DP_C

EDP_TX0_DN_C
EDP_TX0_DP_C

EDP_AUX_DP_C
EDP_AUX_DN_C

1.5A

Change LVDS_BKLTCTL_R net name to
EDP_BKLTCTL_R. 20170925

EC_BL-ON<18>

EDP_BKLTCTL<3>

R491 0R1%0402
R492 0R1%0402

GND

C594 X_C0.1u25X50402-HF

+PWR_SRC

GND

EDP_HPD<3>

EC_BL-ON_R
EDP_BKLTCTL_R

1.5A

C595 C1u25X5

Camera move to Page. 31. 20171116

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

B B

GND

+3VRUN

EDP_TX1_DN_C

EDP_TX1_DP_C

A A

EDP_TX0_DN_C

EDP_TX0_DP_C

5

EL19

1

2

X_CMC-L12-9008100-HF

L12-9008100-I05

FILTER_S4_1_25X1

4

3

ER6
X_100R1%0402

EDP_AUX_DN_C

EDP_AUX_DP_C

4

EL18

1

2

X_CMC-L12-9008100-HF

L12-9008100-I05

FILTER_S4_1_25X1

EL20

1

2

X_CMC-L12-9008100-HF

L12-9008100-I05

FILTER_S4_1_25X1

4

3

4

3

ER5
X_100R1%0402

ER7
X_100R1%0402

3

C258

C1u25X50402-HF

X_C0.1u25X50402-HF

GND

C249

U30
APL3512ABI-TRG_SOT23-5-HF

I36-3512A09-A30

SOT23_5_NPC30X

5

VIN

GND

4

SS

2

+3V_LCD_R

1

VO

2

3

EN

R293
100KR1%0402

GNDGND

Titl e

Titl e

Titl e

Size

Size

Size

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+3V_LCD

R292

0R0603

GND

EDP_VDDEN <3>

eDP Pannel

eDP Pannel

eDP Pannel

Document Number Re v

Document Number Re v

Document Number Re v

MS-14B3

MS-14B3

MS-14B3

Max 2A

C230

C0.1u25X50402-HF

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

GND

C234
C10u10X5-HF

16 57Friday, November 16, 2018

16 57Friday, November 16, 2018

16 57Friday, November 16, 2018

1

of

of

of

0A

0A

0A

5

MSI CONFIDENTIAL

60046221　robin(周斌)

RD(C)2019012121002客戶服務部

孫飛(60010839)

smd.db-x7.ru

4

3

2

1

HDMI Level Shifter

+3VRUN

SCLDDC

D D

Internal pull-down with 130k ohm

For AOC TV issue

GND

HDMI1_CLK_DN<3>
HDMI1_CLK_DP<3>

HDMI1_TX0_DN<3>
HDMI1_TX0_DP<3>
HDMI1_TX1_DN<3>
HDMI1_TX1_DP<3>

HDMI1_TX2_DN<3>
HDMI1_TX2_DP<3>

C C

+5VSUS

B B

A A

C44

C1u25X50402-HF

OVS SRC

DDC I2C buffer offset select
H:Offset 1
L:Offset 2
Hi-Z:Offset 3

DDC_EN

Enables or Disables the DDC I2C buffer
H:DDC Buffer enabled
L:DDC Buffer disabled

C380 C0.1u25X50402-HF
C379 C0.1u25X50402-HF

C378 C0.1u25X50402-HF
C377 C0.1u25X50402-HF
C376 C0.1u25X50402-HF
C375 C0.1u25X50402-HF

C374 C0.1u25X50402-HF
C373 C0.1u25X50402-HF

< 150 mills

GND

C47

X_C0.1u25X50402-HF

R352 X_4.7KR0402

R349 0R1%0402

R362 4.7KR0402

5

HDMI_HPD<3>

U4

5

VIN

4

APL3512ABI-TRG_SOT23-5-HF

I36-3512A09-A30

SOT23_5_NPC30X

+3VRUN

GND

+3VRUN

R3452.2KR1%0402

HDMI_CLK#
HDMI_CLK

HDMI_D0#
HDMI_D0
HDMI_D1#
HDMI_D1

HDMI_D2#
HDMI_D2

R361 4.7KR0402

+3VRUN

R62 4.02KR1%0402

GND

Internal pull-down with 130k ohm

Charge R322 to PF1(D08-0800900-B07) for Safety. 20180202

+5VRUN_HDMI_R

1

VO

2

GND

GND

EN3SS

Stuff R159 for SA. 20171207

TMDS outputs rise and fall time select
H:Edge Rate:Slowest SRC =High adds ~60ps
L:Edge Rate: Slow SRC =Low adds ~30ps
Hi-Z:Edge Rate VCC/2

HPDINV

HPD_SOURCE Logic and Level Select
H:HPD Inversion HPD_SOURCE VOH =0.9V
L:HPD non-inversion HPD_SOURCE VOH =3.2V

SDADDC

HP_DET
DDC_EN

+3VRUN

+3VRUN

+3VRUN

GNDGND

R351 X_4.7KR0402

R348 0R1%0402

R61 4.7KR0402

HPDINV
OVS

GND

41

GND

1

IN_D1-

2

IN_D1+

3

VCC

4

IN_D2-

5

IN_D2+

6

IN_D3-

7

IN_D3+

8

VCC_1

9

IN_D4-

10

IN_D4+

SRC

I2C_EN

POLYSW2_P1_7

D08-0800900-B07

PF1

1 2

F-MF-FSMF050X-2-HF

+3VRUN

R56
100KR1%0402

39

40

NC_2

NC

11

OC_2

38

OVS

VCC_212SRC13I2C_EN14Vsadj15HPD_SOURCE

35

36

33

34

37

VCC_7

HPDINV

DDC_EN

SDA_SINK

HPD_SINK

16

18

R63
X_100KR1%0402

GND

Max 2A

C0.1u25X50402-HF

+3VRUN

GND

GND

4

Power Saving Mode : H
Normal Mode : L

OE_N

31

32

OE_N

VCC_6

SCL_SINK

OUT_D1-

OUT_D1+

VCC_5

OUT_D2-

OUT_D2+

OUT_D3-

OUT_D3+

VCC_4

OUT_D4-

OUT_D4+

VCC_319SDA_SOURCE17SLC_SOURCE

NC_1

20

R368 2.2KR1%0402

R371 2.2KR1%0402

+5VRUN_HDMI

C59

+3VRUN

R383

10KR1%0402

R380

X_0R1%0402

C63
C10u10X5-HF

HDMI_CLKN
HDMI_CLKP

HDMI_TX0N
HDMI_TX0P
HDMI_TX1N
HDMI_TX1P

HDMI_TX2N
HDMI_TX2P

100 ohm

DDI1_CTRL_CLK <3>

DDI1_CTRL_DATA <3>

30
29
28
27
26
25
24
23
22
21

U40
SN75DP139RSBR-RH

B0B-751391C-T07

QFN40_TSMDQ128

GND

EMI Close Connector

HDMI_TX0P

HDMI_TX0N

HDMI_TX1P

HDMI_TX1N

HP_DET
PLUGGED 5V
UNPLUGGED 0V

HP_DET

Q7

G

N-2N7002ET1G_SOT23-3-HF

S

D

D03-7002E89-O05

SOT23SGD_T

GND

+3VRUN

+3VRUN

+3VRUN

SMB_Debug_SCL<18>

SMB_Debug_SDA<18>

TX0

ER2
180R1%0402

TX1

ER3
180R1%0402

Delete EL4~7(L12-9008100-I05) for Layout. 20171024A

3

HDMI_TX2P

HDMI_TX2N

HDMI_CLKP

HDMI_CLKN

HDMI Connector

D1
S-BAT54ALT1G_SOT23-RH

D01-BAT5429-D07

SOT23_3P_U1

Z

+5VRUN

+5VRUN_HDMI

W > 20mils

C58
C0.1u25X50402-HF

GND

+5VRUN_HDMI

R60 0R1%0402

R57 0R1%0402

SMB_Debug_SCL_R

SMB_Debug_SDA_R

TX2

ER4
180R1%0402

CLK

ER1
180R1%0402

Change CON3 P/N from N5Y-19M0910-AF2 to N5Y-19M1250-AF2 for ME. 20171102A

SCLDDC_R

Y

SDADDC_R

X

R27

R24

2.2KR1%0402

Y

2.2KR1%0402

C0.22u25X-HF

Z

X

D2
BAV99LT1_SOT23

D01-BAV9919-P03

SOT23_3P_U1

NN-BSS138DW-7-F_SOT363-6-RH

D03-138DW19-D07

C361

for ESD

HP_DET HP_DET_R

R33 22R0402

+3VRUN

GND

+3VRUN

GND

2

HDMI_TX2P

HDMI_TX2N
HDMI_TX1P

HDMI_TX1N
HDMI_TX0P

HDMI_TX0N
HDMI_CLKP

HDMI_CLKN
SMB_Debug_SCL_R
SMB_Debug_SDA_R
SCLDDC
SDADDC

HP_DET

R343

X_100KR1%0402

Q5

SOT_363

C432
C0.1u25X50402-HF

GND

+3VRUN

D1

S1

G1

GND

C66
C0.01u25X0402

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

CON2
HDMI19PSM_BLACK-HF-22

N5Y-19M1250-AF2

HDMI_S19_3

+3VRUN

R340
100KR1%0402

D2

S2

G2

Place Under DUT

C73
C0.1u25X50402-HF

C65
C0.01u25X0402

Title

Title

Title

HDMI Level Shifter_SN75DP139

HDMI Level Shifter_SN75DP139

HDMI Level Shifter_SN75DP139

Size

Size

Size

Document Number R ev

Document Number R ev

Document Number R ev

Custom

Custom

Custom

MS-14B3

MS-14B3

MS-14B3

Date: Sheet

Date: Sheet

Date: Sheet

D2+
D2 Shield
D2­D1+
D1 Shield
D1­D0+
D0 Shield
D0­CK+
CK Shield
CK­CE Remote
NC
DDC CLK
DDC DATA
GND
+5V
HP DET

22

GND

MEC2

MEC2

MEC1

MEC1

23

GND

21

SHELL2

GND

R342

4.7KR0402

HDMISW_HP_DET <18>

C77
C1u25X50402-HF

DP139 VCC side add bulk cap by vendor suggest #2018.08.15

C64
C1u25X50402-HF

C79
C1u25X50402-HF

C78
C1u25X50402-HF

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

1

17 57Friday, November 16, 2018

17 57Friday, November 16, 2018

17 57Friday, November 16, 2018

C80
X_C10u6.3X50402

of

of

of

20

SHELL1

0A

0A

0A

1

MSI CONFIDENTIAL

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2

3

4

5

U35

SERIRQ<7,23>
LPC_FRAME#<7,23>
CLK_PCI_KBC<7>
EC_CLKRUN#<7>

LPC_AD0<7,23>
LPC_AD1<7,23>
LPC_AD2<7,23>

1 1

Change WLAN_PWR_ON to GPIO2A for EC. 20171016

2 2

Change POWER_LED# net name to
GPU_LED#. 20171019A

Add USB_IPOD_EN function by EC request
#2018.09.21

Change DGPU_PWRGD to GPIO5D #2018.08.13

Add USB_1002_EN #2018.08.14

3 3

Control Logic

4 4

LPC_AD3<7,23>

KBRST#<7>

KBSCI#<3>
BOOST_MODE#<44>
BUF_PLT_RST#<8,19,23,40>

WLAN_LED#<31>

Keyboard LED Enable

AC_CTL<44>

FLASH_SECURITY<9>

CPU_FAN_PWM0<30>

DGPU_FAN_PWM1<30>

CPUFAN_FB0<30>
GPUFAN_FB1<30>

WLAN_PWR_ON<20>

EC_BL-ON<16>

BAT_OFF#<44>
BAT_IN#<44>

LID#<29>

SUSPWROK<45>

Change.20170809

PM_SLP_S5#<8>

Camera_ON<31>

DIMM_ON_VDDQ<45>

GROUP_SEL<24>

TP_CLK<29>

TP_DATA<29>

GPU_LED#<31>

DIMM_ON_VPP<45,47>

BAT_CHG_CLK_M<44>

BAT_CHG_DATA_M<44>

TPJNC61

USB_IPOD_EN<24>

TPJNC62

DGPU_PWRGD<8,33,41>

USB_1002_EN<25>

EC recommand remove EX-XTAL #2018.08.13

R330 68.1KR1%0402

RUN_ON

C0.47u16X50402-HF

Follow 16S1 to change control logic with RUN_ON #2018.08.09

1

SPI_MISO<7>

SPI_MOSI<7>
SPI_CLK<7>
SPI_CS0#<7>

C298

SMB_Debug_SDA
SMB_Debug_SCL

BAT_CHG_CLK_M
BAT_CHG_DATA_M

EC_RX

1_2VDIMM_PWRGD<45>

C292C0.1u25X50402

M3

SERIRQ

K4

LFARAME#

N5

PCICLK

M6

CLKRUN#/GPIO1D

N4

LAD0

K5

LAD1

M4

LAD2

N3

EC_RST#

LEDKB_EN

KBOUT0
KBOUT1
KBOUT2
KBOUT3
KBOUT4
KBOUT5
KBOUT6
KBOUT7
KBOUT16
KBOUT17

KBOUT8
KBOUT9
KBOUT10
KBOUT11
KBOUT12
KBOUT13
KBOUT14
KBOUT15

KBIN6
KBIN7

+3VSUS

2

A

1

NC

LAD3

K13

ECRST#

L2

KBRST#/GPIO01

N6

SCI#/GPIO0E

M2

GA20/GPIO00

M5

PCIRST#/GPIO05

M9

PWM0/GPIO0F

M8

PWM1/GPIO10

K8

PWM2/GPIO11

M13

PWM3/GPIO19

M10

FANPWM0/GPIO12

N10

FANPWM1/GPIO13

M11

FANFB0/GPIO14

N11

FANFB1/GPIO15

J13

KSO0/GPIO20

J12

KSO1/GPIO21

H12

KSO2/GPIO22

H13

KSO3/GPIO23

J10

KSO4/GPIO24

J9

KSO5/GPIO25/UART_SOUT

H9

KSO6/GPIO26

H10

KSO7/GPIO27/SERIRQ(LPC_Bypass)UART_RTS

G13

KSO8/GPIO28

G12

KSO9/GPIO29

F13

KSO10/GPIO2A

F12

KSO11/GPIO2B/LAD3(LPC_Bypass)

G10

KSO12/GPIO2C/LAD2(LPC_Bypass)UART_DTR

G9

KSO13/GPIO2D/LAD1(LPC_Bypass)

F10

KSO14/GPIO2E/LAD0(LPC_Bypass)

F9

KSO15/GPIO2F

D9

KSO16/GPIO48/UART_SOUT2

D10

KSO17/GPIO49

E9

KSI0/GPIO30/E51TXD

E12

KSI1/GPIO31

E13

KSI2/GPIO32

D12

KSI3/GPIO33

D13

KSI4/GPIO34

C12

KSI5/GPIO35

C13

KSI6/GPIO36

E10

KSI7/GPIO37/EDI_DO

N7

GPIO0B/ESB_CLK

M7

GPIO0C/ESB_DAT_O

B6

GPIO40/AD6

B7

GPIO41/CIR_RLC_TX/AD7

K6

GPIO0A/OWM

N8

GPIO0D/RLC_TX2

K2

MISO/GPIO5B

J2

MOSI/GPIO5C

L1

SPICLK/GPIO58

N2

SPICS#/GPIO5A

A5

PSCLK3/GPIO4E

B5

PSDAT3/GPIO4F

E5

PSCLK2/GPIO4C/SCL3

D5

PSDAT2/GPIO4D/SDA3

D6

PSCLK1/GPIO4A/SCL2/SMBD_CLK

E7

PSDAT1/GPIO4B/SDA2/SMBD_DAT

K10

E51TXD/GPIO16

K9

E51CLK/GPIO17

J1

GPIO5D

K1

GPIO5E

KB9028G-C-HF

B02-9028G05-E18

BGA124

C0.1u25X50402-HF

Pull-up on VR page

Open Drain

53

U38

VCC

4

Y

GND

LVC1G17DBVR_SOT23-5-RH

LPC I/F

POWER/GROUND

Standard Mode 100kHz

SMBUS

IEDI_SDA/SDA1/GPIO47

FAN&PWM

IKB

ESB

CIR

SPI FLASH

PS2 I/F

UART

4

Y

VR_READY<48>

C0.1u25X50402-HF

S4S0_PWRGD

PM_SLP_S3#

Follow 13H1 & 16S1 change to 0 ohm #2018.09.03

+3VSUS

C295

U39

GND

NL17SZ08DFT2G_SC70-5-HF

T70-7SZ0870-O05

53

SC70_5

VCC

1

A

2

B

GND

GND

IEDI_SCL/SCL1/GPIO46

AD/DA

GPXIOA00/GPIO60/SHICS#

SDI

GPXIOA01/GPIO61/SHICLK

GPXIOA02/GPIO62/SHIDO

POWER_FAIL0/GPIO63/GPXIOA03

GPIO64/GPXIOA04

GPIO65/GPXIOA05
VCOUT1/GPIO66/GPXIOA06
VCOUT0/GPIO67/GPXIOA07

GPIO68/GPXIOA08

GPIO69/GPXIOA09

GPIO6A/GPXIOA10

GWG/GPIO6B/GPXIOA11

SDIDO/GPIO78/GPXIOD00

GPIO79/GPXIOD01
EC_EN#/GPIO7A/GPXIOD02

GPIO7B/GPXIOD03
GPIO7C/GPXIOD04
GPIO7D/GPXIOD05
GPIO7E/GPXIOD06

i_clk_8051/GPIO07

PROCHOT#/i_clk_peri/GPIO08

POWER_FAIL1/GPIO18

WDT_LED#/GPIO54

XCLK32K/GPIO57

GPIO1A/NUMLED#

GPIO53/CAPSLED#
GPIO55/SCROLED#

LED

Follow 13H1 & 16S1 add buffer IC on VR_READY #2018.09.03

R305

0R1%0402

C1u25X50402-HF

+3VSUS

C291

GND GND

U37
NL17SZ08DFT2G_SC70-5-HF

T70-7SZ0870-O05

53

SC70_5

VCC

1

A

2

B

GND

GND

2

VCC_LPC

VCC_IO2

SDA0/GPIO45

SCL0/GPIO44

DA0/GPO3C
DA1/GPO3D

DA2/GPO3E
DA3/GPO3F

AD0/GPI38
AD1/GPI39
AD2/GPI3A
AD3/GPI3B
AD4/GPI42
AD5/GPI43

GPIO7F/PECI

4

Y

J4
K12

VCC

M12

VCC-1

K7

VCC-2

J7

VCC-0

N1

B11

AVCC

A11

AGND

GND

N13

GND

G2

GND-1

A7
A8
A6
B8

B10
A9
A10
B9
B13

KBIN0

A13

KBIN1

B12

KBIN2

A12

KBIN3

D8

KBIN4

D7

KBIN5

B1
A1
C1

Add net LID#_EC for leakage of Click PAD. 20171207

D4
D1
D2
E2
E4
E1
F4
F2
F1
C2
F5
G1
G5
H1
G4
H4
H2

Change R167 P/N from R11-0000013-W08 to R11-0430012-W08. 20171020

J5

GPIO04

N9
L13
N12
B4

GPIO50

A4

GPIO52

A3
B2

GPIO56

H5
M1

GPIO59

L12

GPIO1A
LED_CAP

B3
A2

GPIO55

+3VSUS

C251C0.1u25X50201-HF

2

A

1

C260

NC

S0 power open completely,
remain CPU power not open

R324
100KR1%0402

GND

To enable CPU power and VCCST power good

C635

C622

GND GND GND GND

GND

C0.1u25X50402-HF

C0.1u25X50402-HF

GND

SMB_DATA_GPU
SMB_CLK_GPU

CAMERA_LED_ON

Add net GPU_OVERT# link EC GPO61 for NVIDIA. 20171004

EC_ALLSYSPG

H_PECI_R

R311
43R5%0402

EC_PCH_PWROK

PM_SLP_S3#

TPJNC41

TPJNC44

53

U31

VCC

4

Y

GND

LVC1G17DBVR_SOT23-5-RH

C0.1u25X50402-HF

EC_ALLSYSPG

EC_ALLSYSPG <8,48>

+3VALW

C623

C624

C646

C0.1u25X50402-HF

C0.1u25X50402-HF

C0.1u25X50402-HF

SMB_DATA_GPU <40>
SMB_CLK_GPU <40>

SMB_Debug_SDA <17>
SMB_Debug_SCL <17>

WLAN_RFOFF# <20>

SUS_PWR_ACK <8>

EDP_BKLT_EN <3>

TPJNC43

EC_MUTE# <21>

GPU_OVERT# <40,41>

HDMISW_HP_DET <17>

SUS_ON <46>
LID#_EC <29>

FBVDDQ_ON <41,52>

EC_RTC_RST <7>

EC_PROCHOT# <9>
EC_WLAN_RST# <8>

CHARGE_LED# <31>
BATLOW_LED# <31>

AC_PRESENT <8>
ADP_ICC <44>
AC_OK <40,44>

GPU_EC_ACIN <40>

PWRBTN# <30>

RUN_ON <12,45,46>
EC_PWRBTN# <8>

H_PECI <9>

KBSMI# <3>
BT_RFOFF# <20>

SCI_WAKE_UP# <9>

ACPI_RadioSW <9>

USB_EN <24,27,28>

POWER_LED# <31>

RSMRST# <8>
PM_SLP_S3# <8,46>
PM_SLP_S4# <8,45,47>

+3VSUS

C259

U32
NL17SZ08DFT2G_SC70-5-HF

T70-7SZ0870-O05

53

SC70_5

VCC

1

A

4

Y

2

B

GND

GND

Remove VCCST power good circuit, page.8 have same circuit

3

SW2
SW-TACTB1S-HF-1

N71-0102200-F10

SWTA_S4_4_6X4_6

EC_RST#_R

1 3

13

2 4

24

Add SW2(N71-0102200-F10), R5073/0R(R11-0000012-W08),
C5047/0.1u(C11-1047612-M09). 20171016

Swap EC_RTC_RST and PWRBTN# pin for EC. 20171016

EC64 C100p50N0402
EC65 C100p50N0402
EC66 C100p50N0402

Follow 16S1

Change netname from ACPI_LED# to POWER_LED# #2018.08.09

EC67 C100p50N0402

GND

EC61 C100p50N0402
EC55 C100p50N0402
EC62 C100p50N0402

GND

C0.1u25X50402-HF

EC_PCH_PWROK
Delay 99 ms when
ALLSYSPG input

EC_PCH_PWROK

PCH_PWROK <8>

Remove PCH_PWROK pull-down resistor, page.8 have pull-dowm 10Kohm #2018.08.15

+3VALW

+3VRUN

R497 0R1%0402

C0.1u25X50402-HF

GND GND

Delete EC36~EC43/100p(C11-1011032-W08). 20171020

A C

ESD23
ESD-ESD8011MUT5G-HF

D0G-01A0510-O05

ESD_0_6X0_3

Add ESD40,ESD41(D0G-01A0510-O05). 20171020

+3VSUS

C261

GND

1

A

2

B

EC_RST#

C631

KBOUT3
KBOUT2
KBOUT1
KBOUT0

KBOUT7
KBOUT6
KBOUT5
KBOUT4

U33
NL17SZ08DFT2G_SC70-5-HF

T70-7SZ0870-O05

53

SC70_5

VCC

4

Y

GND

GND

GND

SYS_PWROK <8>

R303
100KR1%0402

GND

GND

KBOUT17KBOUT16

R499 4.7KR0402
R498 4.7KR0402

Unstaff R165. 20170919

R495 X_10KR1%0402

R325 2.2KR1%0402

R326 2.2KR1%0402

R474 10KR0402

Add Pull-up R102 for KBRST# (follow 13H1) #2018.08.15

BAT_CHG_CLK_M
BAT_CHG_DATA_M

KBSMI#

SMB_DATA_GPU

SMB_CLK_GPU

KBRST#

KB PU 10k

+3VALW

RN2

1

2

KBIN0

3

4

KBIN1

5

6

KBIN2

7

8

8P4R-10KR0402

8P4R-10KR0402

EC59 C100p50N0402
EC60 C100p50N0402
EC53 C100p50N0402
EC54 C100p50N0402

EC52 C100p50N0402
EC58 C100p50N0402
EC51 C100p50N0402
EC56 C100p50N0402EC63 C100p50N0402

KBIN3

RN3

1

2

KBIN4

3

4

KBIN5

5

6

KBIN6

7

8

KBIN7

KBOUT11
KBOUT10
KBOUT9
KBOUT8

KBOUT12
KBOUT13
KBOUT14
KBOUT15

Close to FPC

A C

ESD24
ESD-ESD8011MUT5G-HF

D0G-01A0510-O05

ESD_0_6X0_3

GNDGND

D03-0340409-A68

LED_CAP LED_CAP#_R

CAMERA_LED_ON

4

G2

S2

G1

S1

GND

Q37

NN-BSS138DW-7-F_SOT363-6-RH

D03-138DW19-D07

SOT_363

CON16
FPC30P-TB-0.5PITCH_WHITE-HF

N5A-30F0230-A81

FPC_S30_0_5MM

+5VRUN

CAMERA_LED_ON#
LED_CAP#

Pin1 to Pin1

Change CON14 P/N from N5A-06F0420-A81 to N5A-06F0390-A81 for ME. 20180115

(5-2.95) / 68 = 30.1 mA

30.1 X 8 = 241.1 mA

+5VRUN

Q38

AO3404

SOT23SGD_T

LEDKB_EN

G

D2

CAMERA_LED_ON#_R

D1

30
29
28
27
26

KBOUT17

25

KBOUT16

24

KBIN0

23

KBIN1

22

KBIN2

21

KBIN3

20

KBIN4

19

KBIN5

18

KBIN6

17

KBIN7

16

KBOUT15

15

KBOUT14

14

KBOUT13

13

KBOUT12

12

KBOUT11

11

KBOUT10

10

KBOUT9

9

KBOUT8

8

KBOUT7

7

KBOUT6

6

KBOUT5

5

KBOUT4

4

KBOUT3

3

KBOUT2

2

KBOUT1

1

KBOUT0

31 32

GND

8

CON18
FPC6P-TB-0.5PITCH_WHITE-HF

1

N5A-06F0390-A81

2
3

FPC_S6_0_5MM

KB_LED_R#

DS

GND

Title

Title

Title

Size Document Num ber Re v

Size Document Num ber Re v

Size Document Num ber Re v

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

4
5
6

7

GND

ESD19
ESD-ESD8011MUT5G-HF

D0G-01A0510-O05

ESD_0_6X0_3

A C

R328 150R0402

R329 150R0402

A C

ESD18
ESD-ESD8011MUT5G-HF

D0G-01A0510-O05

ESD_0_6X0_3

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

MICRO-STAR INT'L CO.,LTD.

KBC (ENE9028)

KBC (ENE9028)

KBC (ENE9028)

MS-14B3

MS-14B3

MS-14B3

5

LED_CAP#

CAMERA_LED_ON#

GND

GND

0A

0A

18 57Friday, November 16, 2018

18 57Friday, November 16, 2018

18 57Friday, November 16, 2018

0A