A
B
C
MS-1453(Switchable) & MS-1454(UMA) Ver : 0A
D
E
2009/07/07
Calpella Platform
1 1
Table of Contents
Page Description
01 : BLOCK DIAGRAM
02 : PLATFORM
03 : PROCESSOR-1 (HOST BUS)
04 : PROCESSOR-2 (DDR3)
05 : PROCESSOR-3 (POWER)
06 : PROCESSOR-4 (GRAPHICS POWER)
07 : PROCESSOR-5 (GND)
08 : PROCESSOR-6 (RESERVE)
09 : DDR3 SODIMM 0
10 : DDR3 SODIMM 1
11 : M92/Park-Sx(PCIE_Interface)
12 : M92/Park-Sx(Main_IO)
13 : M92/Park-Sx(MEM_Interface)
14 : M92/Park-Sx(Power&GND)
15 : M92/Park-Sx(DP_Power)
16 : DDR2(64MX16bit)
17 : M92/Park-Sx(Straps&Thermal)
18 : SWITCH&HDMI
2 2
19 : CRT&LVDS
20 : PCH-1 (HDA,JTAG,SATA)
21 : PCH-2 (PCI-E,SMBUS,CLK)
22 : PCH-3 (DMI,FDI,GPIO)
23 : PCH-4 (LVDS,DDI)
24 : PCH-5 (PCI,USB,NVRAM)
25 : PCH-6 (GPIO,VSS_NCTF,RSVD)
26 : PCH-7 (POWER)
27 : PCH-8 (POWER)
28 : PCH-9 (GND)
29 : Clock Generator (9LRS3199AKL)
30 : KBC/EC/uP (KB3926)
31 : CODEC(ALC662)&Amp
32: AUDIO JACKS
33 : MINIPCIE,CAMERA,BLUETOOTH,SW
34 : PCIE 10/100 LAN (RTL8103EL)
35 : NEWCARD,FAN
36 : HDD,CDROM,USB
37 : Cardreader ( RTS5159 )
38 : M_Battery select
39 : M_Battery Charger
40 : M_System Power
3 3
41 : SMDDR_VTERM/1_5VRUN
42 : VTT POWER,+1.8VRUN
43 : M_CPU power
44 : M_Graphic Core
45 : M92/Park power
46 : Discharge Circuits
47 : LED BOARD
48 : Screw / EMI
49 : Power on Sequency
50 : Power down Sequency
51 : M92/PARK Power on Sequence
52 : M92/PARK Power down Sequence
53 : Switchable Power Sequence
54 : Power MAP
55 : Topology
56 : History
Express Card
M92/PARK LP-S3
DDR3 512MB(64Mx16bitx4)
Page 11~17
HDMI
Page 18
CRT
Page 19
PCI-E LAN
RTL8103EL
Page 35
Page 34
MDC
Page 35
ALC662
Page 31
Earphone
MIC
Internal SPK
Internal MIC
Page 32
LVDS
Page 19
MINI PCIE
Conn. X1
Page 33
SPI Flash
32M
Discrete
Page 20
PCI-E x16
CPU
Arrandale
2 Core
Graphics
Switchable
Page 18
FDI Interface
UMA
PCI-Express SATA3
Azalia
NB-SPI
Keyboard
Page 30
Touch Pad
Page 30
LID
Page 19
Smart Fan
Page 35
CPU & System
Page 3~8
DMI Interface
PCH
Page 20~28
KBC
ENE 3926
Page 30
EC-SPI
LPC BUS
SATA4,5
USB1.1/2.0
Page 33,46
Dual Channel DDRIII
800/1066 MHz
Dual Channel DDRIII
800/1066 MHz
HDD
Page 36
ODD
Page 36
LPC
DEBUG
Page 30
LED
SPI BIOS
4 4
Page 30
USB1
USB2
USB3
USB4
USB5
USB10
USB8
USB9
DDRIII-SODIMM0
Page 9
DDRIII-SODIMM1
Page 10
Camera Connector
Page 33
Bluetooth Connector
Page 33
USB PORT
Page 36
USB PORT
Page 36
USB PORT
Page 36
Mini_PCIE slot
Page 33
Card Reader
Page 37
NEW Card
Page 35
DC JACK
&
Selector
Page 38
SYS POWER
+VCC_GFXCORE
ISL62881HRZ-T
Page 44
+3V +5V
TPS51125RGER
Page 40
+1_5VDIMM
UP6111AQDD
Page 41
+VTT(1.05V)
UP6111AQDD
Page 42
CPU POWER
ISL62882HRZ-T
Page 43
CHARGER
MAX17005ETP+
Page 39
+1_8VRUN
APL5912KAC
Page 42
+1_8VRUN_PARK
APL5912KAC
Page 42
M92 POWER
UP6111AQDD
Page 45
14MHZ CRYSTAL
CLK GEN
CK505
(9LRS3199AKL)
Page 29
+0_75VRUN
APL5331KAC
Page 41
+1_5VRUN
N-AO4468
Page 41
+1_5VRUN_PARK
N-AO4468
Page 41
+1_0VRUN_PARK
N-AO4468
Page 41
Discharge Circuits
Page 46
133MHz
120MHz
PCH
100MHz
96MHz
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
BLOCK DIAGRAM
BLOCK DIAGRAM
BLOCK DIAGRAM
MS-145X
MS-145X
MS-145X
E
0A
0A
0A
15 6 Wednesday, August 05, 2009
15 6 Wednesday, August 05, 2009
15 6 Wednesday, August 05, 2009
of
of
of
A
B
SCHEMATIC ANNOTATIONS AND BOARD INFORMATION
C
D
E
Voltage Rails
POWER PLANE
PWR_SRC
1 1
+5VALW
+5VRUN
+5VSUS
+3VALW
+3VSUS
+3VRUN
+1_5VDIMM
+1_5VRUN
VTT
+0_75VRUN
+VCC_CORE
+VCC_GFXCORE
2 2
M92S_VDD_CORE
+1_8VRUN_PARK
+1_5VRUN_PARK
+1_0VRUN_PARK
VDDR3
VOLTAGE
19V
5V
5V
5V
3.3V
3.3V
3.3V
1.5V
1.5V
1.05V
0.75V
1.05V-1.1V
1.1V
0.95V
1.8V
1.5V
1.0V
3.3V
S0,(S3-S5)
S0,(S3-S5)
S0
S0
S0,(S3-S5)
S0,(S3-S5)
S0
S0,S3
S0,S3
S0
S0
S0
S0
S0
S0
S0
S0
S0
S0
DESCRIPTION ACTIVE IN
LAN
DDRIII core
PCH
DDRIII command & control pull up.
CPU core rail
Graphics core rail ( Dual Core only )
GPU core power
GPU PCIE power
GPU DDR3 power
GPU PCIE power
GPU I/O and DAC power
Net Naming Conventions
Suffix
# = Active Low Signal
Prefix
H = Host
M = DDR Memory
TP = Test Point (does not connect anywhere else)
PCB Footprints
SOT-23
1
3
As seen from top
2
1
2
3
5
4
SOT23-5
AC Mode
3 3
Power States
S0 (Full on)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft Off)
SLP_S3# SLP_S4# SLP_S5# SLP_LAN# +V*ALWAYS +V*SUS +V*RUN CLK
HIGH
LOW
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
HIGH
LOW
HIGH
HIGH
HIGH
HIGH
ON
ON
ON
ON
ON
ON
ON
ON
ON
OFF
OFF
OFF
ON
OFF
OFF
OFF
Battery Mode
Power States
S0 (Full on)
S3 (Suspend to RAM)
4 4
S4 (Suspend to Disk)
S5 (Soft Off)
A
SLP_S3# SLP_S4# SLP_S5# SLP_LAN# +V*ALWAYS +V*SUS +V*RUN CLK
HIGH
LOW
LOW
LOW
HIGH
HIGH
LOW
LOW
HIGH
HIGH
HIGH
LOW
HIGH
HIGH
HIGH
HIGH
B
ON
ON
ON
ON
ON
ON
OFF
OFF
ON
OFF
OFF
OFF
C
ON
OFF
OFF
OFF
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
PLATFORM
PLATFORM
PLATFORM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
MS-145X
MS-145X
MS-145X
MICRO-STAR INT'L CO.,LTD.
of
of
of
25 6 Wednesday, August 05, 2009
25 6 Wednesday, August 05, 2009
25 6 Wednesday, August 05, 2009
E
0A
0A
0A
A
B
C
D
E
ARRANDALE PROCESSOR (CLK,MISC,JTAG)
U39B
U39B
AT23
COMP3
AT24
COMP2
G16
COMP1
AT26
COMP0
AH24
SKTOCC#
AK14
CATERR#
AT15
PECI
AN26
PROCHOT#
AK15
THERMTRIP#
AP26
RESET_OBS#
AL15
PM_SYNC
AN14
VCCPWRGOOD_1
AN27
VCCPWRGOOD_0
AK13
SM_DRAMPWROK
AM15
VTTPWRGOOD
AM26
TAPPWRGOOD
AL14
RSTIN#
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
MISC THERMAL
MISC THERMAL
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
CLOCKS
CLOCKS
DDR3
MISC
DDR3
MISC
PWR MANAGEMENT
PWR MANAGEMENT
JTAG & BPM
JTAG & BPM
+VTT
H_CATERR#
R161 49.9R1%0402 R161 49.9R1%0402
H_PROCHOT#_R
R224 49.9R1%0402 R224 49.9R1%0402
H_CPURST#
R418 X_68R0402 R418 X_68R0402
2009/06/16 R224改50ohm
BCLK
BCLK#
BCLK_ITP
BCLK_ITP#
PEG_CLK
PEG_CLK#
SM_DRAMRST#
SM_RCOMP[0]
SM_RCOMP[1]
SM_RCOMP[2]
PM_EXT_TS#[0]
PM_EXT_TS#[1]
PRDY#
PREQ#
TRST#
TDI_M
TDO_M
DBR#
BPM#[0]
BPM#[1]
BPM#[2]
BPM#[3]
BPM#[4]
BPM#[5]
BPM#[6]
BPM#[7]
TCK
TMS
TDI
TDO
BCLK_CPU_P_R
A16
BCLK_CPU_N_R
B16
TP2JNC
AR30
TP3JNC
AT30
BCLK_EXP_P_R
E16
BCLK_EXP_N_R
D16
CLK_DP_R
A18
CLK_DP#_R
A17
F6
SM_RCOMP_0
AL1
SM_RCOMP_1
AM1
SM_RCOMP_2
AN1
PM_EXTTS#[0]
AN15
PM_EXTTS#[1]
AP15
XDP_PRDY#
AT28
XDP_FREQ#
AP27
XDP_TCLK
AN28
XDP_TMS
AP28
AT27
XDP_TDI_R
AT29
XDP_TDO_R
AR27
XDP_TDI_M
AR29
XDP_TDO_M
AP29
XDP_DBRESET#
AN25
AJ22
AK22
AK24
AJ24
AJ25
2009/06/30 移除
AH22
AK23
AH23
ER39ER39
ER38ER38
TPJNC40 TPJNC40
TPJNC41 TPJNC41
ER41ER41
ER40ER40
ER43ER43
ER42ER42
CPU_DRAMRST# 47
TP64TP64
XDP_TRST#
TP65TP65 R426 X_51R1%0402 R426 X_51R1%0402
TP63TP63
TP67TP67
TP66TP66
R154 100R1%0402 R154 100R1%0402
R155 24.9R1%0402 R155 24.9R1%0402
R157 130R1%0402 R157 130R1%0402
BCLK_CPU 25
BCLK_CPU# 25
BCLK_EXP 21
BCLK_EXP# 21
CLK_DP 21
CLK_DP# 21
+VTT
R188
R188
X_12.4KR1%0402
X_12.4KR1%0402
R189
R189
10KR1%0402
10KR1%0402
XDP_TDO_R
XDP_TMS
XDP_TDI_R
XDP_FREQ#
XDP_TCLK
XDP_DBRESET#
XDP_TRST#
R183
R183
10KR1%0402
10KR1%0402
R184 X_0402 R184 X_0402
R193 X_0402 R193 X_0402
R194
R194
X_12.4KR1%0402
X_12.4KR1%0402
R223 1KR1%0402 R223 1KR1%0402
R420
R420
51R1%0402
51R1%0402
2009/06/30 R223,R420等0A實驗是否可移除
R422 X_51R1%0402 R422 X_51R1%0402
R429 X_51R1%0402 R429 X_51R1%0402
R424 X_51R1%0402 R424 X_51R1%0402
R235 X_51R1%0402 R235 X_51R1%0402
+3VRUN
TS#_DIMM0_1 9
TS#_DIMM1_1 10
+VTT
ER37ER37
ER50ER50
ER26ER26
ER25ER25
TP24TP24
R414 20R1%0402 R414 20R1%0402
R415 20R1%0402 R415 20R1%0402
R204 49.9R1%0402 R204 49.9R1%0402
R417 49.9R1%0402 R417 49.9R1%0402
TP23TP23
TP15TP15
R175 1.5KR1%0402 R175 1.5KR1%0402
COMP3
COMP2
COMP1
COMP0
TP_SKTOCC#_R
H_CATERR#
H_PECI_ISO
H_PROCHOT#_R
H_CPURST#
H_PM_SYNC_R
SYS_AGENT_PWROK
VCCPWRGOOD_0_R
VDDPWRGOOD_R
H_VTTPWRGD
TP_H_PWRGD_XDP_R
PLT_RST#_R
R171
R171
750R1%0402
750R1%0402
U39A
U39A
DMI_TXN0 22
4 4
3 3
2 2
DMI_TXN1 22
DMI_TXN2 22
DMI_TXN3 22
DMI_TXP0 22
DMI_TXP1 22
DMI_TXP2 22
DMI_TXP3 22
DMI_RXN0 22
DMI_RXN1 22
DMI_RXN2 22
DMI_RXN3 22
DMI_RXP0 22
DMI_RXP1 22
DMI_RXP2 22
DMI_RXP3 22
FDI_TXN0 22
FDI_TXN1 22
FDI_TXN2 22
FDI_TXN3 22
FDI_TXN4 22
FDI_TXN5 22
FDI_TXN6 22
FDI_TXN7 22
FDI_TXP0 22
FDI_TXP1 22
FDI_TXP2 22
FDI_TXP3 22
FDI_TXP4 22
FDI_TXP5 22
FDI_TXP6 22
FDI_TXP7 22
FDI_FSYNC0 22
FDI_FSYNC1 22
FDI_INT 22
FDI_LSYNC0 22
FDI_LSYNC1 22
A24
DMI_RX#[0]
C23
DMI_RX#[1]
B22
DMI_RX#[2]
A21
DMI_RX#[3]
B24
DMI_RX[0]
D23
DMI_RX[1]
B23
DMI_RX[2]
A22
DMI_RX[3]
D24
DMI_TX#[0]
G24
DMI_TX#[1]
F23
DMI_TX#[2]
H23
DMI_TX#[3]
D25
DMI_TX[0]
F24
DMI_TX[1]
E23
DMI_TX[2]
G23
DMI_TX[3]
E22
FDI_TX#[0]
D21
FDI_TX#[1]
D19
FDI_TX#[2]
D18
FDI_TX#[3]
G21
FDI_TX#[4]
E19
FDI_TX#[5]
F21
FDI_TX#[6]
G18
FDI_TX#[7]
D22
FDI_TX[0]
C21
FDI_TX[1]
D20
FDI_TX[2]
C18
FDI_TX[3]
G22
FDI_TX[4]
E20
FDI_TX[5]
F20
FDI_TX[6]
G19
FDI_TX[7]
F17
FDI_FSYNC[0]
E17
FDI_FSYNC[1]
C17
FDI_INT
F18
FDI_LSYNC[0]
D17
FDI_LSYNC[1]
N12-9880010-L06
N12-9880010-L06
PGA989
PGA989
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
PEG_ICOMPI
PEG_ICOMPO
PEG_RCOMPO
PEG_RBIAS
PEG_RX#[0]
PEG_RX#[1]
PEG_RX#[2]
DMI Intel(R) FDI
DMI Intel(R) FDI
PEG_RX#[3]
PEG_RX#[4]
PEG_RX#[5]
PEG_RX#[6]
PEG_RX#[7]
PEG_RX#[8]
PEG_RX#[9]
PEG_RX#[10]
PEG_RX#[11]
PEG_RX#[12]
PEG_RX#[13]
PEG_RX#[14]
PEG_RX#[15]
PEG_RX[0]
PEG_RX[1]
PEG_RX[2]
PEG_RX[3]
PEG_RX[4]
PEG_RX[5]
PEG_RX[6]
PEG_RX[7]
PEG_RX[8]
PEG_RX[9]
PEG_RX[10]
PEG_RX[11]
PEG_RX[12]
PEG_RX[13]
PEG_RX[14]
PEG_RX[15]
PEG_TX#[0]
PEG_TX#[1]
PEG_TX#[2]
PEG_TX#[3]
PEG_TX#[4]
PEG_TX#[5]
PEG_TX#[6]
PEG_TX#[7]
PEG_TX#[8]
PEG_TX#[9]
PEG_TX#[10]
PEG_TX#[11]
PEG_TX#[12]
PEG_TX#[13]
PEG_TX#[14]
PCI EXPRESS -- GRAPHICS
PCI EXPRESS -- GRAPHICS
PEG_TX#[15]
PEG_TX[0]
PEG_TX[1]
PEG_TX[2]
PEG_TX[3]
PEG_TX[4]
PEG_TX[5]
PEG_TX[6]
PEG_TX[7]
PEG_TX[8]
PEG_TX[9]
PEG_TX[10]
PEG_TX[11]
PEG_TX[12]
PEG_TX[13]
PEG_TX[14]
PEG_TX[15]
PEG_COMP
PEG_RXN0
PEG_RXN1
PEG_RXN2
PEG_RXN3
PEG_RXN4
PEG_RXN5
PEG_RXN6
PEG_RXN7
PEG_RXN8
PEG_RXN9
PEG_RXN10
PEG_RXN11
PEG_RXN12
PEG_RXN13
PEG_RXN14
PEG_RXN15
PEG_RXP0
PEG_RXP1
PEG_RXP2
PEG_RXP3
PEG_RXP4
PEG_RXP5
PEG_RXP6
PEG_RXP7
PEG_RXP8
PEG_RXP9
PEG_RXP10
PEG_RXP11
PEG_RXP12
PEG_RXP13
PEG_RXP14
PEG_RXP15
PEG_TXN0
PEG_TXN1
PEG_TXN2
PEG_TXN3
PEG_TXN4
PEG_TXN5
PEG_TXN6
PEG_TXN7
PEG_TXN8
PEG_TXN9
PEG_TXN10
PEG_TXN11
PEG_TXN12
PEG_TXN13
PEG_TXN14
PEG_TXN15
PEG_TXP0
PEG_TXP1
PEG_TXP2
PEG_TXP3
PEG_TXP4
PEG_TXP5
PEG_TXP6
PEG_TXP7
PEG_TXP8
PEG_TXP9
PEG_TXP10
PEG_TXP11
PEG_TXP12
PEG_TXP13
PEG_TXP14
PEG_TXP15
R413 49.9R1%0402 R413 49.9R1%0402
R410 750R1%0402 R410 750R1%0402
PEG_RXN[15:0] 11
PEG_RXP[15:0] 11
PEG_TXN[15:0] 11
PEG_TXP[15:0] 11
H_PECI 25
H_PROCHOT# 30
H_THRMTRIP# 25
H_PM_SYNC 22
ER49ER49
H_CPUPWRGD 25
PM_DRAM_PWRGD 22,47
BUF_PTL_RST# 24
ER27ER27
ER24ER24
B26
A26
B27
A25
K35
J34
J33
G35
G32
F34
F31
D35
E33
C33
D32
B32
C31
B28
B30
A31
J35
H34
H33
F35
G33
E34
F32
D34
F33
B33
D31
A32
C30
A28
B29
A30
L33
M35
M33
M30
L31
K32
M29
J31
K29
H30
H29
F29
E28
D29
D27
C26
L34
M34
M32
L30
M31
K31
M28
H31
K28
G30
G29
F28
E27
D28
C27
C25
R180
EC_ALLSYSPG 22,30
1 1
A
B
R180
2KR1%0402
2KR1%0402
H_VTTPWRGD
R179
R179
1KR1%0402
1KR1%0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
PROCESSOR
PROCESSOR
PROCESSOR
MS-145X
MS-145X
MS-145X
E
0A
0A
35 6 Wednesday, August 05, 2009
35 6 Wednesday, August 05, 2009
35 6 Wednesday, August 05, 2009
0A
of
of
of
A
B
C
D
E
ARRANDALE PROCESSOR (DDR3)
U39C
U39C
U39D
U39D
4 4
M_A_DQ[63:0] 9
3 3
2 2
M_A_BS0 9
M_A_BS1 9
M_A_BS2 9
M_A_CAS# 9
M_A_RAS# 9
M_A_WE# 9
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
C10
D10
H10
G10
AH5
AF5
AK6
AK7
AF6
AG5
AJ10
AL10
AK12
AK8
AK11
AN8
AM10
AR11
AL11
AM9
AN9
AT11
AP12
AM12
AN12
AM13
AT14
AT12
AL13
AR14
AP14
AC3
AB2
AE1
AB3
AE9
A10
SA_DQ[0]
SA_DQ[1]
C7
SA_DQ[2]
A7
SA_DQ[3]
B10
SA_DQ[4]
SA_DQ[5]
E10
SA_DQ[6]
A8
SA_DQ[7]
D8
SA_DQ[8]
F10
SA_DQ[9]
E6
SA_DQ[10]
F7
SA_DQ[11]
E9
SA_DQ[12]
B7
SA_DQ[13]
E7
SA_DQ[14]
C6
SA_DQ[15]
SA_DQ[16]
G8
SA_DQ[17]
K7
SA_DQ[18]
J8
SA_DQ[19]
G7
SA_DQ[20]
SA_DQ[21]
J7
SA_DQ[22]
J10
SA_DQ[23]
L7
SA_DQ[24]
M6
SA_DQ[25]
M8
SA_DQ[26]
L9
SA_DQ[27]
L6
SA_DQ[28]
K8
SA_DQ[29]
N8
SA_DQ[30]
P9
SA_DQ[31]
SA_DQ[32]
SA_DQ[33]
SA_DQ[34]
SA_DQ[35]
SA_DQ[36]
SA_DQ[37]
AJ7
SA_DQ[38]
AJ6
SA_DQ[39]
SA_DQ[40]
AJ9
SA_DQ[41]
SA_DQ[42]
SA_DQ[43]
SA_DQ[44]
AL7
SA_DQ[45]
SA_DQ[46]
AL8
SA_DQ[47]
SA_DQ[48]
SA_DQ[49]
SA_DQ[50]
SA_DQ[51]
SA_DQ[52]
SA_DQ[53]
U7
SA_DQ[54]
SA_DQ[55]
SA_DQ[56]
SA_DQ[57]
SA_DQ[58]
SA_DQ[59]
SA_DQ[60]
SA_DQ[61]
SA_DQ[62]
SA_DQ[63]
SA_BS[0]
SA_BS[1]
SA_BS[2]
SA_CAS#
SA_RAS#
SA_WE#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_CK[0]
SA_CK#[0]
SA_CKE[0]
SA_CK[1]
SA_CK#[1]
SA_CKE[1]
SA_CS#[0]
SA_CS#[1]
SA_ODT[0]
SA_ODT[1]
SA_DM[0]
SA_DM[1]
SA_DM[2]
SA_DM[3]
SA_DM[4]
SA_DM[5]
SA_DM[6]
SA_DM[7]
SA_DQS#[0]
SA_DQS#[1]
SA_DQS#[2]
SA_DQS#[3]
SA_DQS#[4]
SA_DQS#[5]
SA_DQS#[6]
SA_DQS#[7]
SA_DQS[0]
SA_DQS[1]
SA_DQS[2]
SA_DQS[3]
SA_DQS[4]
SA_DQS[5]
SA_DQS[6]
SA_DQS[7]
SA_MA[0]
SA_MA[1]
SA_MA[2]
SA_MA[3]
SA_MA[4]
SA_MA[5]
SA_MA[6]
SA_MA[7]
SA_MA[8]
SA_MA[9]
SA_MA[10]
SA_MA[11]
SA_MA[12]
SA_MA[13]
SA_MA[14]
SA_MA[15]
AA6
AA7
P7
Y6
Y5
P6
AE2
AE8
AD8
AF9
B9
D7
H7
M7
AG6
AM7
AN10
AN13
C9
F8
J9
N9
AH7
AK9
AP11
AT13
C8
F9
H9
M9
AH8
AK10
AN11
AR13
Y3
W1
AA8
AA3
V1
AA9
V8
T1
Y9
U6
AD4
T2
U3
AG8
T3
V9
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
M_CLK_DDR0 9
M_CLK_DDR#0 9
M_CKE0 9
M_CLK_DDR1 9
M_CLK_DDR#1 9
M_CKE1 9
M_CS#0 9
M_CS#1 9
M_ODT0 9
M_ODT1 9
M_A_DM[7:0] 9
M_A_DQS#[7:0] 9
M_A_DQS[7:0] 9
M_A_A[15:0] 9
M_B_DQ[63:0] 10
M_B_BS0 10
M_B_BS1 10
M_B_BS2 10
M_B_CAS# 10
M_B_RAS# 10
M_B_WE# 10
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
AF3
AG1
AK1
AG4
AG3
AH4
AK3
AK4
AM6
AN2
AK5
AK2
AM4
AM3
AP3
AN5
AT4
AN6
AN4
AN3
AT5
AT6
AN7
AP6
AP8
AT9
AT7
AP9
AR10
AT10
AB1
AC5
AC6
AJ3
AJ4
B5
A5
C3
B3
E4
A6
A4
C4
D1
D2
F2
F1
C2
F5
F3
G4
H6
G2
G1
G5
K2
L3
M1
K5
K4
M4
N5
W5
R7
Y7
J6
J3
J2
J1
J5
SB_DQ[0]
SB_DQ[1]
SB_DQ[2]
SB_DQ[3]
SB_DQ[4]
SB_DQ[5]
SB_DQ[6]
SB_DQ[7]
SB_DQ[8]
SB_DQ[9]
SB_DQ[10]
SB_DQ[11]
SB_DQ[12]
SB_DQ[13]
SB_DQ[14]
SB_DQ[15]
SB_DQ[16]
SB_DQ[17]
SB_DQ[18]
SB_DQ[19]
SB_DQ[20]
SB_DQ[21]
SB_DQ[22]
SB_DQ[23]
SB_DQ[24]
SB_DQ[25]
SB_DQ[26]
SB_DQ[27]
SB_DQ[28]
SB_DQ[29]
SB_DQ[30]
SB_DQ[31]
SB_DQ[32]
SB_DQ[33]
SB_DQ[34]
SB_DQ[35]
SB_DQ[36]
SB_DQ[37]
SB_DQ[38]
SB_DQ[39]
SB_DQ[40]
SB_DQ[41]
SB_DQ[42]
SB_DQ[43]
SB_DQ[44]
SB_DQ[45]
SB_DQ[46]
SB_DQ[47]
SB_DQ[48]
SB_DQ[49]
SB_DQ[50]
SB_DQ[51]
SB_DQ[52]
SB_DQ[53]
SB_DQ[54]
SB_DQ[55]
SB_DQ[56]
SB_DQ[57]
SB_DQ[58]
SB_DQ[59]
SB_DQ[60]
SB_DQ[61]
SB_DQ[62]
SB_DQ[63]
SB_BS[0]
SB_BS[1]
SB_BS[2]
SB_CAS#
SB_RAS#
SB_WE#
DDR SYSTEM MEMORY - B
DDR SYSTEM MEMORY - B
SB_CK[0]
SB_CK#[0]
SB_CKE[0]
SB_CK[1]
SB_CK#[1]
SB_CKE[1]
SB_CS#[0]
SB_CS#[1]
SB_ODT[0]
SB_ODT[1]
SB_DM[0]
SB_DM[1]
SB_DM[2]
SB_DM[3]
SB_DM[4]
SB_DM[5]
SB_DM[6]
SB_DM[7]
SB_DQS#[0]
SB_DQS#[1]
SB_DQS#[2]
SB_DQS#[3]
SB_DQS#[4]
SB_DQS#[5]
SB_DQS#[6]
SB_DQS#[7]
SB_DQS[0]
SB_DQS[1]
SB_DQS[2]
SB_DQS[3]
SB_DQS[4]
SB_DQS[5]
SB_DQS[6]
SB_DQS[7]
SB_MA[0]
SB_MA[1]
SB_MA[2]
SB_MA[3]
SB_MA[4]
SB_MA[5]
SB_MA[6]
SB_MA[7]
SB_MA[8]
SB_MA[9]
SB_MA[10]
SB_MA[11]
SB_MA[12]
SB_MA[13]
SB_MA[14]
SB_MA[15]
W8
W9
M3
V7
V6
M2
AB8
AD6
AC7
AD1
D4
E1
H3
K1
AH1
AL2
AR4
AT8
D5
F4
J4
L4
AH2
AL4
AR5
AR8
C5
E3
H4
M5
AG2
AL5
AP5
AR7
U5
V2
T5
V3
R1
T8
R2
R6
R4
R5
AB5
P3
R3
AF7
P5
N1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
M_CLK_DDR2 10
M_CLK_DDR#2 10
M_CKE2 10
M_CLK_DDR3 10
M_CLK_DDR#3 10
M_CKE3 10
M_CS#2 10
M_CS#3 10
M_ODT2 10
M_ODT3 10
M_B_DM[7:0] 10
M_B_DQS#[7:0] 10
M_B_DQS[7:0] 10
M_B_A[15:0] 10
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
1 1
A
B
C
IC,AUB_CFD_rPGA,R0P9
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
DDR3
DDR3
DDR3
MS-145X
MS-145X
MS-145X
E
0A
0A
0A
of
of
of
45 6 Wednesday, August 05, 2009
45 6 Wednesday, August 05, 2009
45 6 Wednesday, August 05, 2009
A
B
C
D
E
ARRANDALE PROCESSOR (POWER)
ARRANDALE:
SV=48A
4 4
LV=35A
ULV=27A
+VCC_CORE +VTT
PROCESSOR CORE POWER
3 3
2 2
1 1
AG35
AG34
AG33
AG32
AG31
AG30
AG29
AG28
AG27
AG26
AF35
AF34
AF33
AF32
AF31
AF30
AF29
AF28
AF27
AF26
AD35
AD34
AD33
AD32
AD31
AD30
AD29
AD28
AD27
AD26
AC35
AC34
AC33
AC32
AC31
AC30
AC29
AC28
AC27
AC26
AA35
AA34
AA33
AA32
AA31
AA30
AA29
AA28
AA27
AA26
U39F
U39F
VCC1
VCC2
VCC3
VCC4
VCC5
VCC6
VCC7
VCC8
VCC9
VCC10
VCC11
VCC12
VCC13
VCC14
VCC15
VCC16
VCC17
VCC18
VCC19
VCC20
VCC21
VCC22
VCC23
VCC24
VCC25
VCC26
VCC27
VCC28
VCC29
VCC30
VCC31
VCC32
VCC33
VCC34
VCC35
VCC36
VCC37
VCC38
VCC39
VCC40
VCC41
VCC42
VCC43
VCC44
VCC45
VCC46
VCC47
VCC48
VCC49
VCC50
Y35
VCC51
Y34
VCC52
Y33
VCC53
Y32
VCC54
Y31
VCC55
Y30
VCC56
Y29
VCC57
Y28
VCC58
Y27
VCC59
Y26
VCC60
V35
VCC61
V34
VCC62
V33
VCC63
V32
VCC64
V31
VCC65
V30
VCC66
V29
VCC67
V28
VCC68
V27
VCC69
V26
VCC70
U35
VCC71
U34
VCC72
U33
VCC73
U32
VCC74
U31
VCC75
U30
VCC76
U29
VCC77
U28
VCC78
U27
VCC79
U26
VCC80
R35
VCC81
R34
VCC82
R33
VCC83
R32
VCC84
R31
VCC85
R30
VCC86
R29
VCC87
R28
VCC88
R27
VCC89
R26
VCC90
P35
VCC91
P34
VCC92
P33
VCC93
P32
VCC94
P31
VCC95
P30
VCC96
P29
VCC97
P28
VCC98
P27
VCC99
P26
VCC100
CPU CORE SUPPLY
CPU CORE SUPPLY
POWER
POWER
SENSE LINES
SENSE LINES
VTT0_1
VTT0_2
VTT0_3
VTT0_4
VTT0_5
VTT0_6
VTT0_7
VTT0_8
VTT0_9
VTT0_10
VTT0_11
VTT0_12
VTT0_13
VTT0_14
VTT0_15
VTT0_16
VTT0_17
VTT0_18
VTT0_19
VTT0_20
VTT0_21
VTT0_22
VTT0_23
VTT0_24
VTT0_25
VTT0_26
VTT0_27
VTT0_28
VTT0_29
VTT0_30
VTT0_31
1.1V RAIL POWER
1.1V RAIL POWER
VTT0_32
VTT0_33
VTT0_34
VTT0_35
VTT0_36
VTT0_37
VTT0_38
VTT0_39
VTT0_40
VTT0_41
VTT0_42
VTT0_43
VTT0_44
PROC_DPRSLPVR
CPU VIDS
CPU VIDS
VTT_SELECT
ISENSE
VCC_SENSE
VSS_SENSE
VTT_SENSE
VSS_SENSE_VTT
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
PSI#
ARRANDALE:
SV=18A
LV=TBD
ULV=TBD
AH14
AH12
AH11
AH10
J14
J13
H14
H12
G14
G13
G12
G11
F14
F13
F12
F11
E14
E12
D14
D13
D12
D11
C14
C13
C12
C11
B14
B12
A14
A13
A12
A11
AF10
AE10
AC10
AB10
Y10
W10
U10
T10
J12
J11
J16
J15
AN33
AK35
AK33
AK34
AL35
AL33
AM33
AM35
PM_DPRSLPVR_R
AM34
G15
AN35
VCCSENSE_R
AJ34
VSSSENSE_R
AJ35
B15
TP_VSS_SENSE_VTT_JNC
A15
C531
TPJNC15 TPJNC15
IMVP_IMON 43
C531
C10u6.3X50805
C10u6.3X50805
C530
C530
C22u6.3X50805-RH
C22u6.3X50805-RH
C532
C532
C22u6.3X50805-RH
C22u6.3X50805-RH
PSI# 43
ER46ER46
VTT_SENSE 42
C212
C212
C10u6.3X50805
C10u6.3X50805
C540
C540
C22u6.3X50805-RH
C22u6.3X50805-RH
C533
C533
C22u6.3X50805-RH
C22u6.3X50805-RH
PM_DPRSLPVR 43
2009/06/23 Can be floating if VTT is fixed
by Intel checklist 1.6
+VCC_CORE
ER47ER47
ER48ER48
TPJNC16 TPJNC16
PROCESSOR CORE POWER
C441
C441
C10u6.3X50805
C10u6.3X50805
R432
R432
100R1%0402
100R1%0402
R433
R433
100R1%0402
100R1%0402
C265
C265
C10u6.3X50805
C10u6.3X50805
C536
C536
C22u6.3X50805-RH
C22u6.3X50805-RH
H_VID0 43
H_VID1 43
H_VID2 43
H_VID3 43
H_VID4 43
H_VID5 43
H_VID6 43
VCCSENSE 43
VSSSENSE 43
C539
C539
C10u6.3X50805
C10u6.3X50805
+VTT
+VTT
+VTT
C266
C266
C10u6.3X50805
C10u6.3X50805
+VCC_CORE
C294
C294
C10u6.3X50805
C10u6.3X50805
C544
C544
C22u6.3X50805-RH
C22u6.3X50805-RH
C537
C537
C22u6.3X50805-RH
C22u6.3X50805-RH
C542
C542
C10u6.3X50805
C10u6.3X50805
C578
C578
C10u6.3X50805
C10u6.3X50805
P2
+
N2
C538
P1
-N1-
EC26
EC26
+
C1000u2SO-HF
C1000u2SO-HF
C538
X_C10u6.3X50805
X_C10u6.3X50805
C541
C541
C22u6.3X50805-RH
C22u6.3X50805-RH
C552
C552
C22u6.3X50805-RH
C22u6.3X50805-RH
C577
C577
C10u6.3X50805
C10u6.3X50805
C213
C213
X_C10u6.3X50805
X_C10u6.3X50805
C550
C550
C10u6.3X50805
C10u6.3X50805
2009/06/12 修改 by power team
close to cpu socket
C543
C543
C10u6.3X50805
C10u6.3X50805
C554
C554
C10u6.3X50805
C10u6.3X50805
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
A
B
C
D
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
PROCESSOR POWER
PROCESSOR POWER
PROCESSOR POWER
MS-145X
MS-145X
MS-145X
E
0A
0A
55 6 Wednesday, August 05, 2009
55 6 Wednesday, August 05, 2009
55 6 Wednesday, August 05, 2009
0A
of
of
of
A
B
C
D
E
ARRANDALE:
+VCC_GFXCORE
1 1
2 2
SV=15A
LV=TBD
ULV=TBD
C529
C529
X_C22u6.3X50805-RH
X_C22u6.3X50805-RH
C549
C549
X_C22u6.3X50805-RH
X_C22u6.3X50805-RH
I=14A
C526
C526
X_C22u6.3X50805-RH
X_C22u6.3X50805-RH
C527
C527
X_C22u6.3X50805-RH
X_C22u6.3X50805-RH
+VTT
C528
C528
C22u6.3X50805-RH
C22u6.3X50805-RH
C300
C300
C22u6.3X50805-RH
C22u6.3X50805-RH
ARRANDALE PROCESSOR (GRAPHICS POWER)
U39G
U39G
AT21
C548
C548
C22u6.3X50805-RH
C22u6.3X50805-RH
+VTT
C211
C211
C22u6.3X50805-RH
C22u6.3X50805-RH
C547
C547
C10u6.3X50805
C10u6.3X50805
C579
C579
C22u6.3X50805-RH
C22u6.3X50805-RH
C534
C534
C22u6.3X50805-RH
C22u6.3X50805-RH
C546
C546
C10u6.3X50805
C10u6.3X50805
C259
C259
C22u6.3X50805-RH
C22u6.3X50805-RH
C535
C535
C22u6.3X50805-RH
C22u6.3X50805-RH
AT19
AT18
AT16
AR21
AR19
AR18
AR16
AP21
AP19
AP18
AP16
AN21
AN19
AN18
AN16
AM21
AM19
AM18
AM16
AL21
AL19
AL18
AL16
AK21
AK19
AK18
AK16
AJ21
AJ19
AJ18
AJ16
AH21
AH19
AH18
AH16
VAXG1
VAXG2
VAXG3
VAXG4
VAXG5
VAXG6
VAXG7
VAXG8
VAXG9
VAXG10
VAXG11
VAXG12
VAXG13
VAXG14
VAXG15
VAXG16
VAXG17
VAXG18
VAXG19
VAXG20
VAXG21
VAXG22
VAXG23
VAXG24
VAXG25
VAXG26
VAXG27
VAXG28
VAXG29
VAXG30
VAXG31
VAXG32
VAXG33
VAXG34
VAXG35
VAXG36
J24
VTT1_45
J23
VTT1_46
H25
VTT1_47
K26
VTT1_48
J27
VTT1_49
J26
VTT1_50
J25
VTT1_51
H27
VTT1_52
G28
VTT1_53
G27
VTT1_54
G26
VTT1_55
F26
VTT1_56
E26
VTT1_57
E25
VTT1_58
GRAPHICS
GRAPHICS
FDI PEG & DMI
FDI PEG & DMI
VAXG_SENSE
VSSAXG_SENSE
SENSE
LINES
SENSE
LINES
GFX_DPRSLPVR
GRAPHICS VIDs
GRAPHICS VIDs
POWER
POWER
DDR3 - 1.5V RAILS
DDR3 - 1.5V RAILS
1.1V 1.8V
1.1V 1.8V
GFX_VID[0]
GFX_VID[1]
GFX_VID[2]
GFX_VID[3]
GFX_VID[4]
GFX_VID[5]
GFX_VID[6]
GFX_VR_EN
GFX_IMON
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ11
VDDQ12
VDDQ13
VDDQ14
VDDQ15
VDDQ16
VDDQ17
VDDQ18
VTT0_59
VTT0_60
VTT0_61
VTT0_62
VTT1_63
VTT1_64
VTT1_65
VTT1_66
VTT1_67
VTT1_68
VCCPLL1
VCCPLL2
VCCPLL3
AR22
AT22
AM22
AP22
AN22
AP23
AM23
AP24
AN24
AR25
AT25
AM24
AJ1
AF1
AE7
AE4
AC1
AB7
AB4
Y1
W7
W4
U1
T7
T4
P1
N7
N4
L1
H1
P10
N10
L10
K10
J22
J20
J18
H21
H20
H19
L26
L27
M26
GFXVR_DPRSLPVR_R
C223
C223
C1u16X-RH
C1u16X-RH
C270
C270
C10u6.3X5-RH
C10u6.3X5-RH
C284
C284
C22u6.3X50805-RH
C22u6.3X50805-RH
C372
C372
C1u16X-RH
C1u16X-RH
R416 0R0402 R416 0R0402
C222
C222
C1u16X-RH
C1u16X-RH
+VTT
C288
C288
C10u6.3X5-RH
C10u6.3X5-RH
C289
C289
C22u6.3X50805-RH
C22u6.3X50805-RH
C381
C381
C1u16X-RH
C1u16X-RH
VCC_AXG_SENSE 44
VSS_AXG_SENSE 44
GFXVR_VID_0 44
GFXVR_VID_1 44
GFXVR_VID_2 44
GFXVR_VID_3 44
GFXVR_VID_4 44
GFXVR_VID_5 44
GFXVR_VID_6 44
GFXVR_EN 44
GFXVR_DPRSLPVR 44
GFXVR_IMON 44
C221
C221
C1u16X-RH
C1u16X-RH
C370
C370
C2.2u6.3X5
C2.2u6.3X5
+VTT
C217
C217
C1u16X-RH
C1u16X-RH
C389
C389
C4.7u6.3X
C4.7u6.3X
C216
C216
C1u16X-RH
C1u16X-RH
C369
C369
C22u6.3X50805-RH
C22u6.3X50805-RH
ARRANDALE:
3A
C215
C215
C22u6.3X50805-RH
C22u6.3X50805-RH
+1_8VRUN
C207
C207
C22u6.3X50805-RH
C22u6.3X50805-RH
ARRANDALE:
0.6A
+1_5VRUN
1 2
+
+
C208
C208
C330u2.5pSO-1
C330u2.5pSO-1
3 3
4 4
A
B
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
C
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
GRAPHICS POWER
GRAPHICS POWER
GRAPHICS POWER
MS-145X
MS-145X
MS-145X
E
0A
0A
65 6 Wednesday, August 05, 2009
65 6 Wednesday, August 05, 2009
65 6 Wednesday, August 05, 2009
0A
of
of
of
A
B
C
D
E
ARRANDALE PROCESSOR (GND)
U39I
U39H
U39H
AT20
VSS1
AT17
VSS2
AR31
4 4
3 3
2 2
1 1
AR28
AR26
AR24
AR23
AR20
AR17
AR15
AR12
AR9
AR6
AR3
AP20
AP17
AP13
AP10
AP7
AP4
AP2
AN34
AN31
AN23
AN20
AN17
AM29
AM27
AM25
AM20
AM17
AM14
AM11
AM8
AM5
AM2
AL34
AL31
AL23
AL20
AL17
AL12
AL9
AL6
AL3
AK29
AK27
AK25
AK20
AK17
AJ31
AJ23
AJ20
AJ17
AJ14
AJ11
AJ8
AJ5
AJ2
AH35
AH34
AH33
AH32
AH31
AH30
AH29
AH28
AH27
AH26
AH20
AH17
AH13
AH9
AH6
AH3
AG10
AF8
AF4
AF2
AE35
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
A
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
VSS35
VSS36
VSS37
VSS38
VSS39
VSS40
VSS41
VSS42
VSS43
VSS44
VSS45
VSS46
VSS47
VSS48
VSS49
VSS50
VSS51
VSS52
VSS53
VSS54
VSS55
VSS56
VSS57
VSS58
VSS59
VSS60
VSS61
VSS62
VSS63
VSS64
VSS65
VSS66
VSS67
VSS68
VSS69
VSS70
VSS71
VSS72
VSS73
VSS74
VSS75
VSS76
VSS77
VSS78
VSS79
VSS80
VSS
VSS
VSS81
VSS82
VSS83
VSS84
VSS85
VSS86
VSS87
VSS88
VSS89
VSS90
VSS91
VSS92
VSS93
VSS94
VSS95
VSS96
VSS97
VSS98
VSS99
VSS100
VSS101
VSS102
VSS103
VSS104
VSS105
VSS106
VSS107
VSS108
VSS109
VSS110
VSS111
VSS112
VSS113
VSS114
VSS115
VSS116
VSS117
VSS118
VSS119
VSS120
VSS121
VSS122
VSS123
VSS124
VSS125
VSS126
VSS127
VSS128
VSS129
VSS130
VSS131
VSS132
VSS133
VSS134
VSS135
VSS136
VSS137
VSS138
VSS139
VSS140
VSS141
VSS142
VSS143
VSS144
VSS145
VSS146
VSS147
VSS148
VSS149
VSS150
VSS151
VSS152
VSS153
VSS154
VSS155
VSS156
VSS157
VSS158
VSS159
VSS160
AE34
AE33
AE32
AE31
AE30
AE29
AE28
AE27
AE26
AE6
AD10
AC8
AC4
AC2
AB35
AB34
AB33
AB32
AB31
AB30
AB29
AB28
AB27
AB26
AB6
AA10
Y8
Y4
Y2
W35
W34
W33
W32
W31
W30
W29
W28
W27
W26
W6
V10
U8
U4
U2
T35
T34
T33
T32
T31
T30
T29
T28
T27
T26
T6
R10
P8
P4
P2
N35
N34
N33
N32
N31
N30
N29
N28
N27
N26
N6
M10
L35
L32
L29
L8
L5
L2
K34
K33
K30
B
U39I
K27
VSS161
K9
VSS162
K6
VSS163
K3
VSS164
J32
VSS165
J30
VSS166
J21
VSS167
J19
VSS168
H35
VSS169
H32
VSS170
H28
VSS171
H26
VSS172
H24
VSS173
H22
VSS174
H18
VSS175
H15
VSS176
H13
VSS177
H11
VSS178
H8
VSS179
H5
VSS180
H2
VSS181
G34
VSS182
G31
VSS183
G20
VSS184
G9
VSS185
G6
VSS186
G3
VSS187
F30
VSS188
F27
VSS189
F25
VSS190
F22
VSS191
F19
VSS192
F16
VSS193
E35
VSS194
E32
VSS195
E29
VSS196
E24
VSS197
E21
VSS198
E18
VSS199
E13
VSS200
E11
VSS201
E8
VSS202
E5
VSS203
E2
VSS204
D33
VSS205
D30
VSS206
D26
VSS207
D9
VSS208
D6
VSS209
D3
VSS210
C34
VSS211
C32
VSS212
C29
VSS213
C28
VSS214
C24
VSS215
C22
VSS216
C20
VSS217
C19
VSS218
C16
VSS219
B31
VSS220
B25
VSS221
B21
VSS222
B18
VSS223
B17
VSS224
B13
VSS225
B11
VSS226
B8
VSS227
B6
VSS228
B4
VSS229
A29
VSS230
A27
VSS231
A23
VSS232
A9
VSS233
IC,AUB_CFD_rPGA,R0P9
IC,AUB_CFD_rPGA,R0P9
C
VSS
VSS
NCTF
NCTF
VSS_NCTF1
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AT35
AT1
AR34
B34
B2
B1
A35
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
D
MS-145X
MS-145X
MS-145X
MICRO-STAR INT'L CO.,LTD.
PROCESSOR GND
PROCESSOR GND
PROCESSOR GND
E
0A
0A
0A
of
of
of
75 6 Wednesday, August 05, 2009
75 6 Wednesday, August 05, 2009
75 6 Wednesday, August 05, 2009
A
B
C
D
E
ARRANDALE PROCESSOR (RESERVED)
U39E
U39E
AJ13
RSVD32
AJ12
1 1
AP25
AL25
AL24
AL22
AJ33
AG9
M27
L28
J17
H17
G25
G17
E31
E30
RSVD1
RSVD2
RSVD3
RSVD4
RSVD5
RSVD6
RSVD7
RSVD8
RSVD9
RSVD10
RSVD11
RSVD12
RSVD13
RSVD14
RSVD33
RSVD34
RSVD35
RSVD36
RSVD_NCTF_37
RSVD38
RSVD39
RSVD_NCTF_40
RSVD_NCTF_41
RSVD_NCTF_42
RSVD_NCTF_43
AH25
AK26
AL26
AR2
AJ26
AJ27
AP1
AT2
AT3
AR1
TP32 TP32
TP34 TP34
TP43 TP43
TP44 TP44
TP46 TP46
PCI-Express Configuration Select
CFG0 1:Single PEG
CFG3 - PCI-Express Static Lane Reversal
CFG3
0:Bifurcation enabled
1 :Normal Operation
0 :Lane Numbers Reversed
15 -> 0, 14 -> 1, ...
2009/06/30 Only reserved CFG TP
AL28
CFG0
AM30
TP26 TP26
TP37 TP37
2 2
3 3
TP35 TP35
TP30 TP30
TP41 TP41
TP42 TP42
TP38 TP38
TP28 TP28
TP27 TP27
TP33 TP33
TP39 TP39
TP40 TP40
TP29 TP29
TP31 TP31
TP36 TP36
TP19 TP19
TP_CFG1
TP_CFG2
TP_CFG5
TP_CFG6
TP_CFG7
TP_CFG8
TP_CFG9
TP_CFG10
TP_CFG11
TP_CFG12
TP_CFG13
TP_CFG14
TP_CFG15
TP_CFG16
TP_CFG17
TP_CFG18
CFG3
CFG4
AM28
AP31
AL32
AL30
AM31
AN29
AM32
AK32
AK31
AK28
AJ28
AN30
AN32
AJ32
AJ29
AJ30
AK30
H16
B19
A19
A20
B20
AC9
AB9
A34
A33
C35
B35
U9
T9
C1
A3
J29
J28
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
RSVD_TP_86
RSVD15
RSVD16
RSVD17
RSVD18
RSVD19
RSVD20
RSVD21
RSVD22
RSVD_NCTF_23
RSVD_NCTF_24
RSVD26
RSVD27
RSVD_NCTF_28
RSVD_NCTF_29
RSVD_NCTF_30
RSVD_NCTF_31
RESERVED
RESERVED
RSVD45
RSVD46
RSVD47
RSVD48
RSVD49
RSVD50
RSVD51
RSVD52
RSVD53
RSVD_NCTF_54
RSVD_NCTF_55
RSVD_NCTF_56
RSVD_NCTF_57
RSVD58
RSVD_TP_59
RSVD_TP_60
KEY
RSVD62
RSVD63
RSVD64
RSVD65
RSVD_TP_66
RSVD_TP_67
RSVD_TP_68
RSVD_TP_69
RSVD_TP_70
RSVD_TP_71
RSVD_TP_72
RSVD_TP_73
RSVD_TP_74
RSVD_TP_75
RSVD_TP_76
RSVD_TP_77
RSVD_TP_78
RSVD_TP_79
RSVD_TP_80
RSVD_TP_81
RSVD_TP_82
RSVD_TP_83
RSVD_TP_84
RSVD_TP_85
VSS
AL29
AP30
AP32
AL27
AT31
AT32
AP33
AR33
AT33
AT34
AP35
AR35
AR32
E15
F15
A2
D15
C15
AJ15
AH15
AA5
AA4
R8
AD3
AD2
AA2
AA1
R9
AG7
AE3
V4
V5
N2
AD5
AD7
W3
W2
N3
AE5
AD9
AP34
CFG4 - Display Port Presence
1:Disabled; No Physical Display Port
CFG4
R431 0R0402 R431 0R0402
attached to Embedded Display Port
0:Enabled; An external Display Port
device is connected to the Embedded
Display Port
Layout Note:
Location of all CFG strap resistors needs
to be close to trace to minimize stub
Vss (AP34) can be left NC
IC,AUB_CFD_rPGA,R0P9
4 4
IC,AUB_CFD_rPGA,R0P9
is CRB implementation;
EDS/DG recommendation to GND
CFG0
CFG3
CFG4
NO_STUFF
R228
R228
X_3.01KR1%0402
X_3.01KR1%0402
NO_STUFF
R239
R239
X_3.01KR1%0402
X_3.01KR1%0402
NO_STUFF
R238
R238
X_3.01KR1%0402
X_3.01KR1%0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
MS-145X
MS-145X
MS-145X
MICRO-STAR INT'L CO.,LTD.
PROCESSOR RESERVED
PROCESSOR RESERVED
PROCESSOR RESERVED
of
of
of
85 6 Wednesday, August 05, 2009
85 6 Wednesday, August 05, 2009
85 6 Wednesday, August 05, 2009
E
0A
0A
0A
A
SODIMM#A
1 1
2 2
SA0_DIM0
SA1_DIM0
R136R136
R137R137
2009/06/30 Change to 0 ohm
3 3
M_A_A[15:0] 4
M_A_BS0 4
M_A_BS1 4
M_A_BS2 4
M_CS#0 4
M_CS#1 4
M_CLK_DDR0 4
M_CLK_DDR#0 4
M_CLK_DDR1 4
M_CLK_DDR#1 4
M_CKE0 4
M_CKE1 4
M_A_CAS# 4
M_A_RAS# 4
M_A_WE# 4
SMB_CLK_DIMM 10,21,29
SMB_DATA_DIMM 10,21,29
M_ODT0 4
M_ODT1 4
M_A_DM[7:0] 4
M_A_DQS[7:0] 4
M_A_DQS#[7:0] 4
M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14
M_A_A15
SA0_DIM0
SA1_DIM0
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7
B
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
N13-2040060-L41
N13-2040060-L41
SODIMM_S204
SODIMM_S204
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
SOCKET8A
SOCKET8A
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
C
M_A_DQ0
5
M_A_DQ1
7
M_A_DQ2
15
M_A_DQ3
17
M_A_DQ4
4
M_A_DQ5
6
M_A_DQ6
16
M_A_DQ7
18
M_A_DQ8
21
M_A_DQ9
23
M_A_DQ10
33
M_A_DQ11
35
M_A_DQ12
22
M_A_DQ13
24
M_A_DQ14
34
M_A_DQ15
36
M_A_DQ16
39
M_A_DQ17
41
M_A_DQ18
51
M_A_DQ19
53
M_A_DQ20
40
M_A_DQ21
42
M_A_DQ22
50
M_A_DQ23
52
M_A_DQ24
57
M_A_DQ25
59
M_A_DQ26
67
M_A_DQ27
69
M_A_DQ28
56
M_A_DQ29
58
M_A_DQ30
68
M_A_DQ31
70
M_A_DQ32
129
M_A_DQ33
131
M_A_DQ34
141
M_A_DQ35
143
M_A_DQ36
130
M_A_DQ37
132
M_A_DQ38
140
M_A_DQ39
142
M_A_DQ40
147
M_A_DQ41
149
M_A_DQ42
157
M_A_DQ43
159
M_A_DQ44
146
M_A_DQ45
148
M_A_DQ46
158
M_A_DQ47
160
M_A_DQ48
163
M_A_DQ49
165
M_A_DQ50
175
M_A_DQ51
177
M_A_DQ52
164
M_A_DQ53
166
M_A_DQ54
174
M_A_DQ55
176
M_A_DQ56
181
M_A_DQ57
183
M_A_DQ58
191
M_A_DQ59
193
M_A_DQ60
180
M_A_DQ61
182
M_A_DQ62
192
M_A_DQ63
194
M_A_DQ[63:0] 4
+1_5VDIMM
R133
R133
1KR1%0402
1KR1%0402
M_VREF_DQ_DIMM0_R
R132
R132
1KR1%0402
1KR1%0402
TS#_DIMM0_1 3
+1_5VDIMM
R140
R140
10KR1%0402
10KR1%0402
M_VREF_CA_DIMM0
R142
R142
10KR1%0402
10KR1%0402
DDR3_DRAMRST# 10,47
2009/06/16 R140,R142改10K1%
+1_5VDIMM
C179
C193
C193
C0.1u10X0402
C0.1u10X0402
+1_5VDIMM
C177
C177
C10u6.3X50805
C10u6.3X50805
2009/06/30 Remove 330uF
CPU及Switching power
C179
C0.1u10X0402
C0.1u10X0402
C192
C192
C10u6.3X50805
C10u6.3X50805
C195
C195
C0.1u10X0402
C0.1u10X0402
C190
C190
C10u6.3X50805
C10u6.3X50805
端已有
+3VRUN
C197
C197
C0.1u10X0402
C0.1u10X0402
M_VREF_DQ_DIMM0_R
C166
C166
C0.1u10X0402
C0.1u10X0402
M_VREF_CA_DIMM0
C182
C182
C2.2u6.3X5
C2.2u6.3X5
C180
C180
C0.1u10X0402
C0.1u10X0402
C178
C114
C114
C10u6.3X50805
C10u6.3X50805
C178
C10u6.3X50805
C10u6.3X50805
+1_5VDIMM
C196
C196
C2.2u6.3X5
C2.2u6.3X5
C164
C164
C2.2u6.3X5
C2.2u6.3X5
C185
C185
C2.2u6.3X5
C2.2u6.3X5
C113
C113
C10u6.3X50805
C10u6.3X50805
D
SOCKET8B
SOCKET8B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH
DDR3SODIMM-204PS_BLACK-RH
C191
C191
X_C10u6.3X50805
X_C10u6.3X50805
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
MEC1
MEC1
MEC2
MEC2
203
VTT
204
VTT
205
205
206
206
C189
C189
X_C10u6.3X50805
X_C10u6.3X50805
C184
C184
C1u16X-RH
C1u16X-RH
E
C188
C188
C1u16X-RH
C1u16X-RH
C102
C102
C1u16X-RH
C1u16X-RH
+0_75VRUN
C194
C194
C1u16X-RH
C1u16X-RH
4 4
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DDR3 SODIMM0
DDR3 SODIMM0
DDR3 SODIMM0
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-145X
MS-145X
MS-145X
E
0A
0A
95 6 Wednesday, August 05, 2009
95 6 Wednesday, August 05, 2009
95 6 Wednesday, August 05, 2009
0A
of
of
of
A
B
C
D
E
SODIMM#B
C497
C497
C2.2u6.3X5
C2.2u6.3X5
C108
C108
C2.2u6.3X5
C2.2u6.3X5
C131
C131
C2.2u6.3X5
C2.2u6.3X5
C142
C142
C10u6.3X50805
C10u6.3X50805
+1_5VDIMM
SOCKET7A
M_B_A[15:0] 4
+3VRUN
1 1
R323
R323
10KR0402
10KR0402
SA1_DIM1
SA0_DIM1
2 2
3 3
R324
R324
0R0402
0R0402
2009/06/30
Change to 0 ohm
M_B_BS0 4
M_B_BS1 4
M_B_BS2 4
M_CS#2 4
M_CS#3 4
M_CLK_DDR2 4
M_CLK_DDR#2 4
M_CLK_DDR3 4
M_CLK_DDR#3 4
M_CKE2 4
M_CKE3 4
M_B_CAS# 4
M_B_RAS# 4
M_B_WE# 4
SMB_CLK_DIMM 9,21,29
SMB_DATA_DIMM 9,21,29
M_ODT2 4
M_ODT3 4
M_B_DM[7:0] 4
M_B_DQS[7:0] 4
M_B_DQS#[7:0] 4
M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14
M_B_A15
SA0_DIM1
SA1_DIM1
M_B_DM0
M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12/BC#
119
A13
80
A14
78
A15
109
BA0
108
BA1
79
BA2
114
S0#
121
S1#
101
CK0
103
CK0#
102
CK1
104
CK1#
73
CKE0
74
CKE1
115
CAS#
110
RAS#
113
WE#
197
SA0
201
SA1
202
SCL
200
SDA
116
ODT0
120
ODT1
11
DM0
28
DM1
46
DM2
63
DM3
136
DM4
153
DM5
170
DM6
187
DM7
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
10
DQS#0
27
DQS#1
45
DQS#2
62
DQS#3
135
DQS#4
152
DQS#5
169
DQS#6
186
DQS#7
N13-2040080-L41
N13-2040080-L41
SODIMM_S204_1
SODIMM_S204_1
DDR3SODIMM-204PS_BLACK-RH-1
DDR3SODIMM-204PS_BLACK-RH-1
SOCKET7A
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
M_B_DQ0
5
M_B_DQ1
7
M_B_DQ2
15
M_B_DQ3
17
M_B_DQ4
4
M_B_DQ5
6
M_B_DQ6
16
M_B_DQ7
18
M_B_DQ8
21
M_B_DQ9
23
M_B_DQ10
33
M_B_DQ11
35
M_B_DQ12
22
M_B_DQ13
24
M_B_DQ14
34
M_B_DQ15
36
M_B_DQ16
39
M_B_DQ17
41
M_B_DQ18
51
M_B_DQ19
53
M_B_DQ20
40
M_B_DQ21
42
M_B_DQ22
50
M_B_DQ23
52
M_B_DQ24
57
M_B_DQ25
59
M_B_DQ26
67
M_B_DQ27
69
M_B_DQ28
56
M_B_DQ29
58
M_B_DQ30
68
M_B_DQ31
70
M_B_DQ32
129
M_B_DQ33
131
M_B_DQ34
141
M_B_DQ35
143
M_B_DQ36
130
M_B_DQ37
132
M_B_DQ38
140
M_B_DQ39
142
M_B_DQ40
147
M_B_DQ41
149
M_B_DQ42
157
M_B_DQ43
159
M_B_DQ44
146
M_B_DQ45
148
M_B_DQ46
158
M_B_DQ47
160
M_B_DQ48
163
M_B_DQ49
165
M_B_DQ50
175
M_B_DQ51
177
M_B_DQ52
164
M_B_DQ53
166
M_B_DQ54
174
M_B_DQ55
176
M_B_DQ56
181
M_B_DQ57
183
M_B_DQ58
191
M_B_DQ59
193
M_B_DQ60
180
M_B_DQ61
182
M_B_DQ62
192
M_B_DQ63
194
M_B_DQ[63:0] 4
+1_5VDIMM
R93
R93
1KR1%0402
1KR1%0402
M_VREF_DQ_DIMM1_R
R92
R92
1KR1%0402
1KR1%0402
TS#_DIMM1_1 3
+1_5VDIMM
R114
R114
10KR1%0402
10KR1%0402
M_VREF_CA_DIMM1
R115
R115
10KR1%0402
10KR1%0402
DDR3_DRAMRST# 9,47
2009/06/16 R114,R115改10K1%
+1_5VDIMM
C112
C112
C0.1u10X0402
C0.1u10X0402
+1_5VDIMM
C170
C170
C10u6.3X50805
C10u6.3X50805
2009/06/30 Remove 330uF
CPU及Switching power
C117
C117
C0.1u10X0402
C0.1u10X0402
C115
C115
C10u6.3X50805
C10u6.3X50805
端已有
+3VRUN
M_VREF_DQ_DIMM1_R
M_VREF_CA_DIMM1
C111
C111
C0.1u10X0402
C0.1u10X0402
C116
C116
C10u6.3X50805
C10u6.3X50805
C496
C496
C0.1u10X0402
C0.1u10X0402
C109
C109
C0.1u10X0402
C0.1u10X0402
C138
C138
C2.2u6.3X5
C2.2u6.3X5
C110
C110
C0.1u10X0402
C0.1u10X0402
SOCKET7B
SOCKET7B
75
VDD
76
VDD
81
VDD
82
VDD
87
VDD
88
VDD
93
VDD
94
VDD
99
VDD
100
VDD
105
VDD
106
VDD
111
VDD
112
VDD
117
VDD
118
VDD
123
VDD
124
VDD
199
VDDSPD
77
NC1
122
NC2
125
NCTEST
198
EVENT#
30
RESET#
1
VREF_DQ
126
VREF_CA
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
DDR3SODIMM-204PS_BLACK-RH-1
DDR3SODIMM-204PS_BLACK-RH-1
C137
C137
C10u6.3X50805
C10u6.3X50805
C140
C140
C10u6.3X50805
C10u6.3X50805
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
MEC1
MEC1
MEC2
MEC2
203
VTT
204
VTT
205
205
206
206
C172
C172
X_C10u6.3X50805
X_C10u6.3X50805
C122
C122
C1u16X-RH
C1u16X-RH
C141
C141
X_C10u6.3X50805
X_C10u6.3X50805
C100
C100
C1u16X-RH
C1u16X-RH
C125
C125
C1u16X-RH
C1u16X-RH
+0_75VRUN
C186
C186
C1u16X-RH
C1u16X-RH
4 4
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DDR3 SODIMM1
DDR3 SODIMM1
DDR3 SODIMM1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
A
B
C
D
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-145X
MS-145X
MS-145X
E
0A
0A
0A
of
of
of
10 56 Wednesday, August 05, 2009
10 56 Wednesday, August 05, 2009
10 56 Wednesday, August 05, 2009
5
2009/06/30 靠近CPU(TX)
4
U40A
U40A
3
2
1
PEG_TXP0
PEG_TXN0
D D
C C
B B
PEG_TXP1
PEG_TXN1
PEG_TXP2
PEG_TXN2
PEG_TXP3
PEG_TXN3
PEG_TXP4
PEG_TXN4
PEG_TXP5
PEG_TXN5
PEG_TXP6
PEG_TXN6
PEG_TXP7
PEG_TXN7
PEG_TXP8
PEG_TXN8
PEG_TXP9
PEG_TXN9
PEG_TXP10
PEG_TXN10
PEG_TXP11
PEG_TXN11
PEG_TXP12
PEG_TXN12
PEG_TXP13
PEG_TXN13
PEG_TXP14
PEG_TXN14
PEG_TXP15
PEG_TXN15
C555 C0.1u10X0402 C555 C0.1u10X0402
C557 C0.1u10X0402 C557 C0.1u10X0402
C559 C0.1u10X0402 C559 C0.1u10X0402
C561 C0.1u10X0402 C561 C0.1u10X0402
C563 C0.1u10X0402 C563 C0.1u10X0402
C564 C0.1u10X0402 C564 C0.1u10X0402
C565 C0.1u10X0402 C565 C0.1u10X0402
C566 C0.1u10X0402 C566 C0.1u10X0402
C567 C0.1u10X0402 C567 C0.1u10X0402
C570 C0.1u10X0402 C570 C0.1u10X0402
C572 C0.1u10X0402 C572 C0.1u10X0402
C573 C0.1u10X0402 C573 C0.1u10X0402
C574 C0.1u10X0402 C574 C0.1u10X0402
C575 C0.1u10X0402 C575 C0.1u10X0402
C576 C0.1u10X0402 C576 C0.1u10X0402
C586 C0.1u10X0402 C586 C0.1u10X0402
C587 C0.1u10X0402 C587 C0.1u10X0402
C588 C0.1u10X0402 C588 C0.1u10X0402
C596 C0.1u10X0402 C596 C0.1u10X0402
C595 C0.1u10X0402 C595 C0.1u10X0402
C585 C0.1u10X0402 C585 C0.1u10X0402
C584 C0.1u10X0402 C584 C0.1u10X0402
C594 C0.1u10X0402 C594 C0.1u10X0402
C593 C0.1u10X0402 C593 C0.1u10X0402
C583 C0.1u10X0402 C583 C0.1u10X0402
C582 C0.1u10X0402 C582 C0.1u10X0402
C592 C0.1u10X0402 C592 C0.1u10X0402
C591 C0.1u10X0402 C591 C0.1u10X0402
C581 C0.1u10X0402 C581 C0.1u10X0402
C580 C0.1u10X0402 C580 C0.1u10X0402
C590 C0.1u10X0402 C590 C0.1u10X0402
C589 C0.1u10X0402 C589 C0.1u10X0402
GFX_RXP0
GFX_RXN0
GFX_RXP1
GFX_RXN1
GFX_RXP2
GFX_RXN2
GFX_RXP3
GFX_RXN3
GFX_RXP4
GFX_RXN4
GFX_RXP5
GFX_RXN5
GFX_RXP6
GFX_RXN6
GFX_RXP7
GFX_RXN7
GFX_RXP8
GFX_RXN8
GFX_RXP9
GFX_RXN9
GFX_RXP10
GFX_RXN10
GFX_RXP11
GFX_RXN11
GFX_RXP12
GFX_RXN12
GFX_RXP13
GFX_RXN13
GFX_RXP14
GFX_RXN14
GFX_RXP15
GFX_RXN15
AF30
AE31
AE29
AD28
AD30
AC31
AC29
AB28
AB30
AA31
AA29
Y28
Y30
W31
W29
V28
V30
U31
U29
T28
T30
R31
R29
P28
P30
N31
N29
M28
M30
L31
L29
K30
PCIE_RX0P
PCIE_RX0N
PCIE_RX1P
PCIE_RX1N
PCIE_RX2P
PCIE_RX2N
PCIE_RX3P
PCIE_RX3N
PCIE_RX4P
PCIE_RX4N
PCIE_RX5P
PCIE_RX5N
PCIE_RX6P
PCIE_RX6N
PCIE_RX7P
PCIE_RX7N
PCIE_RX8P
PCIE_RX8N
PCIE_RX9P
PCIE_RX9N
PCIE_RX10P
PCIE_RX10N
PCIE_RX11P
PCIE_RX11N
PCIE_RX12P
PCIE_RX12N
PCIE_RX13P
PCIE_RX13N
PCIE_RX14P
PCIE_RX14N
PCIE_RX15P
PCIE_RX15N
PCIE_TX0P
PCIE_TX0N
PCIE_TX1P
PCIE_TX1N
PCIE_TX2P
PCIE_TX2N
PCIE_TX3P
PCIE_TX3N
PCI EXPRESS INTERFACE
PCI EXPRESS INTERFACE
PCIE_TX4P
PCIE_TX4N
PCIE_TX5P
PCIE_TX5N
PCIE_TX6P
PCIE_TX6N
PCIE_TX7P
PCIE_TX7N
PCIE_TX8P
PCIE_TX8N
PCIE_TX9P
PCIE_TX9N
PCIE_TX10P
PCIE_TX10N
PCIE_TX11P
PCIE_TX11N
PCIE_TX12P
PCIE_TX12N
PCIE_TX13P
PCIE_TX13N
PCIE_TX14P
PCIE_TX14N
PCIE_TX15P
PCIE_TX15N
AH30
AG31
AG29
AF28
AF27
AF26
AD27
AD26
AC25
AB25
Y23
Y24
AB27
AB26
Y27
Y26
W24
W23
V27
U26
U24
U23
T26
T27
T24
T23
P27
P26
P24
P23
M27
N26
GFX_TXP0
GFX_TXN0
GFX_TXP1
GFX_TXN1
GFX_TXP2
GFX_TXN2
GFX_TXP3
GFX_TXN3
GFX_TXP4
GFX_TXN4
GFX_TXP5
GFX_TXN5
GFX_TXP6
GFX_TXN6
GFX_TXP7
GFX_TXN7
GFX_TXP8
GFX_TXN8
GFX_TXP9
GFX_TXN9
GFX_TXP10
GFX_TXN10
GFX_TXP11
GFX_TXN11
GFX_TXP12
GFX_TXN12
GFX_TXP13
GFX_TXN13
GFX_TXP14
GFX_TXN14
GFX_TXP15
GFX_TXN15
C260 C0.1u10X0402 C260 C0.1u10X0402
C264 C0.1u10X0402 C264 C0.1u10X0402
C267 C0.1u10X0402 C267 C0.1u10X0402
C263 C0.1u10X0402 C263 C0.1u10X0402
C272 C0.1u10X0402 C272 C0.1u10X0402
C268 C0.1u10X0402 C268 C0.1u10X0402
C271 C0.1u10X0402 C271 C0.1u10X0402
C276 C0.1u10X0402 C276 C0.1u10X0402
C287 C0.1u10X0402 C287 C0.1u10X0402
C283 C0.1u10X0402 C283 C0.1u10X0402
C286 C0.1u10X0402 C286 C0.1u10X0402
C291 C0.1u10X0402 C291 C0.1u10X0402
C295 C0.1u10X0402 C295 C0.1u10X0402
C299 C0.1u10X0402 C299 C0.1u10X0402
C298 C0.1u10X0402 C298 C0.1u10X0402
C302 C0.1u10X0402 C302 C0.1u10X0402
C304 C0.1u10X0402 C304 C0.1u10X0402
C313 C0.1u10X0402 C313 C0.1u10X0402
C307 C0.1u10X0402 C307 C0.1u10X0402
C314 C0.1u10X0402 C314 C0.1u10X0402
C318 C0.1u10X0402 C318 C0.1u10X0402
C323 C0.1u10X0402 C323 C0.1u10X0402
C322 C0.1u10X0402 C322 C0.1u10X0402
C325 C0.1u10X0402 C325 C0.1u10X0402
C329 C0.1u10X0402 C329 C0.1u10X0402
C333 C0.1u10X0402 C333 C0.1u10X0402
C332 C0.1u10X0402 C332 C0.1u10X0402
C336 C0.1u10X0402 C336 C0.1u10X0402
C343 C0.1u10X0402 C343 C0.1u10X0402
C347 C0.1u10X0402 C347 C0.1u10X0402
C348 C0.1u10X0402 C348 C0.1u10X0402
C345 C0.1u10X0402 C345 C0.1u10X0402
PEG_RXP0
PEG_RXN0 PEG_RXN0
PEG_RXP1
PEG_RXN1 PEG_RXN1
PEG_RXP2
PEG_RXN2 PEG_RXN2
PEG_RXP3
PEG_RXN3
PEG_RXP4
PEG_RXN4 PEG_RXN4
PEG_RXP5
PEG_RXN5 PEG_RXN5
PEG_RXP6
PEG_RXN6 PEG_RXN6
PEG_RXP7
PEG_RXN7 PEG_RXN7
PEG_RXP8
PEG_RXN8 PEG_RXN8
PEG_RXP9
PEG_RXN9 PEG_RXN9
PEG_RXP10
PEG_RXN10 PEG_RXN10
PEG_RXP11
PEG_RXN11 PEG_RXN11
PEG_RXP12
PEG_RXN12
PEG_RXP13
PEG_RXN13
PEG_RXP14
PEG_RXN14
PEG_RXP15
PEG_RXN15
PEG_RXN[15:0]
PEG_RXP[15:0]
PEG_TXP[15:0]
PEG_TXN[15:0]
PEG_RXN[15:0] 3
PEG_RXP[15:0] 3
PEG_TXP[15:0] 3
PEG_TXN[15:0] 3
CLOCK
CLK_PEGA_MXM_P 21
CLK_PEGA_MXM_N 21
R390 0R0402 R390 0R0402
R391 0R0402 R391 0R0402
CheckResetSequence
A A
R215
PCIE_RST# 24
PARK-S3 M92-S2
X-
4
For Park-S3: PWRGOOD pin
must need to pull low
For M92-S2/S3: PWRGOOD pin
should be NC
5
R215
R215
X_10KR0402
X_10KR0402
CLOCK
AK30
PCIE_REFCLKP
AK32
PCIE_REFCLKN
N10
PWRGOOD
AL27
PERSTB
216-0728020-00-A12-RH
216-0728020-00-A12-RH
CALIBRATION
CALIBRATION
PCIE_CALRP
PCIE_CALRN
Y22
AA22
3
VGA_PE_CP
VGA_PE_CN
R203 1.27KR% R203 1.27KR%
R205 2KR1%0402 R205 2KR1%0402
+1_0VRUN_PARK
2
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
M92/Pak-Sx (PCIE_Interface)
M92/Pak-Sx (PCIE_Interface)
M92/Pak-Sx (PCIE_Interface)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MS-145X
MS-145X
MS-145X
MICRO-STAR INT'L CO.,LTD.
11 56 Wednesday, August 05, 2009
11 56 Wednesday, August 05, 2009
11 56 Wednesday, August 05, 2009
of
of
1
of
0A
0A
0A
5
PARK-S3 M92-S2
X-
R210
R195
X-
R208 X-
C659
X-
C658 X-
D D
C512
X-
C662 X-
X-
C661
C660 X -
X- R197
R356 X-
X- C665
C664 X-
X- C663
For PARK-S3: Install All components in this
Box INCLUDING Decoupling caps and Bead
connecting to DPC_VDD18#
For M92-S2: DO NOT Install any Component
in this Box.
DVPDATA_19 17
DVPDATA_21 17
DVPDATA_2 17
C659
C659
X_C10u6.3X50805
X_C10u6.3X50805
C662
C662
X_C10u6.3X50805
X_C10u6.3X50805
C665X_C10u C665X_C10u
DVPDATA_0 17
X_C1u6.3Y0402-RH
X_C1u6.3Y0402-RH
X_C1u6.3Y0402-RH
X_C1u6.3Y0402-RH
C664X_1u C664X_1u
+1_8VRUN_PARK
+1_0VRUN_PARK
R210 X_0R R210 X_0R
R195 X_0R R195 X_0R
R208 X_0R R208 X_0R
R406 X-
X-
R404
R402 X
C C
M92_THERMDA
M92_THERMDC
T_CRIT_M92# 40
Sequence
ATI suggestion
B B
+1_8VRUN_PARK
B9
B9
470L1.5A-150-RH
470L1.5A-150-RH
+1_0VRUN_PARK
470L1.5A-150-RH
470L1.5A-150-RH
2009/07/09 Default use clock GEN. 27MHz(SS)
Note:1
For M9x-S2/S3 XO_IN and XO_IN2 Pins are NC, can be gronded
For Park-S3: XO_IN and XO_IN2 can be use as
A A
3.3V CLK Input. These poins can be grounded if not
in use.
VDDR3
B14
B14
CLK_XTAL_27M_IN 29
-
VDDR3 +3VRUN
R478
R478
X_0R0402
X_0R0402
C560
C560
C100p16N0402
C100p16N0402
C615
C615
C0.1u16Y0402
C0.1u16Y0402
RN26
RN26
8P4R-10KR0402
8P4R-10KR0402
1
3
5
7
RN0402_MSI
RN0402_MSI
(1.8V@75mA DPLL_PVDD)
C241
C241
C10u6.3X50805
C10u6.3X50805
(1.0V@125mA DPLL_VDDC)
(1.1V@150mA DPLL_VDDC)
C275
C275
C10u6.3X50805
C10u6.3X50805
R479
R479
0R0402
0R0402
1.0 change P/N
U41
U41
1
VCC
2
DXP
3
DXN
THERM#4GND
SNSR-G780P81U-RH
SNSR-G780P81U-RH
T_CRIT_M92#
2
4
6
M92_THRM_ALERT-
8
C261
C261
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C274
C274
C1u6.3Y0402-RH
C1u6.3Y0402-RH
R385 0R0402 R385 0R0402
5
SMBCLK
SMBDATA
ALERT#
C247
C247
C0.1u10X0402-1
C0.1u10X0402-1
C273
C273
C0.1u10X0402-1
C0.1u10X0402-1
M92_XTAL_IN
VDDR3
8
SMB_THRM_CLK 30
7
SMB_THRM_DATA 30
6
5
JTAG DEBUG
PORT
TP22 35mil TP22 35mil
TP59 35mil TP59 35mil
TP60 35mil TP60 35mil
TP62 35mil TP62 35mil
TP61 35mil TP61 35mil R202 10KR0402 R202 10KR0402
R190 10KR0402 R190 10KR0402
TEST_EN 13
C521
C521
X_C22p50N0402
X_C22p50N0402
C522
C522
X_C22p50N0402
X_C22p50N0402
R187
R187
0R0402
0R0402
PEG_CLKREQ# 21
PLACE VREFG
DIVIDER AND CAP
CLOSE TO ASIC
Y11
Y11
X_27MHZ
X_27MHZ
R384
R384
X_1MR0402
X_1MR0402
R186
R186
0R0402
0R0402
+1_8VRUN_PARK
R220 X_0R0402 R220 X_0R0402
M92_XTAL_IN
M92_XTAL_OUT
C658
C658
C661
C661
C663 X_0.1u C663 X_0.1u
R407 4.7KR0402 R407 4.7KR0402
R408 4.7KR0402 R408 4.7KR0402
GPIO0 17
GPIO1 17
GPIO2 17
GPIO5 17
LVDS_BLON 18
GPIO8 17
GPIO9 17
GPIO11 17
GPIO12 17
GPIO13 17
POW_SW1 45
TP58TP58
POW_SW2 45
GPIO22 17
GENERICC 17
+1_8VRUN_PARK
R165
R165
499R1%0402
499R1%0402
R166
R166
249R1%0402
249R1%0402
(1.8V@20mA TSVDD)
4
C512
C512
X_C0.1u10X0402-1
X_C0.1u10X0402-1
R197 X_0R R197 X_0R
C660
C660
X_C0.1u10X0402-1
X_C0.1u10X0402-1
R356 X_0R R356 X_0R
R406 X_0R0603 R406 X_0R0603
R404 X_0R0603 R404 X_0R0603
R402 X_0R0603 R402 X_0R0603
M92_THRM_ALERT-
GPIO24_TRSTB
GPIO25_TDI
GPIO26_TCK
GPIO27_TMS
GPIO28_TDO
HPD1
C230
C230
C0.1u10X0402-1
C0.1u10X0402-1
M92_THERMDA
M92_THERMDC
4
U40B
U40B
M93-S3/M92-S2
M93-S3/M92-S2
AE9
DVCNTL_0/ DVPDATA_18
L9
DVCNTL_1 / NC
N9
DVCNTL_2 / NC
AE8
DVDATA_12 / DVPDATA_16
AD9
DVDATA_11 / DVPDATA_20
AC10
DVDATA_10 / DVPDATA_22
AD7
DVDATA_9 / DVPDATA_12
AC8
DVDATA_8 / DVPDATA_14
AC7
DVDATA_7 / DVPCNTL_0
AB9
DVDATA_6 / DVPDATA_8
AB8
DVDATA_5 / DVPDATA_6
AB7
DVDATA_4 DVPDATA_4
AB4
DVDATA_3 / DVPDATA_19
AB2
DVDATA_2 / DVPDATA_21
Y8
DVDATA_1 / DVPDATA_2
Y7
DVDATA_0 / DVPDATA_0
DVO
DVO
M93-S3/M92-S2
M93-S3/M92-S2
W6
DPC_PVDD / DVPDATA_11
V6
DPC_PVSS / GND
AC6
DPC_VDD18#1/DVPDAT10
AC5
DPC_VDD18#2/DVPDAT23
AA5
DPC_VDD10#1/DVPDAT15
AA6
DPC_VDD10#2/DVPDAT17
U1
DPC_VSSR#1 / DVPCLK
W1
DPC_VSSR#2 / DVPDAT5
U3
DPC_VSSR#3 / GND
Y6
DPC_VSSR#4 / GND
AA1
DPC_VSSR#5/ DVPCNTL_MV0
R1
SCL
R3
SDA
GENERAL PURPOSE I/O
GENERAL PURPOSE I/O
U6
GPIO_0
U10
GPIO_1
T10
GPIO_2
U8
GPIO_3_SMBDATA
U7
GPIO_4_SMBCLK
T9
GPIO_5_AC_BATT
T8
GPIO_6
T7
GPIO_7_BLON
P10
GPIO_8_ROMSO
P4
GPIO_9_ROMSI
P2
GPIO_10_ROMSCK
N6
GPIO_11
N5
GPIO_12
N3
GPIO_13
Y9
GPIO_14_HPD2
N1
GPIO_15_PWRCNTL_0
M4
GPIO_16_SSIN
R6
GPIO_17_THERMAL_INT
W10
GPIO_18_HPD3
M2
GPIO_19_CTF
P8
GPIO_20_PWRCNTL_1
P7
GPIO_21_BB_EN
N8
GPIO_22_ROMCSB
N7
GPIO_23_CLKREQB
L6
JTAG_TRSTB
L5
JTAG_TDI
L3
JTAG_TCK
L1
JTAG_TMS
K4
JTAG_TDO
AF24
TESTEN
AB13
GENERICA
W8
GENERICB
W9
GENERICC
W7
GENERICD
AD10
GENERICE_HPD4
AC14
HPD1
AC16
VREFG
PLL/CLOCK
PLL/CLOCK
AF14
DPLL_PVDD
AE14
DPLL_PVSS
AD14
DPLL_VDDC
AM28
XTALIN
AK28
XTALOUT
AC22
NC#2/XO_IN
AB22
NC#1/XO_IN2
T4
DPLUS
T2
DMINUS
R5
TS_FDO
AD17
TSVDD
AC17
TSVSS
216-0728020-00-A12-RH
216-0728020-00-A12-RH
I2C
I2C
THERMAL
THERMAL
TXCAP_DPA3P
TXCAM_DPA3N
TX0P_DPA2P
DPA
DPA
TX0M_DPA2N
TX1P_DPA1P
TX1M_DPA1N
TX2P_DPA0P
TX2M_DPA0N
TXCBP_DPB3P
TXCBM_DPB3N
TX3P_DPB2P
TX3M_DPB2N
DPB
DPB
TX4P_DPB1P
TX4M_DPB1N
TX5P_DPB0P
TX5M_DPB0N
M92-S2/M93-S3
M92-S2/M93-S3
DVPDATA_3/TXCCP_DPC3P
DVPCNTL_2/TXCCM_DPC3N
DVPDATA_7 / TX0P_DPC2P
DVPDATA_1 / TX0M_DPC2N
DVPCNTL_MV1 / TX1P_DPC1P
DVPDATA_9 / TX1M_DPC1N
DVPDATA_13 / TX2P_DPC0P
DVPCNTL_1 / TX2M_DPC0N
VDDR4 / DPCD_CALR
DPC
DPC
DAC1
DAC1
HSYNC
VSYNC
RSET
AVDD
AVSSQ
VDD1DI
VSS1DI
M92-S2/M93-S3
M92-S2/M93-S3
R2 / NC
R2B / NC
G2 / NC
G2B / NC
B2 / NC
B2B / NC
C / NC
DAC2
DAC2
Y / NC
COMP / NC
H2SYNC
V2SYNC
VDD2DI / NC
VSS2DI / NC
A2VDD / NC
A2VDDQ / NC
A2VSSQ
R2SET / NC
M92-S2/M93-S3 M92-S2/M93-S3
M92-S2/M93-S3 M92-S2/M93-S3
DDC1CLK
DDC1DATA
AUX1P
DDC/AUX
DDC/AUX
AUX1N
DDC2CLK
DDC2DATA
AUX2P
AUX2N
DDCCLK_AUX5P
DDCDATA_AUX5N
DDC6CLK
DDC6DATA
NC/DDCCLK_AUX3P
NC/DDCDATA_AUX3N
3
AF2
AF4
AG3
AG5
AH3
AH1
AK3
AK1
AK5
AM3
AK6
AM5
AJ7
AH6
AK8
AL7
For M92-S2: Use 0R to VDDR4
For Park-S3: DNI (NC)
V4
U5
W3
V2
Y4
W5
R206 0R0402 R206 0R0402
AA3
Y2
AA12
R206
AM26
R
AK26
RB
AL25
G
AJ25
GB
AH24
B
AG25
BB
AH26
AJ27
AD22
AG24
AE22
AE23
AD23
AM12
AK12
AL11
AJ11
AK10
AL9
AH12
AM10
AJ9
AL13
AJ13
AD19
AC19
AE20
AE17
AE19
AG13
AE6
AE5
AD2
AD4
AC11
AC13
AD13
AD11
AE16
AD16
AC1
AC3
AD20
AC20
VDD1DI
0R10R1
A2VDD
A2VDDQ
R191 715R1%0402 R191 715R1%0402
DVI_CLK_MXM 18
DVI_DATA_MXM 18
I2C_CLK 18
I2C_DATA 18
DAC_SCL 18
DAC_SDAT 18
I2C_DATA
I2C_CLK
DAC_SDAT
DAC_SCL
DVI_DATA_MXM
DVI_CLK_MXM
3
+1_8VRUN_PARK
B7
B7
120L200mA-200
VDDR3
JNC12 X_0603 JNC12 X_0603
120L200mA-200
JNC9 X_0603 JNC9 X_0603
B10
B10
120L200mA-200
120L200mA-200
JNC10 X_0603 JNC10 X_0603
CLK+_MXM 18
CLK-_MXM 18
TX0+_MXM 18
TX0-_MXM 18
TX1+_MXM 18
TX1-_MXM 18
TX2+_MXM 18
TX2-_MXM 18
VDDR4
PARK-S3 M92-S2
X-
R1 8
G1 8
B1 8
HSYNC# 17,18
VSYNC# 17,18
R200
R200
AVDD
499R1%0402
499R1%0402
AVSSQ have to be away from noisy ground
A2VSSQ have to be away from noisy ground
it is for layout recommendation
HSYNC_DAC2 17
VSYNC_DAC2 17
VDD2DI
HDMI
LVDS
5V
CRT
R392 10KR0402 R392 10KR0402
R393 10KR0402 R393 10KR0402
R397 10KR0402 R397 10KR0402
R398 10KR0402 R398 10KR0402
R396 10KR0402 R396 10KR0402
R395 10KR0402 R395 10KR0402
5V
3.3V
VDDR3
R
G
B
R386 150R1%0402 R386 150R1%0402
R382 150R1%0402 R382 150R1%0402
R387 150R1%0402 R387 150R1%0402
2
(1.8V@70mA AVDD)
C249
C249
C238
C238
C0.1u10X0402-1
C0.1u10X0402-1
X_C10u6.3X50805
X_C10u6.3X50805
(1.8V@45mA VDD1DI)
C218
C218
C228
C228
C1u6.3Y0402-RH
C1u6.3Y0402-RH
X_C10u6.3X50805
X_C10u6.3X50805
(1.8V@2mA A2VDDQ)
C256
C256
C0.1u10X0402-1
C0.1u10X0402-1
C235
C235
X_C10u6.3X50805
X_C10u6.3X50805
(1.8V@40mA VDD2DI)
C219
C219
C282
C282
C0.1u10X0402-1
C0.1u10X0402-1
X_C10u6.3X50805
X_C10u6.3X50805
(3.3V@65mA A2VDD)
C257
C257
C236
C236
C1u6.3Y0402-RH
C1u6.3Y0402-RH
X_C10u6.3X50805
X_C10u6.3X50805
DGPU_PWR_EN 25,45
+1_8VRUN_PARK
2
AVDD
C262
C262
C1u6.3Y0402-RH
C1u6.3Y0402-RH
VDD1DI
C277
C277
C0.1u10X0402-1
C0.1u10X0402-1
A2VDDQ
C242
C242
C1u6.3Y0402-RH
C1u6.3Y0402-RH
VDD2DI
C229
C229
C1u6.3Y0402-RH
C1u6.3Y0402-RH
A2VDD
C243
C243
C0.1u10X0402-1
C0.1u10X0402-1
R443 0R0402 R443 0R0402
R451 X_47KR0402 R451 X_47KR0402
OPTIONAL RC NETWORK
TO FINE TUNE
POWER SEQUENCING
Check 1.8VRUN and VDDR3 Sequence
For Park-S3 : Stuff R443
For M92-S2 : Stuff R451
HPD1
Q28
Q28
P-NDS352AP
P-NDS352AP
C623
C623
C0.1u16Y0402
C0.1u16Y0402
LVDS Interface
U40F
U40F
LVDS CONTROL
LVDS CONTROL
LVTMDP
LVTMDP
216-0728020-00-A12-RH
216-0728020-00-A12-RH
VARY_BL
DIGON
TXCLK_UP_DPF3P
TXCLK_UN_DPF3N
TXOUT_U0P_DPF2P
TXOUT_U0N_DPF2N
TXOUT_U1P_DPF1P
TXOUT_U1N_DPF1N
TXOUT_U2P_DPF0P
TXOUT_U2N_DPF0N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP_DPE3P
TXCLK_LN_DPE3N
TXOUT_L0P_DPE2P
TXOUT_L0N_DPE2N
TXOUT_L1P_DPE1P
TXOUT_L1N_DPE1N
TXOUT_L2P_DPE0P
TXOUT_L2N_DPE0N
TXOUT_L3P
TXOUT_L3N
1
+3VRUN
5 3
VCC
VCC
1
A
A
4
Y
Y
2
B
B
GND
R158
R158
10KR0402
10KR0402
ER20ER20
R201 X_10KR0402 R201 X_10KR0402
AB11
AB12
AH20
AJ19
AL21
AK20
AH22
AJ21
AL23
AK22
AK24
AJ23
AL15
AK14
AH16
AJ15
AL17
AK16
AH18
AJ17
AL19
AK18
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
GND
S08P5X_SC70
S08P5X_SC70
U28
U28
DGPU_HPD_INTR# 25
+3VRUN VDDR3
R453
R453
100KR0402
100KR0402
D S
Q29
Q29
G
N-BSS138_SOT23
N-BSS138_SOT23
BLON_PWM 18
LVDS_DIGON 18
LVDS_TX_CLKLP 18
LVDS_TX_CLKLN 18
LVDS_TX_L0P 18
LVDS_TX_L0N 18
LVDS_TX_L1P 18
LVDS_TX_L1N 18
LVDS_TX_L2P 18
LVDS_TX_L2N 18
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
M92/Pak-Sx (Main_IO)
M92/Pak-Sx (Main_IO)
M92/Pak-Sx (Main_IO)
MS-145X
MS-145X
MS-145X
1
DVI_A_HPD 18
DGPU_PWROK 25
of
of
of
12 56 Wednesday, August 05, 2009
12 56 Wednesday, August 05, 2009
12 56 Wednesday, August 05, 2009
0A
0A
0A
5
MDA[63..0] 16
MAA[13..0] 16
A_BA0 16
A_BA1 16
A_BA2 16
DQMA#[7..0] 16
QSA#[7..0] 16
D D
QSA[7..0] 16
CLKA1 16
CLKA1# 16
CLKA0 16
CLKA0# 16
RASA0# 16
RASA1# 16
CASA0# 16
CASA1# 16
CSA0#_0 16
CSA1#_0 16
CKEA0 16
CKEA1 16
WEA0# 16
C C
WEA1# 16
MDA[63..0]
MAA[13..0]
A_BA0
A_BA1
A_BA2
DQMA#[7..0]
QSA#[7..0]
QSA[7..0]
CLKA1
CLKA1#
CLKA0
CLKA0#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0#_0
CSA1#_0
CKEA0
CKEA1
WEA0#
WEA1#
MVDDQ = 1.5V FOR
DDR3 Memory
PARK-S3 M92-S2
R419
X-
R421 X -
Note:2
R419 X_150R1%0402 R419 X_150R1%0402
R421 240R1%0402 R421 240R1%0402
PLACE MVREF DIVIDERS
AND CAPS CLOSE TO ASIC
+1_5VRUN_PARK
B B
+1_5VRUN_PARK
R232
R232
100R1%0402
100R1%0402
Ra
R233
R233
Rb
100R1%0402
100R1%0402
Ra
Rb
R237
R237
100R1%0402
100R1%0402
R236
R236
100R1%0402
100R1%0402
C354
C354
C0.1u10X0402-1
C0.1u10X0402-1
R234
R181 X -
R230 X -
C358
C358
C0.1u10X0402-1
C0.1u10X0402-1
+1_5VRUN_PARK
TEST_EN 12
R428
R428
4.7KR0402
4.7KR0402
DPC_CALR
PARK-S3 M92-S2
X-
MVREF
Note: 1
X_0R0402
X_0R0402
R181
R181
Note: 1
R226
R226
C568
C568
4.7KR0402
4.7KR0402
X_C0.1u10X0402-1
X_C0.1u10X0402-1
R0402
R0402
R0402
R0402
PARK-S3 M92-S2
A A
R428
R226 X -
Use this option ONLY
X -
for M9x-S2/S3vFamily
route 50ohms
single-ended/100ohms diff
DIVIDER RESISTORS DDR3 GDDR3
MVREF TO 1.5V (Ra)
MVREF TO GND (Rb)
5
40.2R 100R
100R 100R
and keep short
Use this option ONLY
for Park-S3
4
MDA0
MDA1
MDA2
MDA3
MDA4
MDA5
MDA6
MDA7
MDA8
MDA9
MDA10
MDA11
MDA12
MDA13
MDA14
MDA15
MDA16
MDA17
MDA18
MDA19
MDA20
MDA21
MDA22
MDA23
MDA24
MDA25
MDA26
MDA27
MDA28
MDA29
MDA30
MDA31
MDA32
MDA33
MDA34
MDA35
MDA36
MDA37
MDA38
MDA39
MDA40
MDA41
MDA42
MDA43
MDA44
MDA45
MDA46
MDA47
MDA48
MDA49
MDA50
MDA51
MDA52
MDA53
MDA54
MDA55
MDA56
MDA57
MDA58
MDA59
MDA60
MDA61
MDA62
MDA63
R234
R234
X_240R1%0402
X_240R1%0402
Note:3
DPC_CALR
R230 X_240R1%0402 R230 X_240R1%0402
DRAM_RST
CLKTESTA
R423
R423
X_51.1R1%0402
X_51.1R1%0402
4
K27
J29
H30
H32
G29
F28
F32
F30
C30
F27
A28
C28
E27
G26
D26
F25
A25
C25
E25
D24
E23
F23
D22
F21
E21
D20
F19
A19
D18
F17
A17
C17
E17
D16
F15
A15
D14
F13
A13
C13
E11
A11
C11
F11
A9
C9
F9
D8
E7
A7
C7
F7
A5
E5
C3
E1
G7
G6
G1
G3
J6
J1
J3
J5
K26
J26
J25
K7
J8
K25
L10
K8
CLKTESTB
L7
C341
C341
X_C0.1u10X0402-1
X_C0.1u10X0402-1
R227
R227
X_51.1R1%0402
X_51.1R1%0402
U40C
U40C
DQA_0
DQA_1
DQA_2
DQA_3
DQA_4
DQA_5
DQA_6
DQA_7
DQA_8
DQA_9
DQA_10
DQA_11
DQA_12
DQA_13
DQA_14
DQA_15
DQA_16
DQA_17
DQA_18
DQA_19
DQA_20
DQA_21
DQA_22
DQA_23
DQA_24
DQA_25
DQA_26
DQA_27
DQA_28
DQA_29
DQA_30
DQA_31
DQA_32
DQA_33
DQA_34
DQA_35
DQA_36
DQA_37
DQA_38
DQA_39
DQA_40
DQA_41
DQA_42
DQA_43
DQA_44
DQA_45
DQA_46
DQA_47
DQA_48
DQA_49
DQA_50
DQA_51
DQA_52
DQA_53
DQA_54
DQA_55
DQA_56
DQA_57
DQA_58
DQA_59
DQA_60
DQA_61
DQA_62
DQA_63
MVREFDA
MVREFSA
MEM_CALRN0
NC/TESTEN#2
MEM_CALRP1/DPC_CALR
MEM_CALRP0
DRAM_RST
CLKTESTA
CLKTESTB
216-0728020-00-A12-RH
216-0728020-00-A12-RH
3
DDR3 Memory
Interface
MAA0
K17
MAA_0
MAA_1
MAA_2
MAA_3
MAA_4
MAA_5
MAA_6
MAA_7
MAA_8
MAA_9
MAA_10
MAA_11
MAA_12
MAA_13/BA2
MAA_14/BA0
MAA_15/BA1
DQMA_0
DQMA_1
DQMA_2
DQMA_3
DQMA_4
DQMA_5
DQMA_6
DQMA_7
MEMORY INTERFACE
MEMORY INTERFACE
RDQSA_0
RDQSA_1
RDQSA_2
RDQSA_3
RDQSA_4
RDQSA_5
RDQSA_6
RDQSA_7
WDQSA_0
WDQSA_1
WDQSA_2
WDQSA_3
WDQSA_4
WDQSA_5
WDQSA_6
WDQSA_7
ODTA0
ODTA1
CLKA0
CLKA0B
CLKA1
CLKA1B
RASA0B
RASA1B
CASA0B
CASA1B
CSA0B_0
CSA0B_1
CSA1B_0
CSA1B_1
CKEA0
CKEA1
WEA0B
WEA1B
PX_EN
RSVD#2
RSVD#3
C568
C341
R423
R227
J20
H23
G23
G24
H24
J19
K19
J14
K14
J11
J13
H11
G11
J16
L15
E32
E30
A21
C21
E13
D12
E3
F4
H28
C27
A23
E19
E15
D10
D6
G5
H27
A27
C23
C19
C15
E9
C5
H4
L18
K16
H26
H25
G9
H9
G22
G17
G19
G16
H22
J22
G13
K13
K20
J17
G25
H10
AB16
G14
G20
For PARK-S3 only
For M9X-S2/S3 with
DDR3: this pin is
not in use.
X
X
X
X
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
A_BA2
A_BA0
A_BA1
DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7
QSA0
QSA1
QSA2
QSA3
QSA4
QSA5
QSA6
QSA7
QSA#0
QSA#1
QSA#2
QSA#3
QSA#4
QSA#5
QSA#6
QSA#7
ODTA0
ODTA1
CLKA0
CLKA0#
CLKA1
CLKA1#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0#_0
CSA1#_0
CKEA0
CKEA1
WEA0#
WEA1#
MAA13
PARK-S3 M92-S2
3
TPJNC34 TPJNC34
-
-
-
-
QSA#[7..0]
QSA[7..0]
QSA#[7..0]
QSA[7..0]
ODTA0
ODTA1
QSA#[7..0] 16
QSA[7..0] 16
QSA#[7..0] 16
QSA[7..0] 16
ODTA0 16
ODTA1 16
2
PARK-S3 M92-S2
R419
X-
1
R421 X -
CKEA1
CKEA0
R247
R247
10KR0402
10KR0402
Option for DDR3/GDDR3/DDR2 with Park
R246
R246
10KR0402
10KR0402
Do not Install for M9X-S2/S3
INSTALL for Park-S3 to save power in auto refresh mode
These can be placed close to ASIC side or Memory side.
Note 1 : Do not Install for M9X-S2/S3, Install 240 Ohms 0.5% Resistor for PARK-S3.
Note 2 :For M9X-S2/S3,J8 Pin Connect to VSS through 240 Ohms(0.5%) resistor.
For Park-S3,J8 Pin Connect to VSS through 150 Ohms(1%) resistor for DPC_CALR
Note 3 :For M9X-92/93, K7 Pin (NC_MEM_CALRP1) is Not connected.
For PARK-S3, K7 Pin (TESTEN#2) connect to TEST_EN Signal At AF24
DRAM_RST
R425
R425
10KR0402
10KR0402
This basic topology should be used for DRAM_RST for
**
DDR3/GDDR3/GDDR5.These Capacitors and Resistor vvalues
are an example only. The Series R and || Cap values
will depend on the DRAM load and will have to be
calculated for different Memory ,DRAM Load and board
to pass Reset Signal Spec.
Designator
R425
R427
R430
C571
**
R427
R427
680R0402-RH
680R0402-RH
**
For M9X-S2
and M93-S3
DNI
0R/Short
2.2K
2.2nF
2
**
C571
C571
C68p50N0402-RH
C68p50N0402-RH
+1_5VRUN_PARK
For Park-S3
10K
680R
DNI
68pF
**
R430
R430
X_2.2KR0402
X_2.2KR0402
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
M92/Pak-Sx (MEM_Interface)
M92/Pak-Sx (MEM_Interface)
M92/Pak-Sx (MEM_Interface)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-145X
MS-145X
MS-145X
MEM_RST 16
1
0A
0A
0A
of
of
of
13 56 Wednesday, August 05, 2009
13 56 Wednesday, August 05, 2009
13 56 Wednesday, August 05, 2009
5
4
3
2
1
+1_5VRUN_PARK
D D
+1_8VRUN_PARK
PARK-S3 M92-S2
R211
R207
R209
R213
C C
X
-
-
X
-
X
X
-
PARK-S3 M92-S2
B18
X -
B19 X -
B B
A A
( for DDR2 and GDDR3: 1.8V@2.2A VDDR1)
C619
C619
C368
C368
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C334
C334
C355
C355
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C366
C366
C363
C363
X_C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
VDDR3
C269
C269
C293
C293
X_C10u6.3X50805
X_C10u6.3X50805
C1u6.3Y0402-RH
C1u6.3Y0402-RH
R199 X_0402 R199 X_0402
R214 X_0402 R214 X_0402
B12
B12
120L200mA-200
120L200mA-200
M92S_VDD_CORE
+1_0VRUN_PARK
For Park-S3: Connect +1_0VRUN_PARK to SPV10 ONLY
For M9X-S2/S3: Connect M92S_VDD_CORE to SPV10 ONLY
B17
B17
120L200mA-200
120L200mA-200
B16
B16
470L1.5A-150-RH
470L1.5A-150-RH
(1.8V@40mA PCIE_PVDD)
B18
B18
(DNI For M9X-S2/S3)
(For PARK-S3)
(1.8V@90mA SPV18)
(1.8V@75mA MPV18)
C413
C413
C636
C636
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C346
C346
C608
C608
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C367
C367
C414
C414
X_C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
X_C10u6.3X50805
JNC11 X_0603 JNC11 X_0603
C280
C280
C285
C285
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C279
C279
C281
C281
X_C10u6.3X50805
X_C10u6.3X50805
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C308
C308
C311
C311
X_C10u6.3X50805
X_C10u6.3X50805
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C232
C232
X_C10u6.3X50805
X_C10u6.3X50805
120L200mA-200
120L200mA-200
1.0V @100mA
B19
B19
X_120L200mA-200
X_120L200mA-200
C338
C338
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C339
C339
C1u6.3Y0402-RH
C1u6.3Y0402-RH
VDDR4
VDDR5
C234
C234
C1u6.3Y0402-RH
C1u6.3Y0402-RH
SPV10
C337
C337
C0.1u10X0402-1
C0.1u10X0402-1
C340
C340
C0.1u10X0402-1
C0.1u10X0402-1
(For DDR3, MVDDQ = 1.5V@2.0A)
C622
C622
C625
C625
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C364
C364
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C365
C365
X_C10u6.3X50805
X_C10u6.3X50805
C613
C0.1u10X0402-1
C0.1u10X0402-1
C0.1u10X0402-1
C0.1u10X0402-1
C328
C328
C326
C326
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
DNI
(1.8V@110mA VDD_CT)
C220
C220
C290
C290
X_C10u6.3X50805
X_C10u6.3X50805
C1u6.3Y0402-RH
C1u6.3Y0402-RH
For S2: INSTALL R211,
R209,R213 and REMOVE
R207
For M9X-S3/ Park-S3: REMOVE
R211, R209,R213 and INSTALL
C278
C278
R207
C0.1u10X0402-1
C0.1u10X0402-1
+1_5VRUN_PARK
C312
C312
C0.1u10X0402-1
C0.1u10X0402-1
C233
C233
C0.1u10X0402-1
C0.1u10X0402-1
For Park-S3: REMOVE R229,
C342
SPV18
MPV18
C362
C362
C0.1u10X0402-1
C0.1u10X0402-1
C359
C359
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C225
C225
C1u6.3Y0402-RH
C1u6.3Y0402-RH
R229 X_0R_0603 R229 X_0R_0603
SPV10
M92S_VDD_CORE
C327
C327
C330
C330
C0.1u10X0402-1
C0.1u10X0402-1
C0.1u10X0402-1
C0.1u10X0402-1
C356
C356
C620
C620
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
VDDC_CT
C224
C224
C226
C226
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C0.1u10X0402-1
C0.1u10X0402-1
VDDR4 VDDR5
R211 X_0R0603 R211 X_0R0603
R207 0R0603 R207 0R0603
R209 X_0R0603 R209 X_0R0603
R213 X_0R0603 R213 X_0R0603
C342
C342
X_C1u6.3Y0402-RH
X_C1u6.3Y0402-RH
PCIE_PVDD
MPV18
C352
C352
X_C10u6.3X50805
X_C10u6.3X50805
For PARK-S3:BAckBias(BBP#1 and
#2) is not supported, Connect to
VDDC Rail
C349
C349
C350
C350
C0.1u10X0402-1
C0.1u10X0402-1
C1u6.3Y0402-RH
C1u6.3Y0402-RH
JNC13 X_0603 JNC13 X_0603
SPV18
H13
H16
H19
J10
J23
J24
J9
K10
K23
K24
K9
L11
L12
L13
L20
L21
L22
AA20
AA21
AB20
AB21
AA17
AA18
AB17
AB18
V12
Y12
U12
AA11
Y11
V11
U11
L17
L16
AM30
L8
H7
H8
J7
M11
M12
C309
C309
C0.1u10X0402-1
C0.1u10X0402-1
U40D
U40D
MEM I/O
MEM I/O
VDDR1#1
VDDR1#2
VDDR1#3
VDDR1#4
VDDR1#5
VDDR1#6
VDDR1#7
VDDR1#8
VDDR1#9
VDDR1#10
VDDR1#11
VDDR1#12
VDDR1#13
VDDR1#14
VDDR1#15
VDDR1#16
VDDR1#17
LEVEL
LEVEL
TRANSLATION
TRANSLATION
VDD_CT#1
VDD_CT#2
VDD_CT#3
VDD_CT#4
M93-S3/M92-S2
M93-S3/M92-S2
VDDR3#1
I/O
I/O
VDDR3#2
VDDR3#3
VDDR3#4
VDDR4#1 / VDDR5
VDDR4#2
VDDR4#3 / VDDR5
NC#1 / VDDR4
DVCLK / VDDR4
NC#3 / VDDR5
NC / VDDR5
MEM CLK
MEM CLK
VDDRHA
VSSRHA
PLL
PLL
PCIE_PVDD
MPV18
SPV18
SPV10
SPVSS
BACK BIAS
BACK BIAS
BBP#1
BBP#2
PCIE
PCIE
PCIE_VDDR#1
PCIE_VDDR#2
PCIE_VDDR#3
PCIE_VDDR#4
PCIE_VDDR#5
PCIE_VDDR#6
PCIE_VDDR#7
PCIE_VDDR#8
PCIE_VDDC#1
PCIE_VDDC#2
PCIE_VDDC#3
PCIE_VDDC#4
PCIE_VDDC#5
PCIE_VDDC#6
PCIE_VDDC#7
PCIE_VDDC#8
PCIE_VDDC#9
PCIE_VDDC#10
PCIE_VDDC#11
PCIE_VDDC#12
CORE
CORE
POWER
POWER
VDDC#23 /BIF_VDDC
VDDC#19/BIF_VDDC
ISOLATED
ISOLATED
CORE I/O
CORE I/O
216-0728020-00-A12-RH
216-0728020-00-A12-RH
VDDC#1
VDDC#2
VDDC#3
VDDC#4
VDDC#5
VDDC#6
VDDC#7
VDDC#8
VDDC#9
VDDC#10
VDDC#11
VDDC#12
VDDC#13
VDDC#14
VDDC#15
VDDC#16
VDDC#17
VDDC#18
VDDC#20
VDDC#21
VDDC#22
VDDCI#1
VDDCI#2
VDDCI#3
VDDCI#4
VDDCI#5
VDDCI#6
VDDCI#7
VDDCI#8
AB23
AC23
AD24
AE24
AE25
AE26
AF25
AG26
L23
L24
L25
L26
M22
N22
N23
N24
R22
T22
U22
V22
AA15
N15
N17
R13
R16
R18
Y21
T12
T15
T17
T20
U13
U16
U18
V21
V15
V17
V20
Y13
Y16
Y18
R21
U21
M13
M15
M16
M17
M18
M20
M21
N20
PCIE_VDDR
(1.8V@500mA PCIE_VDDR)
C253
C253
C252
C254
C254
C0.1u10X0402-1
C0.1u10X0402-1
C252
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C0.1u10X0402-1
C0.1u10X0402-1
(1.1V@2A PCIE_VDDC)
C556
C556
C558
C558
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C297
C297
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C301
C301
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C384
C384
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C375
C375
DNI
X_C10u6.3X50805
X_C10u6.3X50805
(0.95V-1.1V@2A VDDCI)
0.9-1.1V @2A (DDR3) ??(GDDR5)
C320
C320
C344
C331
C331
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C344
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
JNC14 X_0603 JNC14 X_0603 C613
C250
+1_0VRUN_PARK
C545
C545
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C250
X_C10u6.3X50805
X_C10u6.3X50805
C255
C255
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C551
C551
C553
C553
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C251
C251
C1u6.3Y0402-RH
C1u6.3Y0402-RH
SEE DATABOOK FOR REQUIRED EDP
C316
C316
C324
C324
C387
C387
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C319
C319
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C296
C296
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C374
C374
X_C10u6.3X50805
X_C10u6.3X50805
C335
C335
C10u6.3X50805
C10u6.3X50805
C1u6.3Y0402-RH
C305
C305
C377
C377
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C310
C310
C303
C303
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C373
C373
X_C10u6.3X50805
X_C10u6.3X50805
B15
B15
220L2A-50-RH
220L2A-50-RH
Warning:Select the correct
Bead to support expected
VDDCI current. See databook
for details.
C562
C562
X_C10u6.3X50805
X_C10u6.3X50805
C378
C378
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C292
C292
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C317
C317
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C392
C392
X_C10u6.3X50805
X_C10u6.3X50805
+1_8VRUN_PARK
C371
C371
C315
C315
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C380
C380
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C391
C391
X_C10u6.3X50805
X_C10u6.3X50805
M92S_VDD_CORE
M92S_VDD_CORE
C306
C306
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C390
C390
X_C10u6.3X50805
X_C10u6.3X50805
C321
C321
X_C10u6.3X50805
X_C10u6.3X50805
AA27
AB24
AB32
AC24
AC26
AC27
AD25
AD32
AE27
AF32
AG27
AH32
K28
K32
L27
M32
N25
N27
P25
P32
R27
T25
T32
U25
U27
V32
W25
W26
W27
Y25
Y32
M6
N11
N12
N13
N16
N18
N21
P6
P9
R12
R15
R17
R20
T13
T16
T18
T21
T6
U15
U17
U20
U9
V13
V16
V18
Y10
Y15
Y17
Y20
U40E
U40E
PCIE_VSS#1
PCIE_VSS#2
PCIE_VSS#3
PCIE_VSS#4
PCIE_VSS#5
PCIE_VSS#6
PCIE_VSS#7
PCIE_VSS#8
PCIE_VSS#9
PCIE_VSS#10
PCIE_VSS#11
PCIE_VSS#12
PCIE_VSS#13
PCIE_VSS#14
PCIE_VSS#15
PCIE_VSS#16
PCIE_VSS#17
PCIE_VSS#18
PCIE_VSS#19
PCIE_VSS#20
PCIE_VSS#21
PCIE_VSS#22
PCIE_VSS#23
PCIE_VSS#24
PCIE_VSS#25
PCIE_VSS#26
PCIE_VSS#27
PCIE_VSS#28
PCIE_VSS#29
PCIE_VSS#30
PCIE_VSS#31
GND#56
GND#57
GND#58
GND#59
GND#60
GND#61
GND#62
GND#63
GND#64
GND#65
GND#66
GND#67
GND#68
GND#69
GND#70
GND#71
GND#72
GND#73
GND#74
GND#75
GND#76
GND#77
GND#78
GND#79
GND#80
GND#81
GND#82
GND#83
GND#84
GND#3 / EVDDQ#2
GND#6 / EVDDQ#3
GND
GND
GND#1
GND#2
GND#4
GND#5
GND#7
GND#8
GND#9
GND#10
GND#11
GND#12
GND#13
GND#14
GND#15
GND#16
GND#17
GND#18
GND#19
GND#20
GND#21
GND#22
GND#23
GND#24
GND#25
GND#26
GND#27
GND#28
GND#29
GND#30
GND#31
GND#32
GND#33
GND#34
GND#35
GND#36
GND#37
GND#38
GND#39
GND#40
GND#41
GND#42
GND#43
GND#44
GND#45
GND#46
GND#47
GND#48
GND#49
GND#50
GND#51
GND#52
GND#53
GND#54
GND#55
GND#85
GND#86
VSS_MECH#1
VSS_MECH#2
VSS_MECH#3
A3
A30
AA13
AA16
AB10
AB15
AB6
AC9
AD6
AD8
AE7
AG12
AH10
AH28
B10
B12
B14
B16
B18
B20
B22
B24
B26
B6
B8
C1
C32
E28
F10
F12
F14
F16
F18
F2
F20
F22
F24
F26
F6
F8
G10
G27
G31
G8
H14
H17
H2
H20
H6
J27
J31
K11
K2
K22
K6
T11
R11
A32
AM1
AM32
216-0728020-00-A12-RH
216-0728020-00-A12-RH
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
M92/Pak-Sx (Power & GND)
M92/Pak-Sx (Power & GND)
M92/Pak-Sx (Power & GND)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-145X
MS-145X
MS-145X
1
0A
0A
14 56 Wednesday, August 05, 2009
14 56 Wednesday, August 05, 2009
14 56 Wednesday, August 05, 2009
0A
of
of
of
5
4
3
2
1
+1_8VRUN_PARK
B8
B8
120L200mA-200
120L200mA-200
D D
C C
B B
NOTE:4
B22
B22
120L200mA-200
120L200mA-200 C239
B11
B11
470L1.5A-150-RH
470L1.5A-150-RH
B21
B21
120L200mA-200
120L200mA-200
See Databook and Application note table for Voltage and Current requirements for each individual rail.
(1.8V@130mA )
C231
C231
X_C10u6.3X50805
X_C10u6.3X50805
C248
C248
C1u6.3Y0402-RH
C1u6.3Y0402-RH
(1.8V@20mA )
C525
C523
C523
X_C10u6.3X50805
X_C10u6.3X50805
C525
C1u6.3Y0402-RH
C1u6.3Y0402-RH
LVDS Mode:1.8V@200mA
(DP Mode:1.8V@130mA)
C237
C237
X_C10u6.3X50805
X_C10u6.3X50805
C258
C258
C1u6.3Y0402-RH
C1u6.3Y0402-RH
(1.8V@20mA )
C516
C514
C514
X_C10u6.3X50805
X_C10u6.3X50805
C516
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C240
C240
C0.1u10X0402-1
C0.1u10X0402-1
C524
C524
C0.1u10X0402-1
C0.1u10X0402-1
C246
C0.1u10X0402-1
C0.1u10X0402-1
C520
C520
C0.1u10X0402-1
C0.1u10X0402-1
DPA_VDD18
DPA_PVDD
DPE_VDD18
DPE_PVDD
DPE_VDD18
DPE_VDD10
DPE_VDD18
DPE_VDD10
R173 150R1%0402 R173 150R1%0402 C246
DPE_PVDD
DPE_PVDD
U40G
U40G
AG15
DPE_VDD18#1
AG16
DPE_VDD18#2
AG20
DPE_VDD10#1
AG21
DPE_VDD10#2
AG14
DPE_VSSR#1
AH14
DPE_VSSR#2
AM14
DPE_VSSR#3
AM16
DPE_VSSR#4
AM18
DPE_VSSR#5
AF16
DPF_VDD18#1
AG17
DPF_VDD18#2
AF22
DPF_VDD10#1
AG22
DPF_VDD10#2
AF23
DPF_VSSR#1
AG23
DPF_VSSR#2
AM20
DPF_VSSR#3
AM22
DPF_VSSR#4
AM24
DPF_VSSR#5
AF17
DPEF_CALR
AG18
DPE_PVDD
AF19
DPE_PVSS
AG19
DPF_PVDD
AF20
DPF_PVSS
216-0728020-00-A12-RH
216-0728020-00-A12-RH
For M9X-S2/S3 , DPx_VDD10 = 1.1V
For Park-S3, DPx_VDD10 = 1.0V
DP A/B POWER DP E/F POWER
DP A/B POWER DP E/F POWER
AE11
AF11
AF6
AF7
AE1
AE3
AG1
AG6
AH5
AE13
AF13
AF8
AF9
AF10
AG9
AH8
AM6
AM8
R394 150R1%0402 R394 150R1%0402
AE10
AG8
AG7
AG10
AG11
DP PLL POWER
DP PLL POWER
DPA_VDD18#1
DPA_VDD18#2
DPA_VDD10#1
DPA_VDD10#2
DPA_VSSR#1
DPA_VSSR#2
DPA_VSSR#3
DPA_VSSR#4
DPA_VSSR#5
DPB_VDD18#1
DPB_VDD18#2
DPB_VDD10#1
DPB_VDD10#2
DPB_VSSR#1
DPB_VSSR#2
DPB_VSSR#3
DPB_VSSR#4
DPB_VSSR#5
DPAB_CALR
DPA_PVDD
DPA_PVSS
DPB_PVDD
DPB_PVSS
DPA_PVDD
DPA_PVDD
DPA_VDD18
DPA_VDD10
DPA_VDD18
DPA_VDD10
Park-S3:110mA@1.0V
DPA_VDD10
Park-S3: TMDS/DP=110mA@1.0V : LVDS=120mA@1.0V
M9X-S2/S3: TMDS/DP=170mA@1.1V LVDS=100mA@1.1V
DPE_VDD10
M9X-S2/S3:200mA@1.1V
C244
C244
C245
C245
C239
X_C10u6.3X50805
X_C10u6.3X50805
C513
C513
X_C10u6.3X50805
X_C10u6.3X50805
C0.1u10X0402-1
C0.1u10X0402-1
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C515
C515
C519
C519
C0.1u10X0402-1
C0.1u10X0402-1
C1u6.3Y0402-RH
C1u6.3Y0402-RH
B20
B20
+1_0VRUN_PARK
B13
B13
120L600mA-250
120L600mA-250
120L600mA-250
120L600mA-250
NOTE:4: Do not Install for M9X-S2/S3. INSTALL ONLY for
PARK-S3. Other Notes can be apply as well.
A A
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
M92/Pak-Sx (DP_Power)
M92/Pak-Sx (DP_Power)
M92/Pak-Sx (DP_Power)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MS-145X
MS-145X
MS-145X
MICRO-STAR INT'L CO.,LTD.
of
of
of
15 56 Wednesday, August 05, 2009
15 56 Wednesday, August 05, 2009
15 56 Wednesday, August 05, 2009
1
0A
0A
0A
5
+1_5VRUN_PARK
R457
R457
4.99KR1%0402
4.99KR1%0402
VFEFCA_REF1
VREFDQ_REF1
R452
R452
C616
C616
4.99KR1%0402
4.99KR1%0402
C0.1u10X0402-1
C0.1u10X0402-1
D D
+1_5VRUN_PARK
R245
R245
4.99KR1%0402
4.99KR1%0402
C399
C399
R240
R240
4.99KR1%0402
4.99KR1%0402
C0.1u10X0402-1
C0.1u10X0402-1
C C
B B
A A
CLKA0 13
CLKA0# 13
CLKA1 13
CLKA1# 13
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
A_BA0 13
A_BA1 13 A_BA1 13
A_BA2 13
CLKA0 13
CLKA0# 13
CKEA0 13
ODTA0 13
CSA0#_0 13
RASA0# 13
CASA0# 13
WEA0# 13
MEM_RST 13
120R for dual rank
For M9X-S2/S3 with DDR3: Support MAA12-MAA0 Address or 64MX16 DDR3. MAA13 is NC
QSA2
QSA0
DQMA#2
DQMA#0
QSA#2
QSA#0
R446
R446
243R1%0402
243R1%0402
U42
U42
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM DDR3
SDRAM DDR3
H5TQ1G63BFR-12C-HF
H5TQ1G63BFR-12C-HF
R243
R243
56R0402
56R0402
402
R244
R244
56R0402
56R0402
402
R250
R250
56R0402
56R0402
402
R253
R253
56R0402
56R0402
402
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
C396
C396
C0.01u10X0402-RH
C0.01u10X0402-RH
402
C404
C404
C0.01u10X0402-RH
C0.01u10X0402-RH
402
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
E3
F7
F2
F8
H3
H8
G2
H7
D7
C3
C8
C2
A7
A2
B8
A3
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
VSS
B3
VSS
E1
VSS
G8
VSS
J2
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VSS
B1
B9
D1
D8
E2
E8
F9
G1
G9
MDA20
MDA17
MDA21
MDA18
MDA23
MDA16
MDA22
MDA19
MDA6
MDA3
MDA7
MDA0
MDA4
MDA1
MDA5
MDA2
+1_5VRUN_PARK
+1_5VRUN_PARK
+1_5VRUN_PARK
C621
C621
C1u6.3Y0402-RH
C1u6.3Y0402-RH
+1_5VRUN_PARK
C408
C408
C1u6.3Y0402-RH
C1u6.3Y0402-RH
+1_5VRUN_PARK
R254
R254
4.99KR1%0402
4.99KR1%0402
R252
R252
4.99KR1%0402
4.99KR1%0402
+1_5VRUN_PARK
R435
R435
4.99KR1%0402
4.99KR1%0402
R436
R436
4.99KR1%0402
4.99KR1%0402
C397
C397
C412
C412
C1u6.3Y0402-RH
C1u6.3Y0402-RH
402 402 402 402 402 402 402 402
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C605
C605
C410
C410
C1u6.3Y0402-RH
C1u6.3Y0402-RH
402 402 402 402 402 402 402 402
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C407
C407
C0.1u10X0402-1
C0.1u10X0402-1
C610
C610
C0.1u10X0402-1
C0.1u10X0402-1
Should be 240
Ohms +-1%
C403
C403
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C382
C382
C1u6.3Y0402-RH
C1u6.3Y0402-RH
4
VREFDQ_REF2
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
A_BA0 13
A_BA1 13
A_BA2 13
CLKA0 13
CLKA0# 13
CKEA0 13
ODTA0 13
CSA0#_0 13
RASA0# 13
CASA0# 13
WEA0# 13
QSA3
QSA1
DQMA#3
DQMA#1
QSA#3
QSA#1
MEM_RST 13
R249
R249
243R1%0402
243R1%0402
C627
C627
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C386
C386
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C603
C603
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C400
C400
C1u6.3Y0402-RH
C1u6.3Y0402-RH
U31
U31
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM DDR3
SDRAM DDR3
H5TQ1G63BFR-12C-HF
H5TQ1G63BFR-12C-HF
C634
C634
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C601
C601
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C617
C617
C10u6.3X5-RH
C10u6.3X5-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C606
C606
C10u6.3X5-RH
C10u6.3X5-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C402
C402
C599
C599
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
MDA31
E3
MDA24
F7
MDA29
F2
MDA26
F8
MDA28
H3
MDA27
H8
MDA30
G2
MDA25
H7
MDA15
D7
MDA10
C3
MDA14
C8
MDA11
C2
MDA12
A7
A2
MDA13
B8
MDA9
A3
+1_5VRUN_PARK
B2
D9
G7
K2
K8
N1
N9
R1
R9
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
C388
C388
C10u6.3X5-RH
C10u6.3X5-RH
C598
C598
C10u6.3X5-RH
C10u6.3X5-RH
MDA8
+1_5VRUN_PARK
C379
C379
C10u6.3X5-RH
C10u6.3X5-RH
C597
C597
C10u6.3X5-RH
C10u6.3X5-RH
+1_5VRUN_PARK
R255
R255
4.99KR1%0402
4.99KR1%0402
R251
R251
4.99KR1%0402
4.99KR1%0402
+1_5VRUN_PARK
R242
R242
4.99KR1%0402
4.99KR1%0402
R241
R241
4.99KR1%0402
4.99KR1%0402
3
C406
C406
C0.1u10X0402-1
C0.1u10X0402-1
C398
C398
C0.1u10X0402-1
C0.1u10X0402-1
Should be 240
Ohms +-1%
+1_5VRUN_PARK
C411
C411
C1u6.3Y0402-RH
C1u6.3Y0402-RH
+1_5VRUN_PARK
C612
C612
C1u6.3Y0402-RH
C1u6.3Y0402-RH
U30
R248
R248
243R1%0402
243R1%0402
U30
M8
VREFCA
H1
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM DDR3
SDRAM DDR3
H5TQ1G63BFR-12C-HF
H5TQ1G63BFR-12C-HF
C628
C628
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C600
C600
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C626
C626
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C637
C637
C1u6.3Y0402-RH
C1u6.3Y0402-RH
VREFCA_REF3 VFEFCA_REF2
VREFDQ_REF3
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
A_BA0 13
A_BA1 13
A_BA2 13
CLKA1 13
CLKA1# 13
CKEA1 13
ODTA1 13
CSA1#_0 13
RASA1# 13
CASA1# 13
WEA1# 13
QSA4
QSA5
DQMA#4
DQMA#5
QSA#4
QSA#5
MEM_RST 13
C394
C394
C409
C409
C1u6.3Y0402-RH
C1u6.3Y0402-RH
402 402 402 402 402 402 402 402
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C607
C607
C609
C609
C1u6.3Y0402-RH
C1u6.3Y0402-RH
402 402 402 402 402 402 402 402
C1u6.3Y0402-RH
C1u6.3Y0402-RH
E3
DQL0
F7
DQL1
F2
DQL2
F8
DQL3
H3
DQL4
H8
DQL5
G2
DQL6
H7
DQL7
D7
DQU0
C3
DQU1
C8
DQU2
C2
DQU3
A7
DQU4
A2
DQU5
B8
DQU6
A3
DQU7
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
A1
VDDQ
A8
VDDQ
C1
VDDQ
C9
VDDQ
D2
VDDQ
E9
VDDQ
F1
VDDQ
H2
VDDQ
H9
VDDQ
A9
VSS
B3
VSS
E1
VSS
G8
VSS
J2
VSS
J8
VSS
M1
VSS
M9
VSS
P1
VSS
P9
VSS
T1
VSS
T9
VSS
B1
VSSQ
B9
VSSQ
D1
VSSQ
D8
VSSQ
E2
VSSQ
E8
VSSQ
F9
VSSQ
G1
VSSQ
G9
VSSQ
C602
C602
C405
C405
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C385
C385
C393
C393
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C1u6.3Y0402-RH
MDA35
MDA36
MDA32
MDA39
MDA34
MDA38
MDA33
MDA37
MDA43
MDA45
MDA40
MDA44
MDA42
MDA47
MDA41
MDA46
+1_5VRUN_PARK
C395
C395
C1u6.3Y0402-RH
C1u6.3Y0402-RH
C401
C401
C1u6.3Y0402-RH
C1u6.3Y0402-RH
+1_5VRUN_PARK
R295
R295
4.99KR1%0402
4.99KR1%0402
R282
R282
4.99KR1%0402
4.99KR1%0402
+1_5VRUN_PARK
R281
R281
4.99KR1%0402
4.99KR1%0402
R372
R372
4.99KR1%0402
4.99KR1%0402
C376
C376
C10u6.3X5-RH
C10u6.3X5-RH
C611
C611
C10u6.3X5-RH
C10u6.3X5-RH
2
VREFDQ_REF4
C415
C415
C10u6.3X5-RH
C10u6.3X5-RH
C604
C604
C10u6.3X5-RH
C10u6.3X5-RH
VFEFCA_REF4
C517
C517
C0.1u10X0402-1
C0.1u10X0402-1
C425
C425
C0.1u10X0402-1
C0.1u10X0402-1
Should be 240
Ohms +-1%
C383
C383
C10u6.3X5-RH
C10u6.3X5-RH
C638
C638
C10u6.3X5-RH
C10u6.3X5-RH
1
RANK1: 256MB/ 512MB DDR3
U43
U43
M8
VREFCA
H1
QSA6
QSA7
VREFDQ
N3
A0
P7
A1
P3
A2
N2
A3
P8
A4
P2
A5
R8
A6
R2
A7
T8
A8
R3
A9
L7
A10/AP
R7
A11
N7
A12/BC
T3
A13
T7
A14
M7
A15
M2
BA0
N8
BA1
M3
BA2
J7
CK
K7
CK
K9
CKE
K1
ODT
L2
CS
J3
RAS
K3
CAS
L3
WE
F3
DQSL
C7
DQSU
E7
DML
D3
DMU
G3
DQSL
B7
DQSU
T2
RESET
L8
ZQ
J1
NC1
L1
NC2
J9
NC3
L9
NC4
INFINEON 96-BALL
INFINEON 96-BALL
SDRAM DDR3
SDRAM DDR3
H5TQ1G63BFR-12C-HF
H5TQ1G63BFR-12C-HF
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
MAA0
MAA1
MAA2
MAA3
MAA4
MAA5
MAA6
MAA7
MAA8
MAA9
MAA10
MAA11
MAA12
MAA13
A_BA0 13
A_BA2 13
CLKA1 13
CLKA1# 13
CKEA1 13
ODTA1 13
CSA1#_0 13
RASA1# 13
CASA1# 13
WEA1# 13
DQMA#6
DQMA#7
QSA#6
QSA#7
MEM_RST 13
R444
R444
243R1%0402
243R1%0402
M12-K4W1G85-S02
U901
U901
SAMSUNG
SAMSUNG
K4W1G1646E-HC12-HF
K4W1G1646E-HC12-HF
U902
U902
SAMSUNG
SAMSUNG
K4W1G1646E-HC12-HF
K4W1G1646E-HC12-HF
DQL0
DQL1
DQL2
DQL3
DQL4
DQL5
DQL6
DQL7
DQU0
DQU1
DQU2
DQU3
DQU4
DQU5
DQU6
DQU7
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
VSSQ
MDA51
E3
MDA52
F7
MDA49
F2
MDA53
F8
MDA48
H3
MDA54
H8
MDA50
G2
MDA55
H7
MDA63
D7
MDA59
C3
MDA62
C8
MDA56
C2
MDA60
A7
MDA57
A2
MDA61
B8
MDA58
A3
+1_5VRUN_PARK +1_5VRUN_PARK
B2
VDD
D9
VDD
G7
VDD
K2
VDD
K8
VDD
N1
VDD
N9
VDD
R1
VDD
R9
VDD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
+1_5VRUN_PARK
A1
A8
C1
C9
D2
E9
F1
H2
H9
A9
B3
E1
G8
J2
J8
M1
M9
P1
P9
T1
T9
B1
B9
D1
D8
E2
E8
F9
G1
G9
MDA[63..0] 13
MAA[13..0] 13
A_BA0 13
A_BA1 13
A_BA2 13
DQMA#[7..0] 13
QSA#[7..0] 13
QSA[7..0] 13
CLKA1 13
CLKA1# 13
CLKA0 13
CLKA0# 13
RASA0# 13
RASA1# 13
CASA0# 13
CASA1# 13
CSA0#_0 13
CSA1#_0 13
CKEA0 13
CKEA1 13
WEA0# 13
WEA1# 13
QSA#[7..0] 13
QSA[7..0] 13
ODTA0 13
ODTA1 13
5020
5010
QSA#[7..0]
QSA[7..0]
MDA[63..0]
MAA[13..0]
A_BA0
A_BA1
A_BA2
DQMA#[7..0]
QSA#[7..0]
QSA[7..0]
CLKA1
CLKA1#
CLKA0
CLKA0#
RASA0#
RASA1#
CASA0#
CASA1#
CSA0#_0
CSA1#_0
CKEA0
CKEA1
WEA0#
WEA1#
ODTA0
ODTA1
For PARK-S3 with DDR3: Support MAA13-MAA0 Address or 128MX16 DDR3.
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
DDR2 (64Mx16bit)
DDR2 (64Mx16bit)
DDR2 (64Mx16bit)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
4
3
2
Date: Sheet
MICRO-STAR INT'L CO.,LTD.
MS-145X
MS-145X
MS-145X
1
0A
0A
0A
of
of
of
16 56 Wednesday, August 05, 2009
16 56 Wednesday, August 05, 2009
16 56 Wednesday, August 05, 2009
5
4
3
2
1
D D
C C
B B
GPIO0 12
GPIO1 12
GPIO2 12
GPIO8 12
GPIO9 12
GENERICC 12
VSYNC_DAC2 12
HSYNC_DAC2 12
GPIO22 12
GPIO5 12
GPIO_5_AC_BATT is an optional input which allows the system to request (AC) performance
mode or battery mode operation.
AC (Performance mode) = H
Battery saving mode = L
GPIO11 12
GPIO12 12
GPIO13 12
VSYNC# 12,18
HSYNC# 12,18
GPIO0
GPIO1
GPIO2
GPIO8
GPIO9
GPIO5
AC_IN# 30,38,39
GPIO11
GPIO12
GPIO13
G
R405 10KR0402 R405 10KR0402
R216 10KR0402 R216 10KR0402
R217 X_10KR0402 R217 X_10KR0402
R218 X_10KR0402 R218 X_10KR0402
R411 X_10KR0402 R411 X_10KR0402
R403 X_10KR0402 R403 X_10KR0402
R388 X_10KR0402 R388 X_10KR0402
R389 X_10KR0402 R389 X_10KR0402
R222 X_10KR0402 R222 X_10KR0402
R409 10KR0402 R409 10KR0402
D S
Q27
Q27
N-2N7002_SOT23-1
N-2N7002_SOT23-1
SOT23SGD_T
SOT23SGD_T
R221 10KR0402 R221 10KR0402
R219 X_10KR0402 R219 X_10KR0402
R412 X_10KR0402 R412 X_10KR0402
R198 10KR0402 R198 10KR0402
R196 10KR0402 R196 10KR0402
PIN STRAPS
VDDR3
VDDR3
VDDR3
PIN
GPIO0
GPIO1
GPIO2
GPIO9
VSYNC_DAC2
GPIO22
M92-S2 LP
1 GPIO=0 50% TX output swing
1 GPIO=0 TX de-emphasis disabled
1 GPIO=0 Advertises the PCIE device as 2.5 GT/S capable at power -on
0 GPIO=0 VGA controller capacity enabled.
0 GPIO=0 Driver would ignore the value sampled on DVPDATA_20 during reset.
0
PIN DESCRIPTION OF DEFAULT SETTINGS
GPIO 12 GPIO 13 0 0 0=128 MB
GPIO 11
PIN DESCRIPTION OF DEFAULT SETTINGS
VGA_VSYNC# VGA_HSYNC#
CONFIGURATION STRAPS
PARK LP S3
GPIO=1 Full TX output swing
GPIO=1 TX de-emphasis enabled
GPIO=1 Advertises the PCIE device as 5 GT/S capable at power -on
GPIO=1 The device will not be recognized as the system's VGA controler.
GPIO=0 not used external BIOS ROM GPIO=1 if used
M92-S2 LP PARK LP S3
1 0 0
M92-S2 LP PARK LP S3
11
DESCRIPTION OF DEFAULT SETTINGS
0 0 1=256 MB
0 1 0=64 MB
0 0=No audio function
0 1=Audio for display port only
1 0=Audio for display port and HDMI if dongle is detected
1 1=Audio for both displayport and HDMI
+1_8VRUN_PARK
A A
5
DVPDATA_0 12
DVPDATA_2 12
DVPDATA_21 12
DVPDATA_19 12
X_10KR0402 R401 X_10KR0402 R401
X_10KR0402 R212 X_10KR0402 R212
X_10KR0402 R399 X_10KR0402 R399
X_10KR0402 R400 X_10KR0402 R400
4
DVPDATA19
0
0
0
0
0
0
0
0
0
0
11
3
0
1
0 1
MEM_TYPE DVPDATA21 DVPDATA0 DVPDATA2
Hynix 64Mx16 DDR3
(M12-5TQ1G25-H23)
Samsung 64Mx16 DDR3
(M12-K4W1G85-S02)
MICRO-STAR INT'L CO.,LTD.
MICRO-STAR INT'L CO.,LTD.
Title
Title
Title
M92/Pak-Sx (Straps & Thermal)
M92/Pak-Sx (Straps & Thermal)
M92/Pak-Sx (Straps & Thermal)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
B
B
B
Date: Sheet
Date: Sheet
2
Date: Sheet
MS-145X
MS-145X
MS-145X
MICRO-STAR INT'L CO.,LTD.
of
of
of
17 56 Wednesday, August 05, 2009
17 56 Wednesday, August 05, 2009
17 56 Wednesday, August 05, 2009
1
0A
0A
0A