Motorola MTW24N40E Datasheet

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SEMICONDUCTOR TECHNICAL DATA
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This high voltage MOSFET uses an advanced termination scheme to provide enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is designed to withstand high energy in the avalanche and commutation modes. The new energy efficient design also offers a drain–to–source diode with a fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters and PWM motor controls, these devices are particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.
Robust High Voltage Termination
Avalanche Energy Specified
Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
Diode is Characterized for Use in Bridge Circuits
I
DSS
and V
Specified at Elevated Temperature
DS(on)
Isolated Mounting Hole Reduces Mounting Hardware
G
D
S

Motorola Preferred Device
TMOS POWER FET
24 AMPERES
400 VOL TS
R
CASE 340K–01, Style 1
DS(on)
TO–247AE
= 0.16 OHM
MAXIMUM RATINGS
Drain–Source Voltage V Drain–Gate Voltage (RGS = 1.0 M) V Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp 10 ms)
Drain Current — Continuous
Drain Current — Continuous @ 100°C Drain Current — Single Pulse (tp 10 µs)
Total Power Dissipation
Derate above 25°C Operating and Storage Temperature Range TJ, T Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 20 Apk, L = 3.0 mH, RG = 25 ) Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds T
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves —representing boundaries on device characteristics —are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
(TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
V
V
I
E
R R
DSS
DGR
GS
GSM
I
D
I
D
DM P
D
stg
AS
θJC θJA
L
400 Vdc 400 Vdc
± 20 ± 40
24
17.7 72
250
2.0
–55 to 150 °C
600 mJ
0.50 40
260 °C
Vdc Vpk
Adc
Apk
Watts
W/°C
°C/W
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 4
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1996
1
MTW24N40E
)
f = 1.0 MHz)
V
G
)
V
GS
Vdc)
(
S
,
GS
,
ELECTRICAL CHARACTERISTICS
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc) T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 400 Vdc, VGS = 0 Vdc) (VDS = 400 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
T emperature Coef ficient (Negative) Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 12 Adc) R Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 24 Adc)
(ID = 12 Adc, TJ =125°C) Forward Transconductance (VDS = 15 Vdc, ID = 12 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance Output Capacitance Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time Rise Time Turn–Off Delay Time Fall Time Gate Charge
(See Figure 8)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
Reverse Recovery Time
(See Figure 14)
Reverse Recovery Stored Charge Q
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25 from package to center of die) Internal Source Inductance
(Measured from the source lead 0.25 from package to source bond pad)
(1) Pulse Test: Pulse Width 300 µs, Duty Cycle 2%. (2) Switching characteristics are independent of operating junction temperature.
(T
= 25°C unless otherwise noted)
J
Characteristic
(VDS = 25 Vdc, VGS = 0 Vdc,
(VDS = 320 Vdc, ID = 24 Adc,
(IS = 24 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
(VDD 200= Vdc, ID = 24 Adc,
(IS = 24 Adc, VGS = 0 Vdc)
(IS = 24 Adc, VGS = 0 Vdc,
= 10 Vdc,
GS
RG = 9.1 )
= 10
=
dIS/dt = 100 A/µs)
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
Q
3
V
SD
t
rr
t
a
t
b
RR
L
D
L
S
400
— —
100 nAdc
2.0 —
0.13 0.16 Ohm
— —
11 17 mhos
4000 5600 pF — 530 740 — 112 220
32 60 ns — 96 204 — 99 194 — 92 186 — 98 160 nC
24 — — 38 — — 40
— —
372 — — 244 — — 128 — — 5.3 µC
4.5 nH
13 nH
360
— —
7.0
— —
0.94
0.9
— —
10
100
4.0 —
4.5
4.3
1.5 —
mV/°C
mV/°C
Vdc
µAdc
Vdc
Vdc
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MTW24N40E
50
TJ = 25°C
40
30
20
, DRAIN CURRENT (AMPS)
D
I
10
0
0 2.0 4.0 6.0 8.0 10
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
VGS = 10 V
7 V 6 V
5 V
4 V
Figure 1. On–Region Characteristics
0.4 VGS = 10 V
0.35
0.3
0.25
0.2
0.15
0.1
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.05
TJ = 100°C
25°C
–55°C
8 V
9 V
50
VDS ≥ 10 V
40
30
20
, DRAIN CURRENT (AMPS)
D
I
10
0
2.0 3.0 3.5 4.0 4.5 5.0 VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
100°C
Figure 2. Transfer Characteristics
0.19
0.18
0.17
0.16
0.15
0.14
0.13
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
TJ = 25°C
25°C
TJ = –55°C
5.5 6.0 6.5 7.02.5
VGS = 10 V
15 V
0
DS(on)
R
0 1020304050
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and T emperature
3.0 VGS = 10 V
2.5
ID = 12 A
2.0
1.5
(NORMALIZED)
1.0
, DRAIN–TO–SOURCE RESIST ANCE
0.5
DS(on)
R
0
–50
– 25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (
°
C)
Figure 5. On–Resistance Variation with
Temperature
0.12
DS(on)
R
0 1020304050
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
10000
VGS = 0 V
1000
100
, LEAKAGE (nA)
DSS
I
10
1
0 100 200 300 400
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
TJ = 125°C
100°C
25°C
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
Motorola TMOS Power MOSFET Transistor Device Data
3
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