Motorola MTW23N25E Datasheet
SEMICONDUCTOR TECHNICAL DATA
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N–Channel Enhancement–Mode Silicon Gate
This advanced TMOS E–FET is designed to withstand high
energy in the avalanche and commutation modes. The new energy
efficient design also offers a drain–to–source diode with a fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
Specified at Elevated Temperature
DS(on)
• Isolated Mounting Hole Reduces Mounting Hardware
G
D
S
Motorola Preferred Device
TMOS POWER FET
23 AMPERES
250 VOLTS
R
CASE 340K–01, Style 1
DS(on)
TO–247AE
= 0.11 OHM
MAXIMUM RATINGS
Drain–Source Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 20 Apk, L = 3.0 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
(TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
250 Vdc
250 Vdc
± 20
± 40
23
18
69
180
1.43
–55 to 150 °C
600
0.70
40
260 °C
Vdc
Vpk
Adc
Apk
Watts
W/°C
mJ
°C/W
V
V
I
E
R
R
DSS
DGR
GS
GSM
I
D
I
D
DM
P
D
stg
AS
θJC
θJA
L
REV 1
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1996
1
MTW23N25E
)
f = 1.0 MHz)
V
G
)
(
DS
,
D
,
(
S
,
GS
,
ELECTRICAL CHARACTERISTICS
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 250 Vdc, VGS = 0 Vdc)
(VDS = 250 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
T emperature Coef ficient (Negative)
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 11.5 Adc) R
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 23 Adc)
(ID = 11.5 Adc, TJ = 125°C)
Forward Transconductance (VDS = 15 Vdc, ID = 11.5 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
Reverse Recovery Time
(See Figure 14)
Reverse Recovery Stored Charge Q
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(T
= 25°C unless otherwise noted)
J
Characteristic
(VDS = 25 Vdc, VGS = 0 Vdc,
(VDD= 125 Vdc, ID = 23 Adc,
(VDS = 200 Vdc, ID = 23 Adc,
(IS = 23 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
= 10 Vdc,
GS
RG = 9.1 Ω)
VGS = 10 Vdc)
(IS = 23 Adc, VGS = 0 Vdc)
(IS = 23 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
Q
3
V
SD
t
rr
t
a
t
b
RR
L
D
L
S
250
—
—
—
— — 100 nAdc
2.0
—
— 0.094 0.11 Ohm
—
—
11 15 — mhos
— 3100 4340 pF
— 580 810
— 150 320
— 22 50 ns
— 95 250
— 94 160
— 85.6 200
— 82 160 nC
— 20 —
— 40 —
— 34 —
—
—
— 300 —
— 215 —
— 87 —
— 3.5 — µC
— 4.5 — nH
— 13 — nH
—
380
—
—
—
7.0
2.1
—
0.98
0.9
—
—
10
100
4.0
—
3.0
2.7
1.3
—
mV/°C
mV/°C
Vdc
µAdc
Vdc
Vdc
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MTW23N25E
48
TJ = 25°C
40
32
24
16
, DRAIN CURRENT (AMPS)
D
I
8
0
01357 10
VGS = 10 V
9 V
2 4 6 8 2.8 4.4 6.0 7.6
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
8 V
7 V
6 V
5 V
9
Figure 1. On–Region Characteristics
0.2
VGS = 10 V
0.16
0.12
TJ = 100°C
25°C
48
VDS ≥ 10 V
40
32
24
16
, DRAIN CURRENT (AMPS)
D
I
8
0
2.0 3.6 5.2 6.8 8.4
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
TJ = –55°C
100°C
Figure 2. Transfer Characteristics
0.106
TJ = 25°C
0.102
0.098
0.094
VGS = 10 V
25°C
0.08
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.04
DS(on)
R
0163248
8 24 40 8 24 40
ID, DRAIN CURRENT (AMPS)
–55°
C
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
R
Figure 3. On–Resistance versus Drain Current
and T emperature
2.0
VGS = 10 V
ID = 11.5 A
1.6
1.2
(NORMALIZED)
0.8
, DRAIN–TO–SOURCE RESIST ANCE
DS(on)
R
0.4
–50
– 25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (
°
C)
0.09
0.086
DS(on)
0163248
15 V
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
10000
1000
, LEAKAGE (nA)
DSS
I
VGS = 0 V
100
10
1.0
0.1
0 150 250
50 100 200
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
TJ = 125°C
100°C
25°C
Figure 5. On–Resistance Variation with
Temperature
Motorola TMOS Power MOSFET Transistor Device Data
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
3
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