SEMICONDUCTOR TECHNICAL DATA
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N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
Specified at Elevated Temperature
DS(on)
• Isolated Mounting Hole Reduces Mounting Hardware
G
D
S
Motorola Preferred Device
TMOS POWER FET
16 AMPERES
400 VOL TS
R
CASE 340K–01, Style 1
DS(on)
TO–247AE
= 0.24 OHM
MAXIMUM RATINGS
Drain–Source Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage — Continuous
Drain Current — Continuous
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 16 Apk, L = 6.8 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
(TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
— Non–Repetitive (tp ≤ 10 ms)
— Continuous @ 100°C
— Single Pulse (tp ≤ 10 µs)
— Junction to Ambient
V
V
I
E
R
R
DSS
DGR
GS
GSM
I
D
I
D
DM
P
D
stg
AS
θJC
θJA
L
400 Vdc
400 Vdc
± 20
± 40
16
9.0
56
180
1.4
–55 to 150 °C
870 mJ
0.70
40
260 °C
Vdc
Vpk
Adc
Apk
Watts
W/°C
°C/W
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 3
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1996
1
MTW16N40E
ELECTRICAL CHARACTERISTICS
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 400 Vdc, VGS = 0 Vdc)
(VDS = 320 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 0.25 mAdc)
T emperature Coef ficient (Negative)
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 8.0 Adc) R
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 16 Adc)
(ID = 8.0 Adc, TJ = 125°C)
Forward Transconductance (VDS = 15 Vdc, ID = 8.0 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
Reverse Recovery Time
(See Figure 9)
Reverse Recovery Stored Charge Q
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(TJ = 25°C unless otherwise noted)
(VDS = 25 Vdc, VGS = 0 Vdc,
(VDD = 200 Vdc, ID = 16 Adc,
(VDS = 320 Vdc, ID = 16 Adc,
(IS = 16 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
= 10 Vdc,
GS
RG = 9.1 Ω)
= 10
=
(IS = 16 Adc, VGS = 0 Vdc)
(IS = 16 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
V
(BR)DSS
I
DSS
GSS
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
V
SD
t
rr
t
a
t
b
RR
L
D
L
S
400
—
—
—
— — 100 nAdc
2.0
—
— 0.225 0.24 Ohm
—
—
8.0 10 — mhos
— 2570 3600 pF
— 330 460
— 82 164
— 29 50 ns
— 62 70
— 76 170
— 57 95
T
1
2
3
— 66 93 nC
— 17 —
— 31 —
— 30 —
—
—
— 340 —
— 228 —
— 112 —
— 4.3 — µC
— 5.0 — nH
— 13 — nH
—
420
—
—
3.0
7.0
—
—
1.0
0.9
—
—
0.25
1.0
4.0
—
4.8
4.3
1.6
—
Vdc
mV/°C
mAdc
Vdc
mV/°C
Vdc
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MTW16N40E
30
TJ = 25°C
25
20
15
10
, DRAIN CURRENT (AMPS)
D
I
5
0
048121620
VGS = 10 V
2 6 10 14 18
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
8 V
7 V
6.5 V
6 V
4.5 V
Figure 1. On–Region Characteristics
0.75
VGS = 10 V
0.6
0.45
0.3
TJ = 100°C
25°C
40
VDS = 50 V
35
30
25
20
15
25°C
100°C
TJ = –55°C
, DRAIN CURRENT (AMPS)
10
D
I
5
0
04628
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.32
TJ = 25°C
0.30
0.28
0.26
0.24
VGS = 10 V
0.15
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0
DS(on)
R
0 5 15 25
ID, DRAIN CURRENT (AMPS)
–55°C
10 20 30
Figure 3. On–Resistance versus Drain Current
and T emperature
3.0
VGS = 10 V
ID = 8 A
2.5
2.0
1.5
(NORMALIZED)
1.0
, DRAIN–TO–SOURCE RESIST ANCE
0.5
DS(on)
R
0
–50
–25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
0.22
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.20
DS(on)
R
08 32428
ID, DRAIN CURRENT (AMPS)
15 V
12 2016 24
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
1000
TJ = 125°C
100
100°C
, LEAKAGE (nA)
10
DSS
I
1.0
0 200 400
100 300 350
50
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
250150
V
= 0 V
GS
Figure 5. On–Resistance Variation with
Temperature
Motorola TMOS Power MOSFET Transistor Device Data
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
3