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Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement–Mode Silicon Gate
This advanced high–cell density HDTMOS E–FET is designed to
withstand high energy in the avalanche and commutation modes.
This new energy efficient design also o ffers a drain–to–source
diode w ith a f ast r ecovery t ime. Designed for l ow–voltage,
high–speed switching applications in power supplies, converters
and PWM m otor controls, a nd inductive loads. The a valanche
energy capability is specified to eliminate the guesswork in designs
where inductive loads are switched, and to offer additional safety
margin against unexpected voltage transients.
• Ultra Low R
DS(on)
, High–Cell Density, HDTMOS
• SPICE Parameters Available
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
DS(on)
Specified at Elevated Temperature
• Avalanche Energy Specified
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
Drain–Source Voltage V
DSS
25 Vdc
Drain–Gate Voltage (RGS = 1.0 MΩ) V
DGR
25 Vdc
Gate–Source Voltage — Continuous
Gate–Source Voltage — Single Pulse (tp ≤ 10 ms)
V
GS
± 15
± 20
Vdc
Vpk
Drain Current — Continuous
— Continuous @ 100°C
— Single Pulse (tp ≤ 10 µs)
I
D
I
D
I
DM
75
59
225
Adc
Apk
Total Power Dissipation
Derate above 25°C
P
D
150
1.0
Watts
W/°C
Operating and Storage Temperature Range TJ, T
stg
–55 to 175 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, IL = 75 Apk, L = 0.1 mH, RG = 25 Ω)
E
AS
280 mJ
Thermal Resistance — Junction to Case
— Junction to Ambient
R
θJC
R
θJA
1.0
62.5
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
L
260 °C
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET and HDTMOS are trademarks of Motorola, Inc.
TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
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