SEMICONDUCTOR TECHNICAL DATA
N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a Discrete
Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
Specified at Elevated Temperature
DS(on)
G
Order this document
by MTP6N60E/D
Motorola Preferred Device
TMOS POWER FET
6.0 AMPERES
600 VOL TS
R
D
S
DS(on)
= 1.2 OHMS
CASE 221A–06, Style 5
TO–220AB
MAXIMUM RATINGS
Drain–to–Source Voltage V
Drain–to–Gate Voltage (RGS = 1.0 MΩ) V
Gate–to–Source Voltage — Continuous
Drain Current — Continuous
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 2.0 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case°
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves —representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
(TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
— Non–Repetitive (tp ≤ 10 ms)
— Continuous @ 100°C
— Single Pulse (tp ≤ 10 µs)
— Junction to Ambient°
V
V
I
E
R
R
DSS
DGR
GS
GSM
I
D
I
D
DM
P
D
stg
AS
θJC
θJA
L
600 Vdc
600 Vdc
±20
±40
6.0
4.6
18
125
1.0
–55 to 150 °C
405
1.0
62.5
260 °C
Vdc
Vpk
Adc
Apk
Watts
W/°C
mJ
°C/W
Preferred devices are Motorola recommended choices for future use and best overall value.
REV 3
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
1
MTP6N60E
ELECTRICAL CHARACTERISTICS
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 µAdc)
T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 600 Vdc, VGS = 0 Vdc)
(VDS = 600 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) I
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
T emperature Coef ficient (Negative)
Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 3.0 Adc) R
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 6.0 Adc)
(VGS = 10 Vdc, ID = 3.0 Adc, TJ = 125°C)
Forward Transconductance (VDS = 15 Vdc, ID = 3.0 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
Reverse Recovery Time
Reverse Recovery Stored Charge Q
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
(1) Pulse T est: Pulse Width ≤300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(T
= 25°C unless otherwise noted)
J
Characteristic
(VDS = 25 Vdc, VGS = 0 Vdc,
(VDS = 300 Vdc, ID = 6.0 Adc,
(VDS = 300 Vdc, ID = 6.0 Adc,
(IS = 6.0 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
= 10 Vdc,
GS
RG = 9.1 Ω)
VGS = 10 Vdc)
(IS = 6.0 Adc, VGS = 0 Vdc)
(IS = 6.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
Q
3
V
SD
t
rr
t
a
t
b
RR
L
D
L
S
600
—
—
—
— — 100 nAdc
2.0
—
— 0.94 1.2 Ohms
—
—
2.0 5.5 — mhos
— 1498 2100 pF
— 158 220
— 29 60
— 14 30 ns
— 19 40
— 40 80
— 26 55
— 35.5 50 nC
— 8.1 —
— 14.1 —
— 15.8 —
—
—
— 266 —
— 166 —
— 100 —
— 2.5 — µC
—
—
— 7.5
—
689
—
—
3.0
7.1
6.0
—
0.83
0.72
3.5
4.5
—
—
1.0
50
4.0
—
8.6
7.6
1.2
—
—
—
— nH
mV/°C
mV/°C
Vdc
µAdc
Vdc
Vdc
Vdc
ns
nH
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MTP6N60E
12
TJ = 25°C
10
8
6
4
, DRAIN CURRENT (AMPS)
D
I
2
0
2 6 10 14 6.0
04 81216
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
VGS = 10 V
7 V
8 V
Figure 1. On–Region Characteristics Figure 2. Transfer Characteristics
2.5
VGS = 10 V
2.0
1.5
1.0
0.5
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
TJ = 100°C
25°C
–55°C
6 V
5 V
4 V
18
12
VDS ≥ 10 V
10
8
6
4
, DRAIN CURRENT (AMPS)
D
I
2
0
2.5 3.5 4.5 5.5
2.0 3.0 4.0 5.0
VGS, GATE–T O–SOURCE VOLT AGE (VOLTS)
1.4
TJ = 25°C
1.3
1.2
1.1
1.0
0.9
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
VGS = 10 V
15 V
100°C
25°C
TJ = –55°C
DS(on)
0
R
02 6 10
48
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and T emperature
2.5
VGS = 10 V
ID = 3 A
2
1.5
1
(NORMALIZED)
, DRAIN–TO–SOURCE RESIST ANCE
0.5
DS(on)
R
0
–50 0 50 100 150125–25 25 75
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On–Resistance Variation with
Temperature
12
0.8
DS(on)
R
0
26481210
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
10000
VGS = 0 V
1000
100
, LEAKAGE (nA)
DSS
I
10
1
0 200 400
100 300 600500
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
TJ = 125°C
100°C
25°C
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
Motorola TMOS Power MOSFET Transistor Device Data
3