Micro8 devices are an advanced series of power MOSFETs
which utilize Motorola’s High Cell Density HDTMOS process to
achieve lowest possible on–resistance per silicon area. They are
capable of withstanding high energy in the avalanche and commuta tion modes and the drain–to–source diode has a very low reverse
recovery time. Micro8 devices are des igned for use in low voltage,
high speed switching applications where power efficiency is important.
Typical applications are dc–dc converters, and power management in
portable and battery powered products such as computers, printers,
cellular and cordless phones. They can also be used for low voltage
motor controls in mass storage products such as disk drives and tape
N–Channel
drives. The avalanche energy is specified to eliminate the guesswork
in designs where inductive loads are switched and offer additional
safety margin against unexpected voltage transients.
• Miniature Micro8 Surface Mount Package — Saves Board Space
2
G
• Extremely Low Profile (<1.1mm) for thin applications such as
PCMCIA cards
• Ultra Low R
Provides Higher Efficiency and Extends Battery Life
DS(on)
• Logic Level Gate Drive — Can Be Driven by Logic ICs
• Diode Is Characterized for Use In Bridge Circuits
P–Channel
• Diode Exhibits High Speed, With Soft Recovery
• I
• Avalanche Energy Specified
Specified at Elevated Temperature
DSS
4
G
• Mounting Information for Micro8 Package Provided
MAXIMUM RATINGS
Negative sign for P–Channel devices omitted for clarity
Drain–to–Source VoltageN–Channel
Drain–to–Gate Voltage (RGS = 1.0 MW)N–Channel
Gate–to–Source Voltage — ContinuousN–Channel
Operating and Storage Temperature RangeTJ and T
(TJ = 25°C unless otherwise noted)
Rating
P–Channel
P–Channel
P–Channel
DEVICE MARKING
CA
78
D
1
S
56
D
S
3
SymbolMaxUnit
Motorola Preferred Device
COMPLEMENTARY
DUAL TMOS POWER FET
20 VOLTS
R
R
CASE 846A–02, Style 2
Source 1
Gate 1
Source 2
Gate 2
V
DSS
V
DGR
V
GS
stg
= 0.120 OHM
DS(on)
1.7 AMPERES
(N–CHANNEL)
= 0.175 OHM
DS(on)
1.6 AMPERES
(P–CHANNEL)
Micro8
1
2
3
4
Top View
20
20
20
20
±8.0
±8.0
–55 to 150°C
8
7
6
5
Drain 1
Drain 1
Drain 2
Drain 2
V
V
V
ORDERING INFORMATION
DeviceReel SizeTape WidthQuantity
MTDF1C02HD13″12 mm embossed tape4000 units
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
HDTMOS is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Micro8 is a registered trademark of International Rectifier.
Preferred devices are Motorola recommended choices for future use and best overall value.
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
1
MTDF1C02HD
MAXIMUM RATINGS
Drain–to–Source VoltageN & P–ChV
Drain–to–Gate Voltage (RGS = 1.0 MΩ)N & P–ChV
Gate–to–Source Voltage — ContinuousN & P–ChV
1 inch SQ.
FR–4 or G–10 PCB
Figure A below
1 die operating
Steady State
Minimum
FR–4 or G–10 PCB
Figure B below
1 die operating
Steady State
1 inch SQ.
FR–4 or G–10 PCB
Figure A below
1 die operating
Steady State
Minimum
FR–4 or G–10 PCB
Figure B below
1 die operating
Steady State
Minimum
FR–4 or G–10 PCB
Figure B below
2 die operating
Steady State
Operating and Storage Temperature RangeTJ, T
(1) Repetitive rating; pulse width limited by maximum junction temperature.
(TJ = 25°C unless otherwise noted)
Rating
Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current — Continuous @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current
Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current — Continuous @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current
Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current — Continuous @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current
Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current — Continuous @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current
Thermal Resistance — Junction to Ambient
Total Power Dissipation @ TA = 25°C
Linear Derating Factor
Drain Current — Continuous @ TA = 25°C
Continuous @ TA = 70°C
Pulsed Drain Current
(1)
(1)
(1)
(1)
(1)
PolaritySymbolTypicalMaxUnit
N–ChannelR
N–ChannelR
P–ChannelR
P–ChannelR
N & P–ChR
DSS
DGR
GS
THJA
P
D
I
D
I
D
I
DM
THJA
P
D
I
D
I
D
I
DM
THJA
P
D
I
D
I
D
I
DM
THJA
P
D
I
D
I
D
I
DM
THJA
P
D
I
D
I
D
I
DM
stg
—20V
—20V
—± 8.0V
80
—
—
—
—
—
160
—
—
—
—
—
80
—
—
—
—
—
160
—
—
—
—
—
240
—
—
—
—
—
—– 55 to 150°C
100
1.25
10
2.8
2.3
23
200
0.63
5.0
1.7
1.6
16
100
1.25
10
2.3
1.9
19
200
0.63
5.0
1.6
1.3
13
300
0.42
3.33
1.3
1.1
11
°C/W
Watts
mW/°C
°C/W
Watts
mW/°C
°C/W
Watts
mW/°C
°C/W
Watts
mW/°C
°C/W
Watts
mW/°C
A
A
A
A
A
A
A
A
A
A
A
A
A
A
A
Figure B. Minimum FR–4 or G–10 PCBFigure A. 1.0 Inch Square FR–4 or G–10 PCB
2
Motorola TMOS Power MOSFET Transistor Device Data
MTDF1C02HD
(
DD
,
D
,
V
GS
4.5Vdc,
(
DS
,
D
,
V
GS
2.7Vdc,
VGS 4.5 Vdc)
()
V
(BR)DSS
I
DSS
GSS
V
GS(th)
R
DS(on)
R
DS(on)
g
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
(1)
T
1
2
3
(N)
(P)
(N)
(P)
(N)
(P)
———100nAdc
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
(N)
(P)
20
20
—
—
—
—
0.7
0.7
—
—
—
—
—
—
2.0
1.3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5.0
14
—
—
0.90
0.95
2.5
2.2
0.100
0.146
0.133
0.220
—
—
145
225
90
150
38
60
8.0
15
27
27
23
60
34
72
16
20
79
94
24
49
31
76
3.9
5.3
0.4
0.7
1.7
2.6
1.5
1.9
—
—
—
—
1.0
1.0
1.1
1.4
—
—
0.120
0.175
0.16
0.28
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
5.5
7.5
—
—
—
—
—
—
Vdc
µAdc
Vdc
Ohm
Ohm
mhos
pF
ns
nC
ELECTRICAL CHARACTERISTICS (T
CharacteristicSymbolPolarityMinTypMaxUnit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage (Cpk ≥ 2.0)
(VGS = 0 Vdc, ID = 250 µAdc)
Breakdown Temperature Coefficient
(Positive)
Zero Gate Voltage Drain Current (VGS = 0 Vdc, VDS = 16 Vdc)
Gate–Body Leakage Current (VGS = ±8.0 Vdc, VDS = 0)I
ON CHARACTERISTICS
Gate Threshold Voltage(Cpk ≥ 2.0)
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient
(Negative)
Drain–to–Source On–Resistance (VGS = 4.5 Vdc, ID = 1.7 Adc)
Drain–to–Source On–Resistance (Cpk ≥ 2.0)
Forward Transconductance
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
(1) Negative signs for P–Channel device omitted for clarity.(continued)
(2) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(3) Switching characteristics are independent of operating junction temperature.
(2)
(1)
(3)
= 25°C unless otherwise noted)
A
(1)(3)
(VGS = 0 Vdc, VDS = 20 Vdc)
(1)(3)
(VGS = 4.5 Vdc, ID = 1.6 Adc)
(1)(3)
(VGS = 2.7 Vdc, ID = 0.85 Adc)
(VGS = 2.7 Vdc, ID = 0.8 Adc)
(VDS = 10 Adc, ID = 0.85 Adc)
(VDS = 10 Adc, ID = 0.6 Adc)