Motorola MTD20N06V Datasheet
1
Motorola TMOS Power MOSFET Transistor Device Data
N–Channel Enhancement–Mode Silicon Gate
TMOS V is a new technology designed to achieve an on–resistance area product about one–half that of standard MOSFET s. This
new technology more than doubles the present cell density of our
50 and 60 volt TMOS devices. Just as with our TMOS E–FET
designs, TMOS V is designed to withstand high energy in the
avalanche and commutation modes. Designed for low voltage, high
speed switching applications in power supplies, converters and
power motor controls, these devices are particularly well suited for
bridge circuits where diode speed and commutating safe operating
areas are critical and offer additional safety margin against
unexpected voltage transients.
New Features of TMOS V
• On–resistance Area Product about One–half that of Standard
MOSFETs with New Low Voltage, Low R
DS(on)
Technology
• Faster Switching than E–FET Predecessors
Features Common to TMOS V and TMOS E–FETS
• Avalanche Energy Specified
• I
DSS
and V
DS(on)
Specified at Elevated Temperature
• Static Parameters are the Same for both TMOS V and TMOS E–FET
• Surface Mount Package Available in 16 mm 13–inch/2500 Unit Tape & Reel,
Add T4 Suffix to Part Number
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain–to–Source Voltage V
DSS
60 Vdc
Drain–to–Gate Voltage (RGS = 1.0 MΩ) V
DGR
60 Vdc
Gate–to–Source Voltage — Continuous
Gate–to–Source Voltage — Non–repetitive (tp ≤ 10 ms)
V
GS
V
GSM
± 20
± 25
Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
I
D
I
D
I
DM
20
13
70
Adc
Apk
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ 25°C
(1)
P
D
60
0.4
2.1
Watts
W/°C
Watts
Operating and Storage Temperature Range TJ, T
stg
–55 to 175 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 20 Apk, L = 1.0 mH, RG = 25 Ω)
E
AS
200 mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient
(1)
R
θJC
R
θJA
R
θJA
2.5
100
71.4
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
L
260 °C
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
Designer’s Data for “Worst Case” Conditions —The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET, Designer’s, and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
REV 1
Order this document
by MTD20N06V/D
SEMICONDUCTOR TECHNICAL DATA
TM
D
S
G
CASE 369A–13, Style 2
DPAK Surface Mount
TMOS POWER FET
20 AMPERES
60 VOLTS
R
DS(on)
= 0.080 OHM
Motorola, Inc. 1996
MTD20N06V
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise noted)
Characteristic
Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage (Cpk ≥ 2.0) (3)
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
V
(BR)DSS
60
—
—
69
—
—
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 60 Vdc, VGS = 0 Vdc)
(VDS = 60 Vdc, VGS = 0 Vdc, TJ = 150°C)
I
DSS
—
—
—
—
10
100
µAdc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0 Vdc) I
GSS
— — 100 nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage (Cpk ≥ 2.0) (3)
(VDS = VGS, ID = 250 µAdc)
Threshold Temperature Coefficient (Negative)
V
GS(th)
2.0
—
2.8
5.0
4.0
—
Vdc
mV/°C
Static Drain–to–Source On–Resistance (Cpk ≥ 2.0) (3)
(VGS = 10 Vdc, ID = 10 Adc)
R
DS(on)
— 0.065 0.080
Ohm
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 10 Adc)
(VGS = 10 Vdc, ID = 10 Adc, TJ = 150°C)
V
DS(on)
—
—
—
—
2.0
1.9
Vdc
Forward Transconductance (VDS = 6.0 Vdc, ID = 10 Adc) g
FS
6.0 8.0 — mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
— 590 830 pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
C
oss
— 180 250
Reverse Transfer Capacitance
f = 1.0 MHz)
C
rss
— 40 80
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
t
d(on)
— 8.7 20 ns
Rise Time
t
r
— 77 150
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 9.1 Ω)
t
d(off)
— 26 50
Fall Time
G
= 9.1 Ω)
t
f
— 46 90
Q
T
— 28 40 nC
DS
= 48 Vdc, ID = 20 Adc,
Q
1
— 4.0 —
(VDS = 48 Vdc, ID = 20 Adc,
VGS = 10 Vdc)
Q
2
— 9.0 —
Q
3
— 8.0 —
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 20 Adc, VGS = 0 Vdc)
(IS = 20 Adc, VGS = 0 Vdc, TJ = 150°C)
V
SD
—
—
1.05
0.96
1.6
—
Vdc
t
rr
— 60 —
S
= 20 Adc, VGS = 0 Vdc,
t
a
— 52 —
(IS = 20 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
t
b
— 8.0 —
Reverse Recovery Stored Charge Q
RR
— 0.172 — µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
L
D
—
—
3.5
4.5
—
—
nH
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
L
S
— 7.5 —
nH
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values.
Cpk =
Max limit – Typ
3 x SIGMA
Gate Charge
Reverse Recovery Time
(VDD = 30 Vdc, ID = 20 Adc,
(V
(I
ns
MTD20N06V
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
0 2 4 6 8 10
0
10
20
30
35
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 1. On–Region Characteristics
I
D
, DRAIN CURRENT (AMPS)
92 3 4 8
0
10
20
30
35
I
D
, DRAIN CURRENT (AMPS)
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0 10 20 30 405
0
0.02
0.04
0.06
0.12
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and Temperature
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
0 10 20 30 40
0
50
10
35
Figure 5. On–Resistance Variation with
Temperature
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 6. Drain–To–Source Leakage
Current versus Voltage
I
DSS
, LEAKAGE (nA)
TJ = 125°C
100°C
TJ = 25
°C
VDS ≥ 10 V
TJ = –55
°C
25
°C
100
°C
TJ = 100
°C
25
°C
–55
°C
VGS = 0 V
VGS = 10V
VGS = 10 V
40
5
7 V
6 V
5 V
4 V
8 V
9 V
40
5
5 6 7
0.08
0.1
35
60
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
0 10 20 30 4035
0.04
0.05
0.08
ID, DRAIN CURRENT (AMPS)
15 V
TJ = 25
°C
VGS = 10 V
0.06
0.07
5
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE
(NORMALIZED)
–50
0
0.25
0.5
0.75
2.0
TJ, JUNCTION TEMPERATURE (
°
C)
–25 0 25 50 75 100 150
VGS = 10 V
ID = 10 A
1
1.25
1.5
1.75
125
175
1 3 5 7 9
15
25
15
25
0.14
0.16
0.18
15 25
0.09
0.1
0.11
15 25
5
15
20
25
30
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