Motorola MTB4N80E1 Datasheet
SEMICONDUCTOR TECHNICAL DATA
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N–Channel Enhancement–Mode Silicon Gate
This high voltage MOSFET uses an advanced termination
scheme to provide enhanced voltage–blocking capability without
degrading performance over time. In addition, this advanced TMOS
E–FET is designed to withstand high energy in the avalanche and
commutation modes. The new energy efficient design also offers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
Specified at Elevated Temperature
DS(on)
• Short Heatsink Tab Manufactured — Not Sheared
• Specially Designed Leadframe for Maximum Power Dissipation
G
TMOS POWER FET
4.0 AMPERES
800 VOL TS
R
DS(on)
= 3.0 OHM
D
CASE 418C–01, Style 2
S
D2PAK–SL
MAXIMUM RATINGS
Drain–Source Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C, when mounted with the minimum recommended pad size
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc, IL = 8.0 Apk, L = 10 mH, RG = 25 Ω)
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
E–FET is a trademark of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
(TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
800 Vdc
800 Vdc
± 20
± 40
4.0
2.9
12
125
1.0
2.5
– 55 to 150 °C
320 mJ
1.0
62.5
50
260 °C
V
V
I
E
R
R
R
DSS
DGR
GS
GSM
I
D
I
D
DM
P
D
stg
AS
θJC
θJA
θJA
L
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
°C/W
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
1
MTB4N80E1
)
f = 1.0 MHz)
V
G
)
(
DS
,
D
,
(
S
,
GS
,
ELECTRICAL CHARACTERISTICS
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
T emperature Coef ficient (Positive)
Zero Gate Voltage Drain Current
(VDS = 800 Vdc, VGS = 0 Vdc)
(VDS = 800 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
T emperature Coef ficient (Negative)
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 2.0 Adc) R
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 4.0 Adc)
(ID = 2.0 Adc, TJ = 125°C)
Forward Transconductance (VDS = 15 Vdc, ID = 2.0 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(See Figure 8)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
Reverse Recovery Time
(See Figure 14)
Reverse Recovery Stored Charge Q
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(TJ = 25°C unless otherwise noted)
(VDS = 25 Vdc, VGS = 0 Vdc,
(VDD = 400 Vdc, ID = 4.0 Adc,
(VDS = 400 Vdc, ID = 4.0 Adc,
(IS = 4.0 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
= 10 Vdc,
GS
RG = 9.1 Ω)
VGS = 10 Vdc)
(IS = 4.0 Adc, VGS = 0 Vdc)
(IS = 4.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
V
(BR)DSS
I
DSS
GSS
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
Q
Q
Q
V
SD
t
rr
t
a
t
b
RR
L
D
L
S
800
—
—
—
— — 100 nAdc
2.0
—
— 1.95 3.0 Ohm
—
—
2.0 4.3 — mhos
— 1320 2030 pF
— 187 400
— 72 160
— 13 30 ns
— 36 90
— 40 80
— 30 75
T
1
2
3
— 36 80 nC
— 7.0 —
— 16.5 —
— 12 —
—
—
— 557 —
— 100 —
— 457 —
— 2.33 — µC
— 4.5 — nH
— 7.5 — nH
—
1.02
—
—
3.0
7.0
8.24
—
0.812
0.7
—
—
10
100
4.0
—
12
10
1.5
—
Vdc
mV/°C
µAdc
Vdc
mV/°C
Vdc
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
MTB4N80E1
8
TJ = 25°C
7
6
5
4
3
, DRAIN CURRENT (AMPS)
2
D
I
1
0
048121620
2 6 10 14 18
VDS, DRAIN–TO–SOURCE VOL TAGE (VOL TS)
VGS = 10 V
6 V
5 V
4 V
Figure 1. On–Region Characteristics
4.6
VGS = 10 V
3.8
3.0
2.2
TJ = 100°C
25°C
8
VDS ≥ 10 V
7
6
5
4
3
, DRAIN CURRENT (AMPS)
2
D
I
1
0
2.0 2.8 3.6 4.4 5.22.4 3.2 4.0 4.8
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
25°C
Figure 2. Transfer Characteristics
2.6
TJ = 25°C
2.5
2.4
2.3
2.2
2.1
VGS = 10 V
100°C
TJ = –55°C
5.6
1.4
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.6
DS(on)
R
13 7
24 86
–55°C
5
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and T emperature
2.2
VGS = 10 V
ID = 2 A
1.8
1.4
1.0
(NORMALIZED)
, DRAIN–TO–SOURCE RESIST ANCE
0.6
DS(on)
R
0.2
–50
–25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (°C)
2.0
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
1.9
1.8
DS(on)
R
13 7524 86
15 V
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
10000
VGS = 0 V
1000
100
, LEAKAGE (nA)
DSS
I
10
1
100 300 600500
0 200 400
VDS, DRAIN–TO–SOURCE VOL TAGE (VOL TS)
TJ = 125°C
100°C
25°C
800700
Figure 5. On–Resistance Variation with
Temperature
Motorola TMOS Power MOSFET Transistor Device Data
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
3
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