SEMICONDUCTOR TECHNICAL DATA
Order this document
by MTB3N60E/D
Motorola Preferred Device
D2PAK for Surface Mount
N–Channel Enhancement–Mode Silicon Gate
TMOS POWER FET
3.0 AMPERES
600 VOL TS
This advanced high voltage TMOS E–FET is designed to
withstand high energy in the avalanche mode and switch efficiently .
R
DS(on)
= 2.2 OHMS
This new high energy device also offers a drain–to–source diode
with fast recovery time. Designed for high voltage, high speed
switching applications such as power supplies, PWM motor
controls and other inductive loads, the avalanche energy capability
is specified to eliminate the guesswork in designs where inductive
loads are switched and offer additional safety margin against
unexpected voltage transients.
• Avalanche Energy Capability Specified at Elevated
D
Temperature
• Low Stored Gate Charge for Efficient Switching
• Internal Source–to–Drain Diode Designed to Replace External
Zener Transient Suppressor — Absorbs High Energy in the
G
Avalanche Mode
• Source–to–Drain Diode Recovery Time Comparable to Discrete
Fast Recovery Diode
MAXIMUM RATINGS
Drain–Source Voltage V
Drain–Gate Voltage (RGS = 1.0 MΩ) V
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–repetitive
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Pulsed
Total Power Dissipation @ TC = 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C
Operating and Storage Temperature Range TJ, T
UNCLAMPED DRAIN–TO–SOURCE AVALANCHE CHARACTERISTICS (T
Single Pulse Drain–to–Source Avalanche Energy — TJ = 25°C
Single Pulse Drain–to–Source Avalanche Energy — TJ = 100°C
Repetitive Pulse Drain–to–Source Avalanche Energy
(TC = 25°C unless otherwise noted)
Rating
(1)
< 150°C)
J
S
Symbol Value Unit
DSS
DGR
V
GS
V
GSM
I
D
I
D
I
DM
P
D
W
DSR
W
DSR
CASE 418B–03, Style 2
stg
(2)
(3)
–55 to 150 °C
D2PAK
600 Vdc
600 Vdc
±20
±40
3.0
2.4
14
75
0.6
2.5
290
46
7.5
THERMAL CHARACTERISTICS
Thermal Resistance — Junction to Case°
Thermal Resistance — Junction to Ambient°
Thermal Resistance — Junction to Ambient
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
(1) When surface mounted to an FR–4 board using the minimum recommended pad size
(2) VDD = 50 V, ID = 3.0 A
(3) Pulse Width and frequency is limited by TJ(max) and thermal response
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Preferred devices are Motorola recommended choices for future use and best overall value.
(1)
R
R
R
θJC
θJA
θJA
L
1.67
62.5
50
260 °C
Vdc
Vpk
Adc
Watts
W/°C
Watts
mJ
°C/W
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
1
MTB3N60E
)
f = 1.0 MHz)
R
100 Ω, R
12 Ω
GS(on)
)
)
V
GS
V)
ELECTRICAL CHARACTERISTICS
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0, ID = 250 µAdc)
Zero Gate Voltage Drain Current
(VDS = 600 V, VGS = 0)
(VDS = 480 V, VGS = 0, TJ = 125°C)
Gate–Body Leakage Current — Forward (V
Gate–Body Leakage Current — Reverse (V
ON CHARACTERISTICS*
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
(TJ = 125°C)
Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 1.5 A) R
Drain–to–Source On–Voltage (VGS = 10 Vdc)
(ID = 3.0 A)
(ID = 1.5 A, TJ = 100°C)
Forward Transconductance (VDS = 15 Vdc, ID = 1.5 A) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS*
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
Forward Turn–On Time
Reverse Recovery Time t
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
*Pulse T est: Pulse Width = 300 µ s, Duty Cycle ≤ 2.0%.
**Limited by circuit inductance.
(T
= 25°C unless otherwise noted)
J
Characteristic
GSF
GSR
(IS = 3.0 A, di/dt = 100 A/µs)
= 20 Vdc, VDS = 0) I
= 20 Vdc, VDS = 0) I
(VDS = 25 V, VGS = 0,
f = 1.0 MHz
(VDD = 300 V, ID ≈ 3.0 A,
=
L
V
GS(on)
(VDS = 420 V, ID = 3.0 A,
V
G
= 10 V)
= 10 V
= 10
=
,
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSSF
GSSR
V
GS(th)
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
V
SD
t
on
rr
L
d
L
s
600 — — Vdc
—
—
— — 100 nAdc
— — 100 nAdc
2.0
1.5
— 2.1 2.2 Ohms
—
—
1.5 — — mhos
— 770 — pF
— 105 —
— 19 —
— 23 — ns
— 34 —
— 58 —
— 35 —
— 28 31 nC
— 5.0 —
— 17 —
— — 1.4 Vdc
— ** —
— 400 —
—
—
— 7.5 —
—
—
—
—
—
—
3.5
4.5
10
100
4.0
3.5
9.0
7.5
—
—
µAdc
Vdc
Vdc
ns
nH
2
Motorola TMOS Power MOSFET Transistor Device Data
–T–
SEATING
PLANE
–B–
G
4
231
S
D
3 PL
0.13 (0.005) T
M
PACKAGE DIMENSIONS
C
E
V
A
K
J
H
M
B
CASE 418B–03
ISSUE C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
MILLIMETERSINCHES
DIM MIN MAX MIN MAX
A 0.340 0.380 8.64 9.65
B 0.380 0.405 9.65 10.29
C 0.160 0.190 4.06 4.83
D 0.020 0.035 0.51 0.89
E 0.045 0.055 1.14 1.40
G 0.100 BSC 2.54 BSC
H 0.080 0.110 2.03 2.79
J 0.018 0.025 0.46 0.64
K 0.090 0.110 2.29 2.79
S 0.575 0.625 14.60 15.88
V 0.045 0.055 1.14 1.40
STYLE 2:
MTB3N60E
Motorola TMOS Power MOSFET Transistor Device Data
3
MTB3N60E
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
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Motorola TMOS Power MOSFET Transistor Device Data
Mfax is a trademark of Motorola, Inc.
MTB3N60E/D
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