Motorola MTB3N100E Datasheet
1
Motorola TMOS Power MOSFET Transistor Device Data
$ #
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N–Channel Enhancement–Mode Silicon Gate
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
in applications that require the use of surface mount components
with higher power and lower R
DS(on)
capabilities. This high voltage
MOSFET uses a n advanced t ermination scheme to p rovide
enhanced voltage–blocking capability without degrading performance over time. In addition, this advanced TMOS E–FET is
designed to withstand high energy in the avalanche and commutation m odes. T he n ew energy efficient design also o ffers a
drain–to–source diode with a fast recovery time. Designed for high
voltage, high speed switching applications in power supplies,
converters and PWM motor controls, these devices are particularly
well suited for bridge circuits where diode speed and commutating
safe operating areas are critical and offer additional safety margin
against unexpected voltage transients.
• Robust High Voltage Termination
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable to a
Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
DS(on)
Specified at Elevated Temperature
• Short Heatsink Tab Manufactured — Not Sheared
• Specially Designed Leadframe for Maximum Power Dissipation
• Available in 24 mm 13–inch/800 Unit Tape & Reel, Add T4 Suffix to Part Number
MAXIMUM RATINGS
(TC = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain–Source Voltage V
DSS
1000 Vdc
Drain–Gate Voltage (RGS = 1.0 MΩ) V
DGR
1000 Vdc
Gate–Source Voltage — Continuous
Gate–Source Voltage — Non–Repetitive (tp ≤ 10 ms)
V
GS
V
GSM
± 20
± 40
Vdc
Vpk
Drain Current — Continuous
Drain Current — Continuous @ 100°C
Drain Current — Single Pulse (tp ≤ 10 µs)
I
D
I
D
I
DM
3.0
2.4
9.0
Adc
Apk
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C, when mounted with the minimum recommended pad size
P
D
125
1.0
2.5
Watts
W/°C
Watts
Operating and Storage Temperature Range TJ, T
stg
– 55 to 150 °C
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, IL = 7.0 Apk, L = 10 mH, RG = 25 Ω)
E
AS
245 mJ
Thermal Resistance — Junction to Case
Thermal Resistance — Junction to Ambient
Thermal Resistance — Junction to Ambient, when mounted with the minimum recommended pad size
R
θJC
R
θJA
R
θJA
1.0
62.5
50
°C/W
Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds T
L
260 °C
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
E–FET and Designer’s are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.
Order this document
by MTB3N100E/D
SEMICONDUCTOR TECHNICAL DATA
TMOS POWER FET
3.0 AMPERES
1000 VOLTS
R
DS(on)
= 4.0 OHM
Motorola Preferred Device
CASE 418B–02, Style 2
D2PAK
D
S
G
Motorola, Inc. 1995
REV 2
MTB3N100E
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Temperature Coefficient (Positive)
V
(BR)DSS
1000
—
—
1.23
—
—
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 1000 Vdc, VGS = 0 Vdc)
(VDS = 1000 Vdc, VGS = 0 Vdc, TJ = 125°C)
I
DSS
—
—
—
—
10
100
µAdc
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0) I
GSS
— — 100 nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Temperature Coefficient (Negative)
V
GS(th)
2.0
—
3.0
6.0
4.0
—
Vdc
mV/°C
Static Drain–Source On–Resistance (VGS = 10 Vdc, ID = 1.5 Adc) R
DS(on)
— 2.96 4.0 Ohm
Drain–Source On–Voltage (VGS = 10 Vdc)
(ID = 3.0 Adc)
(ID = 1.5 Adc, TJ = 125°C)
V
DS(on)
—
—
4.97
—
14.4
12.6
Vdc
Forward Transconductance (VDS = 15 Vdc, ID = 1.5 Adc) g
FS
2.0 3.56 — mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
— 1316 1800 pF
Output Capacitance
(VDS = 25 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
C
oss
— 117 260
Reverse Transfer Capacitance
f = 1.0 MHz)
C
rss
— 26 75
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
t
d(on)
— 13 25 ns
Rise Time
t
r
— 19 40
Turn–Off Delay Time
VGS = 10 Vdc,
RG = 9.1 Ω)
t
d(off)
— 42 90
Fall Time
G
= 9.1 Ω)
t
f
— 33 55
Q
T
— 32.5 45 nC
(See Figure 8)
DS
= 400 Vdc, ID = 3.0 Adc,
Q
1
— 6.0 —
(VDS = 400 Vdc, ID = 3.0 Adc,
VGS = 10 Vdc)
Q
2
— 14.6 —
Q
3
— 13.5 —
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (1)
(IS = 3.0 Adc, VGS = 0 Vdc)
(IS = 3.0 Adc, VGS = 0 Vdc, TJ = 125°C)
V
SD
—
—
0.794
0.63
1.1
—
Vdc
t
rr
— 615 —
(See Figure 14)
S
= 3.0 Adc, VGS = 0 Vdc,
t
a
— 104 —
(IS = 3.0 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/µs)
t
b
— 511 —
Reverse Recovery Stored Charge Q
RR
— 2.92 — µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from the drain lead 0.25″ from package to center of die)
L
D
— 4.5 — nH
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
L
S
— 7.5 — nH
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
Gate Charge
Reverse Recovery Time
(VDD = 400 Vdc, ID = 3.0 Adc,
(V
(I
ns
MTB3N100E
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE
(NORMALIZED)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
R
DS(on)
, DRAIN–TO–SOURCE RESISTANCE (OHMS)
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 1. On–Region Characteristics
I
D
, DRAIN CURRENT (AMPS)
VGS, GATE–TO–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and Temperature
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. On–Resistance Variation with
Temperature
VDS, DRAIN–TO–SOURCE VOLTAGE (VOLTS)
Figure 6. Drain–To–Source Leakage
Current versus Voltage
I
DSS
, LEAKAGE (nA)
TJ = 25°C
0 4 8 12 16 202 6 10 14 18
3
5 V
6 V
VDS ≥ 10 V
2.0 2.8 3.6 4.4 5.22.4 3.2 4.0 4.8
TJ = –55°C
25°C
100°C
TJ = 25°C
VGS = 10 V
15 V
2.8
3.4
VGS = 0 V
0 200 400
1
100
100000
100 300 600500
25°C
100°C
TJ = 125°C
1.0 3.0 5.5
1
3
5
6
4
2
4.5
25°C
–55°C
VGS = 10 V
–50
0.4
0.8
1.2
2.0
2.4
–25 0 25 50 75 100 125 150
VGS = 10 V
ID = 1.5 A
4 V
5
1
1000
3.2
3.6
3.8
3.0
1.6
6
2
4
I
D
, DRAIN CURRENT (AMPS)
5.6
2.0 4.0 6.05.0
10
1000800
0
1.0 3.0 5.02.0 4.0 6.05.5
3
5
1
6
2
4
0
6.0
2.51.5 3.5 1.5 2.5 3.5 4.5
700
900
10000
VGS = 10 V
TJ = 100°C
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