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SEMICONDUCTOR TECHNICAL DATA
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N–Channel Enhancement–Mode Silicon Gate
The D2PAK package has the capability of housing a larger die
than any existing surface mount package which allows it to be used
in applications that require the use of surface mount components
with higher power and lower R
high–cell density HDTMOS power FET is designed to withstand
high energy in the avalanche and commutation modes. This new
energy efficient design also offers a drain–to–source diode with fast
recovery time. Designed for low voltage, high speed switching
applications in power supplies, converters and PWM motor
controls, these devices are particularly well suited for bridge circuits
where diode speed and commutating safe operating areas are
critical and offer additional safety margin against unexpected
voltage transients.
• Avalanche Energy Specified
• Source–to–Drain Diode Recovery Time Comparable
to a Discrete Fast Recovery Diode
• Diode is Characterized for Use in Bridge Circuits
• I
DSS
and V
Specified at Elevated Temperature
DS(on)
• Short Heatsink Tab Manufactured — Not Sheared
• Specially Designed Leadframe for Maximum Power Dissipation
• Surface Mount Package Available in 16 mm, 13–inch/2500
Unit Tape & Reel, Add T4 Suffix to Part Number
capabilities. This advanced
DS(on)
TMOS POWER FET
75 AMPERES
30 VOLTS
R
= 0.0065 OHM
DS(on)
CASE 418B–03
D2PAK
MAXIMUM RATINGS
Drain–to–Source Voltage V
Drain–to–Gate Voltage (RGS = 1.0 MΩ) V
Gate–to–Source Voltage — Continuous
Drain Current — Continuous
Total Power Dissipation
Derate above 25°C
Total Power Dissipation @ TA = 25°C
Operating and Storage Temperature Range TJ, T
Single Pulse Drain–to–Source Avalanche Energy — Starting TJ = 25°C
(VDD = 25 Vdc, VGS = 10 Vdc, Peak IL = 75 Apk, L = 0.1 mH, RG = 25 Ω)
Thermal Resistance — Junction–to–Case
Maximum Lead Temperature for Soldering Purposes, 1/8″ from Case for 5.0 seconds T
(1) When surface mounted to an FR4 board using the minimum recommended pad size.
This document contains information on a new product. Specifications and information herein are subject to change without notice.
E–FET and HDTMOS are trademarks of Motorola, Inc.
(TC = 25°C unless otherwise noted)
Rating Symbol Value Unit
— Non–Repetitive (tp ≤ 10 ms)
— Continuous @ 100°C
— Single Pulse (tp ≤ 10 µs)
(1)
— Junction–to–Ambient
— Junction–to–Ambient
(1)
V
V
I
E
R
R
R
DSS
DGR
GS
GSM
I
D
I
D
DM
P
D
stg
AS
θJC
θJA
θJA
L
30 Vdc
30 Vdc
±20
±20
75
59
225
150
1.2
2.5
–55 to 150 °C
280
0.8
62.5
50
260 °C
Vdc
Vpk
Adc
Apk
Watts
W/°C
Watts
mJ
°C/W
Motorola TMOS Power MOSFET Transistor Device Data
Motorola, Inc. 1997
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MTB1306
ELECTRICAL CHARACTERISTICS
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Zero Gate Voltage Drain Current
(VDS = 30 Vdc, VGS = 0 Vdc)
(VDS = 30 Vdc, VGS = 0 Vdc, TJ = 125°C)
Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc) I
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
Static Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 38 Adc)
(VGS = 5.0 Vdc, ID = 38 Adc)
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 75 Adc)
(VGS = 10 Vdc, ID = 38 Adc, TJ = 150°C)
Forward Transconductance (VDS = 3.0 Vdc, ID = 20 Adc) g
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
Reverse Recovery Time
Reverse Recovery Stored Charge Q
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(1)
(T
= 25°C unless otherwise noted)
J
Characteristic
(VDS = 25 Vdc, VGS = 0 Vdc,
(2)
(IS = 20 Adc, VGS = 0 Vdc, TJ = 125°C)
f = 1.0 MHz
(VDD = 15 Vdc, ID = 75 Adc,
(VDS = 24 Vdc, ID = 75 Adc,
(IS = 20 Adc, VGS = 0 Vdc)
(IS = 20 Adc, VGS = 0 Vdc,
= 5.0 Vdc,
GS
RG = 4.7 Ω)
VGS = 5.0 Vdc)
dIS/dt = 100 A/µs)
Symbol Min Typ Max Unit
V
(BR)DSS
I
DSS
GSS
V
GS(th)
R
DS(on)
V
DS(on)
FS
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
Q
T
Q
1
Q
2
Q
3
V
SD
t
rr
t
a
t
b
RR
30 — —
—
—
— — 100 nAdc
1.0 1.5 2.0
—
—
—
—
15 55 — mhos
— 2560 3584 pF
— 1305 1827
— 386 772
— 17 35 ns
— 170 340
— 68 136
— 145 290
— 50 70 nC
— 8.3 —
— 25.3 —
— 17.2 —
—
—
— 84 —
— 35 —
— 53 —
— 0.13 — µC
—
—
5.8
7.4
0.44
—
0.75
0.64
10
100
6.5
8.5
0.5
0.38
1.1
—
Vdc
µAdc
Vdc
m
W
Vdc
Vdc
ns
2
Motorola TMOS Power MOSFET Transistor Device Data
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TYPICAL ELECTRICAL CHARACTERISTICS
MTB1306
150
125
TJ = 25°C
100
75
50
, DRAIN CURRENT (AMPS)
D
I
25
0
0 0.25 0.75 1.25 1.5 2.0
VGS = 10 V
0.5 1.0 1.75
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
5.0 V
4.0 V
Figure 1. On–Region Characteristics
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0.001
0
DS(on)
R
20 40 80
TJ = 100°C
25°C
–55°C
60 100 140 60 80 100
ID, DRAIN CURRENT (AMPS)
VGS ≥ 10 V
120
180
VDS ≥ 10 V
160
140
120
100
80
60
, DRAIN CURRENT (AMPS)
D
40
I
20
0
2.0 2.5 3.0 3.5 4.0 4.5
25°C
125°C
TJ = –55°C
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.009
TJ = 25°C
0.008
0.007
0.006
0.005
, DRAIN–TO–SOURCE ON–RESISTANCE (OHMS)
0.004
20 40 90
DS(on)
R
30 50 70 150120 140130110
VGS = 5.0 V
10 V
ID, DRAIN CURRENT (AMPS)
Figure 3. On–Resistance versus Drain Current
and T emperature
2.0
VGS = 10 V
ID = 38 A
1.5
1.0
(NORMALIZED)
0.5
, DRAIN–TO–SOURCE RESIST ANCE
DS(on)
R
0
–50
–25 0 25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (
Figure 5. On–Resistance Variation with
Temperature
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
10,000
1000
, LEAKAGE (nA)
100
DSS
I
10
5.0
°
C)
10 15 20 25 30
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
TJ = 125°C
100°C
Figure 6. Drain–T o–Source Leakage
Current versus Voltage
Motorola TMOS Power MOSFET Transistor Device Data
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