Motorola MMDF5N02ZR2 Datasheet
1
Motorola TMOS Power MOSFET Transistor Device Data
Medium Power Surface Mount Products
!
EZFETs are an advanced series of power MOSFETs which
utilize Motorola’s High Cell Density HDTMOS process and contain
monolithic back–to–back zener diodes. These zener diodes
provide protection against ESD and unexpected transients. These
miniature surface mount MOSFETs feature low R
DS(on)
and true
logic level performance. They are capable of withstanding high
energy in the avalanche and commutation modes and the
drain–to–source diode has a very low reverse recovery time.
EZFET devices are designed for use in low voltage, high speed
switching applications where power efficiency is important.
• Zener Protected Gates Provide Electrostatic Discharge Protection
• Low R
DS(on)
Provides Higher Efficiency and Extends Battery Life
• Logic Level Gate Drive — Can Be Driven by Logic ICs
• Miniature SO–8 Surface Mount Package — Saves Board Space
• Diode Exhibits High Speed, With Soft Recovery
• I
DSS
Specified at Elevated Temperature
• Mounting Information for SO–8 Package Provided
MAXIMUM RATINGS
(TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain–to–Source Voltage V
DSS
20 Vdc
Drain–to–Gate Voltage (RGS = 1.0 MΩ) V
DGR
20 Vdc
Gate–to–Source Voltage — Continuous V
GS
± 12 Vdc
Drain Current — Continuous @ TA = 25°C
Drain Current — Continuous @ TA = 70°C
Drain Current — Single Pulse (tp ≤ 10 µs)
I
D
I
D
I
DM
5.0
4.5
40
Adc
Apk
Total Power Dissipation @ TA = 25°C (1) P
D
2.0 Watts
Operating and Storage Temperature Range TJ, T
stg
– 55 to 150 °C
Thermal Resistance — Junction to Ambient R
θJA
62.5 °C/W
Maximum T emperature for Soldering T
L
260 °C
(1) When mounted on 1 inch square FR–4 or G–10 board (VGS = 4.5 V , @ 10 Seconds)
DEVICE MARKING ORDERING INFORMATION
Device Reel Size Tape Width Quantity
D5N02Z
MMDF5N02ZR2 13″ 12 mm embossed tape 2500 units
Designer’s Data for “Worst Case” Conditions— The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
Preferred devices are Motorola recommended choices for future use and best overall value.
Designer’s, HDTMOS and EZFET are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc. Thermal Clad is a trademark of the Bergquist Company.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MMDF5N02Z/D
Motorola, Inc. 1997
DUAL TMOS
POWER MOSFET
5.0 AMPERES
20 VOLTS
R
DS(on)
= 0.040 OHM
CASE 751–05, Style 11
SO–8
Motorola Preferred Device
Source1
Gate1
Source2
Gate2
1
2
3
4
8
7
6
5
Top View
Drain1
Drain1
Drain2
Drain2
D
S
G
REV 1
MMDF5N02Z
2
Motorola TMOS Power MOSFET Transistor Device Data
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage (Cpk ≥ 2.0) (3)
(VGS = 0 Vdc, ID = 0.25 mAdc)
T emperature Coef ficient (Positive)
V
(BR)DSS
20
—
—
15
—
—
Vdc
mV/°C
Zero Gate Voltage Drain Current
(VDS = 12 Vdc, VGS = 0 Vdc)
(VDS = 20 Vdc, VGS = 0 Vdc)
(VDS = 20 Vdc, VGS = 0 Vdc, TJ = 125°C)
I
DSS
—
—
—
—
—
—
0.5
15
150
µAdc
Gate–Body Leakage Current (VGS = ± 12 Vdc, VDS = 0 Vdc) I
GSS
— — 1.5 µAdc
ON CHARACTERISTICS
(1)
Gate Threshold Voltage (Cpk ≥ 2.0) (3)
(VDS = VGS, ID = 0.25 mAdc)
Threshold Temperature Coefficient (Negative)
V
GS(th)
0.5
—
0.78
3.0
1.1
—
Vdc
mV/°C
Static Drain–to–Source On–Resistance (Cpk ≥ 2.0) (3)
(VGS = 4.5 Vdc, ID = 5.0 Adc)
(VGS = 2.7 Vdc, ID = 2.5 Adc)
R
DS(on)
—
—
34
44
40
50
mΩ
Forward Transconductance (VDS = 9.0 Vdc, ID = 2.0 Adc) g
FS
3.0 5.6 — Mhos
DYNAMIC CHARACTERISTICS
Input Capacitance
C
iss
— 450 630 pF
Output Capacitance
(VDS = 10 Vdc, VGS = 0 Vdc,
f = 1.0 MHz
)
C
oss
— 330 460
Transfer Capacitance
f = 1.0 MHz)
C
rss
— 160 225
SWITCHING CHARACTERISTICS
(2)
Turn–On Delay Time
t
d(on)
— 29 37 ns
Rise Time
(VDD = 6.0 Vdc, ID = 5.0 Adc,
t
r
— 182 258
Turn–Off Delay Time
(
DD
,
D
,
VGS = 4.5 Vdc, RG = 6 Ω)
t
d(off)
— 190 238
Fall Time t
f
— 225 274
Gate Charge
Q
T
— 10.7 12 nC
(VDS = 10 Vdc, ID = 5.0 Adc,
Q
1
— 1.1 —
(
DS
,
D
,
VGS = 4.5 Vdc)
Q
2
— 5.4 —
Q
3
— 3.5 —
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage
(IS = 5.0 Adc, VGS = 0 Vdc)
(IS = 5.0 Adc, VGS = 0 Vdc, TJ = 125°C)
V
SD
—
—
0.78
0.65
1.0
—
Vdc
Reverse Recovery Time
t
rr
— 195 —
ns
(IS = 5.0 Adc, VGS = 0 Vdc,
dI
/dt = 100 A/µs
)
t
a
— 72 —
dIS/dt = 100 A/µs)
t
b
— 123 —
Reverse Recovery Storage Charge Q
RR
— 0.5 — µC
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
(3) Reflects typical values.
Cpk =
Max limit – Typ
3 x SIGMA
MMDF5N02Z
3
Motorola TMOS Power MOSFET Transistor Device Data
TYPICAL ELECTRICAL CHARACTERISTICS
I
DSS
, LEAKAGE (nA)
R
DS(on)
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
R
DS(on)
, DRAIN–TO–SOURCE RESIST ANCE (OHMS)
0
0 0.4 1.6 2
0
2
6
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
Figure 1. On–Region Characteristics
I
D
, DRAIN CURRENT (AMPS)
I
D
, DRAIN CURRENT (AMPS)
VGS, GATE–T O–SOURCE VOLTAGE (VOLTS)
Figure 2. Transfer Characteristics
0.07
0.01
0
Figure 3. On–Resistance versus
Gate–to–Source Voltage
ID, DRAIN CURRENT (AMPS)
Figure 4. On–Resistance versus Drain Current
and Gate Voltage
1
100
Figure 5. On–Resistance Variation
with Temperature
VDS, DRAIN–TO–SOURCE VOL TAGE (VOLTS)
Figure 6. Drain–to–Source Leakage Current
versus Voltage
VDS ≥ 10 V
TJ = –55°C
25°C
100°C
0.06
8
4
0.02
TJ = 25°C
4
8
1
2
1 1.5 2 2.5
0.04
024 81
10
0 2.5 5 7.5 15
2.7 V
10 12.5
0
0.02
0.04
6
34 86
5
V
GS
, GATE–T O–SOURCE VOLT AGE (VOLTS)
6
4.5 V
VGS = 2.7 V
TJ = 25°C
R
DS(on)
, DRAIN–TO–SOURCE RESIST ANCE (NORMALIZED)
TJ, JUNCTION TEMPERATURE (°C)
–50 0 50 100 150
0
0.4
0.8
1.2
1.6
VGS = 4.5 V
ID = 2.5 A
1257525–25
VGS = 0 V
TJ = 125°C
100°C
1.2
10
2.0 V
1.7 V
1.8 V
4.5 V
VGS = 12 V
ID = 5 A
TJ = 25
°
C
1.9 V
0.50
2
0.01
0.03
0.05
1000
0.8
2.3 V
1.6 V
1.5 V
5
3
7
TJ = 25°C
0.03
0.05
7
357
0.06
0.07
0.08
0.2
0.6
1
1.4
0.1
10000
25°C
17.5 20
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