Motorola MCM32257BZ15, MCM32257BZ20, MCM32257BZ25 Datasheet

MCM32257B

6–1

MOTOROLA FAST SRAM

256K x 32 Bit
Fast Static RAM Module

The MCM32257B is an 8M bit static random access memory module orga­nized as 262,144 words of 32 bits. The module is a 64–lead zig–zag in–line pack­age (ZIP) of eight MCM6229 fast static RAMs packaged in 28–lead SOJ
packages and mounted on a printed circuit board along with eight decoupling ca­pacitors.

The MCM6229 is a high–performance CMOS fast static RAM organized as
262,144 words of 4 bits, fabricated using high–performance silicon–gate CMOS
technology. Static design eliminates the need for external clocks or timing
strobes, while CMOS circuitry reduces power consumption and provides for
greater reliability.

The MCM32257B is equipped with output enable (G

) and four separate byte

enable (E1

– E4) inputs, allowing for greater system flexibility . The G input, when

high, will force the outputs to high impedance. Ex

high will do the same for byte x.

PD0 and PD1 are reserved for density identification. PD0 and PD1 are con­nected to ground. These pins can be used to identify the density of the memory
module.

• Single 5 V ± 10% Power Supply

• Fast Access Time: 15/20/25 ns

• Three–State Outputs

• Fully TTL Compatible

• JEDEC Standard Pinout

• Power Requirement: 960/880/840 mA Maximum, Active AC

• High Board Density ZIP Package

• Byte Operation: Four Separate Chip Enables, One for Each Byte (Eight Bits)

• High Quality Four–Layer FR4 PWB with Separate Internal Power and

Ground Planes

• Incorporates Motorola’s State–of–the–Art Fast Static RAMs

A0 – A17 Address Inputs. . . . . . . . . . . . . . . . . . . . . . . . . . .

W

Write Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

G

Output Enable. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

E1

– E4 Byte Enables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DQ0 – DQ31 Data Input/Output. . . . . . . . . . . . . . . . . . . . . .

V

CC

+ 5 V Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . .

V

SS

Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

PD0 – PD1 Package Density. . . . . . . . . . . . . . . . . . . . . . . .

For proper operation of the device, VSS must be connected
to ground.

PIN NAMES

Order this document

by MCM32257B/D

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

MCM32257B

PD0 2

A15 52

DQ1
DQ2
DQ3
V

CC

A1
A3

A5
DQ4
DQ5
DQ6
DQ7

W

A7

E1

V

SS

PD1
DQ8
DQ9
DQ10

A0
A2
A4
DQ12
DQ13
DQ14
DQ15
V

SS

A6
E2

DQ11

E4
A8

DQ24

A10
A12
A14

G

DQ25

DQ27

E3

A9
V

SS

DQ16
DQ17
DQ18
DQ19

A11
A13

43 DQ26

19
21
23
25
27
29

1
3
5
7

9
11
13
15
17

20
22
24
26
28

30
32

4
6
8
10
12
14
16
18

45
47
49
51

31

33
35

37
39
41

46
48
50

34
36
38
40
42
44

A16
DQ20
DQ21
DQ22
DQ23

V

SS

62
64

54
56
58
60

61
63

53
55
57
59

V

CC

DQ28

A17

DQ29

DQ31

DQ30

PIN ASSIGNMENT

TOP VIEW

64 LEAD ZIP — CASE 871–01

DQ0

5/95

 Motorola, Inc. 1995

MCM32257B
6–2

MOTOROLA FAST SRAM

FUNCTIONAL BLOCK DIAGRAM

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3
A0 – A17

E
W
G

DQ0 – DQ3

E1

DQ4 – DQ7

DQ8 – DQ11

DQ12 – DQ15

E2

DQ16 – DQ19

E3

DQ20 – DQ23

DQ24 – DQ27

DQ28 – DQ31

E4

4

4

4

4

4

4

4

4

W

G

V

CC

V

SS

A0 – A17

PD0 – PD1

256K x 32 MEMORY MODULE

MCM32257B

6–3

MOTOROLA FAST SRAM

TRUTH TABLE

Ex G W Mode VCC Current Output Cycle

H X X Not Selected I

SB1

or I

SB2

High–Z —

L H H Read I

CCA

High–Z —

L L H Read I

CCA

D

out

Read Cycle

L X L Write I

CCA

D

in

Write Cycle

ABSOLUTE MAXIMUM RATINGS (Voltages referenced to V

SS

= 0 V)

Rating

Symbol Value Unit

Power Supply Voltage V

CC

– 0.5 to 7.0 V

Voltage Relative to V

SS

Vin, V

out

– 0.5 to VCC + 0.5 V

Output Current (per I/O) I

out

± 30 mA

Power Dissipation P

D

8.8 W

Temperature Under Bias T

bias

– 10 to + 85 °C

Operating Temperature T

A

0 to + 70 °C

Storage Temperatrue T

stg

– 25 to + 125 °C

NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are

exceeded. Functional operation should be restricted to RECOMMENDED
OPERATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.

DC OPERATING CONDITIONS AND CHARACTERISTICS

(VCC = 5.0 V ± 10%, TA = 0 to + 70°C, Unless Otherwise Noted)

RECOMMENDED OPERATING CONDITIONS

(Voltages referenced to VSS = 0 V)

Parameter

Symbol Min Max Unit

Supply Voltage (Operating Voltage Range) V

CC

4.5 5.5 V

Input High Voltage V

IH

2.2 VCC+0.3* V

Input Low Voltage V

IL

– 0.5** 0.8 V

*VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width ≤ 20 ns)

**VIL (min) = – 3.0 V ac (pulse width ≤ 20 ns)

DC CHARACTERISTICS

Parameter Symbol Min Max Unit

Input Leakage Current (All Inputs, Vin = 0 to VCC) I

lkg(I)

— ± 8 µA

Output Leakage Current (G, Ex = VIH, V

out

= 0 to VCC) I

lkg(O)

— ± 8 µA

AC Active Supply Current (G, Ex = VIL, I

out

= 0 mA, MCM32257B–15: t

AVAV

= 15 ns

Cycle time ≥ t

AVAV

min) MCM32257B–20: t

AVAV

= 20 ns

MCM32257B–25: t

AVAV

= 25 ns

I

CCA

—
—
—

960
880
840

mA

AC Standby Current (Ex = VIH, Cycle time ≥ t

AVAV

min) I

SB1

— 320 mA

CMOS Standby Current (Ex ≥ VCC – 0.2 V, All Inputs ≥ VCC – 0.2 V or ≤ 0.2 V) I

SB2

— 40 mA

Output Low Voltage (IOL = + 8.0 mA) V

OL

— 0.4 V

Output High Voltage (IOH = – 4.0 mA) V

OH

2.4 — V

NOTE: Good decoupling of the local power supply should always be used.

CAPACITANCE (f = 1.0 MHz, dV = 3.0 V, T

A

= 25°C, Periodically Sampled Rather Than 100% Tested)

Characteristic

Symbol Max Unit

Input Capacitance (All pins except DQ0 – DQ31 and E1 – E4)

(E1

– E4)

C

in

48
14

pF

Input/Output Capacitance (DQ0 – DQ31) C

out

9 pF

circuitry
to protect the inputs against damage due to
high static voltages or electric fields; however,
it is advised that normal precautions be taken
to avoid application of any voltage higher than
maximum rated voltages to these high imped­ance circuits.

These CMOS memory circuits have been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The module is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.

The devices on this module contain