MOTOROLA MC92307 Technical data
查询MC92307供应商
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
Current information @www.mot.com.sps/ADC
MC92307
2K - Samples FFT-Processor
The MC92307 is a pipelined Fast Fourier Transformation (FFT) processor with a
blocklength of 2048 complex samples. It is especially designed for use in digital terrestrial Set-Top boxes according to the DVB-T standard for 2K transmission. One
block of 2048 complex samples can be processed in 224 µs
Feature Summary
• Processing of one block of 2048 complex samples (i.e. one 2K-OFDM symbol) in
224 µs.
• Designed for direct interfacing with Motorola’s OFDM demodulator MC92308.
• Input wordlength 8 bit, output accuracy selectable between 10 and 12 bit.
• Overflow on certain OFDM subcarriers due to co-channel interferes is handled internally.
• Readout of output samples can be shifted by half the blocklength to start at the
middle of the output block.
• Either multiplexed or non-multiplexed input and output format (the multiplexed
mode allows direct interfacing with Motorola’s OFDM Demodulator MC92308).
• Internal Bit reversal can be disabled to allow the construction of FFT modules for
blocklengths > 2K by using several devices in parallel.
• Low clock rate inputs and outputs.
• 0.5µm CMOS process at 3.3 V.
• 5 V tolerant inputs and outputs.
RESB
CLK
NOMUX
OFFSET
RES[1:0]
FFTSTART
DIN[7:0]
DINR[7:0]
SYMSYNC
DOUT[11:0]
DOUTR[11:0]
Ordering Information
Device
MC92307CI
Package
160QFP
NOMUX
DIN
8
Input
8DINR
FFTSTART
Preliminary Information
RESB
CLK
FFTSTART
OFFSET
RES[1:0]
REVRSB
Buffer
16 24
Control
FFT (11 stages)
incl. Rounding
Twiddle Factor ROM
Output
Reorder
Buffer
12 DOUT
12 DOUTR
SYMSYNC
Figure 1. Block diagram of the FFT processor MC92307
This document contains information on a new product.
Specifications and information herein are subject to change without notice.
MOTOROLA, INC. 1997 8/12/97
External Interfaces
Fast Fourier Transform in the DVB-T System
Within the DVB consortium several standards for digital
television broadcast were submitted for the different
transmission media, leading to DVB-S (satellite), DVBC (cable) and DVB-T (terrestrial). The details of the
DVB-T system are described in reference [1]. To cope
with the special effects of digital terrestrial transmission
the OFDM modulation scheme was chosen: In principle
the whole available bandwidth is divided into a large
number N (e.g. 2048) of separate narrowband subchannels (the OFDM subcarriers). Data associated with
each subcarrier are transmitted independently from and
in parallel with the other subcarriers, leading to a very
low datarate on each subcarrier compared to the overall
transmission capacity.
The superposition of all the subcarriers in the transmitter is achieved very efficiently by an IFFT. Consequently
the corresponding functional block in the receiver is a
FFT. This IFFT -> FFT pair is one of the central elements in all OFDM systems, it represents the link between the so-called frequency domain and the time
domain used for the RF link between the transmitter and
the receiver. Therefore one of the important parameters
describing an OFDM system is the blocklength of the
IFFT/FFT, such a block is called an ‘OFDM symbol’.
In the DVB-T specification two modes are described,
the first with 2048 (2K) complex samples per OFDM
symbol, the second with 8192 (8K) samples per block.
The MC92307 device described here is designed especially for the use in systems working according in the
2K-mode described in reference [1].
External Interfaces
Control Interface
CLK
The overall OFDM transmission clock of app.
36.57 MHz must be provided at this pin. Obviously in
case of a DVB-T frontend composed of a MC92308 together with the MC92307 both devices have to be supplied with the same clock signal. Normally the
36.57 MHz are generated by a VCXO in the tuner which
in turn is controlled by the OFDM timing synchronization
circuitry.
RESB
Synchronous Reset: Normally H, a L together with a rising edge at CLK puts all outputs in tri-state and aborts
any processing, leaving the FFT device in the idle
mode.
Preliminary Information
OFFSET
After the completion of the FFT processing the frequency domain data are output by the reorder buffer, starting
together with a pulse of the SYMSYNC pin. The starting
position of the output can be selected with the OFFSET
pin. With OFFSET set to L the first frequency domain
sample of a block that is delivered at the output of the
FFT device belongs the baseband frequency corresponding to the DC component (i.e. the center frequency in the received time domain signal). The numbers of
the frequency bins increases continuously until bin
#2047 at the end of the block.
If OFFSET is set to H the first frequency domain sample
belongs to the baseband frequency bin #1024, corresponding to an offset of one half of the block (i.e. the DC
component in the received time domain signal). Again
the bin numbers increase up to bin #2047. Then a wraparound to bin #0 occurs.
Table 1. Function of OFFSET
Sample #
after
SYMSYNC
s
0
s
1
... ... ...
s
1022
sd
1023
s
1024
... ... ...
s
2046
s
2047
(Baseband)
Bin #
(OFFSET = L)
DOUT
0
DOUT
1
DOUT
1022
DOUT
1023
DOUT
1024
DOUT
2046
DOUT
2047
(Baseband)
Bin #
(OFFSET = H)
DOUT
1024
DOUT
1025
DOUT
2046
DOUT
2047
DOUT
0
DOUT
1022
DOUT
1023
Note that the bin numbers given in the table above correspond to the baseband positions.
NOMUX
The input interface (DIN and DINR) and the output interface (DOUT and DOUTR) can be used in two modes:
Normally the complex samples are provided in the
MULTIPLEXED mode, i.e. at first the real part of one
sample is transferred using the DIN or DOUT lines followed by the imaginary part of the same sample using
the same physical pins. The pins labelled DINR and
DOUTR pins are not used, DINR should be tied to a
fixed value and DOUTR should be left unconnected.
The multiplexed mode is selected by setting the NOMUX line at L level, note that it is the only mode the FFT
device MC92307 can be used together with the OFDM
device MC92308.
MOTOROLA MC92307_DS - 8/12/97
2
External Interfaces
If NOMUX is set to H the real and imaginary part of one
sample is transferred in parallel using the DINR and
DOUTR lines for the real part and the DIN and DOUT
lines for the imaginary part. Consequently the transfer
rate is divided by 2 compared to the muxed mode at the
cost of more interconnection lines. Therefore this mode
is intended mainly for use with external devices that operate on lower rates.
REVRSB
To achieve the output of the frequency domain data in
natural order an internal bit reversal is done in the output reorder buffer. This bit reversal can be switched off
e.g. to allow the combination of 4 MC92307 devices together with an external final radix-4 butterfly stage to do
an 8K-FFT.
RES[1:0]
These two lines support the selection of the wordlength
at the FFT output:
Table 2. Output resolution selection
RES[1:0] DOUT[11:0]
00 [0, 0, d9, d8, ... ,d0, ]
01 [0, d
10 [d
11 Don’t care
, d9, d8, ... ,d0, ]
10
, d10, d9, d8, ... ,d0, ]
11
OFDM Device -> FFT Device
The figures below illustrate the input of the time domain
data into the FFT device and the output of the calculated frequency domain data after the completion of the
FFT. The samples belonging to the real part are denoted by ...r (real), the imaginary samples are marked with
...q (quadrature). Figure 2 applies for the Multiplexed
mode, Figure 3 is valid for the Non-multiplexed mode.
CLK
DIN
FFTSTART
DOUT
SYMSYNC
X0r X0q X1r X1q Xir Xq X(i+1)r X(i+1)q
Z(N-i)r Z(N-i)q Z(N-i+1)rZ(N-i+1)q Z0r Z0q Z1r Z1q
... ...
... ...
Preliminary Information
Figure 2. FFT Data I/O for the Multiplexed Mode
MC92307_DS - 8/12/97 MOTOROLA
3
Loading...