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SEMICONDUCTOR TECHNICAL DATA
1
REV 0
Motorola, Inc. 1997
6/97
The MC74VHCU04 is an advanced high speed CMOS unbuffered inverter
fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The inputs tolerate voltages up to 7V , allowing the interface of 5V systems
to 3V systems.
• High Speed: tPD = 3.5ns (Typ) at VCC = 5V
• Low Power Dissipation: ICC = 2µA (Max) at TA = 25°C
• High Noise Immunity: V
NIH
= V
NIL
= 10% VCC (Min.)
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Designed for 2V to 5.5V Operating Range
• Low Noise: V
OLP
= 0.8V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300mA
• ESD Performance: HBM > 2000V; Machine Model > 200V
• Chip Complexity: 12 FETs or 3 Equivalent Gates
LOGIC DIAGRAM
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
Pinout: 14–Lead Packages (Top View)
1314 12 11 10 9 8
21 34567
VCCA6 Y6
A5 Y5 A4 Y4
A1 Y1 A2 Y2 A3 Y3 GND
L
H
FUNCTION TABLE
Inputs Outputs
A
H
L
Y
D SUFFIX
14–LEAD SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD TSSOP PACKAGE
CASE 948G–01
ORDERING INFORMATION
MC74VHCUXXD
MC74VHCUXXDT
MC74VHCUXXM
SOIC
TSSOP
SOIC EIAJ
M SUFFIX
14–LEAD SOIC EIAJ PACKAGE
CASE 965–01
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MC74VHCU04
MOTOROLA VHC Data – Advanced CMOS Logic
DL203 — Rev 0
2
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air, SOIC Packages†
TSSOP Package†
_
C
* Absolute maximum continuous ratings are those values beyond which damage to the device
may occur. Exposure to these conditions or conditions beyond those indicated may adversely
affect device reliability . Functional operation under absolute–maximum–rated conditions is not
implied.
†Derating — SOIC Packages: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
RECOMMENDED OPERATING CONDITIONS
DC ELECTRICAL CHARACTERISTICS
Minimum High–Level
Input Voltage
Maximum Low–Level
Input Voltage
Minimum High–Level
Output Voltage
Vin = GND
IOH = –4mA
IOH = –8mA
Maximum Low–Level
Output Voltage
Vin = V
CC
IOL = 4mA
IOL = 8mA
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.