Motorola MC74LCX16543ADT Datasheet

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SEMICONDUCTOR TECHNICAL DATA

1

REV 0

 Motorola, Inc. 1997

1/97

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The MC74LCX16543A is a high performance, non–inverting 16–bit
latching transceiver operating from a 2.7 to 3.6V supply. The device is
byte controlled. Each byte has separate control inputs which can be tied
together for full 16–bit operation. High impedance TTL compatible inputs
significantly reduce current loading to input drivers while TTL compatible
outputs offer improved switching noise performance. A VI specification of

5.5V allows MC74LCX16543A inputs to be safely driven from 5V devices.
The MC74LCX16543A is suitable for memory address driving and all TTL
level bus oriented transceiver applications.

For data flow from A to B with the EAB

LOW, the A–to–B Output

Enable (OEAB

) must be LOW in order to enable data to the B bus, as

indicated in the Function Table. With EAB

LOW, a LOW signal on the

A–to–B Latch Enable (LEAB

) input makes the A–to–B latches

transparent; a subsequent LOW–to–HIGH transition of the LEAB

signal
will latch the A latches, and the outputs no longer change with the A
inputs. With EAB

and OEAB both LOW, the 3–State B output buffers are
active and reflect the data present at the output of the A latches. Control
of data flow from B to A is symmetric to that above, but uses the EBA

,

LEBA

, and OEBA inputs.

• Designed for 2.7 to 3.6V V

CC

Operation

• 5.2ns Maximum t

pd

• 5V T olerant — Interface Capability With 5V TTL Logic

• Supports Live Insertion and Withdrawal

• I

OFF

Specification Guarantees High Impedance When VCC = 0V

• LVTTL Compatible

• LVCMOS Compatible

• 24mA Balanced Output Sink and Source Capability

• Near Zero Static Supply Current in All Three Logic States (20µA)

Substantially Reduces System Power Requirements

• Latchup Performance Exceeds 500mA

• ESD Performance: Human Body Model >2000V; Machine Model >200V

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DT SUFFIX

56–LEAD PLASTIC TSSOP PACKAGE

CASE 1202–01

LOW–VOLTAGE CMOS

16–BIT LATCHING

TRANSCEIVER

PIN NAMES

Function

Output Enable Inputs
Enable Inputs
Latch Enable Inputs
3–State Inputs/Outputs
3–State Inputs/Outputs

Pins

OExxn
Exxn
LExxn
A0–A15
B0–B15

MC74LCX16543A

MOTOROLA LCX DATA

BR1339 — REV 3

2

Pinout: 56-Lead TSSOP

(Top View)

561

OEBA1

OEAB1

552

LEBA1

LEAB1

543

EBA1

EAB1

534

GNDGND

525

B0

A0

516

B1A1

507

V

CC

V

CC

498

B2A2

489

B3A3

4710

B4A4

4611

GNDGND

4512

B5

A5

4413

B6A6

4314

B7A7

4215

B8A8

4116

B9A9

4017

B10A10

3918

GNDGND

3819

B11

A11

3720

B12A12

3621

B13A13

3522

V

CC

V

CC

3423

B14A14

3324

B15A15

3225

GNDGND

3126

EBA2

EAB2

3027

LEBA2

LEAB2

2928

OEBA2

OEAB2

LOGIC DIAGRAM

LEBA1

D

EBA1

OEBA1

A0

LE

Q

D

LE

Q

DETAIL A x 7

DETAIL A

B0

55

54

56 1

3

2

OEAB1
EAB1

LEAB1

5

52

LEBA2

D

EBA2

OEBA2

A8

LE

Q

D

LE

Q

DETAIL Bx 7

DETAIL B

B8

30

31

29 28

26

27

OEAB2
EAB2

LEAB2

15

42

MC74LCX16543A

LCX DATA
BR1339 — REV 3

3 MOTOROLA

FUNCTION TABLE

Inputs

Data Ports

OEABn OEBAn EABn EBAn LEABn LEBAn An Bn

O

perating Mode

H H Input Input

X X X X X X Disable Outputs
L L L L X X Transparent Data; Outputs Disabled

H H l

h

l

h

Latch and Outputs Disabled

L H Input Output

H X* L X l

h

Z
Z

Load and B Outputs Disabled

H X X Z Hold; B Outputs Disabled

L X* L X L

H

L
H

Transparent A to B

H X l

h

L
H

Latch and Display B Outputs

H L Output Input

X* H X L Z

Z

l

h

Load and A Outputs Disabled

X H Z X Hold; A Outputs DIsabled

X* L X L L

H

L
H

Transparent B to A

X H L

H

l

h

Latch and Display A Outputs

H = High Voltage Level; h = High Voltage Level One Setup T ime Prior to the Latch Enable or Enable Low–to–High Transition; L = Low Voltage Level;
l = Low Voltage Level One Setup Time Prior to the Latch Enable or Enable Low–to–High T ransition; X = Don’t Care; * = The latches are not internally
gated with the Output Enables. Therefore, data at the A or B ports may enter the latches at any time, provided that the LExx

and Exx pins are set

accordingly. For ICC reasons, Do Not Float Inputs.

ABSOLUTE MAXIMUM RATINGS*

Symbol Parameter Value Condition Unit

V

CC

DC Supply Voltage –0.5 to +7.0 V

V

I

DC Input Voltage –0.5 ≤ VI ≤ +7.0 V

V

O

DC Output Voltage –0.5 ≤ VO ≤ +7.0 Output in 3–State V

–0.5 ≤ VO ≤ VCC + 0.5 Note 1. V

I

IK

DC Input Diode Current –50 VI < GND mA

I

OK

DC Output Diode Current –50 VO < GND mA

+50 VO > V

CC

mA

I

O

DC Output Source/Sink Current ±50 mA

I

CC

DC Supply Current Per Supply Pin ±100 mA

I

GND

DC Ground Current Per Ground Pin ±100 mA

T

STG

Storage Temperature Range –65 to +150 °C

* Absolute maximum continuous ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions

beyond those indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied.

1. Output in HIGH or LOW State. IO absolute maximum rating must be observed.