SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
With LSTTL–Compatible Inputs
High–Performance Silicon–Gate CMOS
The MC74HCT04A may be used as a level converter for interfacing
TTL or NMOS outputs to High–Speed CMOS inputs.
The HCT04A is identical in pinout to the LS04.
• Output Drive Capability: 10 LSTTL Loads
• TTL/NMOS–Compatible Input Levels
• Outputs Directly Interface to CMOS, NMOS and TTL
• Operating Voltage Range: 4.5 to 5.5V
• Low Input Current: 1µA
• In Compliance With the JEDEC Standard No. 7A Requirements
• Chip Complexity: 48 FETs or 12 Equivalent Gates
LOGIC DIAGRAM
Y1A1
A2
A3
A4
A5
A6
Y2
Y3
Y4
Y5
Y6
1
3
5
9
11
13
2
4
6
8
10
12
Y = A
Pin 14 = V
CC
Pin 7 = GND
Pinout: 14–Lead Packages (Top View)
1314 12 11 10 9 8
21 3 4 5 6 7
V
CC
A6 Y6 A5 Y5 A4 Y4
A1 Y1 A2 Y2 A3 Y3 GND
L
H
FUNCTION TABLE
Inputs Outputs
A
H
L
Y
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC74HCTXXAN
MC74HCTXXAD
MC74HCTXXADT
Plastic
SOIC
TSSOP
1
14
1
14
1
14
DT SUFFIX
TSSOP PACKAGE
CASE 948G–01
MC74HCT04A
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air Plastic DIP†
SOIC Package†
TSSOP Package†
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Plastic DIP, SOIC or TSSOP Package
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature Range, All Package Types
Input Rise/Fall Time (Figure 1)
ns
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.