Motorola MC74HC73N, MC74HC73D Datasheet
SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
High–Performance Silicon–Gate CMOS
The MC74HC73 is identical in pinout to the LS73. The device inputs are
compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
Each flip flop is negative–edge clocked and has an active–low asynchronous reset.
The MC74HC73 is identical in function to the HC107, but has a different
pinout.
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1
µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 92 FETs or 23 Equivalent Gates
LOGIC DIAGRAM
PIN 4 = V
CC
PIN 11 = GND
RESET 2
K2
CLOCK 2
J2
RESET 1
K1
CLOCK 1
J1
Q2
Q2
Q1
Q1
14
1
3
2
7
5
10
6
12
13
9
8
FUNCTION TABLE
PIN ASSIGNMENT
Inputs Outputs
Reset Clock J K Q Q
L X X X L H
H L L No Change
H L H L H
H H L H L
H H H Toggle
H L X X No Change
H H X X No Change
H X X No Change
11
12
13
14
8
9
105
4
3
2
1
7
6
K2
GND
Q1
Q1
J1
Q2
Q2
V
CC
K1
RESET 1
CLOCK 1
J2
RESET 2
CLOCK 2
D SUFFIX
SOIC PACKAGE
CASE 751A–03
N SUFFIX
PLASTIC PACKAGE
CASE 646–06
ORDERING INFORMATION
MC74HCXXN
MC74HCXXD
Plastic
SOIC
1
14
1
14
MC74HC73
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
– 0.5 to + 7.0
V
V
in
DC Input Voltage (Referenced to GND)
– 1.5 to VCC + 1.5
V
V
out
DC Output Voltage (Referenced to GND)
– 0.5 to VCC + 0.5
V
I
in
DC Input Current, per Pin
± 20
mA
I
out
DC Output Current, per Pin
± 25
mA
I
CC
DC Supply Current, VCC and GND Pins
± 50
mA
P
D
Power Dissipation in Still Air Plastic DIP†
SOIC Package†
750
500
mW
T
stg
Storage Temperature
– 65 to + 150
_
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, V
out
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
– 55
+ 125
_
C
tr, t
f
Input Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
0
0
0
1000
500
400
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
CC
V
– 55 to
25_C
v
85_Cv 125_C
Unit
V
IH
Minimum High–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
2.0
4.5
6.0
1.5
3.15
4.2
1.5
3.15
4.2
1.5
3.15
4.2
V
V
IL
Maximum Low–Level Input
Voltage
V
out
= 0.1 V or VCC – 0.1 V
|I
out
| v 20 µA
2.0
4.5
6.0
0.3
0.9
1.2
0.3
0.9
1.2
0.3
0.9
1.2
V
Vin = VIH or V
IL
|I
out
| v 20 µA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
4.5
6.0
3.98
5.48
3.84
5.34
3.70
5.20
Vin = VIH or V
IL
|I
out
| v 20 µA
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
Vin = VIH or VIL|I
out
| v 4.0 mA
|I
out
| v 5.2 mA
4.5
6.0
0.26
0.26
0.33
0.33
0.40
0.40
I
in
Maximum Input Leakage Current
Vin = VCC or GND
6.0
± 0.1
± 1.0
± 1.0
µA
I
CC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
I
out
= 0 µA
6.0
4
40
80
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
V
OH
V
OL
Minimum High–Level Output
Voltage
Maximum Low–Level Output
Voltage
V
V
Loading...