Motorola MC74HC4316AN, MC74HC4316ADT, MC74HC4316AD Datasheet

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SEMICONDUCTOR TECHNICAL DATA

REV 0

 Motorola, Inc. 1995

10/95

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High–Performance Silicon–Gate CMOS

The MC74HC4316A utilizes silicon–gate CMOS technology to achieve fast propagation delays, low ON resistances, and low OFF–channel leakage current. This bilateral switch/multiplexer/demultiplexer controls analog and digital voltages that may vary across the full analog power–supply range (from VCC to VEE).

The HC4316A is similar in function to the metal–gate CMOS MC14016 and MC14066, and to the High–Speed CMOS HC4016A and HC4066A. Each device has four independent switches. The device control and Enable inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. The device has been designed so that the ON resistances (RON) are much more linear over input voltage than RON of metal–gate CMOS analog switches. Logic–level translators are provided so that the On/Off Control and Enable logic–level voltages need only be VCC and GND, while the switch is passing signals ranging between VCC and VEE. When the Enable pin (active–low) is high, all four analog switches are turned off.

• Logic–Level Translator for On/Off Control and Enable Inputs

• Fast Switching and Propagation Speeds

• High ON/OFF Output Voltage Ratio

• Diode Protection on All Inputs/Outputs

• Analog Power–Supply Voltage Range (VCC – VEE) = 2.0 to 12.0 Volts

• Digital (Control) Power–Supply Voltage Range (VCC – GND) = 2.0 to

6.0 Volts, Independent of V

• Improved Linearity of ON Resistance

• Chip Complexity: 66 FETs or 16.5 Equivalent Gates

LOGIC DIAGRAM

A ON/OFF CONTROL

ANALOG

SWITCH

LEVEL

TRANSLATOR

ANALOG OUTPUTS/INPUTS

PIN 16 = V

PIN 8 = GND PIN 9 = V

GND

≥

B ON/OFF CONTROL

ANALOG

SWITCH

LEVEL

TRANSLATOR

4 5

C ON/OFF CONTROL

ANALOG

SWITCH

LEVEL

TRANSLATOR

D ON/OFF CONTROL

ANALOG

SWITCH

LEVEL

TRANSLATOR

13 14

ENABLE

ANALOG INPUTS/OUTPUTS = XA, XB, XC, X

This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.

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FUNCTION TABLE

PIN ASSIGNMENT

125

D ON/OFF CONTROL

A ON/OFF CONTROL

GND

ENABLE

C ON/OFF CONTROL

B ON/OFF CONTROL

Inputs

State of

On/Off Analog

Enable Control Switch

L H On L L Off H X Off

X = don’t care

D SUFFIX

SOIC PACKAGE

CASE 751B–05

N SUFFIX

PLASTIC PACKAGE

CASE 648–08

ORDERING INFORMATION

MC74HCXXXXAN MC74HCXXXXAD MC74HCXXXXADT

Plastic SOIC TSSOP

DT SUFFIX

TSSOP PACKAGE

CASE 948G–01

MC74HC4316A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

Positive DC Supply Voltage (Ref. to GND)

(Ref. to VEE)

– 0.5 to + 7.0

– 0.5 to + 14.0

Negative DC Supply Voltage (Ref. to GND)

– 7.0 to + 0.5

Analog Input Voltage

VEE – 0.5

to VCC + 0.5

DC Input Voltage (Ref. to GND)

– 0.5 to VCC + 0.5

DC Current Into or Out of Any Pin

± 25

Power Dissipation in Still Air Plastic DIP†

SOIC Package†

TSSOP Package†

750 500 450

stg

Storage Temperature

– 65 to + 150

Lead Temperature, 1 mm from Case for 10 Seconds

(Plastic DIP, SOIC or TSSOP Package)

260

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

Positive DC Supply Voltage (Ref. to GND)

2.0

6.0

Negative DC Supply Voltage (Ref. to GND)

– 6.0

GND

Analog Input Voltage

EEVCC

Digital Input Voltage (Ref. to GND)

GND

VIO*

Static or Dynamic Voltage Across Switch

—

1.2

Operating Temperature, All Package Types

– 55

+ 125

tr, t

Input Rise and Fall Time VCC = 2.0 V (Control or Enable Inputs) VCC = 3.0 V

(Figure 10) VCC = 4.5 V

VCC = 6.0 V

0 0 0 0

1000

600 500 400

*For voltage drops across the switch greater than 1.2 V (switch on), excessive VCC current may

be drawn; i.e., the current out of the switch may contain both VCC and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

DC ELECTRICAL CHARACTERISTICS Digital Section (Voltages Referenced to GND) V

= GND Except Where Noted

Guaranteed Limit

Symbol

Parameter

Test Conditions

CC V

– 55 to

25_C

85_Cv 125_C

Unit

Minimum High–Level Voltage, Control or Enable Inputs

Ron = Per Spec

2.0

3.0

4.5

6.0

1.5

2.1

3.15

4.2

1.5

2.1

3.15

4.2

1.5

2.1

3.15

4.2

Maximum Low–Level Voltage, Control or Enable Inputs

Ron = Per Spec

2.0

3.0

4.5

6.0

0.5

0.9

1.35

1.8

0.5

0.9

1.35

1.8

0.5

0.9

1.35

1.8

Maximum Input Leakage Current, Control or Enable Inputs

Vin = VCC or GND VEE = – 6.0 V

6.0

± 0.1

± 1.0

µA

Maximum Quiescent Supply Current (per Package)

Vin = VCC or GND VIO = 0 V VEE = GND

VEE = – 6.0

6.0

2 4

20 40

160

µA

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

out

should be constrained to the

range GND v (Vin or V

out

) v VCC.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open. I/O pins must be connected to a properly terminated line or bus.

MC74HC4316A

High–Speed CMOS Logic Data DL129 — Rev 6

3 MOTOROLA

DC ELECTRICAL CHARACTERISTICS Analog Section (Voltages Referenced to V

)

Guaranteed Limit

Symbol

Parameter

Test Conditions

CC V

EE V

– 55 to

25_C

85_Cv 125_C

Unit

Maximum “ON” Resistance

Vin = V

VIS = VCC to V

IS v 2.0 mA (Figures 1, 2)

2.0* 4 5

4.5

6.0

0.0

0.0 – 4.5 – 6.0

—

160

90 90

— 200 110 110

— 240 130 130

Ω

Vin = V

VIS = VCC or VEE (Endpoints) IS v 2.0 mA (Figures 1, 2)

2.0

4.5

6.0

0.0

0.0 – 4.5 – 6.0

— 90 70 70

—

115

90 90

— 140 105 105

∆R

Maximum Difference in “ON” Resistance Between Any Two Channels in the Same Package

Vin = V

VIS = 1/2 (VCC – VEE) IS v 2.0 mA

2.0

4.5

6.0

0.0

0.0 – 4.5 – 6.0

— 20 15 15

— 25 20 20

— 30 25 25

Ω

off

Maximum Off–Channel Leakage Current, Any One Channel

Vin = V

VIO = VCC or V

Switch Off (Figure 3)

6.0

– 6.0

0.1

0.5

1.0

µA

Maximum On–Channel Leakage Current, Any One Channel

Vin = V

VIS = VCC or V

(Figure 4)

6.0

– 6.0

0.1

0.5

1.0

µA

*At supply voltage (VCC – VEE) approaching 2 V the analog switch–on resistance becomes extremely non–linear. Therefore, for low–voltage

operation, it is recommended that these devices only be used to control digital signals.

NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

AC ELECTRICAL CHARACTERISTICS (C

= 50 pF, Control or Enable tr = tf = 6 ns, VEE = GND)

Guaranteed Limit

Symbol

Parameter

CC V

– 55 to

25_C

85_Cv 125_C

Unit

PLH

PHL

Maximum Propagation Delay, Analog Input to Analog Output

(Figures 8 and 9)

2.0

4.5

6.0

6 5

8 7

9 8

PLZ

PHZ

Maximum Propagation Delay, Control or Enable to Analog Output

(Figures 10 and 11)

2.0

4.5

6.0

130

40 30

160

50 40

200

60 50

PZL

PZH

Maximum Propagation Delay, Control or Enable to Analog Output

(Figures 10 and 11)

2.0

4.5

6.0

140

40 30

175

50 40

250

60 50

Maximum Capacitance ON/OFF Control

and Enable Inputs

—

Control Input = GND

Analog I/O

Feedthrough

— —

1.0

NOTES:

1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).

Typical @ 25°C, VCC = 5.0 V

Power Dissipation Capacitance (Per Switch) (Figure 13)*

*Used to determine the no–load dynamic power consumption: PD = CPD V

f + ICC VCC. For load considerations, see Chapter 2 of the

Motorola High–Speed CMOS Data Book (DL129/D).

MC74HC4316A

MOTOROLA High–Speed CMOS Logic Data

DL129 — Rev 6

ADDITIONAL APPLICATION CHARACTERISTICS (GND = 0 V)

Symbol

Parameter

Test Conditions

CC V

EE V

Limit*

25_C

Unit

Maximum On–Channel Bandwidth or Minimum Frequency Response

(Figure 5)

fin = 1 MHz Sine Wave Adjust fin Voltage to Obtain 0 dBm at V

Increase fin Frequency Until dB Meter Reads – 3 dB RL = 50 Ω, CL = 10 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

150 160 160

MHz

—

Off–Channel Feedthrough Isolation

(Figure 6)

fin  Sine Wave Adjust fin Voltage to Obtain 0 dBm at V

fin = 10 kHz, RL = 600 Ω, CL = 50 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

– 50 – 50 – 50

fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

– 40 – 40 – 40

—

Feedthrough Noise, Control to Switch

(Figure 7)

Vin v 1 MHz Square Wave (tr = tf = 6 ns) Adjust RL at Setup so that IS = 0 A

RL = 600 Ω, CL = 50 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

60 130 200

RL = 10 kΩ, CL = 10 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

65 100

—

Crosstalk Between Any Two Switches

(Figure 12)

fin  Sine Wave Adjust fin Voltage to Obtain 0 dBm at V

fin = 10 kHz, RL = 600 Ω, CL = 50 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

– 70 – 70 – 70

fin = 1.0 MHz, RL = 50 Ω, CL = 10 pF

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

– 80 – 80 – 80

THD

Total Harmonic Distortion

(Figure 14)

fin = 1 kHz, RL = 10 kΩ, CL = 50 pF THD = THD

Measured

– THD

Source

VIS = 4.0 VPP sine wave VIS = 8.0 VPP sine wave

VIS = 11.0 VPP sine wave

2.25

4.50

6.00

– 2.25 – 4.50 – 6.00

0.10

0.06

0.04

*Limits not tested. Determined by design and verified by qualification.

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