Motorola MC74HC125AD, MC74HC125AN, MC74HC125ADT Datasheet

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SEMICONDUCTOR TECHNICAL DATA
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The MC74HC125A and MC74HC126A are identical in pinout to the LS125 and LS126. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
The HC125A and HC126A noninverting buffers are designed to be used with 3–state memory address drivers, clock drivers, and other bus–oriented systems. The devices have four separate output enables that are active–low (HC125A) or active–high (HC126A).
Output Drive Capability: 15 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1.0 µA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
Chip Complexity: 72 FETs or 18 Equivalent Gates
LOGIC DIAGRAM
HC125A
Active–Low Output Enables
Active–High Output Enables
HC126A
 
N SUFFIX
14–LEAD PLASTIC DIP PACKAGE
CASE 646–06
D SUFFIX
14–LEAD PLASTIC SOIC PACKAGE
CASE 751A–03
DT SUFFIX
14–LEAD PLASTIC TSSOP PACKAGE
CASE 948G–01
A1
OE1
A2
OE2
A3
OE3
A4
OE4
2
1
5
4
9
10
12
13
Inputs Output
AOE Y
HL H
LL L
XH Z
3
Y1
6
Y2
8
Y3
11
Y4
PIN 14 = V PIN 7 = GND
FUNCTION TABLE
HC125A
A1
OE1
A2
OE2
A3
OE3
A4
OE4
CC
Inputs Output
AOE Y
HH H
LH L
XL Z
23
1
5
4
9
10
12
13
HC126A
Y1
6
Y2
8
Y3
11
Y4
ORDERING INFORMATION
MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT
Plastic SOIC TSSOP
PIN ASSIGNMENT
OE1
A1 Y1
OE2
A2 Y2
GND
1 2 3 4
6 7
14 13 12 11 105
V
CC
OE4 A4
Y4 OE3
A3
9
Y3
8
4/97
Motorola, Inc. 1997
1
REV 8
MC74HC125A MC74HC126A
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MAXIMUM RATINGS*
Symbol
V
V
I
I
Î
T
DC Supply Voltage (Referenced to GND)
CC
V
DC Input Voltage (Referenced to GND)
in
DC Output Voltage (Referenced to GND)
out
I
DC Input Current, per Pin
in
DC Output Current, per Pin
out
DC Supply Current, VCC and GND Pins
CC
P
Power Dissipation in Still Air Plastic DIP†
D
ОООООООООООО
Storage Temperature
stg
T
Lead Temperature, 1 mm from Case for 10 Seconds
L
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
SOIC Package: – 7 mW/_C from 65_ to 125_C TSSOP Package: – 6.1 mW/_C from 65_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
Symbol
V
Vin, V
tr, t
ÎÎ
DC Supply Voltage (Referenced to GND)
CC
DC Input Voltage, Output Voltage
out
(Referenced to GND)
T
Operating Temperature, All Package Types
A
Input Rise and Fall Time VCC = 2.0 V
f
(Figure 1) VCC = 4.5 V
ОООООООООООО
Parameter
SOIC Package†
TSSOP Package†
(Plastic DIP, SOIC or TSSOP Package)
Parameter
VCC = 6.0 V
Value
– 0.5 to + 7.0 – 0.5 to VCC + 0.5 – 0.5 to VCC + 0.5
± 20 ± 35 ± 75
750 500 450
ÎÎÎÎ
– 65 to + 150
260
Min
Max
2.0
6.0
0
V
CC
– 55
+ 125
0
1000
0
500
Î
Î
0
400
Unit
V V
V mA mA mA
mW
Î
_
C
_
C
Unit
V
V
_
C
ns
Î
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance cir­cuit. For proper operation, Vin and V
should be constrained to the
out
range GND v (Vin or V
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
) v VCC.
out
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
V
ÎÎ
ÎÎ
V
ÎÎ
ÎÎ
V
OH
ÎÎ
ÎÎÎОООООООÎООООООО
V
ÎÎ
ÎÎ
ÎÎ
ÎÎ
Minimum High–Level Input
IH
IL
ООООООО
Voltage
ООООООО
Maximum Low–Level Input Voltage
ООООООО
ООООООО
Minimum High–Level Output Voltage
ООООООО
Maximum Low–Level Output
OL
ООООООО
Voltage
ООООООО
ООООООО
ООООООО
Parameter
Test Conditions
V
= VCC – 0.1 V
out
ООООООО
|I
| v 20 µA
out
ООООООО
V
= 0.1 V
out
|I
| v 20 µA
out
ООООООО
ООООООО
Vin = V
IH
|I
| v 20 µA
out
ООООООО
Vin = V
IH
Vin = V
IL
ООООООО
|I
| v 20 µA
out
ООООООО
Vin = V
IL
ООООООО
ООООООО
|I
| v 3.6 mA
out
|I
| v 6.0 mA
out
|I
| v 7.8 mA
out
|I
| v 3.6 mA
out
|I
| v 6.0 mA
out
|I
| v 7.8 mA
out
V
CC
V
2.0
ÎÎ
3.0
4.5
ÎÎ
6.0
2.0
3.0
ÎÎ
4.5
ÎÎ
6.0
2.0
4.5
ÎÎ
6.0
3.0
4.5
ÎÎ
6.0
2.0
ÎÎ
4.5
6.0
ÎÎ
3.0
ÎÎ
4.5
6.0
ÎÎ
Guaranteed Limit
– 55 to
25_C
1.5
ÎÎ
2.1
3.15
ÎÎ
4.2
0.5
0.9
ÎÎ
1.35
ÎÎ
1.8
1.9
4.4
ÎÎ
5.9
2.48
3.98
ÎÎ
5.48
0.1
ÎÎ
0.1
0.1
ÎÎ
0.26
ÎÎ
0.26
0.26
ÎÎ
v
85_C
1.5
ÎÎ
2.1
3.15
ÎÎ
4.2
0.5
0.9
ÎÎ
1.35
ÎÎ
1.8
1.9
4.4
ÎÎ
5.9
2.34
3.84
ÎÎ
5.34
0.1
ÎÎ
0.1
0.1
ÎÎ
0.33
ÎÎ
0.33
0.33
ÎÎ
v
125_C
1.5
ÎÎ
2.1
3.15
ÎÎ
4.2
0.5
0.9
ÎÎ
1.35
ÎÎ
1.8
1.9
4.4
ÎÎ
5.9
2.2
3.7
ÎÎ
5.2
0.1
ÎÎ
0.1
0.1
ÎÎ
0.4
ÎÎ
0.4
0.4
ÎÎ
Unit
V
Î
Î
V
Î
Î
V
Î
Î
V
Î
Î
Î
Î
MOTOROLA High–Speed CMOS Logic Data
2
DL129 — Rev 6
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