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FAST AND LS TTL DATA
MC74F257A
GUARANTEED OPERATING RANGES
Symbol Parameter Min Typ Max Unit
V
CC
Supply Voltage 74 4.5 5.0 5.5 V
T
A
Operating Ambient Temperature Range 74 0 25 70 °C
I
OH
Output Current — High 74 –3.0 mA
I
OL
Output Current — Low 74 24 mA
DC CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE (unless otherwise specified)
Limits
Symbol Parameter Min Typ Max Unit Test Conditions
V
IH
Input HIGH Voltage 2.0 V Guaranteed Input HIGH Voltage
V
IL
Input LOW Voltage 0.8 V Guaranteed Input LOW Voltage
V
IK
Input Clamp Diode Voltage –1.2 V IIN = –18 mA VCC = MIN
V
OH
Output HIGH Voltage 74 2.4 3.3 V IOH = –3.0 mA VCC = 4.50 V
74 2.7 3.3 V IOH = –3.0 mA VCC = 4.75 V
V
OL
Output LOW Voltage 0.35 0.5 V IOL = 24 mA VCC = MIN
I
OZH
Output OFF Current — HIGH 50 µA V
OUT
= 2.7 V VCC = MAX
I
OZL
Output OFF Current — LOW –50 µA V
OUT
= 0.5 V VCC = MAX
I
IH
Input HIGH Current 20 µA VIN = 2.7 V VCC = MAX
100 VIN = 7.0 V
I
IL
Input LOW Current –0.6 mA VIN = 0.5 V VCC = MAX
I
OS
Output Short Circuit Current (Note 2) –60 –150 mA V
OUT
= 0 V VCC = MAX
I
CCH
9.0 15 S, I1x = 4.5 V
OE, I0x = GND
I
CCL
Power Supply Current 14.5 22 mA I1x = 4.5 V VCC = MAX
OE, I
0x,
S = GND
I
CCZ
15 23 S, I0x = GND
OE, I1x = 4.5 V
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under guaranteed operating ranges.
2. Not more than one output should be shorted at a time, nor for more than 1 second.
FUNCTIONAL DESCRIPTION
The F257A is a quad 2-input multiplexer with 3-state outputs. It selects four bits of data from two sources under control
of a Common Data Select input. When the Select input is
LOW, the I0x inputs are selected and when Select is HIGH, the
I1x inputs are selected. The data on the selected inputs appears at the outputs in true (non-inverted) form. The device is
the logic implementation of a 4-pole, 2-position switch where
the position of the switch is determined by the logic levels supplied to the Select input. The logic equations for the outputs are
shown below:
Za = OE
• (I1a • S + I0a • S)
Zb = OE
• (I1b • S + I0b • S)
Zc = OE
• (I1c • S + I0c • S)
Zd = OE
• (I1d • S + I0d • S)
When the Output Enable input (OE
) is HIGH, the outputs are
forced to a high impedance OFF state. If the outputs are tied
together, all but one device must be in the high impedance
state to avoid high currents that would exceed the maximum
ratings. Designers should ensure the Output Enable signals to
3-state devices whose outputs are tied together are designed
so there is no overlap.