SEMICONDUCTOR TECHNICAL DATA
1
REV 6
Motorola, Inc. 1995
10/95
& "" $ " #
%" !
High–Performance Silicon–Gate CMOS
The MC54/74HC366 is identical in pinout to the LS366. The device inputs
are compatible with standard CMOS outputs; with pullup resistors, they are
compatible with LSTTL outputs.
This device is a high–speed h ex buffer with 3–state outputs a nd two
common active–low Output Enables. When either of the enables is high, the
buffer outputs are placed into high–impedance states. The HC366 has
inverting outputs.
• Output Drive Capability: 15 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 µA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard
No. 7A
• Chip Complexity: 78 FETs or 19.5 Equivalent Gates
LOGIC DIAGRAM
A3
A4
A5
A0
A1
A2
2
4
6
10
12
14
OUTPUT ENABLE 1
1
15
PIN 16 = V
CC
PIN 8 = GND
OUTPUT ENABLE 2
Y3
Y4
Y5
Y0
Y1
Y2
3
5
7
9
11
13
PIN ASSIGNMENT
13
14
15
16
9
10
11
125
4
3
2
1
8
7
6
A4
Y5
A5
OUTPUT
ENABLE 2
V
CC
Y3
A3
Y4
A1
Y0
A0
OUTPUT
ENABLE 1
GND
Y2
A2
Y1
FUNCTION TABLE
Inputs Output
Enable Enable
1 2 A Y
L L L H
L L H L
H X X Z
X H X Z
X = don’t care
Z = high impedance
N SUFFIX
PLASTIC PACKAGE
CASE 648–08
1
16
J SUFFIX
CERAMIC PACKAGE
CASE 620–10
1
16
ORDERING INFORMATION
MC54HCXXXJ
MC74HCXXXN
Ceramic
Plastic
MC54/74HC366
MOTOROLA High–Speed CMOS Logic Data
DL129 — Rev 6
2
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Current, per Pin
DC Supply Current, VCC and GND Pins
Power Dissipation in Still Air,Plastic or Ceramic DIP†
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP)
(Ceramic DIP)
_
C
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C
Ceramic DIP: – 10 mW/_C from 100_ to 125_C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
RECOMMENDED OPERATING CONDITIONS
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
ns
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Minimum High–Level Input
Voltage
V
out
= 0.1 V
|I
out
| v 20 µA
Maximum Low–Level Input
Voltage
V
out
= VCC – 0.1 V
|I
out
| v 20 µA
Minimum High–Level Output
Voltage
Vin = V
IL
|I
out
| v 20 µA
Vin = V
IL
|I
out
| v 6.0 mA
|I
out
| v 7.8 mA
Maximum Low–Level Output
Voltage
Vin = V
IH
|I
out
| v 20 µA
Vin = V
IH
|I
out
| v 6.0 mA
|I
out
| v 7.8 mA
Maximum Input Leakage Current
Maximum Three–State Leakage
Current
Output in High–Impedance State
Vin = VIL or V
IH
V
out
= VCC or GND
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
I
out
= 0 µA
µA
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high–impedance circuit. For proper operation, Vin and
V
out
should be constrained to the
range GND v (Vin or V
out
) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.