MC44BC373: Multi-Standard PAL/SECAM/NTSC with integrated booster splitter
MC44BC374: PAL/NTSC with integrated booster splitter
The channel is set by an on-chip high-speed I
the modula tor o v er th e full UHF range. The modulator incorporates a sound subcarrier oscillator and uses
a second PLL to derive 4.5, 5.5, 6.0, and 6.5MHz subcarrier frequencies. These frequencies are selected
using the bus.
The picture-to-sou nd ratio is adjus ted using the bu s. In addi tion, an on-chip v ideo test patter n generat or can
be switched ON using a 1kHz audio test signal.
Along with the modulator functions, an Antenna Booster/Splitter function is included.
These modulator versions are comple tely pin-to-pin and software compatible and all versions have the
following fe atures.
•No external varicaps diodes /inductors or tuned components
2
C compatible bus receiver. A Phase-Locked Loop (PLL) tunes
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cale Semiconductor,
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•Channel 21–69 UHF operation
•VHF range possible by internal dividers (30MHz to 450MHz)
•Integrated on-chip programmable UHF oscillator
•Extremely low external component count
2
•High-speed read and write I
•Fixed video modulation depth (80% in PAL and 90% in SECAM)
•Peak White Clip disabled using the bus
•Programmable picture/sound carrier ratio (12dB and 16dB)
Figure 2 shows a simplified block diagram of the MC44BC373/4 device.
The MC44BC373/374 device contains four main sections:
Device Overview
1. A high-speed I
2. A PLL section — Synthesizes the UHF/VHF output channel frequency (from an integrat ed
UHF oscillator, divided for VHF output).
3. A modulator section — Accepts audio and video inputs and then uses those inputs to
modulate the UHF/VHF carrier.
4. An Antenna Booster/Splitter — Am plifies and splits the antenna signal into two signals:
a) The modulated signal is added to the amplified antenna signal on the TVOUT pin.
a)
The following items are programmable using the high-speed I
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I
cale Semiconductor,
•Channel frequency
•Sound frequency
•Sound/picture carrier ratio
An on-chip video test pattern generator with an audio test signal is included.
The MC44BC373 operates as a multi-standard modulator and can handle the following systems using the
same external circuit components:
•B/G
•I
•D/K
•H
•L
•M/N
The high frequency BiCMOS technology permits integration of the following functions:
This device contains protection circuitry to
guard against damage due to high static
voltage or electric fields. However, precautions
must be taken to avoid applications of any
C
voltage higher than maximum rated voltages to
this high impedance circuit. For proper
C
operation, input and output voltages should be
constrained to the ranges indicated in the
C
Recommended Operating Conditions.
C
Maximum ratings are those values beyond which damage to the device may occur. For functional
operation, voltage should be restricted to the Recommended Operating Condition.
4 Electrostatic Discharge
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cale Semiconductor,
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SymParameterMinTypUnit
ESDHBM (Human Body Model)—MIL-STD-883C, Method 3015-740006000V
5 Electrical Characteristics
•A = 100% Tested
•B = 100% Correlation tested
•C = Characterized on samples
•D = Design parameter
5.1 Specification Conditions
Unless otherwise stated: Vcc=5.0V, Ambient Temperature=25oC, Video Input 1V
grayscale. RF inputs/outputs into 75Ohm load. SPECIFICATIONS ONLY VALID FOR ENVELOPE
DEMODULATION.
Second harmonic of chroma subcarrierUsing red EBU bar.–65——dBcC
Chroma/ Sound intermodulation:
Fp + (Fsnd– Fchr)
Fo (picture carrier) harmonics
Out band (picture carrier) spurious
In band spurious (Fo 5 MHz)No video sound modulation.——60dBcC
NOTE 1: Picture carrier harmonics are highly dependant on printed circuit board layout and decoupling capacitors.
40
35
30
dBc
25
20
15
471 521 571 621 671 721 771 821 871
78
Maximum specification
77
76
75
dBuV
74
73
72
471 521 571 621 671 721 771 821 871
2Fo Harmonics
Minimum specification
Frequency (Mhz)
TV Output Level
Minimum specification
Frequency (Mhz)
Output signal from modulator section.
See Figure 3.
During transient output inhibit, or
when ATT bit is set to 1. See Figure 3.
Using red EBU bar.–65——dBcC
2nd harmonic: CH21
3rd harmonic: CH21
Other channels: See Figure 3.
See NOTE 1.
1/2∗ Fo – 1/4∗ Fo – 3/2∗ Fo – 3/4∗ Fo
From 40MHz to 1GHz.
45
40
35
Typi cal
Typi cal
30
dBc
25
20
Minimum specification
15
471 521 571 621 671 721 771 821 871
75
70
65
60
dBc
55
50
45
TV Output Atte nuation
471 521 571 621 671 721 771 821 871
7374.577dBµVB
5060—dBcB
30203526—
—dBcC
—010dBµVC
3Fo Harmonics
Typ ical
Frequency (Mhz)
Typi cal
Minimum specification
Frequency (M hz)
Figure 3. Typical Performance—Modulator High Frequency
MOTOROLAMC44BC373/374 Technical Data9
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Video Characteristics
Freescale Semiconductor, Inc.
9 Video Characteristics
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cale Semiconductor,
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Unless otherwis e sta te d: Vcc=5.0V, Ambient Temperature =25oC, Video Input 1V
, 10-step
p-p
grayscale. RF inputs/outputs into 75Ohm load. SPECIFICATIONS VALID ONLY FOR ENVELOPE
DEMODULATION.
ParameterTest ConditionsMinTypMaxUnitType
Video bandwidth
Video input level75Ohm load.——1.5VcvbsD
Video input current——0.21µA A
Video input impedance—500——KΩA
Peak White ClipPWC bit set to 1, see PWC section.110114118%A
Video S/ NSee Figure 4.5053—dBC
Differential PhaseSee Figure 4.–5—5degC
Differential Gain
Luma/ Sync ratioInput ratio 7.0:3.06.8/3.2—7.2/2.8—B
PAL video modulation depth—758188%B
SECAM video modulation depth —889399%B
PAL Video Modulation Depth
90
88
86
84
82
%
Typ ical
80
78
76
74
471 521 571 621 671 721 771 821 871
Frequency (Mhz)
Reference 0dB at 100 kHz,
measured at 5 MHz.
On line CCIR 310, worst of first 4 out
of 5 steps. See Figure 4.
Video Signal to Noise
58
56
54
dB
52
50
48
Maximum specification
Minimum specification
Typical
Minimum specification
471 521 571 621 671 721 771 821 871
Frequency (Mhz)
–1.5–0.8—dBC
–5—5%C
SECAM Video Modulation Depth
100
98
96
94
%
Typical
92
90
88
86
471 521 571 621 671 721 771 821 871
Maximum specification
Minimum specification
Frequency (Mhz)
Figure 4. Typical Performance—Video
10MC44BC373/374 Technical DataMOTOROLA
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10 Audio Characteristics
Audio Characteristics
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cale Semiconductor,
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Unless otherwis e sta te d: Vcc=5.0V, Ambient Temperature =25oC, Video Input 1V
, 10-step
p-p
grayscale. RF inputs/outputs into 75Ohm load. SPECIFICATIONS VALID ONLY FOR ENVELOPE
DEMODULATION.
ParameterTest ConditionsMinTypMaxUnitType
Picture-to-Sound ratio
Audio modulation depth
Audio input resistance—455361KΩA
Audio Frequency response
Audio Distortion FM (THD only)
Audio Distortion AM (THD only)
Audio S/ N with Sync Buzz FM
Audio S/ N with Sync Buzz AM
PS bit set to 0.
PS bit set to 1.
Using specific pre-emphasis circuit,
audio input level=205 mVrms–audio frequency=1kHz
AM modulation: SECAM Fs=6.5MHz658095%B
FM modulation: Fs=5.5, 6 or 6.5MHz
100% modulation=±50kHz FM deviation
FM modulation: NTSC Fs=4.5MHz
100% modulation=±25 kHz FM deviation
Reference 0dB at 1kHz,
using specified pre-emphasis circuit,
measure from 50Hz to 15kHz.–2.5—+2dB C
At 1kHz, 100% modulation (± 50kHz).
No video.
At 1kHz, 100% modulation.
No video.
Video input EBU color bar 75%.
Weighting filter CCIR 468-2.
Reference 1kHz, 85% modulation.
Video input EBU color bar 75%.
Audio BW from 40Hz to 15kHz.
Weighting filter CCIR 468-2.
Audio Signal to Noise
58
56
Typical
Minimum specification
471 521 571 621 671 721 771 821 871
Frequency (Mhz)
dB
54
52
50
48
46
13
658095%B
658095%B
—0.42 % C
—1.52.5% D
4853—dBC
4550—dBD
16
9
12
19
15
dBB
Figure 5. Typical performance—Audio
MOTOROLAMC44BC373/374 Technical Data11
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Antenna Booster/Splitter Characteristics
Freescale Semiconductor, Inc.
11 Antenna Booster/Splitter Characteristics
Unless otherw ise s tat ed: Vcc=5.0V, Ambient Temperature=25oC, RF inputs/outputs into 75Ohm load.
All specifications use a BALUN at ANT1 & 2 inputs, assuming 0.8dB losses MA X from 40MHz to
860MHz.
ParameterTest ConditionsMinTypMaxUnitType
Frequency range—40—860MHzC
Gain
Gain flatness40 to 860MHz.–1.5+ 1.5dB C
Noise figure
Noise figure
VSWR
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Intermodulation
(IMD)
Isolations
ANT1, 2 to VCRTU.
ANT1, 2 to TVOUT.
ANT1, 2 to VCRTU and TVOUT.
Modulator in standby mode.
ANT1, 2 to VCRTU and TVOUT.
Modulator in normal mode (ON).
All pins, BST bias ON.
At TVout and VCRTU pins, BST bias OFF.
Intermodulation (IMD) frequencies are all frequency combinations coming from the two input carriers F1
and F2: F2–F1, 2∗F1–F2, 2∗ F2–F1 and F1+F2, fall in the 40M Hz–900MHz range.
F1 and F2 input levels are set t o 90dBuV at the input of the BALUN. F1 and F2 frequency generator level s
(50W internal load) take into account a 50 to 75Ohm load difference (1.8dB), plus losses in the 3dB
coupler and the 50 to 75Ohm transformer.
TVOUT
Pin 20
Pin 17
VCRTU
75/50
75/50
F2–F1
Spectrum Analyzer
IMD (dBc)
F1
F2
2F1–F2
2F2–F1
F1+F2
Intermodulation measurement is the difference (in dBc) between the F1 or F2 level at the Output (VCRTU
or TVOUT) and the frequency combinations level, for the following cases:
F1= 50MHz and F2=60MHzF1= 100MHz and F2= 110MHzF1=200MHz and F2=210MHz
F1= 300MHz and F2=310MHzF1 =400MHz and F2= 410MHzF1=500MHz and F2=510MHz
F1= 600MHz and F2=610MHzF1 =700MHz and F2= 710MHzF1=800MHz and F2=810MHz
Intermodulation specification is the IMD measurement’s worst case.
MOTOROLAMC44BC373/374Technical Data13
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Modulator Operation
Freescale Semiconductor, Inc.
12 Modulator Operation
12.1 Power-ON Settings
At power-ON, the MC44BC373 and MC44BC374 configuration is as follows:
Note: 1. N0 to N11 are set to have the UHF oscillator on channel 36 (591.25MHz).
Note: 2. Peak White Clip is ON.
Note: 3. Sound frequency is 5.5MHz.
Note: 4. Sound auxiliary input is disabled.
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Note: 5. Logic Output Port is low voltage.
Note: 6. Picture-to-sound ratio is 12dB.
cale Semiconductor,
Frees
The settings indicated can be customized in the special masked version.
12.2 Power Supply
The five device Vcc pins (13, 15, 16, 21, 23) must be applied at the same time to ensure al l int ernal blocks
are correctly biased. All other pins must not be biased before Vcc is applied to the device. The printed
circuit board layout of the Vcc supplies must be designed to ensure maximum is olation of the I/P to O/P
and also between the two O/Ps.
12.3 Standby Mode
During standby mode, the modulator is switched to low power consumption; the sound oscillator, UHF
oscillator, video and sound modulator sections bias are internally turned OFF.
2
The I
C bus and booster sections remain active.
The modulator can be programmed in standby mode using a combination of three bits:
1. OSC=1
2. SO=1
3. ATT=1
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Modulator Operation
12.4 Test Bit TB1
This test bit allows an initial evaluati on of MC44BC373 and MC44BC374 using software developed for
MC443535:
•TB1= 0 — All MC44BC373/374 functions available—normal mode.
•TB1= 1 — Limited software compatibility with MC44353; MC44BC373/374 functions not
available.
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cale Semiconductor,
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WRITE MODE
CA-CHIP ADDRESS11001010ACK
C1-High Order Bits1——PS——SYSLACK
C0-Low Order Bits———SFD1SFD0100ACK
FM-High Order Bits0TPENN11N10N9N8N7N6ACK
FL-Low Order BitsN5N4N3N2N1N0——ACK
Note: 1. Case TB1= 1, compatible with MC44353
Note: 2. All “—” are don’t care bits.
Note: 3. PS bit replaces PSD2 bit in MC44353 bus format:
PS = 0 is for picture-to-sound ratio = 12dB,
PS = 1 is for picture-to-sound ratio = 16dB
Note: 4. SFD1 and SFD0 bits have the same definition for both bus formats (MC44353 and MC44BC373/374) and
lets a sound frequency between 4.5MHz, 5MHz, 5.5MHz, and 6.5MHz be selected.
Note: 5. SYSL bit has same definition for bus formats MC44353 and MC44BC373/ 374; either system L or B/G is
selectable.
Note: 6. All MC44BC373/ 374 functions are set to their default values.
1
Bit 7Bit 6Bit 5Bit 4Bit 3Bit 2Bit 1Bit 0ACK
12.5 System L or B/G Selection
SYSL bit internally switches the follow ing functions :
•SYSL = 0; e nables B/G system
— Video modulation polarity—Negative
— Video modulation depth—80% Typical (See Video Characteristics on page 10.)
— Sound modulation type—FM
•SYSL = 1; enables L system
— Video modulation polarity—Positive
— Video modulation depth—90% Typical (See Video Characteristics on page 10.)
— Sound modulation type—AM
12.6 Transient Output Inhibit
To minimize the risk of interference to other channels while the UHF PLL is acquiring a lock on the
desired frequency, the Sound and Video modulators are turned OFF for each of the following two cases:
1. Power-ON from zero (i.e., all Vcc is switched from 0V to 5V).
2. UHF oscillator power-ON from OFF state (i.e., OSC bit is switched from 1 to 0)
MOTOROLAMC44BC373/374Technical Data15
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Modulator Operation
There is a time-out of 263ms until the output is enabled. This allows the UHF PLL settle to its
programmed frequency. During the 263m s time-out, the sound PLL current source is set to 10µA typical,
to speed up the locking time. After the 263ms time-out, the current source is switched to 1µA.
Use care when selecting loop filter components, to ensure the loop
transient does not exceed the specified delay.
For test purposes, it is possible to disable the 263ms delay using Test Mode1–State1.h.
Freescale Semiconductor, Inc.
CAUTION:
12.7 Logic Output Port (LOP)
The LOP pin controls any logic function. The primary applications are to control an external attenuator or
an external switch betwee n the antenna input and TV output. When an external switch is controlled, the
Booster function is not used.
The following figure shows a typical attenuator application with PIN diode. The LOP pin switc hes the
PIN attenuator depending on the signal strength of the Antenna Input, thereby reducing the risks of
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Intermodulation in c ertain a reas. The LOP may also be use d as an OFF posit io n bypass switc h or for other
logic function s in the ap plica tion.
cale Semiconductor,
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Vcc
Antenna
Input
LOP pin
Figure 9. Attenuator Application with PIN Diode
TV Out
12.8 Video Section—Peak White Clip
The modulator requires the following:
•A composite video input with “negative going” sync pulses
•A nominal level of 1Vp-p
This signal is AC-coupled to the video input where the sync tip level is clamped. The video signal is then
passed to a Pea k White Clip (PWC) circuit. The PWC circuit function sets to soft- clip the top of the video
waveform, if the “sync tip amplitude” to “peak white clip” goes too high. This method avoids carrier overmodulation by the video. Clipping can be disabled by software.
12.9 Sound Section
The multivi brator oscillator is fully integrated and does not require external components. An internal low
pass filter and matched structure provide a very low harmonics level.
The sound modulator system consists of an FM modulator incorporating the sound subcarrier oscillator,
and an AM modulator. The audio input signal is AC coupled into the amplifier which then drives the two
types of modulators.
The audio pre-emphasis circuit is a high-pass filter with an external capacitor and an internal resistor
(100kOhms). The recommended capacitor value (470pF) is for BG standard. (50µS time constant.)
16MC44BC373/374 Technical DataMOTOROLA
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The auxiliary audio input adds a sound subcarrier to the main carrier. The input can be a modulated
NICAM carrier or a second sound subcarrier for a stereo system. Pin 12 is directly connected to the sound
modulator input and the pict ure-to -soun d ratio (P/S Rati o) de pends o n the auxil iary audio inp ut le vel. (P/S
ratio is 20dB for 35mVrms typical.)
Modulator Operation
12.10 Test Pattern Generator
A simple test pattern is generated on the IC which can be switched in under bus control to permit a TV
receiver to eas ily t une i n to t he mo dulat or out put. The patt ern co nsist s of t wo whit e vert ical bars on a blac k
background and a 976Hz audio test signal.
TE2
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TE1
102030405060
0
Figure 10. Test Pattern Generator—(Time in Seconds)
24 2844
TIME IN µS.
12.11 PLL Section
The reference divider is a fixed divide-by-128, resulting in a reference frequency of 31.25KHz with a
4.0MHz crystal. The 31.25KHz referen ce fr eque ncy is used for both UHF and Sound PLLs.
The prescaler is a fixed divide by 8 and is permanently engaged.
The programmable div ide r’ s di vi sion ratio is controlled by the state of contr ol bit s N0 t o N11. The div ide r
ratio N for a desired frequency F (in MHz) is provided by the following formulas:
F
cale Semiconductor,
with:
N
128
-- -
-------- -
×=
8
7/10
3/10
64
4
Frees
N2048 N11×1024 N10×……4N2×2N1×N0+++++=
12.12 UHF Oscillator—VHF Range
The UHF oscillator is fully integrated and does not require any external components. For low frequency
testing or VHF ra nge ope rati on (t est mod e 1, states 1.b to 1.c), the UHF oscilla tor can be inter nally divi ded
by 2, 4, 8, or 16.
MOTOROLAMC44BC373/374Technical Data17
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High-Speed I
2
C Compatible Bus
Freescale Semiconductor, Inc.
13 High-Speed I2C Compatible Bus
13.1 Specification Conditions
Unless otherwise specified, the Vcc1=5.0V and the ambi ent temperature (TA) =25oC.
Electrical CharacteristicsMinTypMaxUnitType
SDA/SCL output current at 0 V—— 10µA A
SDA/ SCL low input level—— 1.5VB
SDA/SCL high input level3.0—— VB
SDA/ SCL input current for input level from 0.4V to 0.3Vcc– 5—5µA C
SDA/SCL input level0—Vcc+0,3VD
SDA/SCL capacitance —— 10pFC
ACK low output level ( sinking 3mA)—0,31VA
ACK low output level ( sinking 15mA)—— 1.5VC
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Timing CharacteristicsMinTypMaxUnitType
cale Semiconductor,
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Bus clock frequency0—800kHzC
Bus free time between stop and start200—— nsC
Setup time for start condition500—— nsC
Hold time for start condition500—— nsC
Data setup time0—— nsC
Data hold time0—— nsC
Setup time for stop condition500—— nsC
Hold time for stop condition500—— nsC
Acknowledge propagation delay—— 300nsC
SDA fall time at 3ma sink I and 130pF load—— 50nsC
SDA fall time at 3ma sink I and 400pF load—— 80nsC
SDA rise time
SCL fall/ rise time
Pulse width of spikes suppressed by the input filter—— 50nsC
—
—
—
—
300
300
ns
ns
13.2 Timing Definitions
Tbuf
SSDA
StartStop
Chip Address
...
ACK
SDA
Start
Stop
SDA
C
C
SSCL
SCL
SCL
...
Thd;datTsu;datTsu;sto Thd;staTack:low
Figure 11. SSDA/SSCL Timing
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Tsu;sta
Thd;sto
Freescale Semiconductor, Inc.
High-Speed I2C Compatible Bus
13.3 Levels Definition
Vcc
SDA
Vih
...
Vil
0V
Figure 12. SDA Levels
dead band
13.4 High-Speed I2C Compatible Bus Format
SCL
1 2 34 5 67 8 9
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11 12
1014
13
16 17
18
45441519
cale Semiconductor,
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STAChip Address ($CA)
First Data Byte (C1 or FM)
ACK
Data
ACK
Stop
ACK
SDA
Figure 13. SCL and SDA Bus Timing
13.5 I2C Write Mode Format and Bus Receiver
The bus receiver operates the I2C compatible data format. The chip address (I2C bus) is:
11001010 (ACK)=$CA(hex) in write mode
In write mode, each ninth data bit (bits 9, 18, 27, 36, and 45) is an acknowledge bit (ACK) during which
the MCU sends a logic 1 and the Modulator circuit answers on the data line by pulling it low. Besides the
chip address, the circuit needs two or four data bytes for operation. The following data byte sequences are
the permitted incoming information:
Example 1STACAC1C0STO
Example 2STACAFMFLSTO
Example 3STACAC1C0FMFLSTO
Example 4STACAFMFLC1C0STO
With:
STA = Start conditionCA = Chip Address
FM = Frequency information, high order bitsFL = Frequency information, low order bits
C1 = Control information, high order bitsCO = Control information, low order bits
STO = Stop condition
After the chip address, two or four data bytes may be received.
•If three (3) data bytes are received, the third one is ignored.
•If five (5) or more data bytes are re ceived, the fifth and following ones are ignored, and the last ACK
pulse is sent at the end of the fourth data byte.
MOTOROLAMC44BC373/374Technical Data19
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High-Speed I
The first and third data bytes contain a function bit which lets the IC distinguish between frequency
information and contr ol informa tion. If the func tion bit i s a logic 1, the t wo followi ng bytes cont ain contro l
information. The first data byte after the chip address may be byte CO or byte FM. The two bytes of
frequency information are preceded by a logic 0.
2
C Compatible Bus
Freescale Semiconductor, Inc.
13.6 I2C Read Mode Format
The chip address (I2C) is:
11001011 (ACK)=$CB(hex) in read mode
The incoming information consists of the read mode chip address byte. The device then answers with an
ACK followed by one byt e cont aining thre e bits of st atus infor mati on. No ac knowl edge i s answe red by the
modulator after this byte.
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cale Semiconductor,
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20MC44BC373/374 Technical DataMOTOROLA
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14 Application and Case Diagrams
Proposed BiCMOS Modulator and Booster/Splitter Application
This document contains information on a new product under development. Motorola reserves the
right to change or discontinue this product without notice.
Application and Case Diagrams
GND
GND
Vcc
10nF
10nF
Vcc
O
1nF
1nF
100nF
Note 2
22nF
10nF
2.2k
47nF
O
O
75
TVOUT
VCRTU
VideoO
SCLSDA
OO
1
SCL
2
1nF
SDA
3
LOP
4
XTAL
5
GND
6
ANT1
7
ANT2
8
GND
9
PREEM
10
AUDIO
11
SPLLFLT
12
AUXIN
O
LOP
4MHz
ANTIN
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I
O
Pre-em
470pF
100nF
Cx
Note 1
1nF
1nF
220nF
22nF
24
GNDD
23
VCCD
22
PLLFLT
21
TVOVCC
20
TVOUT
19
18
17
VCRTU
16
VCRVCC
15
VCCA
14
VIDEO
13
VCCI
15k
O
Audio
OO
Auxin
Note 1: Cx value depends on crystal characteristics; Cx = 27pF on Motorola application board.
Note 2: Loop filter components must be as close as possible to pins 22 and 23.
cale Semiconductor,
Figure 14. Proposed BiCMOS Modulator and Booster/Splitter Application
Frees
MOTOROLAMC44BC373/374Technical Data21
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Application and Case Diagrams
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Freescale Semiconductor, Inc.
cale Semiconductor,
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CASE 940H-02ISSUE A
Dim
A7.707.900.3030.311
B4.304.480.1690.176
C—0.95—0.037
D0.050.150.0020.006
F0.510.710.0200.028
G0.65 BSC0.026 BSC
H0.270.370.0110.015
J0.090.180.0030.007
J10.090.130.0030.005
K0.190.300.0070.012
K10.190.250.0070.010
L6.256.500.2460.256
M
MillimetersInches
MinMaxMinMax
o
0
o
8
o
0
8
Note: 1. Dimensioning and Tolerancing per ANSI
Y14.5M, 1982.
Note: 2. Controlling dimension: Millimeters.
Note: 3. Dimensions A and B do not include mold flash
or protrusions and are measured at the parting line. Mold
flash or protrusions shall not exceed 0.15 (0.006) per
side.
Note: 4. Dimension is the length of terminal for soldering
to a substrate.
Note: 5. Terminal positions are shown for reference
only.
Note: 6. The lead width dimension does not include
Dambar protrusion. Allowable Dambar protrusion shall be
0.08 (0.003) total in excess of the lead width dimension at
maximum material condition. Dambar can not be located
on the lower radius or the foot. Minimum space between
protrusions and adjacent lead to be 0.14 (0.006 ).
o
Figure 15. TSSOP24 Package
22MC44BC373/374 Technical DataMOTOROLA
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NOTES
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MOTOROLAMC44BC373/374Technical Data23
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