MOTOROLA MC14504BFL1, MC14504BFR1, MC14504BFR2, MC14504BF, MC14504BDR2 Datasheet

...

 Semiconductor Components Industries, LLC, 2000

March, 2000 – Rev. 3

1 Publication Order Number:

MC14504B/D

MC14504B

Hex Level Shifter for TTL to CMOS or CMOS to CMOS

The MC14504B is a hex non–inverting level shifter using CMOS technology. The level shifter will shift a TTL signal to CMOS logic levels for any CMOS supply voltage between 5 and 15 volts. A control input also allows interface from CMOS to CMOS at one logic level to another logic level: Either up or down level translating is accomplished by selection of power supply levels V

and VCC. The

level sets the input signal levels while VDD selects the output

voltage levels.

• UP Translates from a Low to a High Voltage or DOWN Translates

from a High to a Low Voltage

• Input Threshold Can Be Shifted for TTL Compatibility

• No Sequencing Required on Power Supplies or Inputs for Power Up

or Power Down

• 3 to 18 Vdc Operation for V

and V

• Diode Protected Inputs to V

• Capable of Driving Two Low–Power TTL Loads or One Low–Power

Schottky TTL Load Over the Rated Temperature Range

MAXIMUM RATINGS (Voltages Referenced to V

) (Note 2.)

Symbol Parameter Value Unit

DC Supply Voltage Range –0.5 to +18.0 V

Input Voltage Range

(DC or Transient)

–0.5 to +18.0 V

out

Output Voltage Range

(DC or Transient)

–0.5 to VDD + 0.5 V

Iin, I

out

Input or Output Current

(DC or Transient) per Pin

±10 mA

Power Dissipation,

per Package (Note 3.)

500 mW

Ambient Temperature Range –55 to +125 °C

stg

Storage Temperature Range –65 to +150 °C

Lead Temperature

(8–Second Soldering)

260 °C

2. Maximum Ratings are those values beyond which damage to the device

may occur.

3. Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C T o 125_C

This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high–impedance circuit. For proper operation, Vin and V

out

should be constrained

to the range V

v (Vin or V

out

) v VDD.

Unused inputs must always be tied to an appropriate logic voltage level (e.g., either V

or VDD). Unused outputs must be left open.

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A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week

Device Package Shipping

ORDERING INFORMATION

MC14504BCP PDIP–16 2000/Box MC14504BD SOIC–16 48/Rail MC14504BDR2 SOIC–16 2500/Tape & Reel

1. For ordering information on the EIAJ version of the SOIC packages, please contact your local ON Semiconductor representative.

MARKING

DIAGRAMS

PDIP–16

P SUFFIX

CASE 648

MC14504BCP

AWLYYWW

SOIC–16

D SUFFIX

CASE 751B

14504B

AWLYWW

SOEIAJ–16

F SUFFIX

CASE 966

MC14504B

AWLYWW

MC14504BF SOEIAJ–16 See Note 1. MC14504BFEL SOEIAJ–16 See Note 1.

MC14504BDT TSSOP–16 96/Rail

TSSOP–16 DT SUFFIX CASE 948F

504B

ALYW

MC14504B

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PIN ASSIGNMENT

125

out

MODE

out

LOGIC DIAGRAM

INPUT

OUTPUT

LEVEL

SHIFTER

MODE

TTL/CMOS

MODE SELECT

Mode Select

Input Logic

Levels

Output Logic

Levels

1 (VCC) TTL CMOS 0 (VSS) CMOS CMOS

1/6 of package shown.

MC14504B

http://onsemi.com

ELECTRICAL CHARACTERISTICS (Voltages Referenced to V

)

– 55_C

25_C

125_C

Characteristic

Symbol

Vdc

Min

Max

Min

Typ

(4.)

Max

Min

Max

Unit

ООООООООО

Output Voltage “0” Level

= 0 V

“

”

ÎÎ

— — —

5.0 10

1 5

— — —

0.05

— — —

ÎÎ

0 0 0

0.05

— — —

0.05

Vdc

ООООООООО

“1” L

eve

Vin = V

ÎÎ

— — —

5.0 10 15

4.95

9.95

14.95

— — —

4.95

9.95

14.95

ÎÎ

5.0 10 15

— — —

4.95

9.95

14.95

— — —

Vdc

ООООООООО

Input Voltage “0” Level

(VOL = 1.0 Vdc) TTL–CMOS (V

= 1.5 Vdc) TTL–CMOS (VOL = 1.0 Vdc) CMOS–CMOS (VOL = 1.5 Vdc) CMOS–CMOS (VOL = 1.5 Vdc) CMOS–CMOS

ÎÎ

5.0

5.0 10

10 15 10 15 15

— — — — —

0.8

1.5

3.0

— — — — —

ÎÎ

1.3

2.25

4.5

0.8

1.5

3.0

— — — — —

0.8

1.4

1.5

2.9

Vdc

ООООООООО

Input Voltage “1” Level

= 9.0 Vdc) TTL–CMOS (VOH = 13.5 Vdc) TTL–CMOS (VOH = 9.0 Vdc) CMOS–CMOS (V

= 13.5 Vdc) CMOS–CMOS (VOH = 13.5 Vdc) CMOS–CMOS

ÎÎ

5.0

5.0 10

10 15 10 15 15

2.0

3.6

7.1

— — — — —

2.0

3.5

7.0

ÎÎ

1.5

2.75

5.5

— — — — —

2.0

3.5

7.0

— — — — —

Vdc

ООООООООО

Output Drive Current

(VOH = 2.5 Vdc) Source (VOH = 4.6 Vdc) (V

= 9.5 Vdc)

(VOH = 13.5 Vdc)

ÎÎ

— — — —

5.0

5.0 10 15

– 3.0

–0.64

– 1.6 – 4.2

— — — —

– 2.4

–0.51

– 1.3 – 3.4

ÎÎ

– 4.2 – 0.88 – 2.25

– 8.8

— — — —

– 1.7

–0.36

– 0.9 – 2.4

— — — —

mAdc

ООООООООО

(VOL = 0.4 Vdc) Sink (V

= 0.5 Vdc)

= 1.5 Vdc)

ÎÎ

— — —

5.0 10 15

0.64

1.6

4.2

— — —

0.51

1.3

3.4

ÎÎ

0.88

2.25

8.8

— — —

0.36

0.9

2.4

— — —

mAdc

Input Current

—

± 0.1

—

±0.00001

± 0.1

—

± 1.0

µAdc

Input Capacitance (Vin = 0)

—

5.0

7.5

—

ООООООООО

Quiescent Current

(Per Package) CMOS–CMOS Mode

ÎÎ

IDD or

— — —

5.0 10 15

— — —

0.05

0.10

0.20

— — —

ÎÎ

0.0005

0.0010

0.0015

0.05

0.10

0.20

— — —

1.5

3.0

6.0

µAdc

ООООООООО

Quiescent Current

(Per Package) TTL–CMOS Mode

ÎÎ

5.0

5.0 10 15

— — —

0.5

1.0

2.0

— — —

ÎÎ

0.0005

0.0010

0.0015

0.5

1.0

2.0

— — —

3.8

7.5 15

µAdc

ООООООООО

Quiescent Current

(Per Package) TTL–CMOS Mode

ÎÎ

5.0

5.0 10 15

— — —

5.0

— — —

ÎÎ

2.5

5.0

— — —

6.0

mAdc

4. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.

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