These devices are designed to be used as encoder/decoder pairs in remote
control applications.
The MC145026 encodes nine lines of information and serially sends this
information upon receipt of a transmit enable (TE
encoded with trinary data (low, high, or open) or binary data (low or high). The
words are transmitted twice per encoding sequence to increase security .
The MC145027 decoder receives the serial stream and interprets five of the
trinary digits as an address code. Thus, 243 addresses are possible. If binary
data is used at the encoder, 32 addresses are possible. The remaining serial
information is interpreted as four bits of binary data. The valid transmission (VT)
output goes high on the MC145027 when two conditions are met. First, two
addresses must be consecutively received (in one encoding sequence) which
both match the local address. Second, the 4 bits of data must match the last
valid data received. The active VT indicates that the information at the Data
output pins has been updated.
The MC145028 decoder treats all nine trinary digits as an address which
allows 19,683 codes. If binary data is encoded, 512 codes are possible. The VT
output goes high on the MC145028 when two addresses are consecutively
received (in one encoding sequence) which both match the local address.
• Operating Temperature Range: – 40 to + 85°C
• Very–Low Standby Current for the Encoder: 300 nA Maximum @ 25°C
• Interfaces with RF, Ultrasonic, or Infrared Modulators and Demodulators
• RC Oscillator, No Crystal Required
• High External Component Tolerance; Can Use ± 5% Components
• Internal Power–On Reset Forces All Decoder Outputs Low
• Operating Voltage Range: MC145026 = 2.5 to 18 V
MC145027, MC145028 = 4.5 to 18 V
• Low–Voltage Versions Available:
SC41343 = 2.8 to 10 V Version of the MC145027
SC41344 = 2.8 to 10 V Version of the MC145028
• For Infrared Applications, See Application Note AN1016/D
*Maximum Ratings are those values beyond which damage to the device may occur. Func-
tional operation should be restricted to the limits in the Electrical Characteristics tables or
Pin Descriptions section.
DC Supply Voltage (except SC41343,
DD
SC41344)
DC Supply Voltage (SC41343, SC41344
DD
only)
DC Input Voltage– 0.5 to VDD + 0.5V
in
DC Output Voltage– 0.5 to VDD + 0.5V
out
DC Input Current, per Pin± 10mA
in
DC Output Current, per Pin± 10mA
Power Dissipation, per Package500mW
D
Storage Temperature– 65 to + 150°C
stg
Lead Temperature, 1 mm from Case for
L
10 Seconds
)
SS
– 0.5 to + 18V
– 0.5 to + 10V
260°C
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any
voltage higher than maximum rated voltages
to this high–impedance circuit. For proper
operation, Vin and V
to the range VSS ≤ (Vin or V
The encoder serially transmits trinary data as defined by
the state of the A1 – A5 and A6/D6 – A9/D9 input pins. These
pins may be in either of three states (low, high, or open) allowing 19,683 possible codes. The transmit sequence is initiated
by a low level on the TE
MC145026 can continuously transmit as long as TE remains
low (also, the device can transmit two–word sequences by
pulsing TE
be designed to rely upon the first data word transmitted immediately after power–up because this word may be invalid.
Between the two data words, no signal is sent for three data
periods (see Figure 10).
Each transmitted trinary digit is encoded into pulses (see
Figure 11). A logic 0 (low) is encoded as two consecutive
short pulses, a logic 1 (high) as two consecutive long pulses,
and an open (high impedance) as a long pulse followed by a
short pulse. The input state is determined by using a weak
“output” device to try to force each input high then low. If only
a high state results from the two tests, the input is assumed to
be hardwired to VDD. If only a low state is obtained, the input
is assumed to be hardwired to VSS. If both a high and a low
can be forced at an input, an open is assumed and is encoded
as such. The “high” and “low” levels are 70% and 30% of the
supply voltage as shown in the Electrical Characteristics
table. The weak “output” device sinks/sources up to 1 10 µA at
a 5 V supply level, 500 µA at 10 V, and 1 mA at 15 V.
The TE
switch may be used to force the input low. While TE
and the second–word transmission has timed out, the encoder is completely disabled, the oscillator is inhibited, and the
current drain is reduced to quiescent current. When TE
brought low, the oscillator is started and the transmit sequence begins. The inputs are then sequentially selected,
and determinations are made as to the input logic states. This
information is serially transmitted via the D
MC145027
This decoder receives the serial data from the encoder and
outputs the data, if it is valid. The transmitted data, consisting
of two identical words, is examined bit by bit during reception.
The first five trinary digits are assumed to be the address. If
the received address matches the local address, the next four
(data) bits are internally stored, but are not transferred to the
output data latch. As the second encoded word is received,
the address must again match. If a match occurs, the new
data bits are checked against the previously stored data bits.
If the two nibbles of data (four bits each) match, the data is
transferred to the output data latch by VT and remains until
new data replaces it. At the same time, the VT output pin is
brought high and remains high until an error is received or until no input signal is received for four data periods (see Figure
10).
Although the address information may be encoded in trinary, the data information must be either a 1 or 0. A trinary
(open) data line is decoded as a logic 1.
MC145028
This decoder operates in the same manner as the
MC145027 except that nine address lines are used and no
low). However, no MC145026 application should
input has an internal pull–up device so that a simple
input pin. Upon power–up, the
is high
is
pin.
out
data output is available. The VT output is used to indicate that
a valid address has been received. For transmission security ,
two identical transmitted words must be consecutively received before a VT output signal is issued.
The MC145028 allows 19,683 addresses when trinary levels are used. 512 addresses are possible when binary levels
are used.
PIN DESCRIPTIONS
MC145026 ENCODER
A1 – A5, A6/D6 – A9/D9
Address, Address/Data Inputs (Pins 1 – 7, 9, and 10)
These address/data inputs are encoded and the data is
sent serially from the encoder via the D
RS, CTC, R
(Pins 11, 12, and 13)
These pins are part of the oscillator section of the encoder
(see Figure 9).
If an external signal source is used instead of the internal
oscillator, it should be connected to the RS input and the R
and CTC pins should be left open.
TE
Transmit Enable (Pin 14)
This active–low transmit enable input initiates transmission
when forced low. An internal pull–up device keeps this input
normally high. The pull–up current is specified in the Electrical Characteristics table.
D
out
Data Out (Pin 15)
This is the output of the encoder that serially presents the
encoded data word.
VSS
Negative Power Supply (Pin 8)
The most–negative supply potential. This pin is usually
ground.
These are the local address inputs. The states of these
pins must match the appropriate encoder inputs for the VT pin
to go high. The local address may be encoded with trinary or
binary data.
D6 – D9
Data Outputs (Pins 15, 14, 13, 12) — MC145027 Only
These outputs present the binary information that is on
encoder inputs A6/D6 through A9/D9. Only binary data is
acknowledged; a trinary open at the MC145026 encoder is
decoded as a high level (logic 1).
D
in
Data In (Pin 9)
This pin is the serial data input to the decoder. The input
voltage must be at CMOS logic levels. The signal source driving this pin must be dc coupled.
As shown in Figures 2 and 3, these pins accept a resistor
and capacitor that are used to determine whether a narrow
pulse or wide pulse has been received. The time constant
R1 x C1 should be set to 1.72 encoder clock periods:
R1 C1 = 3.95 RTC C
R2/C
2
Resistor 2/Capacitor 2 (Pin 10)
As shown in Figures 2 and 3, this pin accepts a resistor and
capacitor that are used to detect both the end of a received
word and the end of a transmission. The time constant R2 x
C2 should be 33.5 encoder clock periods (four data periods
per Figure 11): R2 C2 = 77 RTC CTC. This time constant is
used to determine whether the Din pin has remained low for
four data periods (end of transmission). A separate on–chip
comparator looks at the voltage–equivalent two data periods
(0.4 R2 C2) to detect the dead time between received words
within a transmission.
TC
VT
Valid Transmission Output (Pin 11)
This valid transmission output goes high after the second
word of an encoding sequence when the following conditions
are satisfied:
1.the received addresses of both words match the local decoder address, and
2.the received data bits of both words match.
VT remains high until either a mismatch is received or no
input signal is received for four data periods.
V
SS
Negative Power Supply (Pin 8)
The most–negative supply potential. This pin is usually
This oscillator operates at a frequency determined by the
external RC network; i.e.,
R
S
C
TC
R
TC
TE
ENCODER
OSCILLA TOR
(PIN 12)
D
out
(PIN 15)
f ≈
1
2.3 RTC CTC′
for 1 kHz ≤ f ≤ 400 kHz
where: CTC′ = CTC + C
RS ≈ 2 R
RS ≥ 20 k
TC
RTC ≥ 10 k
400 pF < CTC < 15 µF
PW
min
2
4
6
(Hz)
The value for RS should be chosen to be ≥ 2 times RTC. This range ensures
that current through RS is insignificant compared to current through RTC. The
upper limit for RS must ensure that RS x 5 pF (input capacitance) is small compared to RTC x CTC.
layout
+ 12 pF
For frequencies outside the indicated range, the formula is less accurate.
The minimum recommended oscillation frequency of this circuit is 1 kHz. Susceptibility to externally induced noise signals may occur for frequencies below
1 kHz and/or when resistors utilized are greater than 1 MΩ.
To verify the MC145027 or MC145028 timing, check the
waveforms on C1 (Pin 7) and R2/C2 (Pin 10) as compared to
the incoming data waveform on Din (Pin 9).
The R–C decay seen on C1 discharges down to 1/3 V
before being reset to VDD. This point of reset (labelled “DOS”
in Figure 15) is the point in time where the decision is made
whether the data seen on Din is a 1 or 0. DOS should not be
too close to the Din data edges or intermittent operation may
occur.
The other timing to be checked on the MC145027 and
MC145028 is on R2/C2 (see Figure 16). The R–C decay is
continually reset to VDD as data is being transmitted. Only
between words and after the end–of–transmission (EOT)
does R2/C2 decay significantly from VDD. R2/C2 can be used
to identify the internal end–of–word (EOW) timing edge which
is generated when R2/C2 decays to 2/3 VDD. The internal
EOT timing edge occurs when R2/C2 decays to 1/3 VDD.
When the waveform is being observed, the R–C decay
should go down between the 2/3 and 1/3 VDD levels, but not
too close to either level before data transmission on Din resumes.
Verification of the timing described above should ensure a
good match between the MC145026 transmitter and the
MC145027 and MC145028 receivers.
In Figure 18, the MC145026 encoder is set to run at an oscillator frequency of about 4 to 9 kHz. Thus, the time required
for a complete two–word encoding sequence is about 20 to
40 ms. The data output from the encoder gates an RC oscillator running at 50 kHz; the oscillator shown starts rapidly
enough to be used in this application. When the “send” button
is not depressed, both the MC145026 and oscillator are in a
low–power standby state. The RC oscillator has to be
trimmed for 50 kHz and has some drawbacks for frequency
stability . A superior system uses a ceramic resonator oscillator running at 400 kHz. This oscillator feeds a divider as
shown in Figure 19. The unused inputs of the MC14011UB
must be grounded.
The MLED81 IRED is driven with the 50 kHz square wave
at about 200 to 300 mA to generate the carrier. If desired, two
IREDs wired in series can be used (see Application Note
AN1016 for more information). The bipolar IRED switch,
shown in Figure 18, offers two advantages over a FET. First,
a logic FET has too much gate capacitance for the
MC14011UB to drive without waveform distortion. Second,
the bipolar drive permits lower supply voltages, which are an
advantage in portable battery–powered applications.
The configuration shown in Figure 18 operates over a
supply range of 4.5 to 18 V. A low–voltage system which
operates down to 2.5 V could be realized if the oscillator section of a MC74HC4060 is used in place of the MC14011UB.
The data output of the MC145026 is inverted and fed to the
RESET pin of the MC74HC4060. Alternately, the
MC74HCU04 could be used for the oscillator.
Information on the MC14011UB is in book number
DL131/D. The MC74HCU04 and MC74HC4060 are found in
book number DL129/D.
INFRARED RECEIVER
The receiver in Figure 20 couples an IR–sensitive diode to
input preamp A1, followed by band–pass amplifier A2 with a
gain of about 10. Limiting stage A3 follows, with an output of
about 800 mV p–p. The limited 50 kHz burst is detected by
comparator A4 that passes only positive pulses, and peak–
detected and filtered by a diode/RC network to extract the
data envelope from the burst. Comparator A5 boosts the signal to logic levels compatible with the MC145027/28 data
input. The Din pin of these decoders is a standard CMOS
not
high–impedance input which must
Therefore, direct coupling from A5 to the decoder input is
utilized.
Shielding should be used on at least A1 and A2, with good
ground and high–sensitivity circuit layout techniques applied.
For operation with supplies higher than + 5 V, limiter A4’s
positive output swing needs to be limited to 3 to 5 V. This is
accomplished via adding a zener diode in the negative feedback path, thus avoiding excessive system noise. The biasing resistor stack should be adjusted such that V3 is 1.25 to
1.5 V.
This system works up to a range of about 10 meters. The
gains of the system may be adjusted to suit the individual
design needs. The 100
2N5088 and the 1 k
different gain is required. In general, more gain does not necessarily result in increased range. This is due to noise floor
limitations. The designer should increase transmitter power
and/or increase receiver aperature with Fresnal lensing to
greatly improve range. See Application Note AN1016 for
additional information.
Information on the MC34074 is in data book DL128/D.
TRINARY SWITCH MANUFACTURERS
Midland Ross–Electronic Connector Div.
Greyhill
Augat/Alcoswitch
Aries Electronics
The above companies may not have the switches in a DIP.
For more information, call them or consult
gineers Master Catalog
Ω resistor in the emitter of the first
Ω resistor feeding A2 may be altered if
or the
Gold Book. Ask for SPDT with
be allowed to float.
eem Electronic En-
center OFF.
Alternative: An SPST can be placed in series between a
SPDT and the Encoder or Decoder to achieve trinary action.
Motorola cannot recommend one supplier over another
and in no way suggests that this is a complete listing of trinary
switch manufacturers.
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSIONS A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN
EXCESS OF D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that
Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.
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