Motorola MC10123P, MC10123FN, MC10123L Datasheet
SEMICONDUCTOR TECHNICAL DATA
The MC10123 consists of three NOR gates designed for bus driving
applications on card or between cards. Output low logic levels are specified with
VOL = –2.1 Vdc so that the bus may be terminated to –2.0 Vdc. The gate output,
when low, appears as a high impedance to the bus, because the output emitter–
followers of the MC10123 are “turned–off.” This eliminates discontinuities in the
characteristic impedance of the bus.
The VOH level is specified when driving a 25–ohm load terminated to –2.0
Vdc, the equivalent of a 50–ohm bus terminated at both ends. Although 25
ohms is the lowest characteristic impedance that can be driven by the
MC10123, higher impedance values may be used with this part. A typical
50–ohm bus is shown in Figure 1.
PD= 310 mW typ/pkg (No Load)
tpd= 3.0 ns typ
tr, tf= 2.5 ns typ (20%–80%)
LOGIC DIAGRAM
4
10
11
12
13
14
5
6
7
9
V
= PIN 1
CC1
V
= PIN 16
CC2
VEE= PIN 8
3
2
15
FIGURE 1 — 50–OHM BUS DRIVER (TYPICAL APPLICATION)
1/3 MC10123 1/3 MC10123
ZO = 50
1/3 MC10123
Ω
L SUFFIX
CERAMIC PACKAGE
CASE 620–10
P SUFFIX
PLASTIC PACKAGE
CASE 648–08
FN SUFFIX
PLCC
CASE 775–02
DIP
PIN ASSIGNMENT
V
CC1
B
OUT
A
OUT
A
IN
A
IN
A
IN
A
IN
V
EE
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
T ables on page 6–11 of the Motorola MECL Data
1
2
3
4
5
6
7
8
Book (DL122/D).
16
15
14
13
12
11
10
V
CC2
C
OUT
C
IN
C
IN
C
IN
B
IN
B
IN
B
9
IN
50
Ω
–2.0
VDC
3/93
Motorola, Inc. 1996
RECEIVERS (MECL GATES)
3–78
–2.0
VDC
50
Ω
REV 5
MC10123
Under
Und
(VCC)
ELECTRICAL CHARACTERISTICS
Test Limits
Pin
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) ns
Propagation Delay t
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
inH
I
inL
OH
OL
OHA
OLA
4+3–
t
4–3+
3+
3–
E
Under
Test
8 82 71 75 82 mAdc
4 350 220 220 µAdc
4 0.5 µAdc
3 –1.060 –0.890 –0.960 –0.810 –0.890 –0.700 Vdc
3 –2.100 –2.030 –2.100 –2.030 –2.100 –2.030 Vdc
3 –1.080 –0.980 –0.910 Vdc
3 –2.100 –2.100 –2.100 Vdc
3
3
3 1.0 3.7 1.0 2.5 3.5 1.0 3.9
3 1.0 3.7 1.0 2.5 3.5 1.0 3.9
ELECTRICAL CHARACTERISTICS (continued)
@ Test Temperature V
Characteristic Symbol
Power Supply Drain Current I
Input Current I
Output Voltage Logic 1 V
Output Voltage Logic 0 V
Threshold Voltage Logic 1 V
Threshold Voltage Logic 0 V
Switching Times (50Ω Load) Pulse In Pulse Out –3.2 V +2.0 V
Propagation Delay t
Rise Time (20 to 80%) t
Fall Time (20 to 80%) t
Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been
established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained.
Outputs are terminated through a 50-ohm resistor to –2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the
same manner.
inH
I
inL
OH
OL
OHA
OLA
4+3–
t
4–3+
3+
3–
E
–30°C +25°C +85°C
Min Max Min Typ Max Min Max
1.2
1.2
–30°C –0.890 –1.890 –1.205 –1.500 –5.2
+25°C –0.810 –1.850 –1.105 –1.475 –5.2
+85°C –0.700 –1.825 –1.035 –1.440 –5.2
Pin
er
Test
8 4,5,6,7,9
4 4 8 1, 16
4 4 8 1, 16
3 8 1, 16
3 4,5,6,7
3 4,5,6,7 8 1, 16
3 9,12 4,5,6,7 8 1, 16
3
3
3 4 3 8 1, 16
3 4 3 8 1, 16
4.6
4.6
IHmax
TEST VOLTAGE APPLIED TO PINS LISTED BELOW
V
IHmax
10,11,12
13,14
9,12
1.2
1.2
TEST VOLTAGE VALUES (Volts)
V
ILmin
V
ILmin
3.0
3.0
V
IHAminVILAmax
V
IHAminVILAmax
4.4
4.4
4
4
3
3
1.2
1.2
4.8
4.8
V
EE
V
EE
8 1, 16
8 1, 16
8
8
Unit
Gnd
1, 16
1, 16
DL122 — Rev 6
3–79 MOTOROLAMECL Data
Loading...