Motorola MC10E150FNR2, MC10E150FN, MC100E150FN, MC100E150FNR2 Datasheet
NC Q1Q1V
CCO
Q
5
Q
5
V
CCO
NCLEN1LEN2MR
LOGIC DIAGRAM
D
5
D
4
D
3
V
EE
D
2
D
1
D
0
26
27
28
2
3
4
25 24 23 22 21 20 19
18
17
16
15
14
13
12
115 6 7 8 9 10
Q
4
Q
4
V
CC
Q
3
Q
3
Q
2
Q
2
V
CCOQ0
Q
0
D
0
D
1
D
2
D
3
D
4
D
5
LEN1
LEN2
MR
Q
0
Q
0
Q
1
Q
1
Q
2
Q
2
Q
3
Q
3
Q
4
Q
4
Q
5
Q
5
D
R
D
R
D
R
D
R
D
R
D
R
1
Pinout: 28-Lead PLCC (Top View)
* All VCC and V
CCO
pins are tied together on the die.
SEMICONDUCTOR TECHNICAL DATA
2–1
REV 2
Motorola, Inc. 1996
12/93
The MC10E/100E150 contains six D-type latches with differential
outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is
transparent and input data transitions propagate through to the output. A
logic HIGH on either LEN1 or LEN2 (or both) latches the data. The Master
Reset (MR) overrides all other controls to set the Q outputs low.
• 800ps Max. Propagation Delay
• Extended 100E V
EE
Range of – 4.2V to – 5.46V
• 75kΩ Input Pulldown Resistors
PIN NAMES
Pin Function
D0– D
5
Data Inputs
LEN1, LEN2 Latch Enables
MR Master Reset
Q0– Q
5
True Outputs
Q0– Q
5
Inverting Outputs
6-BIT D LATCH
FN SUFFIX
PLASTIC PACKAGE
CASE 776-02
MC10E150 MC100E150
MOTOROLA ECLinPS and ECLinPS Lite
DL140 — Rev 4
2–2
DC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
I
IH
Input HIGH Current µA
D 200 200 200
LEN, MR 150 150 150
I
EE
Power Supply Current mA
10E 52 62 52 62 52 62
100E 52 62 52 62 60 72
AC CHARACTERISTICS (VEE = VEE(min) to VEE(max); VCC = V
CCO
= GND)
0°C 25°C 85°C
Symbol Characteristic min typ max min typ max min typ max Unit Condition
t
PLH
Propagation Delay to Output ps
t
PHL
D 250 375 550 250 375 550 250 375 550
LEN 375 500 700 375 500 700 375 500 700
MR 450 625 750 450 625 750 450 625 750
t
s
Setup Time ps
D 200 50 200 50 200 50
t
h
Hold Time ps
D 200 – 50 200 – 50 200 – 50
t
RR
Reset Recovery Time 750 650 750 650 750 650 ps ps
t
PW
Minimum Pulse Width ps
MR 400 400 400
t
SKEW
Within-Device Skew 50 50 50 ps 1
t
r
Rise/Fall Times ps
t
f
20 - 80% 300 450 650 300 450 650 300 450 650
1. Within-device skew is defined as identical transitions on similar paths through a device.
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