Motorola 56F8346 User Manual

Freescale Semiconductor, Inc.

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Order this doc ument by

MC56F8346EVMUM/D

Rev. 1, 08/20/2003

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56F8346 Evaluation Module

User Manual

© Motorola, Inc., 2003. All rights reserved.

Motorola Confidential Proprietary

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List of Tables

Preface

Audience . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii

Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii

Suggested Reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . vii

Notation Conventions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .viii

Definitions, Acronyms, and Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .viii

References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x

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Chapter 1

Introduction

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1.1 56F8346EVM Architecture. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1.2 56F8346EVM Configuration Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1.3 56F8346EVM Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

Chapter 2

Technical Summary

2.1 56F8346. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3

2.2 Program and Data Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-4

2.2.1 SRAM Bank 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-4

2.2.2 SRAM Bank 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-4

2.3 1-Wire 64-Bit ID . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-6

2.4 RS-232 Serial Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

2.5 Clock Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8

2.6 Operating Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8

2.6.1 EXTBOOT. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

2.6.2 EMI_MODE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

2.6.3 CLKMODE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

2.7 Debug LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

2.8 Debug Support. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-11

2.8.1 JTAG Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12

2.8.2 Parallel JTAG Interface Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-13

2.9 External Interrupts. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-14

2.10 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-15

2.11 Power Supply. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-16

MOTOROLA List of Tables i

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2.12 Daughter Card Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-17

2.12.1 Peripheral Daughter Card Expansion Connector . . . . . . . . . . . . . . . . . . . . . 2-17

2.12.2 Memory Daughter Card Expansion Connector . . . . . . . . . . . . . . . . . . . . . . 2-19

2.13 Serial 10-bit 4-channel D/A Converter (Optional) . . . . . . . . . . . . . . . . . . . . . . 2-21

2.14 Motor Control PWM Signals and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-22

2.15 CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-23

2.16 Software Feature Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-24

2.17 Peripheral Expansion Connectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.17.1 Address Bus Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-25

2.17.2 Data Bus Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-26

2.17.3 External Memory Control Signal Expansion Connector . . . . . . . . . . . . . . . 2-27

2.17.4 Encoder #0 / Quad Timer Channel A Expansion Connector . . . . . . . . . . . . 2-27

2.17.5 Encoder #1 / SPI #1 Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . 2-27

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2.17.6 Timer Channel C Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28

2.17.7 Timer Channel D Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-28

2.17.8 A/D Port A Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-29

2.17.9 A/D Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-30

2.17.10 Serial Communications Port #0 Expansion Connector . . . . . . . . . . . . . . . . 2-30

2.17.11 Serial Communications Port #1 Expansion Connector . . . . . . . . . . . . . . . . 2-30

2.17.12 Serial Peripheral Interface #0 Expansion Connector . . . . . . . . . . . . . . . . . . 2-31

2.17.13 FlexCAN Expansion Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-31

2.17.14 PWM Port A Expansion Connector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32

2.17.15 PWM Port B Expansion Connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32

2.18 Test Points . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-33

Appendix A

56F8346EVM Schematics

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Appendix B

56F8346EVM Bill of Material

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ii 56F8346EVM User Manual MOTOROLA

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List of Figures

1-1 Block Diagram of the 56F8346EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-2

1-2 56F8346EVM Jumper Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

1-3 Connecting the 56F8346EVM Cables . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-4

2-1 Schematic Diagram of the External CS0 Memory Interface . . . . . . . . . . .2-4

2-2 Schematic Diagram of the External CS1/CS2 Memory Interface . . . . . . .2-5

2-3 1-Wire 64-Bit ID Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-6

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2-4 Schematic Diagram of the RS-232 Interface . . . . . . . . . . . . . . . . . . . . . . .2-7

2-5 Schematic Diagram of the Clock Interface . . . . . . . . . . . . . . . . . . . . . . . .2-8

2-6 Schematic Diagram of the Debug LED Interface. . . . . . . . . . . . . . . . . . .2-11

2-7 Block Diagram of the Parallel JTAG Interface . . . . . . . . . . . . . . . . . . . .2-13

2-8 Schematic Diagram of the User Interrupt Interface . . . . . . . . . . . . . . . . .2-15

2-9 Schematic Diagram of the RESET Interface . . . . . . . . . . . . . . . . . . . . . .2-15

2-10 Schematic Diagram of the Power Supply. . . . . . . . . . . . . . . . . . . . . . . . .2-16

2-11 Serial 10-bit, 4-Channel D/A Converter. . . . . . . . . . . . . . . . . . . . . . . . . .2-21

2-12 PWM Group A Interface and LEDs . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-22

2-13 CAN Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-23

2-14 Software Feature Jumpers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-24

2-15 Typical Analog Input RC Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-29

MOTOROLA List of Figures v

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vi 56F8346EVM User Manual MOTOROLA

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List of Tables

1-1 56F8346EVM Default Jumper Options . . . . . . . . . . . . . . . . . . . . . . . . . . .1-3

2-1 SPI0 Jumper Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-7

2-2 RS-232 Serial Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-8

2-3 EXTBOOT Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

2-4 EMI Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-9

2-5 EMI Operating Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

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2-6 LED Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-10

2-7 JTAG Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12

2-8 Parallel JTAG Interface Disable Jumper Selection . . . . . . . . . . . . . . . . .2-12

2-9 Parallel JTAG Interface Connector Description. . . . . . . . . . . . . . . . . . . .2-14

2-10 Peripheral Daughter Card Connector Description . . . . . . . . . . . . . . . . . .2-17

2-11 Memory Daughter Card Connector Description . . . . . . . . . . . . . . . . . . .2-19

2-12 D/A Header Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-21

2-13 CAN Header Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-23

2-14 External Memory Address Bus Connector Description . . . . . . . . . . . . . .2-25

2-15 External Memory Address Bus Connector Description . . . . . . . . . . . . . .2-26

2-16 External Memory Control Signal Connector Description . . . . . . . . . . . .2-27

2-17 Timer A Signal Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . .2-27

2-18 SPI #1 Signal Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . .2-28

2-19 Timer Channel C Connector Description. . . . . . . . . . . . . . . . . . . . . . . . .2-28

2-20 Timer Channel D Connector Description. . . . . . . . . . . . . . . . . . . . . . . . .2-28

2-21 A/D Port A Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-29

2-22 A/D Port B Connector Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-30

2-23 SCI #0 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-30

2-24 SCI #1 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-31

2-25 SPI #0 Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-31

2-26 CAN Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-31

MOTOROLA List of Tables iii

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2-27 PWM Port A Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32

2-28 PWM Port B Connector Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-32

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iv 56F8346EVM User Manual MOTOROLA

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Preface

This reference manual describes in detail the hardware on the 56F8346 Evaluation
Module.

Note: The 56F8346EVM board may have an obsolete part number, DSP56F836EVM.

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Audience

This document is intended for application developers who are creating software for
devices using the Motorola 56F8346 part.

Organization

This manual is organized into two chapters and two appendixes.

• Chapter 1,Introduction

provides an overview of the EVM and its features.

• Chapter 2, Technical Summary - describes in detail the 56F8346 hardware.

• Appendix A, 56F8346EVM Schematics - contains the schematics of the
56F8346EVM.

Appendix B, 56F8346EVM Bill of Material - provides a list of the materials used on the

•

56F8346EVM board

.

Suggested Reading

More documentation on the 56F8346 and the 56F8346EVM kit may be found at URL:

www.motorola.com/semiconductors

MOTOROLA Preface vii

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Notation Conventions

This manual uses the following notational conventions:

Term or Value Symbol Examples Exceptions

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Active High
Signals
(Logic One)

Active Low
Signals
(Logic Zero)

Hexadecimal
Values

Decimal Values No special symbol

Binary Values Begin with the letter

Numbers Considered positive

Blue Text Linkable on-line ...refer to Chapter 7, License

Bold Reference sources,

No special symbol
attached to the
signal name

Noted with an
overbar in text and
in most figures

Begin with a “$”
symbol

attached to the
number

“b” attached to the
number

unless specifically
noted as a negative
value

paths, emphasis

A0

CLKO

WE

OE

$0FF0

$80

10
34

b1010

b0011

5

-10

...see:

http://www.motorola.com/

semiconductors

...

In schematic drawings,
Active Low Signals may be
noted by a backslash: /WE

Voltage is often shown as
positive: +3.3V

Definitions, Acronyms, and Abbreviations

Definitions, acronyms and abbreviations for terms used in this document are defined
below for reference.

A/D

Analog-to-Digital; a method of converting Analog signals to Digital
values

ADC Analog-to-Digital Converter; a peripheral on the 56F8346 part
CAN Controller Area Network; serial communications peripheral and method

CiA

D/A

CAN in Automation; an international CAN user’s group that coordinates
standards for CAN communications protocols

Digital-to-Analog; a method of converting Digital values to an Analog
form

DSP Digital Signal Processor or Digital Signal Processing

viii 56F8346EVM User Manual MOTOROLA

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56F8346
EOnCE

Hybrid controller with motor control peripherals
Enhanced On-Chip Emulation; a debug bus and port created by Motorola

to enable a designer to create a low-cost hardware interface for a
professional quality debug environment

EVM

Evaluation Module; a hardware platform which allows a customer to
evaluate the silicon and develop his application

FlexCAN
GPIO

Flexable CAN Interface Module; a peripheral on the 56F8346 part
General Purpose Input and Output port on Motorola’s family of hybrid

controllers; does not share pin functionallity with any other peripheral on
the chip and can only be set as an input, output or level-sensitive
interrupt input

IC
JTAG
LED

Integrated Circuit
Joint Test Action Group; a bus protocol/interface used for test and debug
Light Emitting Diode

LQFP Low-profile Quad Flat Package
MPIO

Multi Purpose Input and Output port on Motorola’s family of hybrid
controllers; shares package pins with other peripherals on the chip and
can function as a GPIO

OnCE

TM

On-Chip Emulation, a debug bus and port created by Motorola to allow a
means for low-cost hardware to provide a professional-quality debug
environment

PCB
PLL

Printed Circuit Board
Phase Locked Loop

PWM Pulse Width Modulation
QuadDec

RAM
R/C
ROM

Quadrature Decoder; a peripheral on the 56F8346 part
Random Access Memory
Resistor/Capacitor Network
Read-Only Memory

SCI

Serial Communications Interface; a peripherial on Motorola’s family of
hybrid controllers

SPI

Serial Peripheral Interface; a peripheral on Motorola’s family of hybrid
controllers

SRAM

Static Random Access Memory

UART Universal Asynchronous Receiver/Transmitter
WS

MOTOROLA Preface ix

Wait State

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References

The following sources were referenced to produce this manual:

[1] DSP56800E Reference Manual, DSP56800ERM/D; Motorola
[2] 56F8300 Peripheral User Manual, MC56F8300UM/D; Motorola
[3] 56F8346 Technical D ata , MC56F8346/D; Motorola
[4] CiA Draft Recommendation DR-303-1, Cabling and Connector Pin

Assignment, Version 1.0, CAN in Automation

[5] CAN Specification 2.0B, BOSCH or CAN in Automation

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Chapter 1
Introduction

The 56F8346EVM is used to demonstrate the abilities of the 56F8346 and to provide a
hardware tool allowing the development of applications that use the 56F8346.

The 56F8346EVM is an evaluation module board that includes a 56F8346 part, peripheral
expansion connectors, a CAN interface, 512KB of external memory and a pair of daughter

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card connectors. The daughter card expansion connectors are for signal monitoring and
user feature expandability.

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The 56F8346EVM is designed for the following purposes:

• Allowing new users to become familiar with the features of the 56800E
architecture. The tools and examples provided with the 56F8346EVM facilitate
evaluation of the feature set and the benefits of the family.

• Serving as a platform for real-time software development. The tool suite enables
the user to develop and simulate routines, download the software to on-chip or
on-board RAM, run it, and debug it using a debugger via the JTAG/Enhanced
OnCE (EOnCE) port. The breakpoint features of the EOnCE port enable the user
to easily specify complex break conditions and to execute user-developed software
at full speed until the break conditions are satisfied. The ability to examine and
modify all user-accessible registers, memory and peripherals through the EOnCE
port greatly facilitates the task of the developer.

• Serving as a platform for hardware development. The hardware platform enables
the user to connect external hardware peripherals. The on-board peripherals can be
disabled, providing the user with the ability to reassign any and all of the hybrid
controller's peripherals. The EOnCE port's unobtrusive design means that all
memory on the board and on the chip is available to the user.

MOTOROLA Introduction 1-1

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1.1 56F8346EVM Architecture

The 56F8346EVM facilitates the evaluation of various features present in the 56F8346
part. The 56F8346EVM can be used to develop real-time software and hardware products
based on the 56F8346. The 56F8346EVM provides the features necessary for a user to
write and debug software, demonstrate the functionality of that software and interface
with the user’s application-specific device(s). The 56F8346EVM is flexible enough to
allow a user to fully exploit the 56F8346’s features to optimize the performance of his
product, as shown in Figure 1-1.

56F8346

Program Memory

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DSub

25-Pin

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128Kx16-bit

SRAM

Data Memory

128Kx16-bit

SRAM

Memory
Expansion
Connector

Memory

Daughter Card

Connector

Reset Logic

Mode/IRQ Logic

JTAG

Connector

Parallel

JTAG

Interface

8.00MHz
Crystal

Address,
Data &
Control

RESET

MODE/IRQ

JTAG/EOnCE

XTAL/
EXTAL

SPI #0

SCI #0

SCI #1
Timer C
Timer D

PWMA

ADCA

QuadDec #0

PWMB

ADCB

QuadDec #1

FlexCAN

+3.3V & GND

+3.3VA & AGND

+3.0Vref

4-Channel
10-Bit D/A

TM

1-Wire
64-Bit ID

RS-232

Interface

Peripheral
Expansion

Connectors

CAN Interface

Debug LEDs

PWM LEDs

Power Supply

+3.3V, +3.3VA, +5V &

+3.0VA

D/A

Header

DSub
9-Pin

Peripheral

Daughter Card

Connector

CAN Bus

Header

CAN Bus

DaisyChain

Optional

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Figure 1-1. Block Diagram of the 56F8346EVM

1.2 56F8346EVM Configuration Jumpers

Sixteen jumper groups, (JG1-JG16), shown in Figure 1-2, are used to configure various
features on the 56F8346EVM board. Table 1-1 describes the default jumper group
settings.

1-2 56F8346EVM User Manual MOTOROLA

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56F8346EVM Configura tio n Jump er s

JG1

JG11

JG5

JG2

1

3

1

3

J5

JG11

J19

J20

J18

J17

JG15

1

JG16

3

3

1

PC0
PC1
PC2
PC3

PD6

PD7

PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5

JG15

JG16

J10 J11

JG12

2

4

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JG7

JG13

J14

J9

J21

J15 J16

J1

U1

JG2

JG1

Y1

JG12

J12

JG7

U4

LED3

JG14

JG3

JG13

S3

S2 S1

P2

RESET

IRQA

1

3

JG14

J6

JG5

JG6

DSP56F836EVM

U2

U3

JG10

JTAG

J3

J13

JG4

U11

P1

IRQB

J7

J8

J2

S/N

JG9

U10

P3

JG4

JG3

3

4

JG6

2

1

JG10

JG9

Figure 1-2. 56F8346EVM Jumper Reference

Table 1-1. 56F8346EVM Default Jumper Options

Jumper

Group

Comment

JG1 Use on-board EXTAL crystal input for the device’s osc il lator 1–2
JG2 Use on-board XTAL crystal input for the device’s oscillator 1–2
JG3 Enable Internal Boot Mo de 1–2
JG4 Enable A0 - A19 for external memory accesses NC

cale Semiconductor,

JG5 Enable SRAM Memory Bank 0 (use CS0) 1–2
JG6 Enable SRAM Memory Bank 1 (use CS1 & CS2) 1–2 & 3–4
JG7 Enable RS-232 output NC

Jumpers

Connections

Frees

JG8 SPI #0 Daisy Chain (Optional--not populated on board by default) NC

JG9 Enable on-board Parallel JTAG Host/Target Interface NC
JG10 Connect Analog Ground to Digital Grou nd NC
JG11 CAN termination selected 1–2
JG12 Pass RXD0 & TXD0 to RS-232 level converter 1–2 & 3–4
JG13 Enable Crystal Mode 1–2
JG14 Pass Temperature Diode to ANA7 1–2
JG15 User Jumper #0 1–2
JG16 User Jumper #1 1–2

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1.3 56F8346EVM Connections

An interconnection diagram is shown in Figure 1-3 for connecting the PC and the external
+12.0V DC/AC power supply to the 56F8346EVM board.

Parallel Extension

Cable

56F8346EVM
PC-compatible
Computer

P1

Connect cable

to Parallel/Printer port

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Figure 1-3. Connecting the 56F8346EVM Cables

External

+12V

Power

P3

with 2.1mm,
receptacle
connector

Perform the following steps to connect the 56F8346EVM cables:

1. Connect the parallel extension cable to the Parallel port of the host computer.

2. Connect the other end of the parallel extension cable to P1, shown in Figure 1-3,

on the 56F8346EVM board. This provides the connection which allows the host
computer to control the board.

3. Make sure that the external +12V DC, 1.2A power supply is not plugged into a
+120V AC power source.

cale Semiconductor,

4. Connect the 2.1mm output power plug from the external power supply into P3,
shown in Figure 1-3, on the 56F8346EVM board.

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5. Apply power to the external power supply. The green Power-ON LED, LED13,
will illuminate when power is correctly applied.

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Chapter 2
Technical Summary

The 56F8346EVM is designed as a versatile hybrid controller development card for
developing real-time software and hardware products to support a new generation of
applications in servo and motor control, digital and wireless messaging, digital answering
machines, feature phones, modems, and digital cameras. The power of the 16-bit

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56F8346, combined with the on-board 128K × 16-bit external program/data static RAM
(SRAM), 128K × 16-bit external data/program SRAM, RS-232 interface, CAN interface,
Daughter Card Expansion interface and parallel JTAG interface, makes the 56F8346EVM
ideal for developing and implementing many motor controlling algorithms, as well as for
learning the architecture and instruction set of the 56F8346 processor.

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The main features of the 56F8346EVM, with board and schematic reference designators
include:

• 56F8346FV60, a 16-bit +3.3V/+2.5V Digital Signal Processor operating at 60MHz
[U1]

• External fast static RAM (FSRAM) memory, configured as:
— 128K×16-bit of memory [U2] with 0 wait state at 60MHz via CS0
— 128K×16-bit of memory [U3] with 0 wait state at 60MHz via CS1/CS2

• 1-Wire Serial 64-Bit Unique ID [U6]

• Optional 4-Channel 10-bit Serial D/A, SPI for real-time user data display [U5]

• 8.00MHz crystal oscillator for hybrid controller frequency generation [Y1]

• Optional external oscillator frequency input connectors [JG1 and JG2]

• Joint Test Action Group (JTAG) port interface connector for an external debug
Host Target Interface [J3]

• On-board Parallel JTAG Host Target Interface, with a connector for a PC printer
port cable [P1], including a disable jumper [JG9]

• RS-232 interface for easy connection to a host processor [U4 and P2], with a
disable jumper [JG7]

• CAN interface for high speed, 1.0Mbps, FlexCAN communications [U16 and J5]

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• CAN bypass and bus termination [J6 and JG11]

• Peripheral Daughter Card Expansion Connector, to allow the user to connect his
own SCI, SPI or GPIO compatible peripheral to the hybrid controller[J1]

• Memory Daughter Card Expansion Connector, to allow the user to connect his own
memory or memory device to the hybrid controller [J2]

• Connector to allow the user to connect his own SCI #0 / MPIO-compatible
peripheral [J16]

• Connector to allow the user to connect his own SCI #1 / MPIO-compatible
peripheral [J17]

• Connector to allow the user to connect his own SPI #0 / MPIO-compatible
peripheral [J14]

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• Connector to allow the user to connect his own SPI #1 / MPIO-compatible
peripheral [J15]

• Connector to allow the user to connect his own PWMA-compatible peripheral
[J10]

• Connector to allow the user to connect his own PWMB-compatible peripheral [J11]

• Connector to allow the user to connect his own CAN physical layer peripheral
[J21]

• Connector to allow the user to connect his own Timer A / Encoder #0-compatible
peripheral [J18]

• Connector to allow the user to connect his own Timer C-compatible peripheral
[J19]

• Connector to allow the user to connect his own Timer D-compatible peripheral
[J20]

• Connector to allow the user to attach his own A/D port A-compatible peripheral
[J12]

• Connector to allow the user to attach his own A/D port B-compatible peripheral
[J13]

• On-board power regulation from an external +12V DC-supplied power input [P3]

• Light Emitting Diode (LED) power indicator [LED13]

• Six on-board real-time user debugging LEDs [LED1-6]

• Six on-board Port A PWM monitoring LEDs [LED7-12]

• Internal/External (EXTBOOT) Boot MODE selector [JG3]

• Address Range (EMI_MODE) Boot MODE selector [JG4]

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• Clock MODE (CLKMODE) Boot selector [JG13]

• Temperature Sense Diode to ANA7 selector [JG14]

• Manual RESET push-button [S1]

56F8346

• Manual interrupt push-button for IRQA

• Manual interrupt push-button for IRQB

[S2]

[S3]

• General purpose jumper on GPIO PE4 [JG15]

• General purpose jumper on GPIO PE7 [JG16]

2.1 56F8346

The 56F8346EVM uses a Motorola DSP56F836FV60 part, designated as U1 on the board

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cale Semiconductor,

and in the schematics. This part will operate at a maximum external bus speed of 60MHz.
A full description of the 56F8346, including functionality and user information, is
provided in these documents:

• 56F8346 Technical Data Sheet, (56F8346/D): Electrical and timing specifications,

pin descriptions, device specific peripheral information and package descriptions
(this document)

• 56F8300 Peripheral User Manual, (MC56F8300UM/AD): Detailed description of
peripherals of the 56F8300 family of devices

• DSP56800E Reference Manual, (DSP56800ERM/D): Detailed description of the
56800E family architecture, 16-bit core processor, and the instruction set

Refer to these documents for detailed information about chip functionality and operation.
They can be found on this URL:

www.motorola.com/semiconductors

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2.2 Program and Data Memory

The 56F8346EVM contains two 128Kx16-bit Fast Static RAM banks. SRAM bank 0 is
controlled by CS0 and SRAM bank 1 is controlled by CS1 and CS2. This provides a total
of 256Kx16-bit of external memory.

2.2.1 SRAM Bank 0

SRAM bank 0, which is controlled by CS0, uses a 128K×16-bit Fast Static RAM (GSI
GS72116, labeled U2) for external memory expansion; see the FSRAM schematic
diagram in Figure 2-1. CS0 can be configured to use this memory bank as 16-bit program
memory, data memory, or both. Additionally, CS0 can be configured to assign this
memory’s size and starting address to any modulo address space.

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This memory bank will operate with zero wait state access while the 56F8346 is running at
60MHz and can be disabled by removing the jumper at JG5.

56F8346

A0-A16
D0-D15

RD

WR

PS/CS0

+3.3V

Jumper Pin 1-2:
Enable SRAM

Jumper Removed:
Disable SRAM

JG5

1

2

Figure 2-1. Schematic Diagram of the External CS0 Memory Interface

GS72116

A0-A16
DQ0-DQ15

OE

WE

CE

2.2.2 SRAM Bank 1

SRAM bank 1, which is controlled by CS1 and CS2, uses a 128K×16-bit Fast Static RAM
(GSI GS72116, labeled U3) for external memory expansion; see the FSRAM schematic
diagram in Figure 2-2. Using CS1 and CS2, this memory bank can be configured as byte
(8-bit) or word (16-bit) accessable program memory, data memory, or both. Additionally,
CS1 and CS2 can be configured to assign this memory’s size and starting address to any
modulo address space.

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Program and Data Memory

This memory bank will operate with zero wait state access while the 56F8346 is running at
60MHz and can be disabled by removing the jumpers at JG6.

56F8346

A0-A16

D0-D15

RD

WR

DS/CS1

PD0/CS2

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Jumper Pin 1-2:
Enable SRAM Low Byte

Jumper Pin 3-4:
Enable SRAM High Byte

JG6

1
3

2
4

GS72116

A0-A16
DQ0-DQ15

OE

WE
LB

HB
CE

Figure 2-2. Schematic Diagram of the External CS1/CS2 Memory Interface

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2.3 1-Wire 64-Bit ID

A unique ID for each 56F8346EVM board is provided by the use of a 64-bit 1-Wire ID
device, Dallas Semiconductor DS2401P, designated as U6; see Figure 2-3. The device’s
1-Wire interface connects to GPIO Port E 6 (PE6) through a zero ohm resistor. The 64-Bit
ID in the 1-Wire part can be used to uniquely identify the 56F8346EVM board via
software to external devices. Since the SPI #0 port and GPIO Port E are multiplexed on
the 56F8346, the GPIO Port bit 7 must be selected in software and the data bit-banged on
the 1-Wire interface. The 1-Wire ID port can be isolated from the hybrid controller, via the
MISO0 signal, by removing R84.

5.1K

+3.3V

1-Wire 64-Bit ID

1-W DATA

56F8346

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R84

MISO0/PE7

0 ohm

Figure 2-3. 1-Wire 64-Bit ID Block Diagram

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RS-232 Serial Communications

2.4 RS-232 Serial Communications

The 56F8346EVM provides an RS-232 interface by the use of an RS-232 level converter,
Maxim MAX3245EEAI, designated as U4. Refer to the RS-232 schematic diagram in

Figure 2-4. The RS-232 level converter transitions the SCI UART’s +3.3V signal levels

to RS-232-compatible signal levels and connects to the host’s serial port via connector P2.
Flow control is not provided, but could be implemented using uncommitted GPIO signals.
The SCI0 port signals can be isolated from the RS-232 level converter by removing the
jumpers in JG12, reference Table 2-1. The pinout of connector P2 is listed in Table 2-3.
The RS-232 level converter/transceiver can be disabled by placing a jumper at JG7.

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56F8346

TXD0

RXD0

Jumper Removed:
Enable RS-232

Jumper Pin 1-2:
Disable RS-232

JG12

1
3

2

4

+3.3V

JG7

1
2

Figure 2-4. Schematic Diagram of the RS-232 Interface

.

Table 2-1. SPI0 Jumper Options

RS-232

Level Converter

Interface

T1in
R1out

FORCEOFF

JG12

T1out

R1in

P2

1
6
2
7
3
8
4

9

x

5

Pin # Signal Pin # Signal

1TXD02RS-232 TXD
3 RXD0 4 RS-232 RXD

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.

Table 2-2. RS-232 Serial Connector Description

P2

Pin # Signal Pin # Signal

1 Jumper to 6 & 4 6 Jumper to 1 & 4
2 TXD 7 Jumper to 8
3 RXD 8 Jumper to 7
4 Jumper to 1 & 6 9 N/C
5GND

2.5 Clock Source

The 56F8346EVM uses an 8.00MHz crystal, Y1, connected to its External Crystal Inputs,
EXTAL and XTAL. To achieve its 120MHz maximum internal operating frequency, the
56F8346 uses its internal PLL to multiply the input frequency by 15. An external
oscillator source can be connected to the hybrid controller by using the oscillator bypass
connectors, JG1 and JG2; see Figure 2-5. If the input frequency is above 8MHz, then the
EXTAL input should be jumpered to ground by adding a jumper between JG1 pins 2 and

3. The input frequency would then be injected on JG2’s pin 2. If the input frequency is
below 4MHz, then the input frequency can be injected on JG1’s pin 2.

EXTERNAL

OSCILLATOR

HEADERS

JG1

1
2
3

8.00MHz

JG2

1
2

56F8346

EXTAL

XTAL

Figure 2-5. Schematic Diagram of the Clock Interface

2.6 Operating Mode

The 56F8346EVM provides three BOOT MODE selection jumpers, EXTBOOT,
EMI_MODE and CLKMODE, to provide boot-up MODE options.

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Operating Mode

2.6.1 EXTBOOT

The 56F8346EVM provides an External/Internal Boot Mode jumper, JG3. This jumper is
used to select the internal or external memory operation of the hybrid controller as it exits
RESET. Refer to the 56F8300 Peripheral User Manual and the 56F8346 Technical
Data sheet for a complete description of the chip’s operating modes. Table 2-3 shows the
two External Boot operation modes available on the 56F8346.

Table 2-3. EXTBOOT Operating Mode Selection

Operating Mode JG3 Comment

01–2 Bootstrap from internal memory (GND)
3 No Jumper Bootstrap from external memory (+3.3V)

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2.6.2 EMI_MODE

cale Semiconductor,

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The 56F8346EVM provides an EMI Boot Mode jumper, JG4. This jumper is used to
select the external memory addressing range operating mode of the hybrid controller as it
exits RESET. The user can select between a 64K address space or a 1M address space.
Refer to the 56F8300 Peripheral User Manual and the 56F8346 Technical Data sheet
for a complete description of the chip’s operating modes. Table 2-4 shows the two EMI
operation modes available on the 56F8346.

Table 2-4. EMI Operating Mode Selection

Operating Mode JG4 Comment

V1 1–2 A0 - A15 (64K) available for external memory bus (GND)
V2 No Jumper A0 - A19 (1M) available for external memory bus (+3.3V)

2.6.3 CLKMODE

The 56F8346EVM provides an Clock Boot Mode jumper, JG13. This jumper is used to
select the type of clock source being provided to the hybrid controller as it exits RESET.
The user can select between the use of a crystal or an oscillator as the clock source for the
hybrid controller. Refer to the 56F8300 Peripheral User Manual and the 56F8346
Technical Data sheet for a complete description of the chip’s operating modes. Table 2-5
shows the two CLKMODE operation modes available on the 56F8346.

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Table 2-5. EMI Operating Mode Selection

Operating Mode JG13 Comment

Crystal 1–2 Enable the external clock drive logic so an external

crystal can be used as the input clock source. (GND)

Oscillator No Jumper Disable the external clock drive logic. Use oscillator

input on XTAL and Ground on EXTAL. (3.3V)

2.7 Debug LEDs

Six on-board Light-Emitting Diodes, (LEDs), are provided to allow real-time debugging
for user programs. These LEDs will allow the programmer to monitor program execution
without having to stop the program during debugging; refer to Figure 2-6. Table 2-6

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describes the control of each LED.

cale Semiconductor,

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Table 2-6. LED Control

Controlled by

User LED Color Signal

LED1 RED Port C Bit-0
LED2 YELLOW Port C Bit-1
LED3 GREEN Port C Bit-2
LED4 RED Port C Bit-3
LED5 YELLOW Port D Bit-6
LED6 GREEN Port D Bit-7

Setting PC0, PC1, PC2, PC3, PD6 or PD7 to a Logic One value will turn on the associated
LED.

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Debug Support

56F8346

PC0

PC1

PC2

PC3

PD6

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PD7

INVERTING BUFFER

+3.3V

RED LED

YELLOW LED

GREEN LED

RED LED

YELLOW LED

GREEN LED

Figure 2-6. Schematic Diagram of the Debug LED Interface

2.8 Debug Support

The 56F8346EVM provides an on-board Parallel JTAG Host Target Interface and a JTAG
interface connector for external Target Interface support. Two interface connectors are
provided to support each of these debugging approaches. These two connectors are
designated the JTAG connector and the Host Parallel Interface Connector.

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2.8.1 JTAG Connector

The JTAG connector on the 56F8346EVM allows the connection of an external Host
Target Interface for downloading programs and working with the 56F8346’s registers.
This connector is used to communicate with an external Host Target Interface which
passes information and data back and forth with a host processor running a debugger
program. Table 2-7 shows the pin-out for this connector.

Table 2-7. JTAG Connector Description

J3

Pin # Signal Pin # Signal

1 TDI 2 GND

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3 TDO 4 GND
5 TCK 6 GND
7 NC 8 KEY

9 RESET
11 +3.3V 12 NC
13 DE

10 TMS

14 TRST

When this connector is used with an external Host Target Interface, the parallel JTAG
interface should be disabled by placing a jumper in jumper block JG9. Reference

Table 2-8 for this jumper’s selection options.

Table 2-8. Parallel JTAG Interface Disable Jumper Selection

JG9 Comment

No jumpers Enable On-board Parallel JTAG Interface

1–2 Disable on-board Parallel JTAG Interface

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Debug Support

2.8.2 Parallel JTAG Interface Connector

The Parallel JTAG Interface Connector, P1, allows the 56F8346 to communicate with a
Parallel Printer Port on a Windows PC; reference Figure 2-7. Using this connector, the
user can download programs and work with the 56F8346’s registers. Table 2-9 shows the
pin-out for this connector. When using the parallel JTAG interface, the jumper at JG9
should be removed, as shown in Table 2-8.

DB-25 Connector

TDI

TDO

P_TRST

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Jumper Removed:
Enable JTAG I/F

Jumper Pin 1-2:
Disable JTAG I/F

TMS

TCK

P_RESET

P_DE

JG9

Figure 2-7. Block Diagram of the Parallel JTAG Interface

cale Semiconductor,

Parallel JTAG Interface

IN
OUT

IN
IN

IN

IN
IN

+3.3V

1
2

EN

OUT

IN

OUT
OUT
OUT
OUT
OUT

56F8346

TDI
TDO
TRST

TMS
TCK

RESET
DE

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Table 2-9. Parallel JTAG Interface Connector Description

P1

Pin # Signal Pin # Signal

1NC14NC
2 PORT_RESET 15 PORT_IDENT
3 PORT_TMS 16 NC
4PORT_TCK17 NC
5PORT_TDI18 GND
6PORT_

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7PORT_DE
8PORT_IDENT21 GND

9PORT_VCC22 GND
10 NC 23 GND
11 PORT_TDO 24 GND
12 NC 25 GND
13 PORT_CONNECT

2.9 External Interrupts

Two on-board push-button switches are provided for external interrupt generation, as

cale Semiconductor,

shown in Figure 2-8. S2 allows the user to generate a hardware interrupt for signal line
IRQA

. S3 allows the user to generate a hardware interrupt for signal line IRQB. These two

switches allow the user to generate interrupts for his user-specific programs.

TRST 19 GND

20 GND

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S2

+3.3V

56F8346

10K

IRQA

0.1µF

+3.3V

Reset

S3

0.1µF

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Figure 2-8. Schematic Diagram of the User Interrupt Interface

10K

IRQB

2.10 Reset

Logic is provided on the 56F8346 to generate an internal Power-On RESET. Additional
reset logic is provided to support the RESET signals from the JTAG connector, the
Parallel JTAG Interface and the user RESET push-button, S1; refer to Figure 2-9.

JTAG_RESET

RESET

PUSHBUTTON

MANUAL RESET

cale Semiconductor,

S1

JTAG_TAP_RESET

RESET

TRST

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Figure 2-9. Schematic Diagram of the RESET Interface

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2.11 Power Supply

The main power input to the 56F8346EVM, +12V DC at 1.2A, is through a 2.1mm coax
power jack. This input power is rectified to provide a DC supply input. This allows a user
the option to use a +12V AC power supply. A 1.2Amp power supply is provided with the
56F8346EVM; however, less than 500mA is required by the EVM. The remaining current
is available for custom control applications when connected to the Daughter Card
connectors. The 56F8346EVM provides +5.0V DC regulation for the CAN interface and
additional regulators. The 56F8346EVM provides +3.3V DC voltage regulation for the
hybrid controller, memory, D/A, ADC, parallel JTAG interface and supporting logic; refer
to Figure 2-11. Additional voltage regulation logic provides a low noise +3.0V DC
voltage reference to the hybrid controller’s A/D V
V

voltage can be provided by the +3.3V A supply on the board by removing U15 and

REFH

adding a 10 ohm resistor at R83. A jumper, JG10, and resistor, R2, is provided to allow the
analog and digital grounds to be isolated on the 56F8346EVM board. This allows the
analog ground reference point to be provided on a custom board attached to the
56F8346EVM’s Daughter Card connectors. By removing R2, the AGND reference is
disconnected from the 56F8346EVM’s digital ground. By placing a jumper in JG10, the
AGND is reconnected to the 56F8346EVM’s digital ground. Power applied to the
56F8346EVM is indicated with a Power-ON LED, referenced as LED13. Optionally, the
user can provide the +2.5 DC voltage needed by the hybrid controller’s core on connector
J22 and disable the on-chip CORE voltage regulator by moving the resistor at R97 to R96.
Additonally, four zero ohm resistors or shorting wires must be added at R92, R93, R94
and R95 to allow the external +2.5V DC to pass to the 56F8346.

+12V DC/AC

Input

P3

Bridge

Rectifier

+5.0V

Regulator

Power

Condition

+3.3V

Regulator

. Optionally, the device’s A/D

REFH

+5.0V DC

+3.3V DC

V

56F8346EVM

CAN

56F8346

& PLL

DD_IO

Parts

Power ON

+2.5V DC

Ext In

Regulator

Regulator

J22

1
2

+3.3V

U15

+3.0V

R92-R95

+3.3VA DC

R83

+3.0V A DC

10Ω

56F8346

V

Core

DD

56F8346

ADC

A

56F8346

V

REFH

Figure 2-10. Schematic Diagram of the Power Supply

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Daughter Card Connectors

2.12 Daughter Card Connectors

The EVM board contains two daughter card expansion connectors. One connector, J1,
contains the device’s peripheral port signals. The second connector, J2, contains the
hybrid controller’s external memory bus signals.

2.12.1 Peripheral Daughter Card Expansion Connector

The device’s peripheral port signals are connected to the Peripheral Daughter Card
Expansion connector, J1. The Peripheral Daughter Card connector is used to connect a
hybrid controller’s daughter card or a user-specific daughter card to the device’s
peripheral port signals. The Peripheral Port Daughter Card connector is a 100-pin
high-density connector with signals for the IRQs, RESET, SPI, SCI, PWM, ADC and
Quad Timer ports. Table 2-10 shows the Peripheral Daughter Card connector’s

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signal-to-pin assignments.

cale Semiconductor,

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Table 2-10. Peripheral Daughter Card Connector Description

J1

Pin # Signal Pin # Signal

1 +12V 2 +12V
3 GND 4 GND
5 +5.0V 6 +5.0V
7 GND 8 GND

9 +3.3V 10 +3.3V
11 GND 12 GND
13 PHASEA0/TA0 PHASEB0/TA1
15 INDEX0/TA2 16 HOME0/TA3
17 GND 18 GND
19 PHASEA1/PC0/TB0/SCLK1 20 PHASEB1/PC1/TB1/MOSI1
21 INDEX1/PC2/TB2/MISO1 22 HOME1/PC3/TB3/SS1
23 TXD0/PE0 24 TXD1/PD6
25 TXD0/PE0 26 TXD1/PD6
27 RXD0/PE1 28 RXD1/PD7
29 IRQA

MOTOROLA Technical Summary 2-17

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30 IRQB

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Table 2-10. Peripheral Daughter Card Connector Description (Continued)

J1

Pin # Signal Pin # Signal

31 RXD0/PE1 32 RXD1/PD7
33 PWMB0 34 PWMB1
35 PWMB2 36 PWMB3
37 PWMB4 38 PWMB5
39 GND 40 GND
41 ISB0 42 ISB1

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43 ISB2 44 GND
45 FAULTB1 46 FAULTB0
47 FAULTB3 48 FAULTB2
49 GND 50 GND
51 PWMA0 52 PWMA1
53 PWMA2 54 PWMA3
55 PWMA4 56 PWMA5
57 GND 58 GND
59 FAULTA0 60 FAULTA1
61 FAULTA2 6 2 MISO0/PE6
63 ISA0 64 ISA1
65 ISA2 66 RSTO
67 MOSI0/PE5 68 SS0/PE7
69 TD0 70 TD1
71 SCLK0/PE7 72 TC0
73 CAN_TX 74 CAN_RX
75 MOSI0/PE5 76 MISO0/PE6
77 SCLK0/PE4 78 SS0
79 GND 80 GND
81 +VREFH 82 +VREFH
83 GNDA 84 GNDA
85 AN0 86 AN1

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Daughter Card Connectors

Table 2-10. Peripheral Daughter Card Connector Description (Continued)

J1

Pin # Signal Pin # Signal

87 AN2 88 AN3
89 AN4 90 AN5
91 AN6 92 AN7
93 AN8 94 AN9
95 AN10 96 AN11
97 AN12 98 AN13

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99 AN14 100 AN15

2.12.2 Memory Daughter Card Expansion Connector

The hybrid controller’s external memory bus signals are connected to the Memory
Daughter Card Expansion connector, J2. Table 2-11 shows the port signal-to-pin
assignments.

Table 2-11. Memory Daughter Card Connector Description

J2

Pin # Signal Pin # Signal

1A42A5
3 A3 4 A6/PE2
5 A2 6 A7/PE3
7A18RD
9GND10GND

11 A0 12 DS

/CS1
13 PS/CS0 14 PD0/CS2
15 D0 16 D15
17 D1 18 D14/PF7
19 GND 20 GND
21 GND 22 GND
23 D2 24 D13/PF6

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Table 2-11. Memory Daughter Card Connector Description (Continued)

J2

Pin # Signal Pin # Signal

25 D3 26 D12/PF5
27 D4 28 D11/PF4
29 D5 30 D10/PF3
31 GND 32 G ND
33 GND 34 G ND
35 D6 36 D9/PF2

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37 D7/PF0 38 D8/PF1
39 WR
41 A15/PA7 42 A8/PA0
43 GND 44 G ND
45 A14/PA6 46 A9/PA1
47 A13/PA5 48 A10/PA2
49 A12/PA4 50 A11/PA3
51 PB0/A16 52 GND
53 GND 54 G ND
55 +3.3V 56 +3.3V
57 GND 58 G ND
59 +5.0V 60 +5.0V

40 PD1/CS3

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Serial 10-bit 4-channel D/A Converter (Optional)

2.13 Serial 10-bit 4-channel D/A Converter (Optional)

The 56F8346EVM board contains the provions for a user to provide a serial 10-bit,
4-channel D/A converter connected to the 56F8346’s SPI #0 port. The output pins are
uncommitted and are connected to a 4X2 header, J4, to allow easy user connections. Refer
to Figure 2-11 for the D/A connections and Table 2-12 for the header’s pin out. The
D/A’s output full-scale range value can be set to a value from +0.0V to +2.4V by a
trimpot, R37. If this trimpot is preset to +2.05V, it would provide approximately +2mV
per step. If another device must be used with SPI #0’s MISO signal and with the D/A
converter on the board, the daisy-chain jumper, JG8, can be used to extend or isolate the
serial chain.

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56F8436

MOSI0
MISO0

SCLK0

SS0

RSTO

JG8

MAX5251

DIN
DOUT

12

SCLK

CS

CL

D/A 0
D/A 1
D/A 2
D/A 3

V

REF

+3.3V A

D/A Connector

R37

Figure 2-11. Serial 10-bit, 4-Channel D/A Converter

Table 2-12. D/A Header Description

J4

1

2

3

4

5

6

7

8

Pin # Signal Pin # Signal

1 D/A Channel 0 2 AGND
3 D/A Channel 1 4 AGND
5 D/A Channel 2 6 AGND
7 D/A Channel 3 8 AGND

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2.14 Motor Control PWM Signals and LEDs

The 56F8346 has two independent groups of dedicated PWM units. Each unit contains six
PWM and three Phase Current sense inputs. One PWM unit has four Fault input lines,
while the other has three Fault input lines. PWM group A’s PWM lines are connected to a
set of six PWM LEDs via inverting buffers. The buffers are used to isolate and drive the
device’s PWM group A’s outputs to the PWM LEDs. The PWM LEDs indicate the status
of PWM group A signals; refer to Figure 2-12. PWM Group A and B signals are routed
out to headers, J10 and J11 respectively, and to the peripheral daughter card connector for
easy use by the end user.

56F8346

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PWMA0
PWMA1

PWMA2
PWMA3

PWMA4
PWMA5

PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5

cale Semiconductor,

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LED7

LED8

LED9

LED10

LED11

LED12

LED

Buffer

Yellow LED

Green LED

Yellow LED

Green LED

Yellow LED

Green LED

Figure 2-12. PWM Group A Interface and LEDs

+3.3V

Phase A Top
Phase A Bottom

Phase B Top

Phase B Bottom

Phase C Top

Phase C Bottom

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CAN Interface

2.15 CAN Interface

The 56F8346EVM board contains a CAN physical-layer interface chip that is attached to
the FlexCAN port’s CAN_RX and CAN_TX pins on the 56F8346EVM. The EVM board
uses a Philips high-speed, 1.0Mbps, physical layer interface chip,PCA82C250. Due to the
+5.0V operating voltage of the CAN interface chip, a pull-up to +5.0V is required to level
shift the Transmit Data output line from the 56F8346. The CANH and CANL signals pass
through inductors before attaching to the CAN bus connectors. A primary, J5, and
daisy-chain, J6, CAN connector are provided to allow easy daisy-chaining of CAN
devices. CAN bus termination of 120 ohms can be provided by adding a jumper to JG11.
Refer to Table 2-13 for the CAN connector signals and Figure 2-13 for a connection
diagram.

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56F8346

CAN_TX

CAN_RX

+5.0V

1K

CAN Transceiver

TXD

CANH
CANL

RXD

PCA82C250T

120

J5

4

5

3

J6

4

5

3

Figure 2-13. CAN Interface

Table 2-13. CAN Header Description

JG11

1

2

CAN Bus

Connector

Daisy-Chain CAN

Connector

CAN Bus

Terminator

J5 and J6

Pin # Signal Pin # Signal

1NC2NC
3 CANL 4 CANH
5GND6NC
7NC8NC
9NC10NC

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2.16 Software Feature Jumpers

The 56F8346EVM board contains two software feature jumpers that allow the user to
select “User-Defined” software features. Two GPIO port pins, PE4 and PE7, are pulled
high or low with 10K ohm resistors on JG16 and JG17. Attaching a jumper between pins 1
and 2 will place a high or 1 on the port pin. Attaching a jumper between pins 2 and 3 will
place a low or 0 on the port pin; see Figure 2-14.

56F8346

JG15

1

SCLK0/PE4

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SS0

/PE7

2

JG16

1

2

3

3

Figure 2-14. Software Feature Jumpers

cale Semiconductor,

10K

10K

10K

10K

+3.3V

+3.3V

User Jumper

#0

User Jumper

#1

Frees

2-24 56F8346EVM User Manual MOTOROLA

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Peripheral Expansi on Conn ector s

2.17 Peripheral Expansion Connectors

The EVM board contains a group of Peripheral Expansion Connectors used to gain access
to the resources of the 56F8346. The following signal groups have Expansion Connectors:

• External Memory Address Bus/General Purpose Port A (bits 0-7)/General Purpose
Port E (bits2&3)/General Purpose Port B (bit 0)

• External Memory Data Bus/General Purpose Port F (bits 0-7)

• External Memory Control/General Purpose Port D (bits 0 and 1)

• Encoder #0/Timer Channel A

• Encoder #1/Serial Peripheral Interface Port #1/Timer Channel B/General Purpose
Port C (bits 0-3)

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• Timer Channel C

• Timer Channel D

• A/D Input Port A

• A/D Input Port B

• Serial Communications Port 0/General Purpose Port E (bits 0 and 1)

• Serial Communications Port 1/General Purpose Port D (bits 6 and 7)

• Serial Peripheral Interface Port #0/General Purpose Port E (bits 4-7)

• PWM Port A

• PWM Port B

2.17.1 Address Bus Expansion Connector

The Address bus expansion connector contains the 56F8346’s 17 external memory
address signal lines. Address lines A6 & A7 can also be used as GPIO Port E lines (bits 2
and 3). Address lines A8 - A15, can also be used as GPIO Port A lines (bits 0-7). Address
line A16 is an MPIO signal, which can be configured as A16 or GPIO Port B bit 0. Refer
to Table 2-14 for the Address bus connector information.

Table 2-14. External Memory Address Bus Connector Description

J7

Pin # Signal Pin # Signal

1A02A1

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Table 2-14. External Memory Address Bus Connector Description

J7

Pin # Signal Pin # Signal

3A24A3
5A46A5
7 A6 / PE2 8 A7 / PE3

9 A8 / PA0 10 A9 / PA1
11 A10 / PA2 12 A11 / PA3
13 A12 / PA4 14 A13 / PA5
15 A14 / PA6 16 A15 / PA7

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17 PB0 / A16 18 NC
19 GND 20 +3.3V

2.17.2 Data Bus Expansion Connector

The Data bus expansion connector contains the 56F8346’s 16 external memory data signal
lines. Refer to Table 2-15 for the Data bus connector information. Data lines D7 - D14,
can also be used as GPIO Port F lines (bits 0-7).

Table 2-15. External Memory Address Bus Connector Description

J8

Pin # Signal Pin # Signal

1D02D1
3D24D3
5D46D5
7 D6 8 D7 / PF0

9 D8 / PF1 10 D9 / PF2
11 D10 / PF3 12 D11 / PF4
13 D12 / PF5 14 D13 / PF6
15 D14 / PF7 16 D15
17 GND 18 +3.3V

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Peripheral Expansi on Conn ector s

2.17.3 External Memory Control Signal Expansion Connector

The External Memory Control Signal connector contains 56F836’s external memory
control signal lines. CS2 and CS3 are MPIO signals, which can be configured as GPIO
Port D lines (bits 0 & 1). Refer to Table 2-16 for the names of these signals.

Table 2-16. External Memory Control Signal Connector Description

J9

Pin # Signal Pin # Signal

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1RD
3WR4IRQB
5PS/CS0 6DS/CS1
7PD0/CS28PD1/CS3
9 CLKO 10 RESET

11 GND 12 RSTO

2IRQA

2.17.4 Encoder #0 / Quad Timer Channel A Expansion Connector

The Encoder #0 / Quad Timer Channel A port is an MPIO port attached to the Timer A
expansion connector. This port can be configured as a Quadrature Decoder interface port
or as a Quad Timer port. Refer to Table 2-17 for the signals attached to the connector.

Table 2-17. Timer A Signal Connector Description

J18

Pin # Signal Pin # Signal

1 PHASEA0/TA0 2 PHASEB0/TA1
3 INDEX0/TA2 4 HOME0/TA3
5GND6+3.3V

2.17.5 Encoder #1 / SPI #1 Expansion Connector

The Encoder #1 / SPI #1 port is an MPIO port attached to the SPI #1 expansion connector.
This port can be configured as a Quadrature Decoder interface port, a Serial Peripherial
Interface, Quad Timer port or General Purpose I/O port. Refer to Table 2-18 for the
signals attached to the connector.

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Table 2-18. SPI #1 Signal Connector Description

J15

Pin # Signal Pin # Signal

1 PHASEB1/MOSI1/TB1/PC1 2 INDEX1/MISO1/TB2/PC2
3 PHASEA1/SCLK1/TB0/PC0 4 HOME1/SS1
5GND6+3.3V

/TB3/PC3

2.17.6 Timer Channel C Expans ion Connector

The Timer Channel C port is a Quad Timer port attached to the Timer C expansion

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connector. Refer to Table 2-19 for the signals attached to the connector.

Table 2-19. Timer Channel C Connector Description

J19

Pin # Signal Pin # Signal

1TC02NC
3 GND 4 +3.3V

2.17.7 Timer Channel D Expans ion Connector

The Timer Channel D port is a Quad Timer attached to the Timer D expansion connector.
Refer to Table 2-20 for the signals attached to the connector.

Frees

Table 2-20. Timer Channel D Connector Description

J20

Pin # Signal Pin # Signal

1 TD0 2 TD1
3 GND 4 +3.3V

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Peripheral Expansi on Conn ector s

2.17.8 A/D Port A Expansion Connector

The 8-channel Analog to Digital conversion port A is attached to this connector. Refer to

Table 2-21 for connection information. There is an RC network on each of the Analog

Port A input signals; referenceFigure 2-15.

Table 2-21. A/D Port A Connector Description

J12

Pin # Signal Pi n # Signal

1AN02AN1

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3AN24AN3
5AN46AN5
7AN68AN7
9 GNDA 10 +VREFH

100 ohm

Analog Input

To Device’s Analog Port

0.0022uF

Figure 2-15. Typical Analog Input RC Filter

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2.17.9 A/D Port B Expansion Connector

The 8-channel Analog-to-Digital conversion port B is attached to this connector. Refer to

Table 2-22 for connection information. There is an RC network on each of the Analog

Port A input signals; see Figure 2-15.

Table 2-22. A/D Port B Connector Description

J13

Pin # Signal Pin # Signal

1 AN8 2 AN9

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3AN104AN11
5AN126AN13
7AN148AN15
9 GNDA 10 +VREFH

2.17.10 Serial Communications Port #0 Expansion Connector

The Serial Communications Port #0 is an MPIO port attached to the SCI #0 expansion
connector. This port can be configured as a Serial Communications Interface or as a
General Purpose I/O port. Refer to Table 2-23 for connection information.

Table 2-23. SCI #0 Connector Description

J16

Pin # Signal Pin # Signal

1 TXD0/PE0 2 RXD0/PE1

3GND4+3.3V

5GND6+5.0V

2.17.11 Serial Communications Port #1 Expansion Connector

The Serial Communications Port #1 is an MPIO port attached to the SCI #1 expansion
connector. This port can be configured as a Serial Communications Interface or as a
General Purpose I/O port. Refer to Table 2-24 for connection information.

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Peripheral Expansi on Conn ector s

Table 2-24. SCI #1 Connector Description

J17

Pin # Signal Pin # Signal

1 TXD1/PD6 2 RXD1/PD7
3GND4+3.3V
5GND6+5.0V

2.17.12 Serial Peripheral Interface #0 Expansion Connector

The Serial Peripheral Interface #0 is an MPIO port attached to this connector. This port

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can be configured as a Serial Peripheral Interface or as a General Purpose I/O port. Refer
to Table 2-25 for the connection information.

cale Semiconductor,

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Table 2-25. SPI #0 Connector Description

J14

Pin # Signal Pin # Signal

1 MOSI0/PE5 2 MISO0/PE6
3 SCLK0/PE4 4 SS0
5 GND 6 +3.3V

/PE7

2.17.13 FlexCAN Expansion Connector

The FlexCAN port is attached to this connector. Refer to Table 2-26 for connection
information.

Table 2-26. CAN Connector Description

J21

Pin # Signal Pin # Signal

1CAN_TX2 GND
3CAN_RX4 GND

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2.17.14 PWM Port A Expansion Connector

The PWM port A is attached to this connector. Refer to Table 2-27 for connection
information.

Table 2-27. PWM Port A Connector Description

J10

Pin # Signal Pin # Signal

1 PWMA0 2 PWMA1
3 PWMA2 4 PWMA3

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5 PWMA4 6 PWMA5
7 FAULTA0 8 FAULTA1

9 FAULTA2 10 NC
11 ISA0 12 ISA1
13 ISA2 14 GND

2.17.15 PWM Port B Expansion Connector

The PWM port B is attached to this connector. Refer to Table 2-28 for connection
information.

Table 2-28. PWM Port B Connector Description

J11

Pin # Signal Pin # Signal

1 PWMB0 2 PWMB1

3 PWMB2 4 PWMB3

5 PWMB4 6 PWMB5

7 FAULTB0 8 FAULTB1

9 FAULTB2 10 FAULTB3
11 ISB0 12 ISB1
13 ISB2 14 GND

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Test Points

2.18 Test Points

The 56F8346EVM board has a total of seven test points:

• Analog Ground (AGND)

• Three Digital Grounds (GND)

• +3.3

• +3.3VA

• +5.0V

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MOTOROLA Technical Summary 2-33

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2-34 56F8346EVM User Manual MOTOROLA

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Appendix A
56F8346EVM Schematics

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MOTOROLA 56F8346EVM Schematics A-1

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A-2 56F8346EVM User Manual MOTOROLA

A

U1A

A0
A1
A2
A3
A4
A5

/IRQA
/IRQB

EXTBOOT

EMI_MODE

XTAL

EXTAL

CLKO

CLKMODE

/RESET

/RSTO

MISO0
MOSI0

SCLK0

/TRST

/WR

/SS0

TDO

A6
A7
A8

A9
A10
A11
A12
A13
A14
A15

D0

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10
D11
D12
D13
D14
D15

/PS
/DS
PD0
PD1

/RD

TDI

TCK

TMS

4 4

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3 3

2 2

138

A0

10

A1

11

A2

12

A3

13

A4

14

A5

17

A6/PE2

18

A7/PE3

19

A8/PA0

20

A9/PA1

21

A10/PA2

22

A11/PA3

23

A12/PA4

24

A13/PA5

25

A14/PA6

26

A15/PA7

33

PB0

133
134
135
136
137

112
143

131
132
130
129

123
124
121
120
122

59
60
72
75
76
77
78
28
29
30
32

46
47
48
49

44
45

54
55

81
82

3

87

86
85

PB0/A16

D0
D1
D2
D3
D4
D5
D6
D7/PF0
D8/PF1
D9/PF2
D10/PF3
D11/PF4
D12/PF5
D13/PF6
D14/PF7
D15

PS/CS0
DS/CS1
PD0/CS2
PD1/CS3

WR
RD

IRQA
IRQB

EXTBOOT
EMI_MODE

XTAL
EXTAL
CLKO
CLKMODE

RESET
RSTO

MISO0/PE6
MOSI0/PE5
SCLK0/PE4
SS0/PE7

TDI
TDO
TCK
TRST
TMS

cale Semiconductor,

1 1

Frees

A

B

INDEX0/TA2
HOME0/TA3

INDEX1/TB2/MISO1/PC2

PHB1/TB1/MOSI1/PC1

PHA1/TB0/SCLK1/PC0

HOME1/TB3/SS1/PC3

TEMP_SENSE

DSP56F836FV60

B

PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5

ISA0
ISA1

ISA2
FAULTA0
FAULTA1
FAULTA2

PHA0/TA0
PHB0/TA1

ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7

PWMB0
PWMB1
PWMB2
PWMB3
PWMB4
PWMB5

ISB0

ISB1

ISB2
FAULTB0
FAULTB1
FAULTB2
FAULTB3

ANB0
ANB1
ANB2
ANB3
ANB4
ANB5
ANB6
ANB7

CAN_TX

CAN_RX

TXD0/PE0

RXD0/PE1

TXD1/PD6
RXD1/PD7

C

62
64
65
67
68
70
113
114
115
71
73
74

139
140
141
142

88
89
90
91
92
93
94
95

34
35
36
39
40
41
50
52
53
56
57
58
61

104
105
106
107
108
109
110
111

8
7
6
9

118

TC0

116

TD0

117

TD1

126
127

96

4
5

42
43

PWMA0
PWMA1
PWMA2
PWMA3
PWMA4
PWMA5
ISA0
ISA1
ISA2
FAULTA0
FAULTA1
FAULTA2

PHASEA0
PHASEB0
INDEX0
HOME0

ANA0
ANA1
ANA2
ANA3
ANA4
ANA5
ANA6
ANA7

PWMB0
PWMB1
PWMB2
PWMB3
PWMB4
PWMB5
ISB0
ISB1
ISB2
FAULTB0
FAULTB1
FAULTB2
FAULTB3

ANB0
ANB1
ANB2
ANB3
ANB4
ANB5
ANB6
ANB7

INDEX1
PHASEB1
PHASEA1
HOME1

TC0

TD0
TD1

CAN_TX
CAN_RX

TXD0
RXD0

TXD1
RXD1

JG14

+3.3V

+2.5V

R92

R93

R94

0 Ohm

0 Ohm

DNP

DNP

C11

2.2uF

C12

2.2uF

1

ANA7

2

0 Ohm
DNP

C13

2.2uF

+3.3V

Use external
+2.5V Supply

R95
0 Ohm
DNP

C14

2.2uF

R96

0 Ohm
DNP

VCAPC1
VCAPC2
VCAPC3
VCAPC4

REG_EN

FAULTA0

FAULTA1

FAULTA2

119

125

128

144

R85

47K

R86

47K

R87

47K

1
16
31
38
66
84

2

51

83
15

27
37
63
69

79

R97
0 Ohm

VDD_IO1
VDD_IO2
VDD_IO3
VDD_IO4
VDD_IO5
VDD_IO6
VDD_IO7

VPP1
VPP2

VCAPC1
VCAPC2
VCAPC3
VCAPC4

VSS_IO1
VSS_IO2
VSS_IO3
VSS_IO4
VSS_IO5

REG_EN

D

U1B

DSP56F836FV60

Use on-chip
regulators

VDDA_OSC_PLL

VDDA_ADC

VSSA_ADC

VREFH

VREFP

VREFMID

VREFN

VREFLO

FAULTB0

FAULTB1

FAULTB2

FAULTB3

E

80

+3.3V_PLL

102

103

101

100
99
98

97

R88

47K

R89

47K

R90

47K

R91

47K

C16

0.1uF

+VREFH

C17

0.1uF

C15

0.001uF

C18

0.1uF

DSP Standard Products Division

+3.3VA

C52
100pF

Single trace
to GNDA

C19

0.1uF

Single trace
to GNDA

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Title

DSP56F836 Processor

Document

Size

Number

B

C

Date:

DSP56F836EVM.DSN

Wednesday, January 22, 2003

D

Designer: Sheet of

DSPD Design

1

E

Rev.

1.0

14

Figure A-1. 56F8346 Processor

MOTOROLA 56F8346EVM Schematics A-3

A

B

C

D

E

JG1

1

2

3

NC

1 - 2

NC

1 - 2

OSC BYPASS

JG2

1

2

+3.3V

R41
10K

+3.3V

R42
10K

Y1

4 4

8.00MHz

nc...

I

BOOT MODE JUMPER

10M
R1

EXT BOOT
INT BOOT

3 3

JG3

2
1

EMI MODE JUMPER

EMI A0-A19
EMI A0-A15

2 2

JG4

2
1

EXTAL

S1 JG13

RESET PUSHBUTTON

XTAL

IRQA PUSHBUTTON

S2

EXTBOOT

IRQB PUSHBUTTON

S3

EMI_MODE

OPTIONAL

+3.3V

cale Semiconductor,

1 1

Frees

A

2

3

U17

Vcc

GND

DS1818

3

DS1818

12

RST

/POR

1

RESET, MODE, CLOCK & IRQS

Title

Size

B

Document
Number

A

Date:

DSP56F836EVM.DSN

C

+3.3V +3.3V

R38
10K

/POR

+3.3V

R39
10K

C20

0.1uF

+3.3V

R40

10K

C21

0.1uF

CLOCK MODE JUMPER

USE CRYSTAL

EXT OSC

/IRQA

/IRQB

SCLK0

1 - 2

NC

2
1

+3.3V

R79

10K

PE4

R80

10K

SOFTWARE FEATURE JUMPERS

+3.3V

R81

10K

PE7

/SS0

R82

10K

JG15

1
2
3

JG16

1
2
3

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

D

R23
10K

User

Jumper

User

Jumper

214Tuesday, February 04, 2003

CLKMODE

#0

#1

E

Rev.

1.0

Figure A-2. RESET, CLOCK, BOOT MODES & IRQs

A-4 56F8346EVM User Manual MOTOROLA

A

B

C

D

E

128Kx16-bit Program Memory (CS0) 128Kx16-bit Data Memory (CS1/CS2)

U2

A0
A1

A10
A11
A12
A13
A14
A15
PB0

/RD

/WR

R25

A2
A3
A4
A5
A6
A7
A8
A9

1K

4 4

JG5

+3.3V

R43
10K

1

2

/ECS0

nc...

I

3 3

/PS

5

A0

4

A1

3

A2

1

A4

44

A5

43

A6

42

A7

27

A8

26

A9

25

A10

24

A11

21

A12

20

A13

19 37

A14 D Q15

18

R26
1K

22

41
17

6
39
40

A15
A16

OE
WE
CE
LB
UB

GS72116TP-10

A16

CS0 ENABLE JUMPER

2 2

OPTION JG5

SRAM DISABLE

DQ1
DQ2
DQ3
DQ4A3
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14

DQ16

VDD

VDD

VSS
VSS

7
8
9
102
13
14
15
16
29
30
31
32
35
36

38

11
33

12
34

1-2SRAM ENABLE

NC

D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D10
D11
D12
D13
D14
D15

+3.3V +3.3V

+3.3V

JG6

132

4

/ECS1

/ECS2

R44

R45

10K

10K

/DS

PD0

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
PB0

/RD
/WR

/ECS1
/ECS2

R27
1K

CS1/CS2 ENABLE JUMPER

SRAM UPPER BYTE ENABLE
SRAM LOWER BYTE ENABLE

SRAM DISABLE

cale Semiconductor,

1 1

Frees

A

B

Title

PROGRAM [WORD] (CS0) and DATA [BYTE] (CS1/CS2) SRAM MEMORY

Size

Document
Number

A

Date:

Tuesday, February 04, 2003

DSP56F836EVM.DSN

C

Designer: Sheet of

D

U3

5

A0

4

A1

3

A2

1

A4

44

A5

43

A6

42

A7

27

A8

26

A9

25

A10

24

A11

21

A12

20

A13

19 37

A14 D Q15

18

A15

22

A16

41

OE

17

WE

6

CE

39

LB

40

UB

DQ1
DQ2
DQ3
DQ4A3
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14

DQ16

VDD

VDD

VSS

VSS

GS72116TP-10

D0

7

D1

8

D2

9

D3

102

D4

13

D5

14

D6

15

D7

16

D8

29

D9

30

D10

31

D11

32

D12

35

D13

36

D14
D15

38

11
33

12
34

OPTION JG6

3-4

1-2SRAM WORD ENABLE

3-4

NC

1-2

NC

NC

NC

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

DSPD Design

314

E

Rev.

1.0

Figure A-3. Program [Word] (CS0) & Data [Byte] (CS1/CS2) SRAM Memory

MOTOROLA 56F8346EVM Schematics A-5

A

B

C

D

E

4 4

nc...

I

3 3

RS-232 SHUTDOWN JUMPER

RS-232 ENABLE

RS-232 DISABLE

2 2

N/C

1 - 2

TXD0

RXD0

JG7

1
2

JG12

132

4

+3.3V

C7

1.0uF

C8

1.0uF

TX_IN

RX_OUT

R28
1K

RS232EN

T2IN
T3IN

1

1
1
1
1

/EN

U4

28

C1+

24

C1-

1

C2+

2

C2-

14

T1IN

13

T2IN

12

T3IN

20

R2OUTB

19

R1OUT

18

R2OUT

17

R3OUT

16

R4OUT

15 8

R5OUT R5IN

23

FORCEON

22

FORCEOFF

MAX3245EEAI

VCC

GND

T1OUT
T2OUT
T3OUT

R1IN
R2IN
R3IN
R4IN

INVALID

cale Semiconductor,

1 1

Frees

A

B

RS-232 AND SCI CONNECTORS

Title

Size

Document
Number

A

Date:

Friday, January 24, 2003

+3.3V

26

C10

3

V-

V+

1.0uF

C9

27

1.0uF

25

1
1

R2IN
R3IN
R4IN
R5IN

1

TXD

RXD

9
10
11

4
5
6
7

21

DSP56F836EVM.DSN

C

P2

1
6
2
7
3
8
4
9
5

SCI #0

RS-232

CONNECTOR

DCD
DSR
TXD
CTS
RXD
RTS
DTR

GND

/EN

T2IN

T3IN

R2IN

R3IN

R4IN

R5IN

R29 1K

R30 1K

R31 1K

R32 1K

R33 1K

R34 1K

R35 1K

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

D

4

E

+3.3V

Rev.

1.0

14

Figure A-4. RS-232 and SCI Connectors

A-6 56F8346EVM User Manual MOTOROLA

A

B

+3.3V +3.3V

C

D

E

R59

4 4

nc...

I

3 3

MISO0

2 2

MISO0

JG8

2

SPI0

DAISYCHAIN

DNP

Remove R84 to
isolate MISO0.

DOUT

1

+3.3V

R84

0 Ohm

MOSI0

SCLK0

/RSTO

/SS0

R46

5.1K
DNP

+3.3V

5.1K

20

12

10

14

11

9

8

7

PE6

U5

VDD

DIN

DOUT

SCLK

CS

CL

PDL

DGND

MAX525 1BEAP

DNP

U6

2

1

64-BIT 1-Wire ID

FBA

OUTA

OUTB

FBB

REFAB

REFCD

FBC

OUTC

OUTD

FBD

UP0

AGND

DATA

GND

DS2401P

2

3

4

5

6

15

16

17

18

19

13

1

NC2
NC3
NC4
NC1

T11

cale Semiconductor,

1 1

Frees

A

B

Title

DEBUG SERIAL 4-CHANNEL D/A CONVERTER AND ONE-WIRE 64-BIT ID

Size

A

Document
Number

Date:

DSP56F836EVM.DSN

C

R8
0 Ohm
DNP

4
5
6
3

+Vref

T21
T31

SERIAL D/A CONNECTOR

Set to 2.7V

D/A0
D/A1
D/A2
D/A3

+Vref

J4

2

1

4

3

6

5

8

7

DNP

+3.3VA

R37
1K
DNP

OPTIONAL

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Rev.

Designer: Sheet of

DSPD Design

D

514Tuesday, February 04, 2003

E

1.0

Figure A-5. Debug Serial 4-Channel D/A Converter and One-Wire 64-Bit ID

MOTOROLA 56F8346EVM Schematics A-7

A

B

C

D

E

U7A

4 4

nc...

I

3 3

2 2

PWMA0

PWMA1

PWMA2

PWMA3

PWMA4

PWMA5

1 2

74AC04

U7B

3 4

74AC04

U7C

5 6

74AC04

U7D

9 8

74AC04

U7E

11 10

74AC04

U7F

13 12

74AC04

R9

270

R10

270

R11

270

R12

270

R13

270

R14

270

LED7

LED8

LED9

LED10

LED11

LED12

YELLOW LED

GREEN LED

YELLOW LED

GREEN LED

YELLOW LED

GREEN LED

cale Semiconductor,

1 1

Frees

A

B

PWM PORT A STATE LEDS

Title

Size

Document
Number

A

Date:

DSP56F836EVM.DSN

Designer: Sheet of

C

+3.3V

PWM STATE

LEDS

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

DSPD Design

D

614Friday, August 23, 2002

Rev.

1.0

E

Figure A-6. PWM Port A State LEDs

A-8 56F8346EVM User Manual MOTOROLA

A

PHASEA1

4 4

PHASEB1

nc...

I

INDEX1

3 3

HOME1

TXD1

2 2

RXD1

cale Semiconductor,

1 1

Frees

A

B

PC0

PC1

PC2

PC3

PD6

PD7

B

U8A

1 2

74AC04

U8B

3 4

74AC04

U8C

5 6

74AC04

U8D

9 8

74AC04

U8E

11 10

74AC04

U8F

13 12

74AC04

Title

Size

A

C

R15

270

R16

270

R17

270

R18

270

R19

270

R20

270

USER DEBUG LEDS

Document
Number

Date:

Friday, August 23, 2002

DSP56F836EVM.DSN

C

LED1

RED LED

LED2

YELLOW LED

LED3

GREEN LED

LED4

RED LED

LED5

YELLOW LED

LED6

GREEN LED

D

+3.3V

USER
LEDS

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

D

7

E

Rev.

1.0

14

E

Figure A-7. User Debug LEDs

MOTOROLA 56F8346EVM Schematics A-9

A

B

C

D

E

A0 D0 D1
A2
A4
A6

4 4

3 3

2 2

A8
A10
A12
A14
PB0

nc...

I

PWMA0

PWMA2

PWMA4

FAULTA0
FAULTA2

ISA0 ISA1
ISA2

MOSI0 MISO0
SCLK0 /SS0

INDEX0 HOME0

J7

1
3
5
7
9
11
13
15

A16

17
19

ADDRESS BUS

J10

1
3
5
7
9
11
13

PWMA

J14

1
3
5

SPI #0

J18

TA0

1
3
5

TIMER CHANNEL A

2
4
6

8
10
12
14
16
18
20

2

4

6

8
10
12
14

2

4

6

2

4

6

A1
A3
A5
A7
A9
A11
A13
A15

+3.3V

PWMA1
PWMA3
PWMA5
FAULTA1

+3.3V

TA1

PHASEB0PHASEA0

TA3TA2

+3.3V

D2 D3
D4 D5
D6 D7

D8 D9
D10 D11
D12 D13
D14 D15

PWMB0
PWMB2

PWMB4
FAULTB0
FAULTB2

PHASEB1 INDEX1
PHASEA1 HOME1

J8

12
34
56
78
910
11 12
13 14
15 16
17 18

DATA BUS

J11

1
3
5
7

ISB0
ISB2

9
11
13

PWMB

J15

MOSI1 MISO1

1

SCLK1

3
5

SPI #1 SCI #1

J19

132

TIMER CHANNEL C TIMER CHANNEL D

+3.3V

PWMB1

2

PWMB3

4

PWMB5

6
8

FAULTB1
FAULTB3

10

ISB1

12
14

2

/SS1

4

+3.3V

6

4

/RD

/WR

/PS
PD0
CLKO

TXD0

TD0 TD1TC0 CAN_TX

cale Semiconductor,

1 1

Frees

A

B

C

J9

2

1

4

3

/CS0 /CS1
/CS2 /CS3

AN0 AN1
AN2 AN3
AN4 AN5
AN6 AN7

6

5

8

7

10

9

12

11

ADDRESS CONTROL

J12

1

2

3

4

5

6
8

7

10

9

A/D PORT A

J16

1

2

3

4
6

5

SCI #0

J20

1
324

Title

Size

B

/IRQA
/IRQB
/DS
PD1
/RESET
/RSTO

J13

AN8 AN9
AN10 AN11
AN12 AN13

+VREFH +VREFH

RXD0
+3.3V
+5.0V +5.0V

+3.3V+3.3V

AN14 AN15

TXD1

CAN_RX

1
3
5
7

10

9

A/D PORT B

J17

1
3
5

J21

132

CAN

2
4
6
8

2

+3.3V

4
6

4

DSP Standard Products Division

DSP PORT EXPANSION CONNECTORS

Document
Number

Date:

DSP56F836EVM.DSN

Sunday, August 25, 2002

D

Designer: Sheet of

DSPD Design

RXD1

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

E

8

14

Rev.

1.0

Figure A-8. Port Expansion Connectors

A-10 56F8346EVM User Manual MOTOROLA

A

B

C

D

E

J1

2

1

4 4

PHASEA0

INDEX0

PHASEA1

INDEX1

nc...

TXD0

I

TXD0

RXD0

RXD0
PWMB0
PWMB2
PWMB4

3 3

2 2

FAULTB1
FAULTB3

PWMA0
PWMA2
PWMA4

FAULTA0
FAULTA2

MOSI0

CAN_TX

MOSI0

cale Semiconductor,

ISB0
ISB2

ISA0
ISA2

TD0

SCLK0

SCLK0

+VREFH

AN0
AN2
AN4
AN6

AN8
AN10
AN12
AN14

GND

+5.0V

GND

+3.3V

GND

TA0
TA2

GND

PC0/TB0/SCLK1
PC2/TB2/MISO1
PE0

GND

PE1

GND

GND

GND

GND

PE5

GND

PE4

GND

GNDA

3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51 52
53 54
55 56
57 58
59 60
61 62
63 64
65 66
67 68
69 70
71 72
73 74
75 76
77 78
79 80
81 82
83 84
85 86
87 88
89 90
91 92
93 94
95 96
97 98
99 100

4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

+12V+12V

GND

+5.0V

GND

+3.3V

GND

TA1
TA3

GND

PC1/TB1/MOSI1
PC3/TB3/SS1
GNDGND

PD6

GND

PD7

GND

GND

GND

GND

GND

PE6

GND

PE7

GND

+VREFH

GNDA

AN1
AN3
AN5
AN7
AN9
AN11
AN13
AN15

PHASEB0
HOME0

PHASEB1
HOME1
TXD1
TXD1
RXD1
/IRQB/IRQA
RXD1
PWMB1
PWMB3
PWMB5

ISB1

FAULTB0
FAULTB2

PWMA1
PWMA3
PWMA5

FAULTA1
MISO0
ISA1
/RSTO
/SS0
TD1
TC0
CAN_RX
MISO0
/SS0

A4
A3
A2
A1 /RD

A20

GND

/CS0

/CS6

GND

/CS5 /CS4

A19 A18

A16 A17

GND GND

+3.3V

+5.0V

/WR

PB0

/PS

A15

A14
A13
A12

A0

D0
D1

D2
D3
D4
D5

D6
D7

Daughter Address/Data Connector

Daughter Peripheral Port Connector

1 1

Frees

A

B

Title

DAUGHTER CARD CONNECTORS

Size

A

Document
Number

Date:

Thursday, October 10, 2002

DSP56F836EVM.DSN

C

J2

1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51 52
53 54
55 56
57 58
59 60

2
4
6
8

GND

10

/CS1

12

/CS2

14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50

/CS7

GND
GNDGND

GNDGND
GNDGND

/CS3

GNDGND

GND

GNDGND

GNDGNDA

+3.3V

+5.0V

A5
A6
A7

/DS
PD0
D15
D14

D13
D12
D11
D10

D9
D8
PD1
A8

A9
A10
A11

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

D

Rev.

9

E

1.0

14

Figure A-9. Daughter Card Connectors

MOTOROLA 56F8346EVM Schematics A-11

A

4 4

CAN_TX

nc...

I

3 3

CAN_RX

B

+5.0V

R36
1K

U16

1

TXD

4

RXD

8

SLOPE

PCA82C250T

VCC

VREF

CANH

CANL

GND

C

+5.0V

3
5

7
6

2

T41

CANH BCANH

CANL

L6

D

BCANL

E

CAN BUS CONNECTOR

J5

2

BCANL BCANH

2 2

1

4

3

6

5

8

7

10

9

cale Semiconductor,

1 1

Frees

A

B

DAISY-CHAIN
CAN BUS CONNECTOR

J6

1
3
5
7
9

HIGH-SPEED CAN INTERFACE

Title

Size

Document
Number

A

Date:

2

BCANHBCANL

4
6
8

10

DSP56F836EVM.DSN

C

JG11

BCANH

BCANL

R22
120
1/4W

1
2

CAN BUS
TERMINATION

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

D

10 14Monday, January 20, 2003

E

Rev.

1.0

Figure A-10. High-Speed CAN Interface

A-12 56F8346EVM User Manual MOTOROLA

A

B

C

D

E

Parallel JTAG Interface

4 4

nc...

I

3 3

2 2

cale Semiconductor,

1 1

Frees

A

P_RESET

R54
47K

PORT_IDENT

P1

14

15

16

17

18

19

20

21

22

23

24

25

1

PORT_RESET

2

PORT_TMS

3

PORT_TCK

4

PORT_TDI

5

/PORT_TRST

6

PORT_DE

7

8

9

PORT_VCC

10

PORT_TDO

11

12

PORT_CONNECT

13

+3.3V

R52

5.1K

R53

5.1K

Q1
2N2222A

R60

51 Ohm

R61

51 Ohm

/J_RESET

B

R47

5.1K

+5.0V

/J_RESET

/POR

/J_TRST

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

13

2A2

5

2Y3

3

2Y4

U11

GND

MC74HC244DW

U9A

1

2

74AC00

U9C

9

10

74AC00

18

1Y1

16

1Y2

14

1Y3

12

1Y4

9

2Y1

7

2Y2

15

2A3

1720

2A4VCC

1

1G

19

2G

10

3

8

C

R3

0 Ohm

R5

0 Ohm

R7

0 Ohm

R48

R49

5.1K

5.1K

On-Board
Host Target Interface
Disable

U9B

4

5

74AC00

U9D

12

13

74AC00

R4

0 Ohm

R6

0 Ohm

+3.3V

/CCEN

1

2

JG9

6

/RESET

11

/TRST

PARALLEL JT AG HOST TARGET INTERFACE AND JTAG CONNECTOR

Title

Document

Size

Number

B

Friday, January 24, 2003

Date:

U10

2

1A1

4

1A2

6

1A3

8

1A4

11

2A1

7

2Y2

11

5

2Y3

3

2Y4

20

VCC

1

1G

19

2G

MC74LCX244DW

R50

5.1K

DSP56F836EVM.DSN

D

+3.3V

GND

P_RESET

18

1Y1

TMS

16

1Y2

TCK

14

1Y3

TDI

12

1Y4

/J_TRST

9

2Y1

P_DE

13

2A2

TDO

15

2A3

PWR

17

2A4

10

J3

/DE

13

14

11

12

9

10

7

8

5

6

3

4

1

2

JTAG Connector

KEY

TDO

/J_RESET

TCK

TDI

DSP Standard Products Division

Designer: Sheet of

DSPD Design

+3.3V

R58

TDO

47K

R57

PWR

47K

R56

/DE

47K

R55

/J_TRST

47K

R51

P_DE

5.1K

/J_TRST

TMS

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

11

E

14

Rev.

1.0

Figure A-11. Parallel JTAG Host Target Interface and JTAG Connector

MOTOROLA 56F8346EVM Schematics A-13

A

B

C

D

E

AN0

4 4

AN1

nc...

I

AN2

3 3

AN3

AN4

2 2

AN5

R62

100

R65

100

R68

100

R71

100

R74

100

R76

100

cale Semiconductor,

1 1

AN6

R77

100

Frees

C53

0.0022uF

C56

0.0022uF

C59

0.0022uF

C62

0.0022uF

C65

0.0022uF

C67

0.0022uF

C68

0.0022uF

ANA0

ANA1

ANA2

ANA3

ANA4

ANA5

ANA6

AN7

AN8

AN9

AN10

AN11

Title

Size

A

A

B

R63

100

R66

100

R69

100

R72

100

R75

100

A/D INPUT FILTERS

Document
Number

DSP56F836EVM.DSN

Date:

C

C54

0.0022uF

C57

0.0022uF

C60

0.0022uF

C63

0.0022uF

C66

0.0022uF

ANA7

ANB0

ANB1

ANB2

ANB3

AN12

AN13

AN14

AN15

NOTE: Use a single trace
for GNDA signals to the
common GNDA point.

Designer: Sheet of

DSPD Design

D

R64

100

R67

100

R70

100

R73

100

C55

0.0022uF

C58

0.0022uF

C61

0.0022uF

C64

0.0022uF

ANB4

ANB5

ANB6

ANB7

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

12 14Sunday, August 25, 2002

E

Rev.

1.0

Figure A-12. A/D Input Filters

A-14 56F8346EVM User Manual MOTOROLA

A

B

C

D

E

EXTERNAL POWER INPUT

3 2

Typ 135mA

C3
47uF
10VDC

GROUND

1

D2

FM4001

U12

VIN VOUT

VOUTGND

MC33269DT-5.0

+3.3V

TP5

+5.0V

+5.0V

41

+5.0V

+3.3VA

TP6

1

L1

FERRITE BEAD

D4

DNP

FM4001

U14

3 2

VIN VOUT

VOUTGND

MC33269DT-3.3

U15

1

VIN

VOUT

3

EN

GND

REG113NA-3/3K

1

+5.0V

NR

TP7

2

C

41

0.1uF

C23

5

4

0.01uF

+

+3.0V

C75

Title

Size

B

C2
47uF
10VDC

L3

FERRITE BEAD

L4

FERRITE BEAD

+

C6
10uF
6VDC

POWER SUPPLIES

Document
Number

Date:

R83

+

C4
47uF
10VDC

R2
0 Ohm

+VREFH

DSP56F836EVM.DSN

R21
270

POWER GOOD LED

LED13
GREEN LED

+VREFH

10 Ohm

DNP

+3.3VA

JG10

1
2

Single trace
to GNDA.

D

J22

+2.5V

NOTE: Remove 0 OHM
resistor to use Analog
GND isolation jumper.

3.0V REF

REGULATOR

1
2
34

+2.5V Input

1
2

+2.5V Ground Reference

External +2.5V
Power Supply Input

3.3V AND 5.0V

5

REG113NA3/3K

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

E

REGULATOR

4

123

MC33269

13 14Tuesday, February 04, 2003

Rev.

1.0

7-12V DC/AC

4 4

nc...

I

3 3

+5.0V

2 2

+3.3V

P3

132

3

D1

-+

2

D3

DNP

FM4001

U13

3 2

VIN VOUT

MC33269DT-3.3

NOTE: To measure +3.3V supply
current, remove L2 and replace
with amp meter.

L5

FERRITE BEAD

1

4

41

VOUTGND

+

C5
47uF
10VDC

+12V

+

C1
470uF
16VDC

L2

FERRITE BEAD

C24

0.1uF

VCC

+3.3V_PLL

C22

0.1uF

+

cale Semiconductor,

+3.3V +3.3VA GROUND ANALOG GROUND +5.0V

TEST POINT

1 1

1

TEST POINT TEST POINT

TP1

TP2

1

1

TP3

GROUND

TEST POINT

TP4

1

TEST POINT TEST POINT TEST POINT

Frees

+3.3VA+3.3V

A

B

Figure A-13. Power Supplies

MOTOROLA 56F8346EVM Schematics A-15

A

+3.3V

4 4

C26

C25

0.1uF

0.1uF

nc...

I

U2 U5

GS72116

C27

0.1uF

C28

0.1uF

GS72116

U1

DSP56836

U3

C69

0.01uF

B

+3.3VA

C70

C71

0.01uF

0.01uF

U16

PCA82C250 MAX5251

C29

0.1uF

C30

0.1uF

C

U4

MAX3245

D

E

3 3

2 2

1 1

+3.3V +3.3V +5.0V +3.3V +Vref

C31

0.1uF

U10 U11

74LCX244

+3.3V

C37

0.1uF

J7 J8

ADDRESS BUS

cale Semiconductor,

CONNECTOR

C41

0.1uF

C72

0.01uF

74HC244

+5.0V

CONNECTOR

C74

0.01uF

DATA BUS

+3.3V+3.3V

C42

0.1uF

+3.3V +3.3V

C32

0.1uF

U9 U7

+3.3V

C38

0.1uF

A/D CONNECTOR

C73

0.01uF

J12

+VREFH

C43

0.1uF

74AC0474AC00

+3.3V

C39

0.1uF

C33

0.1uF

U8

74AC04

+3.3V

J13

A/D CONNECTOR

+VREFH

C44

0.1uF

C40

0.1uF

C34

0.1uF

C35

0.1uF

PERIPHERAL CONNECTOR

+5.0V +3.3V +12V

C45

0.1uF

Frees

A

B

C

+3.3V

C36

0.1uF

J1 J2

+VREFH

C46

C47

0.1uF

C48

0.1uF

DSP56F836EVM.DSN

D

0.1uF

BYPASS CAPACITORS

Title

Document

Size

Number

B

Date:

MEMORY CONNECTOR

+5.0V +3.3V +3.3V

C49

C50

0.1uF

C51

0.1uF

0.1uF

DSP Standard Products Division

2100 East Elliot Road
Tempe, Arizona 85284

[phone] FAX: [phone]

Designer: Sheet of

DSPD Design

14

E

Rev.

1.0

14Tuesday, September 03, 2002

Figure A-14. Bypass Capacitors

Freescale Semiconductor, Inc.

nc...

I

cale Semiconductor,

Frees

A-16 56F8346EVM User Manual MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

Appendix B
56F8346EVM Bill of Material

Qty Description Ref. Designators Vendor Part #

Integrated Circuits

1 56F8346 U1 Motorola, DSP56F8346FV60

nc...

I

2 128Kx16-Bit SRAM U2, U3 GSI, GS72116ATP-10

cale Semiconductor,

Frees

1 RS-232 Transceiver U4 Maxim, MAX3245EEAI
0 SPI 4-Channel D/A U5 (Optional) Maxim, MAX5251BEAP
1 64-Bit 1-Wire ID U6 Dallas Semiconductor, DS2401P
2 74AC04 U7, U8 ON Semiconductor, MC74AC04AD
1 74AC00 U9 Fairchild, 74 AC00SC
1 74LCX244 U10 ON Semiconductor, MC74LCX244ADW
1 74HC244 U11 ON Semiconductor, MC74LHC44AADW
1 +5.0V Voltage Regulator U12 ON Semiconductor, MC33269DT-5
2 +3.3V Voltage Regulator U13, U14 ON Semiconductor, MC33269DT-3.3
1 +3.0V Voltage Regulator U15 Burr-Brown, REG113NA-3/3K
1 CAN Transceiver U16 Philips Semiconductor, PCA82C250T
0 Power-ON Reset U17 (Optional) Dallas Semiconductor, DS1818

Resistors

110M Ω R1 SMEC, RC73L2A106OHMJT
80 Ω R2–R7, R84, R97 SMEC, RC73JP2A
00 Ω R8, R92–R96 (Optional) SMEC, RC73JP2A

13 270 Ω R9 - R21 SMEC, RC73L2A271OHMJT

1120 Ω, 1/4W R22 YAGEO, CFR 120QBK

13 10K Ω R23, R38–R45, R79–R82 SMEC, RC73L2A103OHMJT

MOTOROLA 56F8346EVM Bill of Material B-1

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

Qty Description Ref. Designators Vendor Part #

12 1K Ω R25–R36 SMEC, RC73L2A103OHMJT

05.1K Ω R46 (Optional) SMEC, RC73L2A512OHMJT

85.1K Ω R47–R53, R59 SMEC, RC73L2A512OHMJT

12 47K Ω R54–R58, R85–R91 SMEC, RC73L2A473OHMJT

2 51 Ω R60, R61 SMEC, RC73L2A51OHMJT

16 100 Ω R62–R77 SMEC, RC73L2A101OHMJT

0 10 Ω R83 (Optional) SMEC, RC73L2A100OHMJT

Potentioneters

nc...

I

cale Semiconductor,

Frees

01K Ω R37 (Optional) BC/MEPCOPAL, ST4B102CT

Inductors

5 1.0mH FERRITE BEAD L1–L5 Panasonic, EXC-ELSA35V
1 CAN Bus Filter L6 EPCOS, B82790-S0513-N201

LEDs

2 Red LED LED1, LED4 Hewlett-Packard, HSMS-C650
5 Yellow LED LED2, LED5, LED7, LED9,

LED11

6 Green LED LED3, LED6, LED8, LED10,

LED12, LED13

Diode

1 +50V 1A BRIDGE RECT D1 DIODES, DF02S
1 S2B-FM401 D2 Vishay, DL4001DICT
0 S2B-FM401 D3 & D4 (Optional) Vishay, DL4001DICT

Hewlett-Packard, HSMY-C650

Hewlett-Packard, HSMG-C650

B-2 56F8346EVM User Manual MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

Qty Description Ref. Designators Vendor Part #

1470µF, +16V DC C1 ELMA, RV-16V471MH10R
447µF, +16V DC C2–C5 ELMA, RV2-16V470M-R
110µF, +10V DC C6 KEMET, T494B106M010AS

41.0µF, +25V DC C7–C10 SMEC, MCCE105K3NR-T1

Capacitors

42.2µF, +25V DC
(Low ESR)

10.001µF C15 SMEC, MCCE102K2NR-T1

nc...

I

36 0.1µFC16–C51 SMEC, MCCE104K2NR-T1

1 100pF C52 SMEC, MCCE101K2NR-T1

16 0.0022µFC53–C68 SMEC, MCCE222K2NR-T1

70.01µFC69–C75 SMEC, MCCE103K2NR-T1

33 × 1 Bergstick JG1, JG15, JG16 SAMTEC, TSW-103-07-S-S

10 1 × 2 Bergstick JG2–JG5, JG7, JG9–JG11,

22 × 2 Bergstick JG6, JG12 SAMTEC, TSW-102-07-S-D
01 × 2 Bergstick J G8 (Optional) SAMTEC, TSW-102-07-S-S

cale Semiconductor,

1 +3.3V Test Point TP1 KEYSTONE, 5000
1 +3.3VA Test Point TP2 KEYSTONE, 5004

C11–C14 TAIYO YUDEN, CELMK212BJ225MG-T

Jumpers

SAMTEC, TSW-102-07-S-S

JG13, JG14

Test Points

Frees

3 GND Test Point TP3, TP4, TP5 KEYSTONE, 5001
1 GNDA Test Point TP6 KEYSTONE, 5002
1 +5.0V Test Point TP7 KEYSTONE, 5003
01 × 1 Bergstick T1–T3 (Optional) Samtec, TSW-101-06-S-S

MOTOROLA 56F8346EVM Bill of Material B-3

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

1 8.00MHz Crystal Y1 CTS, ATS08ASM-T

1 DB25M Connector P1 AMPHENOL, 617-C025P-AJ121
1 DE9S Connector P2 AMPHENOL, 617-C009S-AJ120

Crystals

Connectors

1 2.1mm coax

Power Connector

1 Peripheral Daughter

Card Connector

1 Memory Bus Daughter

Card Connector

nc...

I

cale Semiconductor,

1 7x2 JTAG Header J3 SAMTEC, TSW-107-07-S-D
1 4x2 Header J4 SAMTEC, TSW-10 6-04-S-D
4 5x2 Header J5, J6, J12, J13 SAMTEC, TSW-106-05-S-D
1 10x2 Header J7 SAMTEC, TSW-106-10-S-D
1 9x2 Header J8 SAMTEC, TSW-10 6-09-S-D
1 6x2 Header J9 SAMTEC, TSW-10 6-06-S-D
2 7x2 Header J10, J11 SAMTEC, TSW-106-07-S-D
5 3x2 Header J14–J18 SAMTEC, TSW-106-03-S-D
3 2x2 Header J19–J21 SAMTEC, TSW-106-02-S-D
1 1x2 Header J22 SAMTEC, TSW-106-02-S-S

3 SPST Pushbutton S1–S3 Panasonic, EVQ-PAD05R

1 2N2222A Q1 ZETEX, FMMT2222ACT

P3 Switchcraft, RAPC-722

J1 HRS, FX6-100P-0.8SV2

J2 HRS, FX6-60P-0.8SV2

Switches

Transistors

Frees

Miscellaneous

13 Shunt SH1–SH13 Samtec, SNT-100-BL-T

4 Rubber Feet RF1–RF4 3M, SJ5018BLKC

B-4 56F8346EVM User Manual MOTOROLA

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

Index

nc...

I

cale Semiconductor,

Frees

Numerics

1.2 Amp power supply 2-16
1-Wire Serial 64- Bit Unique ID 2-1
4-Channe l 10-bit Serial D/A 2-1
56F8300 Peripheral User Manual 2-3
56F8346 Technical Data 2-3

8.00MHz crystal oscillator 2-1

A

A/D viii
ADC viii
Analog-to-Digital

A/D viii

Analog-to-Digital Converter

ADC viii

C

CAN viii

bus termination 2-2
bypass 2-2
interface 2-1

CAN in Auto mation

CiA viii
CAN physical layer peripheral 2-2
CiA viii
Connector

Address bus 2-25

Data bus 2-26
Controller Area Network

CAN viii

D

D/A viii
D/A converter 2-21
Daughter Card Expansion

interface 2-1
Debugging 2-10
Digital Signal Processor or Digital Signal Processing

DSP viii
Digital-to-Analog

D/A viii
DSP viii
DSP56800E Reference Manual 2-3

E

Enhanced On-Chip Emulation

EOnCE ix
EOnce ix
Evaluation Module

EVM ix
EVM ix
External Memory Control Signal 2-27
External oscillator frequency input 2-1

F

FlexCAN ix
FlexCAN Interface Module

FlexCAN ix
FSRAM 2-1

, 2-4

G

General Purpose Input and Output

GPIO ix
GPIO ix

, 2-25

H

Host Parallel Interface Connector 2-11
Host Target Interface 2-11

I

IC ix
Integrated Circuit

IC ix

J

Joint Test Action Group

JTAG ix
JTAG ix

JTAG/Enhanced OnCE (EOnCE) 1-1
Jumper Group 1-3

, 2-1

connector 2-12

JG1 1-3

JG10 1-3

JG11 1-3

JG12 1-3

JG13 1-3

JG14 1-3

MOTOROLA Index i

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

nc...

I

cale Semiconductor,

Frees

JG15 1-3
JG16 1-3
JG2 1-3
JG3 1-3
JG4 1-3
JG5 1-3
JG6 1-3
JG7 1-3
JG8 1-3
JG9 1-3

L

LED ix
Light Emitting Diode

LED ix

Low-profile Quad Flat Package

LQFP ix

LQFP ix

M

MPIO ix, 2-27
Multi Purpose Input and Output

MPIO ix

O

On-board power regulation 2-2
OnCE ix
On-Chip Emulation

OnCE ix

P

Parallel JTAG Host Target Interface 2-1
PCB ix
Phase Locked Loop

PLL ix
PLL ix
Printed Circuit Board

PCB ix
Pulse Width Modulation

PWM ix
PWM ix
PWMA-compatible peripheral 2-2
PWMB-compatible peripheral 2-2

R

R/C ix
RAM ix
Random Access Memory

RAM ix

Read-Only Memory

ROM ix
real-time debugging 2-10
Resistor/Capacitor Network

R/C ix
ROM ix
RS-232 2-1

level converter 2-7

schematic diagram 2-7

S

SCI ix
SCI/MPIO-compatible peripher al 2-2
Serial Communications Interface

SCI ix
Serial Peripheral Interface

SPI ix
SPI ix
SPI/MPIO-compatible peripheral 2-2
SRAM ix

external data 2-1

external program 2-1
Static Random Access Memory

SRAM ix

T

Timer-compatible peripheral 2-2

U

UART ix
Universal Asynchronous Receiver/Transmitter

UART ix

W

Wait State

WS ix
WS ix

Q

QuadDec ix
Quadrature Decoder

interface port 2-27
QuadDec ix

ii 56F8346EVM User Manual MOTOROLA

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Freescale Semiconductor, Inc.

nc...

I

cale Semiconductor,

Frees

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

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cale Semiconductor,

Frees

For More Information On This Product,

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Freescale Semiconductor, Inc.

nc...

I

cale Semiconductor,

Frees

For More Information On This Product,

Go to: www.freescale.com

Freescale Semiconductor, Inc.

HOW TO REACH US:
USA/EUROPE/LOCATIONS NOT LISTED:

Motorola Literature Distribution;
P.O. Box 5405, Denver, Colorado 80217
1-303-675-2140 or 1-800-441-2447

JAPAN:

Motorola Japan Ltd.; SPS, Technical Information Center,
3-20-1, Minami-Azabu Minato-ku, Tokyo 106-8573 Japan
81-3-3440-3569

ASIA/PACIFIC:

Motorola Semiconductors H.K. Ltd.;
Silicon Harbour Centre, 2 Dai King Street,
Tai Po Industrial Estate, Tai Po, N.T., Hong Kong
852-26668334

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TECHNICAL INFORMATION CENTER:

1-800-521-6274
HOME PAGE:
http://motorola.com/semiconductors

cale Semiconductor,

Information in this document is provided solely to enable system and software
implementers to use Motorola products. There are no express or implied copyright
licenses granted hereunder to design or fabricate any integrated circuits or
integrated circuits based on the information in this document.

Motorola reserves the right to make changes without further notice to any products
herein. Motorola makes no warranty, representation or guarantee regarding the
suitability of its products for any particular purpose, nor does Motorola assume any
liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation consequential or incidental
damages. “Typical” parameters which may be provided in Motorola data sheets
and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals”
must be validated for eac h customer application by customer’s technical experts.
Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as
components in systems intended for surgical implant into the body, or other
applicatio ns in tended to su pport or sus tain l ife, or fo r any o ther appli catio n in wh ich
the failure of the Motorola product could create a situation where personal injury or
death may occur. Should Buyer purchase or use Motorola products for any such
unintended or unauthor iz ed app li cation, Buyer shall indemnify and hold Mot oro la
and its officers, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that Motorola
was negligent regarding the design or manufacture of the part.

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Motorola and the Stylized M Logo are registered in the U.S. Patent and Trademark
Office. digital dna is a trademark of Motorola, Inc. This product incorporates
SuperFlash® technology licensed from SST. All other product or service names are
the property of their respective owners. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.

© Motorola, Inc. 2003

56F8346EVMUM/D

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