Mitsubishi PS21204 Datasheet

MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>

PS21204

INSULATED TYPE

1 minute.

O ✕ 2

PS21204

TRANSFER-MOLD TYPE

INSULATED TYPE

INTEGRATED POWER FUNCTIONS

600V/15A low-loss 3rd generation IGBT inverter bridge for 3 phase DC-to-AC power conversion (Fig. 2) Application Motor Ratings : Power : 0.75kW , sinusoidal, PWM

Frequency=5kHz 100% load current : 5.0A (rms)* 150% load current : 7.5A (rms)*,

*(Note) : The motor current is assumed to be sinusoidal and

the peak current value is defined as : l

INTEGRATED DRIVE, PROTECTION AND SYSTEM CONTROL FUNCTIONS

• For upper-leg IGBTS :Drive circuit, High voltage isolated high-speed level shifting, Control circuit under-voltage (UV) protection. Note : Bootstrap supply scheme can be applied (Fig. 2).

• For lower-leg IGBT

• Fault signaling : Corresponding to a SC fault (Low-side IGBT) or a UV fault (Low-side supply).

• Input interface : 5V line CMOS/TTL compatible, Schmitt T rigger receiver circuit.

S : Drive circuit, Control curcuit under-voltage protection (UV), Short circuit protection (SC). (Fig. 3)

√

APPLICATION

AC100V~200V three-phase inverter drive for small power (0.75 kW) motor control.

Fig. 1 PACKAGE OUTLINES

2.8

2120192418172516231522141311 121098765432

11.5

N N

13.4 21.4

12.8

22. P 25. W

23. U 26. N

24. V

TERMINALS CODE

1. U

4. V

2. V

5. V

3. V

UFB

6. V

UFS P P1

2-φ4.5

7. V

8. V

9. W

VFB VFS

10. V

11. V

12. V

P1 PC WFB

101010 67 79

13. V

14. V

15. V

WFS

16. CIN 19. U

17. CFO 20. V

18. Fo 21. W

3.8

Aug. 1999

MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>

Fig. 2 INTERNAL FUNCTIONS BLOCK DIAGRAM (TYPICAL APPLICATION EXAMPLE)

CBW–

CBV+

CBU–

CBV–

C3 : Tight tolerance, temp-compensated electrolytic type

(Note : The capacitance value depends on the PWM control

scheme used in the applied system).

C4 : 0.22~2µF R-category ceramic capacitor for noise filtering.

Inrush current limiter circuit

High-side input (PWM) (5V line) Note 1,2)

Input signal coditioning

Level shifter

Protection

circuit (UV)

Drive circuit

Input signal

coditioning

Level shifter Level shifter

Protection

circuit (UV)

Drive circuit Drive circuit

CBU+

PS21204

TRANSFER-MOLD TYPE

INSULATED TYPE

CBW+

Bootstrap circuit

For detailed description of the boot-strap circuit

construction, please

contact Mitsubishi Electric

(Note 6)

DIP-IPM

AC line input

(Note 4)

Z : ZNR (Surge absorber) C : AC filter (Ceramic capacitor 2.2~6.5nF) (Note : Additionally, an appropriate line-to line surge absorber circuit may become necessary depending on the application environment).

Note1: To prevent the input signals oscillation, an RC coupling at each input is recommended. (see also Fig. 7)

2: By virtue of integrating an application specific type HVIC inside the module, direct coupling to CPU terminals without any opto-coupler or transformer

isolation is possible. (see also Fig. 7)

3: This output is open collector type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 5.1kΩ resistance.

(see also Fig. 7)

4: The wiring between the power DC link capacitor and the P/N1 terminals should be as short as possible to protect the DIP-IPM against catastrophic high surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to these P and N1 DC power input pins.

5: Fo output pulse width should be decided by putting external capacitor between CFO and V

6: High voltage diodes (600V or more) should be used in the bootstrap circuit.

Input signal conditioning

Low-side input (PWM) (5V line) (Note 1, 2)

Fig. 3

CIN

Fo logic

FOCFO

Fault output (5V line) (Note 3, 5)

Drive circuit

Protection

circuit

H-side IGBT

L-side IGBT

Control supply Under-Voltage

protection

(15V line)

terminals. (Example : CFO=22nF tFO=1.8ms (Typ.))

Fig. 3 EXTERNAL PART OF THE DIP-IPM PROTECTION CIRCUIT

DIP-IPM

H-side IGBTS

External protection circuit

Shunt Resistor

L-side IGBTS

V CIN

Note1: In the recommended external protection circuit, please select the RC time constant in the range 1.5~2.0µs.

2: To prevent erroneous protection operation, the wiring of A, B, C should be as short as possible.

Drive circuit

Protection circuit

Short Circuit Protective Function (SC) : SC protection is achieved by sensing the L-side DC-Bus current (through the external shunt resistor) after allowing a suitable filtering time (defined by the RC circuit). When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned OFF and a fault signal (Fo) is output. Since the SC fault may be repetitive, it is recommended to stop the system when the Fo signal is received and check the fault.

IC (A)

SC Protection

waveform

Trip Level

(µs)

U V

Collector current

AC line output

Aug. 1999

MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>

PS21204

TRANSFER-MOLD TYPE

INSULATED TYPE

MAXIMUM RATINGS (Tj = 25°C, unless otherwise noted) INVERTER PART

ConditionSymbol Parameter Ratings Unit

V VCC(surge) VCES ±IC ±ICP PC

Note 1 : The maximum junction temperature rating of the power chips integrated within the DIP-IPM is 150°C (@ TC ≤ 100°C) however, to in-

Supply voltage Supply voltage (surge) Collector-emitter voltage Each IGBT collector current Each IGBT collector current (peak) Collector dissipation

Junction temperature

sure safe operation of the DIP-IPM, the average junction temperature should be limited to T

Applied between P-N Applied between P-N

C = 25°C

C = 25°C, instantaneous value (pulse)

C = 25°C, per 1 chip

T (Note 1)

j(ave) ≤ 125°C (@ TC ≤ 100°C).

450 500 600

15 30 43

–20~+150

CONTROL (PROTECTION) PART

ConditionSymbol Parameter Ratings Unit

V VDB

VCIN VFO

IFO VSC

Control supply voltage Control supply voltage

Input voltage Fault output supply voltage

Fault output current Current sensing input voltage

Applied between V Applied between VUFB-VUFS, VVFB-VVFS,

Applied between UP, VP, WP-VPC, UN, VN, Applied between FO-VNC

Sink current at FO terminal Applied between CIN-V

P1-VPC, VN1-VNC

WFB-VWFS

N-VNC

20 20

–0.5~+5.5

–0.5~V

D+0.5

V V V A

A W °C

TOTAL SYSTEM

Symbol Ratings Unit

CC(PROT)

TC Tstg

Viso

Self protection supply voltage limit (short circuit protection capability)

Module case operation temperature Storage temperature

Isolation voltage

Parameter Condition

D = VDB = 13.5~16.5V, Inverter part

V T

j = 125°C, non-repetitive, less than 2 µs

(Note 2)

60Hz, Sinusoidal, AC 1 minute, connection pins to heat-sink plate

400

–20~+100 –40~+125

1500

Note 2 : TC MEASUREMENT POINT

Control pins

DIP-IPM

Heat sink boundary

Power pins

°C °C

rms

Aug. 1999

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