MITSUBISHI MF82M1-GMCAVXX, MF84M1-GMCAVXX, MF88M1-GMCAVXX, MF816M-GMCAVXX, MF820M-GMCAVXX Technical data

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8/16-bit Data Bus

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

MF82M1-GMCAVXX
MF84M1-GMCAVXX

Flash Memory Card

Connector Type

Two- piece 68-pin

DESCRIPTION

The MF8XXX-GMCAVXX is a flash memory card
which uses eight-megabit or sixteen megabit flash
electrically erasable and programmable read only
memory IC’s as common memory and a 64-kilobit
electrically erasable and programmable read only
memory as attribute memory.
The MF8XXX-GNCAVXX is a flash memory card
which uses eight-megabit or sixteen megabit flash
electrically erasable and programmable read only
memory IC’s.

FEATURES

68 pin JEIDA/PCMCIA
8/16 controllable data bus width

MF88M1-GMCAVXX
MF816M-GMCAVXX
MF820M-GMCAVXX
MF832M-GMCAVXX
MF82M1-GNCAVXX
MF84M1-GNCAVXX
MF88M1-GNCAVXX
MF816M-GNCAVXX
MF820M-GNCAVXX
MF832M-GNCAVXX

Buffered interface
TTL interface level

Program/erase operation by software
command control
100,000 program/erase cycles
Write protect switch
Operating temperature =0 to 70°C
.No Vpp required (5V Vcc only operation)

APPLICATIONS
Notebook computers Printers
Industrial machines

PRODUCT LIST

Item Memory Attribute Data bus Access Memory Outline

Type name capacity memory width(bits) time (ns) IC’s drawing

MF82M1-GMCAVXX 2MB 8Mbit
MF84M1-GMCAVXX 4MB
MF88M1-GMCAVXX 8MB Yes
MF816M-GMCAVXX 16MB 16Mbit
MF820M-GMCAVXX 20MB
MF832M-GMCAVXX 32MB

MF82M1-GNCAVXX 2MB 8Mbit
MF84M1-GNCAVXX 4MB
MF88M1-GNCAVXX 8MB No( FFh)
MF816M-GNCAVXX 16MB 16Mbit
MF820M-GNCAVXX 20MB
MF832M-GNCAVXX 32MB

MITSUBISHI

ELECTRIC

1/22 Feb.1999 Rev2.0

68P-0138/16 150

MITSUBISHI MEMORY CARD

A24

WRITE PROTECT

FLASH MEMORY CARDS

PIN ASSIGNMENT

Pin Pin

Symbol

No. No.

Function

Symbol

1 GND Ground 35 GND Ground
2 D3 36 CD1# Card detect 1
3 D4 37 D11
4 D5 Data I/O 38 D12
5 D6 39 D13 Data I/O
6 D7 40 D14
7 CE1# Card enable 1 41 D15
8 A10 Address input 42 CE2# Card enable 2

9 OE# Output enable 43 NC
10 A11 44 NC No connection
11 A9 45 NC
12 A8 Address input 46 A17
13 A13 47 A18
14 A14 48 A19
15 WE# Write enable 49 A20
16 NC No connection 50 A21 A21 (NC for < 2 MB types)
17 VCC Power supply voltage 51 VCC Power supply voltage
18 NC No connection 52 NC No connection
19 A16 53 A22 A22 (NC for < 4 MB types)
20 A15 54 A23 A23 (NC for < 8 MB types)
21 A12 55 A24 A24 (NC for < 16 MB types)
22 A7 56 NC
23 A6 57 NC
24 A5 Address input 58 NC No connection
25 A4 59 NC
26 A3 60 NC
27 A2 61 REG# Attribute memory select
28 A1 62 BVD2 Battery voltage detect 2
29 A0 63 BVD1 Battery voltage detect 1
30 D0 64 D8
31 D1 Data I/O 65 D9 Data I/O
32 D2 66 D10
33 WP Write protect 67 CD2# Card detect 2
34 GND Ground 68 GND Ground

Function

Address
input

Address
input

BLOCK DIAGRAM (MF832M-GMCAVXX)

CE1#
CE2#

WE#
OE#

REG#

WP

CD1#
CD2#

A23
A22
A21
A0

A20
A19
A18
A17
A16
A15
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1

OFF

ON

ADDRESS­DECODER

ADDRESS-

BUS

BUFFERS

MODE

CONTROL

LOGIC

16

CE#

8

21

COMMON
MEMORY

16Mbit
FLASH

MEMORY

×16

DATA-BUS

8

BUFFERS

OE# WE#

D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1

VCC

CE# OE# WE#

13

ATTRIBUTE

MEMORY

64Kbit

E2PROM

8

BVD2
BVD1

GND

×1

MITSUBISHI

ELECTRIC

2/22 Feb.1999 Rev2.0

FUNCTIONAL DESCRIPTION

The operating mode of the card is determined by
five active low control signals (REG#, CE1#,
CE2#, OE#, WE#), and control registers located in
each memory IC.

Common memory function

When the REG# signal is set to a high level
common memory is selected.

-Read mode

When each memory IC in the card are switched,
the control registers of each memory IC are set to
read only mode.
Operation of the card then depends on the four
possible combinations of CE1# and CE2# (note WE#
should be set to a high level when the device is in read
mode except during combination (4) where it’s
condition is unimportant) :
(1) If CE1# is set to a low level and CE2# is set to a

high level, the card will work as an eight bit data
bus width card. Data can be accessed via the
lower half of the data bus (D0 to D7).

(2) If both CE1# and CE2# are set to a low level, data

will be accessible via the full sixteen bit data bus
width of the card. In this mode LSB of address bus

(A0) is ignored.
(3) If CE1# is set to a high level and CE2# is set
to a low level the odd bytes (only) can be

accessed through upper half of the data bus (D8

to D15). This mode is useful when handling the

odd (upper) bytes in a sixteen bit interface

system. Note that A0 is also ignored in this

operating condition.
(4) If CE1# and CE2# are set to a high level, the
card will be in standby mode where it consumes

low power. The data bus is kept high impedance.
When OE# is set to a low level data can be read from
the card, depending on the address applied and the
setting of CE1# and CE2# as mentioned above, except
under combination (4) When OE# is set to a high level
and WE# is set to a high level the card is in an output
disable mode

- Write mode
By using the 4 combinations of CE1# and CE2# as
described under Read only above the appropriate
Data Out and Command/Data In bus selection can be
made.

If OE# is set to a high level and WE# set to a low level,
the control register will latch command data applied
at the rising edge of the WE# signal. Note that more
than one bus cycle may be required to latch the
command and/or the related data-please refer to the
Command Definition table.

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

After latching the command data, the card will go into
programming, erasure or other operation mode. For
details please refer to the Command Definition table,
each individual command’s definition and the
programming and erasure algorithms.

Attribute memory function

When the REG# signal is set to a low level attribute
memory is selected.

GM series

The card includes a byte wide attribute memory
consisting of 8K bytes of E2PROM located at the even
addresses when the card is in the 8 bit
operating mode. It is located at sequential
addresses on the lower half of the data bus when
the card is in 16 bit operating mode i.e. A0 is
ignored.

To access the attribute memory, first set CE1# and
CE2#. Set CE1# to low level and CE2# to high level
for 8 bit mode or CE1# and CE2# to low level for 16
bit mode. Then select the required address. Note
please take care that in 8 bit mode A0 must be set low
for attribute memory access i.e. an even address is
applied. In 16 bit mode it is not important whether A0
is high or

low. Data can then be read by setting OE# to a low
level with WE set to a high level.

Writing to the attribute memory can be achieved
in byte mode only. To write to attribute memory set
OE# to high level and WE# to low level. The data to
be written will be latched at the rising edge of WE#.
Then, unless WE# changes back
from high level to low level over 100 µs an
automatic erase/program operation starts which will
complete within 10ms.

Please also remember that for attribute memory A0 is
not applicable and it should be set to low, even
addressing only, in 8 bit mode or ignored for 16 bit
mode.

GN series

The card then outputs FFh on the lower half of the
data bus (D0 to D7) when the following conditions
are applied;
(1)CE1#=low level,CE2#=high level,OE#=low
level,WE#=high level,A0=low level.
(2)CE1#=low level,CE2#=low level,OE#=low
level,WE#=high level.

If OE# is set to a low level and WE# is set to a high
level the card data can be read from the card
depending on the condition of the control register.

MITSUBISHI

ELECTRIC

3/22 Feb.1999 Rev2.0

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

Write protect mode

The card has a write protect switch on the opposite
edge to the connector edge. When it is switched on,
the card will be placed into a write protect mode,
where data can be read from the card but it cannot

is applied. When the card is not in write protect
mode the WP output pin is set to a low level when
VCC is applied. By reading the state of the WP
output the host system can easily check whether the

card is in write protect mode or not.
be written to it. The WP output pin is set to a high
level when the card is in write protect mode and VCC

FUNCTION TABLE (COMMON MEMORY)

Mode A0

Standby H H H X X X High-Z High-Z
Read A(16-bit) H L L L H X Odd byte data out Even byte data out

Read B(8-bit)

Read C(8-bit) H L H L H X Odd byte data out High-Z
Write A(16-bit)

H L L H L X
Write B(8-bit)

Write C(8-bit)
Output disable H X X H H X High-Z High-Z

H H L L H L High-Z Even byte data out
H H L L H H High-Z odd byte data out

H H L H L L
H H L H L H
H L H H L X

CE2#REG#

CE1# OE#

WE#

Command or odd byte data in Command or even byte data in

High-Z Command or even byte data in
High-Z Command or odd byte data in

Command or odd byte data in High-Z

I/O

(D15 to D8)

I/O

(D7 to D0)

Note 1 : H=VIH, L=VIL, X=VIH or VIL, High-Z= High-impedance

To operate refer to the command definition, algorithms and so on.

FUNCTION TABLE (ATTRIBUTE MEMORY )
GM series

CE1# OE#

Mode A0

Standby L H H X X X High-Z High-Z
Read A(16-bit) L L L L H X Data out(not valid) Even byte data out
Read B L H L L H L High-Z Even byte data out
(8-bit) L H L L H H High-Z Data out(not valid)
Read C(8-bit) L L H L H X Data out(not valid) High-Z
Write A(16-bit) L L L H L X Odd byte data in (not valid) Even byte data in
Write B L H L H L L High-Z Even byte data in
(8-bit) L H L H L L High-Z Odd byte data in (not valid)
Write C(8-bit) L L H H L X Odd byte data in (not valid) High-Z
Output disable L X X H H X High-Z High-Z

CE2#REG#

WE#

I/O

(D15 to D8)

I/O

(D7 to D0)

GN series

CE1# OE#

Mode A0

Standby L H H X X X High-Z High-Z
Read A(16-bit) L L L L H X Data out(not valid) Data out (FFh)
Read B L H L L H L High-Z Data out (FFh)
(8-bit) L H L L H H High-Z Data out(not valid)
Read C(8-bit) L L H L H X Data out(not valid) High-Z
Output disable L X X H H X High-Z High-Z

CE2#REG#

WE#

I/O

(D15 to D8)

I/O

(D7 to D0)

Note 2 : H=VIH, L=VIL, X=VIH or VIL, High-Z= High-impedance

MITSUBISHI

ELECTRIC

4/22 Feb.1999 Rev2.0

COMMAND DEFINITION

The corresponding memories of the card are set to
read/write mode and the operation is

COMMAND DEFINITION TABLE

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

controlled by the software command written in the

control register.

Command

Read/Reset 1 Write ZA FFh(FFFFh) - - - ­Programme setup/

Programme

Erase Setup/

Erase Confirm

Programme

Suspend/Resume

Erase Suspend/

Resume

Read Status

Register

Clear Status

Register

Read Device

Identifier Code

Note 3: Indicates the basic functions of commands and should not write another commands.

Refer to the algorithms to operate.
Signal status is defined in function table and bus status.
Parenthesized data shows the data for 16 bit mode operation.
ZA=an address of a memory zone (Please refer to the memory zone)
PA=Programming address
PD=Programming data
BA=An address of a memory block (Please refer to the memory block)
RD=Data of status Register
DIA=Device identifier address

000000h for manufacturer code 000002h for device code

DID=Device identifier data

2MB=manufacturer code : 89 (8989)h device code : A6h (A6A6)h
Others=manufacturer code : 89 (8989)h device code : AA (AAAA)h

Bus

cycles

Mode Address Data in Mode Address Data in Data out

2 Write PA 40(4040)h Write PA PD -

2 Write BA 20(2020)h Write BA D0(D0D0)h -

2 Write PA B0(B0B0)h Write PA D0(D0D0)h -

2 Write BA B0(B0B0)h Write BA D0(D0D0)h -

2 Write ZA 70(7070)h Read ZA - RD

1 Write ZA 50(5050)h - - - -

2 Write ZA 90(9090)h Read DIA - DID

First bus cycle Second bus cycle

Read/Reset

The memory in the card is switched to read mode by
writing FFh (FFFFh for 16 bit operation) into
the control resister. This mode is maintained
until the contents of register are changed. This
mode needs to be written to every
memory zone to which access is required.

Programme Setup/Programme

The setup programme command sets up the card for
programming. It is applied when 40h (4040h for 16
bit operation) is written to control register.
Programming will take place automatically after
latching the address and data which are applied at
the rising edge of WE#.
The completion of programme can be confirmed by
reading status register.
(For details please refer to the algorithm)

MITSUBISHI

ELECTRIC

5/22 Feb.1999 Rev2.0

Erase Setup/Erase confirm

The erase setup is a command to set up the memory

block for erasure. Writing setup erase command 20h

(2020h for 16 bit operation) in the control register

followed by erase confirm command D0h (D0D0h

for 16 bit operation) will initiate a erasure

operation. Erasing will take place automatically

after the rising edge of WE# controlled by a internal

timer. The completion of

erase can be confirmed by reading status register.

(For details please refer to the algorithm)

These commands will not erase all the data of a

memory card and should be repeated for all the

required memory blocks. At an eight bit access

mode it should be noticed that the erasure of a

memory block will result in odd byte or even byte

erasure.

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

Erase Suspend/Erase Resume

The erase suspend command B0h (B0B0h for 16
bit operation) is a command to generate erase
interruption and to read data from another block
of selected memory zone. By writing in the
control register erase resume command D0h
(D0D0h for 16 bit operation), the memory block will
continue the erase operation.
These commands must be executed in erase
algorithm.
(For details please refer to the algorithm)

Read Status Register

The Read status register is a command to read the
status register’s data and to make sure programme
or erase operations complete successfully. The data
of status register can be read after writing 70h
(7070h for 16 bit operation) in the control register.
The register’s read data is latched on the falling
edge of OE#. At programme or erase, the status
register’s data must be read to verify the results.

STATUS REGISTER

When operating programme or erase, it is necessary
to read status register data and to transact these bit.
Each memory IC used in this

Clear Status Register

The clear status register command will clear data of

status register. It is applied when 50h (5050h for 16

bit operation) is written to the control

register. If an error occurred during programme or

erase, the status register must be cleared before

retrying programme or erase.

Read Device Identifier Codes

The read device identifier codes command is

implemented by writing 90h (9090h for 16 bit

operation) to the command register. After writing

the command, manufacturer code can be read at the

address of 000000h of the zone and device code can

be read at the address 000002h of the zone. Each

card uses the same type of memory throughout and

each memory zone will respond the same code.

(Do not apply high voltage to A10 pin in order to try

and read the device identifier codes as this will

result in the card being destroyed.)

card has internal status register to make sure

programme or erase operations complete

successfully.

7 (15) BIT 6 (14) BIT 5 (13) BIT 4 (12) BIT 3 (11) BIT 2 (10) BIT 1,0 (9,8) BIT
Programme/
Erase Status Bit

Note 4: ( ) ; for 16 bit operation

Bit ; Field name Bit ; Field name

7(15) BIT ; Programme/Erase Status Bit 6(14) BIT ; Erase Suspend Bit

0=Busy (in programming/erasing) 1=Ready 1=Erase Suspended

5(13) BIT ; Erase Error Bit 4(12) BIT ; Programme Error Bit

1=Erase Error 1=Programme Error

3(11) BIT ; Vcc Error 2(10) BIT ; Programme Suspend Bit
1=Error of voltage at Vcc 1=Programme Suspended

1,0(9,8) BIT ; Reserved for future

Erase

Suspend Bit

Erase Error

Bit

Programme

Error Bit

Vcc Error

Bit

Programme

Suspend Bit

Reserved

MITSUBISHI

ELECTRIC

6/22 Feb.1999 Rev2.0

MEMORY ZONE AND BLOCK

03FFFFFh

.

.

Zone 10 to 15 do not exist in 20MB

Zone 5 to 7 do not exist in 20MB

.

.

8 bit mode

Even byte

0000000h

03FFFFEh

0400000h

07FFFFEh

0800000h

0BFFFFEh

0C00000h

0FFFFFEh

1000000h

13FFFFEh

1400000h

17FFFFEh

1800000h

1BFFFFEh

1C00000h

1FFFFFEh

Zone0
Zone2

Zone4
Zone6

Zone8
Zone10
Zone12

Zone14

Note 5 : 2MB;1 zone=0h to 1FFFFFh address

Others;1 zone=0h to 3FFFFFh address
Zone 2 to 15 do not exist in 2MB
Zone 2 to 15 do not exist in 4MB
Zone 4 to 15 do not exist in 8MB
Zone 8 to 15 do not exist in 16MB

0000001h

03FFFFFh

0400001h

07FFFFFh

0800001h

0BFFFFFh

0C00001h

0FFFFFFh

1000001h

13FFFFFh

1400001h

17FFFFFh

1800001h

1BFFFFFh

1C00001h

1FFFFFFh

Odd byte

Zone1
Zone3

Zone5
Zone7
Zone9
Zone11
Zone13

Zone15

MITSUBISHI MEMORY CARD

FLASH MEMORY CARDS

0000001h

001FFFFh

0020001h

003FFFFh

.
.

0300001h

2MB; 1 zone=64KB∗16 blocks
Others; 1 zone=64KB∗32 blocks

Block0
Block1

.
.

Block31

16 bit mode

0000000h

03FFFFFh

0400000h

07FFFFFh

0800000h

0BFFFFFh

0C00000h

0FFFFFFh

1000000h

13FFFFFh

1400000h

17FFFFFh

1800000h

1BFFFFFh

1C00000h

1FFFFFFh

Zone0
Zone1

Odd byte

0000000h

001FFFFh

0020000h

003FFFFh

Even byte

Zone2
Zone3

0300000h

Zone4

Zone5
Zone6

03FFFFFh

2MB; 1 zone=64KW∗16 blocks
Others; 1 zone=64KW∗32 blocks

Zone7

Note 6 : 2MB;1 zone=0h to 1FFFFFh address

Others;1 zone=0h to 3FFFFFh address
Zone 1 to 7 do not exist in 2MB
Zone 1 to 7 do not exist in 4MB
Zone 2 to 7 do not exist in 8MB
Zone 4 to 7do not exist in 16MB

Block0
Block1

.
.

.
.

Block31

MITSUBISHI

ELECTRIC

7/22 Feb.1999 Rev2.0