Mitsubishi Electric MELSEC-Q/L Programming Manual

MELSEC-Q/L Programming Manual (Common Instruction)

SAFETY PRECAUTIONS

(1) Mitsubishi programmable controller ("the PRODUCT") shall be used in conditions;

i) where any problem, fault or failure occurring in the PRODUCT, if any, shall not lead to any major or serious accident; and ii) where the backup and fail-safe function are systematically or automatically provided outside of the PRODUCT for the case of any problem, fault or failure occurring in the PRODUCT.

(2) The PRODUCT has been designed and manufactured for the purpose of being used in general industries.

MITSUBISHI SHALL HAVE NO RESPONSIBILITY OR LIABILITY (INCLUDING, BUT NOT LIMITED TO ANY AND ALL RESPONSIBILITY OR LIABILITY BASED ON CONTRACT, WARRANTY, TORT, PRODUCT LIABILITY) FOR ANY INJURY OR DEATH TO PERSONS OR LOSS OR DAMAGE TO PROPERTY CAUSED BY the PRODUCT THAT ARE OPERATED OR USED IN APPLICATION NOT INTENDED OR EXCLUDED BY INSTRUCTIONS, PRECAUTIONS, OR WARNING CONTAINED IN MITSUBISHI'S USER, INSTRUCTION AND/OR SAFETY MANUALS, TECHNICAL BULLETINS AND GUIDELINES FOR the PRODUCT. ("Prohibited Application")

Prohibited Applications include, but not limited to, the use of the PRODUCT in;

• Nuclear Power Plants and any other power plants operated by Power companies, and/or any other cases in which the public could be affected if any problem or fault occurs in the PRODUCT.

• Railway companies or Public service purposes, and/or any other cases in which establishment of a special quality assurance system is required by the Purchaser or End User.

• Aircraft or Aerospace, Medical applications, Train equipment, transport equipment such as Elevator and Escalator, Incineration and Fuel devices, Vehicles, Manned transportation, Equipment for Recreation and Amusement, and Safety devices, handling of Nuclear or Hazardous Materials or Chemicals, Mining and Drilling, and/or other applications where there is a significant risk of injury to the public or property.

Notwithstanding the above, restrictions Mitsubishi may in its sole discretion, authorize use of the PRODUCT in one or more of the Prohibited Applications, provided that the usage of the PRODUCT is limited only for the specific applications agreed to by Mitsubishi and provided further that no special quality assurance or fail-safe, redundant or other safety features which exceed the general specifications of the PRODUCTs are required. For details, please contact the Mitsubishi representative in your region.

(Read these precautions before using this product.) Before using this product, please read this manual and the related manuals introduced in this manual, and pay full attention to safety to handle the product correctly. Please store this manual in a safe place and make it accessible when required. Always forward a copy of the manual to the end user.

CONDITIONS OF USE FOR THE PRODUCT

INTRODUCTION

This manual "MELSEC-Q/L Programming Manual (Common Instruction)" describes the common instructions required for programming of the QCPU and LCPU. "Common instructions" are all instructions except for dedicated instructions for intelligent function modules; PID control instructions; process control instruction; SFC instructions; ST instructions; instructions for socket communication features; trigger logging instructions for the LCPU; and dedicated instructions for LCPU positioning/counter functionality. Before using this product, please read this manual and the relevant manuals carefully and develop familiarity with the functions and performance of the MELSEC-Q or -L series programmable controller to handle the product correctly. When applying the program examples introduced in this manual to an actual system, ensure the applicability and confirm that it will not cause system control problems.

Relevant CPU module

CPU module Model

Basic model QCPU Q00JCPU, Q00CPU, Q01CPU

High Performance model QCPU Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU, Q25HCPU

Process CPU Q02PHCPU, Q06PHCPU, Q12PHCPU, Q25PHCPU

Redundant CPU Q12PRHCPU, Q25PRHCPU

Universal model QCPU Q00UJCPU, Q00UCPU, Q01UCPU, Q02UCPU, Q03UDCPU, Q03UDVCPU, Q03UDECPU,

LCPU L02SCPU, L02SCPU-P, L02CPU, L02CPU-P, L06CPU, L06CPU-P, L26CPU, L26CPU-P, L26CPU-BT,

Q04UDHCPU, Q04UDVCPU, Q04UDEHCPU, Q06UDHCPU, Q06UDVCPU, Q06UDEHCPU, Q10UDHCPU, Q10UDEHCPU, Q13UDHCPU, Q13UDVCPU, Q13UDEHCPU, Q20UDHCPU, Q20UDEHCPU, Q26UDHCPU, Q26UDVCPU, Q26UDEHCPU, Q50UDEHCPU, Q100UDEHCPU

L26CPU-PBT

SAFETY PRECAUTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

CONDITIONS OF USE FOR THE PRODUCT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

INTRODUCTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

MANUALS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

TERMS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

CHAPTER 1 GENERAL DESCRIPTION 16

1.1 Related Programming Manuals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

CHAPTER 2 INSTRUCTION TABLES 21

2.1 Types of Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

2.2 How to Read Instruction Tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

2.3 Sequence Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Contact instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Association instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Output instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Shift instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27

Master control instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

Termination instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Other instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

2.4 Basic Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Comparison operation instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Arithmetic operation instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Data conversion instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

Data transfer instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

Program branch instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

Program execution control instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

I/O refresh instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

Other convenient instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47

2.5 Application Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Logical operation instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48

Rotation instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Shift instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

Bit processing instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

Data processing instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

Structure creation instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

Data table operation instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

Buffer memory access instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

Display instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61

Debugging and failure diagnosis instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61

Character string processing instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

Special function instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65

Data control instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

Switching instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

Clock instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70

Expansion clock instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

Program control instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

PID instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74

CONTENTS

Other instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75

2.6 Instructions for Data Link. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Instructions for network refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

Instructions for reading/writing routing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

Refresh device write/read instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

2.7 Multiple CPU Dedicated Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78

Instructions for writing to the CPU shared memory of host CPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78

Instructions for reading from the CPU shared memory of another CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .78

2.8 Multiple CPU High-speed Transmission Dedicated Instruction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79

Instructions for multiple CPU high-speed transmission. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79

2.9 Redundant System Instructions (For Redundant CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .79

Instructions for redundant system (for Redundant CPU). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

CHAPTER 3 CONFIGURATION OF INSTRUCTIONS 80

3.1 Configuration of Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80

3.2 Designating Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81

Using bit data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .82

Using word (16 bits) data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83

Using double word (32 bits) data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85

Using single/double-precision real number data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87

Using character string data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

3.3 Indexing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92

3.4 Indirect Specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 105

3.5 Reducing Instruction Processing Time. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Subset processing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108

Operation processing with standard device registers (Z) (Universal model QCPU and LCPU only) . . . . . . . . 109

3.6 Cautions on Programming (Operation Errors). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110

3.7 Conditions for Execution of Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117

3.8 Counting Step Number . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .118

3.9 Operation When the OUT, SET/RST, or PLS/PLF Instructions Use the Same Device . . . . . . . . . . . . . . . . 122

3.10 Precautions for Use of File Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .126

CHAPTER 4 HOW TO READ INSTRUCTIONS 129

CHAPTER 5 SEQUENCE INSTRUCTIONS 131

5.1 Contact Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131

Operation start, series connection, parallel connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .131

Pulse operation start, pulse series connection, pulse parallel connection . . . . . . . . . . . . . . . . . . . . . . . . . . . .134

Pulse NOT operation start, pulse NOT series connection, pulse NOT parallel connection. . . . . . . . . . . . . . . . 136

5.2 Association Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 138

Ladder block series connection, ladder block parallel connection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .138

Operation results push, operation results read, operation results pop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140

Operation results inversion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 143

Operation results conversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145

Pulse conversion of edge relay operation results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .146

5.3 Output Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .148

Out (excluding timers, counters, and annunciators) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 148

Low-speed timer, high-speed timer, low-speed retentive timer, high-speed retentive timer . . . . . . . . . . . . . . . 150

Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 154

Annunciator output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .156

Setting devices (excluding annunciators) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .158

Resetting devices (excluding annunciators) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .160

Setting annunciators, resetting annunciators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .162

Rising edge output, falling edge output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 164

Bit device output inversion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .167

Pulse conversion of direct output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .169

5.4 Shift Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171

Bit device shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171

5.5 Master Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

Setting the master control, resetting the master control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173

5.6 Termination Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .177

Main routine program end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 177

Sequence program end. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .179

5.7 Other Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .181

Sequence program stop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .181

No operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .183

CHAPTER 6 BASIC INSTRUCTIONS 187

6.1 Comparison Operation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .187

BIN 16-bit data comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 187

BIN 32-bit data comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 189

Floating-point data comparisons (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 191

Floating-point data comparisons (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .193

Character string data comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 196

BIN 16-bit block data comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .199

BIN 32-bit block data comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .202

BIN 16-bit data comparisons (small, match, large) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .205

BIN 32-bit data comparisons (small, match, large) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .207

BIN 16-bit data band comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .208

BIN 32-bit data band comparisons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .210

Floating point comparisons (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 212

Floating point comparisons (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214

Floating point band comparisons (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .216

Floating point band comparisons (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 218

6.2 Arithmetic Operation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .220

BIN 16-bit addition and subtraction operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .220

BIN 32-bit addition and subtraction operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .224

BIN 16-bit multiplication and division operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 228

BIN 32-bit multiplication and division operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 230

BCD 4-digit addition and subtraction operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .232

BCD 8-digit addition and subtraction operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .236

BCD 4-digit multiplication and division operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .240

BCD 8-digit multiplication and division operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .242

Addition and subtraction of floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 244

Addition and subtraction of floating-point data (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 248

Multiplication and division of floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .252

Multiplication and division of floating-point data (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 254

BIN 16-bit data block addition and subtraction operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 256

BIN 32-bit data block addition and subtraction operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 259

Linking character strings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 262

CONTENTS

16-bit BIN data increment, 16-bit BIN data decrement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 265

32-bit BIN data increment, 32-bit BIN data decrement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 267

6.3 Data Conversion Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .269

Conversion from BIN data to BCD 4-digit data, conversion from BIN data to BCD 8-digit data . . . . . . . . . . . .269

Conversion from BCD 4-digit data to BIN data, conversion from BCD 8-digit data to BIN data . . . . . . . . . . . . 271

Conversion from BIN 16-bit data to floating-point data (single precision), conversion from BIN 32-bit data to

floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 273

Conversion from BIN 16-bit data to floating-point data (double precision), conversion from BIN 32-bit data to

floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275

Conversion from floating-point data to BIN 16-bit data (single precision), conversion from floating-point data to

BIN 32-bit data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277

Conversion from floating-point data to BIN 16-bit data (double precision), conversion from floating-point data to

BIN 32-bit data (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 279

Conversion from BIN 16-bit to BIN 32-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .281

Conversion from BIN 32-bit to BIN 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .282

Conversion from BIN 16-bit data to Gray code, conversion from BIN 32-bit data to Gray code . . . . . . . . . . . . 283

Conversion from Gray code to BIN 16-bit data, conversion from Gray code to BIN 32-bit data . . . . . . . . . . . . 285

Complement of 2 of BIN 16-bit data (sign inversion), complement of 2 of BIN 32-bit data (sign inversion) . . . 287

Floating-point sign inversion (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .289

Floating-point sign inversion (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .290

Conversion from block BIN 16-bit data to BCD 4-digit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291

Conversion from block BCD 4-digit data to block BIN 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .293

Conversion from single precision to double precision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295

Conversion from double precision to single precision . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 296

6.4 Data Transfer Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .297

16-bit data transfer, 32-bit data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .297

Floating-point data transfer (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 299

Floating-point data transfer (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .301

Character string transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .302

16-bit data negation transfer, 32-bit data negation transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .304

Block 16-bit data transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 307

Identical 16-bit data block transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .310

Identical 32-bit data block transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .312

16-bit data exchanges, 32-bit data exchanges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314

Block 16-bit data exchanges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 316

Upper and lower byte exchanges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318

Shift . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319

6.5 Program Branch Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 321

Pointer branch . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .321

Jump to END . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .324

6.6 Program Execution Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .325

Interrupt disable, interrupt enable, interrupt program mask. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 325

Recovery from interrupt programs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .331

6.7 I/O Refresh Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332

I/O refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .332

6.8 Other Convenient Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334

Counter 1-phase input up or down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 334

Counter 2-phase input up or down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 336

Teaching timer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .338

Special function timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 340

Rotary table shortest direction control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 343

Ramp signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .345

Pulse density measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .347

Fixed cycle pulse output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .349

Pulse width modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 351

Matrix input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .353

CHAPTER 7 APPLICATION INSTRUCTIONS 355

7.1 Logical Operation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 355

Logical products with 16-bit data, logical products with 32-bit data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .356

Block logical products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .361

Logical sums of 16-bit data, logical sums of 32-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .363

Block logical sum operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .367

16-bit exclusive OR operations, 32-bit exclusive OR operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .369

Block exclusive OR operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .373

16-bit data exclusive NOR operations, 32-bit data exclusive NOR operations . . . . . . . . . . . . . . . . . . . . . . . . . 375

Block exclusive NOR operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 379

7.2 Rotation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381

Right rotation of 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 381

Left rotation of 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 384

Right rotation of 32-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 387

Left rotation of 32-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 389

7.3 Shift Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391

n-bit shift to right of 16-bit data, n-bit shift to left of 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 391

1-bit shift to right of n-bit data, 1-bit shift to left of n-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 394

n-bit shift to right of n-bit data, n-bit shift to left of n-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 396

1-word shift to right of n-word data, 1-word shift to left of n-word data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 399

n-word shift to right of n-word data, n-word shift to left of n-word data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 401

Bit shift right. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .404

Bit shift left . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .406

Word shift right . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 408

Word shift left. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .410

7.4 Bit Processing Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412

Bit set for word devices, bit reset for word devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 412

Bit tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .414

Batch reset of bit devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 416

7.5 Data Processing Instructions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418

16-bit data search, 32-bit data search. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 418

16-bit data bit check, 32-bit data check. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 421

Decoding from 8 to 256 bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .423

Encoding from 256 to 8 bits. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 425

7-segment decode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .427

4-bit dissociation of 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 429

4-bit linking of 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 431

Dissociation of random data, linking of random data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .433

Data dissociation in byte units, data linking in byte units. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .437

Maximum value search for 16-bit data, maximum value search for 32-bit data . . . . . . . . . . . . . . . . . . . . . . . .440

Minimum value search for 16-bit data, minimum value search for 32-bit data . . . . . . . . . . . . . . . . . . . . . . . . .442

BIN 16-bit data sort operations, BIN 32-bit data sort operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .444

Calculation of totals for 16-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 448

Calculation of totals for 32-bit data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 449

CONTENTS

Calculation of averages for 16-bit data, calculation of averages for 32-bit data . . . . . . . . . . . . . . . . . . . . . . . .450

Check code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .452

CRC operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .455

7.6 Structure Creation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457

FOR to NEXT instruction loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 457

Forced end of FOR to NEXT instruction loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 460

Subroutine program calls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 462

Return from subroutine programs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 467

Subroutine program output OFF calls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .468

Subroutine calls between program files. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 472

Subroutine output OFF calls between program files . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .477

Subroutine program calls. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 481

Refresh . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .487

Select refresh (COM). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 489

Select refresh (CCOM(P)) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .492

Index modification of entire ladder. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .493

Designation of modification values in index modification of entire ladders . . . . . . . . . . . . . . . . . . . . . . . . . . . . 496

7.7 Data Table Operation Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 498

Writing data to the data table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 498

Reading oldest data from tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .500

Reading newest data from data tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .502

Deletion of data from data tables, insertion of data in data tables. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 504

7.8 Buffer Memory Access Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 506

Reading 1-word data from the intelligent function module, reading 2-word data from the intelligent function

module. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 506

Writing 1-word data to the intelligent function module, writing 2-word data to the intelligent function module

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .509

7.9 Display Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .512

Print ASCII code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .512

Print comment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 515

Error display and annunciator reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .518

7.10 Debugging and Failure Diagnosis Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .520

Special format failure check. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .520

Changing check format of CHK. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524

7.11 Character String Processing Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 528

Conversion from BIN 16-bit data to decimal ASCII, conversion from BIN 32-bit data to decimal ASCII . . . . . . 528

Conversion from BIN 16-bit data to hexadecimal ASCII, conversion from BIN 32-bit data to hexadecimal

ASCII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 531

Conversion from BCD 4-digit data to decimal ASCII data, conversion from BCD 8-digit data to decimal

ASCII data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .534

Conversion from decimal ASCII to BIN 16-bit data, conversion from decimal ASCII to BIN 32-bit data . . . . . . 537

Conversion from hexadecimal ASCII to BIN 16-bit data, conversion from hexadecimal ASCII to BIN 32-bit

data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 540

Conversion from decimal ASCII to BCD 4-digit data, conversion from decimal ASCII to BCD 8-digit data . . .543

Reading device comment data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 546

Character string length detection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .549

Conversion from BIN 16-bit data to character string, conversion from BIN 32-bit data to character string . . . .551

Conversion from character string to BIN 16-bit data, conversion from character string to BIN 32-bit data . . . . 556

Conversion from floating-point data to character string data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .561

Conversion from character string to floating-point data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .568

Conversion from hexadecimal BIN to ASCII . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .572

Conversion from ASCII to hexadecimal BIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 574

Extracting character string data from the right, extracting character string data from the left . . . . . . . . . . . . . .576

Random selection from character strings, random replacement in character strings . . . . . . . . . . . . . . . . . . . .579

Character string search. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 584

Insertion of character string. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .586

Deletion of character string . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 588

Floating-point data to BCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .590

From BCD format data to floating-point data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 592

7.12 Special Function Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .594

SIN operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 594

SIN operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .596

COS operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .598

COS operation on floating-point data (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 600

TAN operation on floating-point data (single precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 602

TAN operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .604

Arc sine operation on floating-point data (single precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .606

Arc sine operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .608

Arc cosine operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .610

Arc cosine operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 612

Arc tangent operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 614

Arc tangent operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .616

Conversion from floating-point angle to radian (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 618

Conversion from floating-point angle to radian (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .620

Conversion from floating-point radian to angle (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 622

Conversion from floating-point radian to angle (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .624

Exponentiation operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 626

Exponentiation operation on floating-point data (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .628

Square root operation for floating-point data (single precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .630

Square root operation for floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .632

Exponent operation on floating-point data (single precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 634

Exponent operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .636

Natural logarithm operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 638

Natural logarithm operation on floating-point data (double precision). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 640

Common logarithm operation on floating-point data (single precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 642

Common logarithm operation on floating-point data (double precision) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 644

Random number generation, series updates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 646

BCD 4-digit square roots, BCD 8-digit square roots . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .647

BCD type SIN operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .650

BCD type COS operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .652

BCD type TAN operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .654

BCD type arc sine operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 656

BCD type arc cosine operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .658

BCD type arc tangent operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 660

7.13 Data Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .662

Upper and lower limit controls for BIN 16-bit data, upper and lower limit controls for BIN 32-bit data . . . . . . .662

BIN 16-bit dead band controls, BIN 32-bit dead band controls . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 665

Zone control for BIN 16-bit data, zone control for BIN 32-bit data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .668

Scaling (coordinate data by point). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 670

Scaling (coordinate data by X and Y) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .674

7.14 File Register Switching Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 677

Switching file register block numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 677

CONTENTS

File setting for file register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 679

File setting for comments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .681

7.15 Clock Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .683

Reading clock data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 683

Writing clock data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .685

Clock data addition operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .687

Clock data subtraction operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 689

Time data conversion (from hour/minute/second to second). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .691

Time data conversion (from second to hour/minute/second). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .693

Hour meter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .695

Hour meter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .696

Date comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .697

Time comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 701

Clock data comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .705

Time data band comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 707

7.16 Expansion Clock Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 709

Reading expansion clock data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .709

Expansion clock data addition operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 712

Expansion clock data subtraction operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 715

7.17 Program Control Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .718

Program standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 719

Program output OFF standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .720

Program scan execution registration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .722

Program low speed execution registration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .724

Program execution status check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 725

7.18 PID Instruction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .727

Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 727

PID control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 729

Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 733

Auto tuning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 743

Example of practical program (step response method). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .747

Troubleshooting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .751

7.19 Other Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .752

Watchdog timer reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .752

Timing pulse generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 754

Time check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .756

Direct 1-byte read from file register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .757

File register direct 1-byte write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .759

Indirect address read operations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 761

Numerical key input using keyboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 762

Batch save of index register, batch recovery of index register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 766

Reading module information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .769

Reading module model name . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 773

Trace set, trace reset. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 777

Writing data to designated file . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 779

Reading data from designated file. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .789

Writing data to standard ROM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 801

Reading data from standard ROM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 803

Loading program from memory card . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 805

Unloading program from program memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .808

Loading and unloading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . .810

High-speed block transfer of file register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 812

User message . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .817

CHAPTER 8 INSTRUCTIONS FOR DATA LINK 820

8.1 Network Refresh Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .820

Refresh for the designated module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 820

8.2 Reading/Writing Routing Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825

Reading routing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825

Registering routing information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .827

8.3 Refresh Device Write/Read Instructions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 829

Refresh device write (in 1-bit units) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .829

Refresh device write (in 16-bit units) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .833

Refresh device read (in 1-bit units) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .838

Refresh device read (in 16-bit units) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .842

CHAPTER 9 MULTIPLE CPU DEDICATED INSTRUCTIONS 846

9.1 Writing to the CPU Shared Memory of Host CPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 846

Writing to host CPU shared memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .848

Writing to host CPU shared memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .851

9.2 Reading from the CPU Shared Memory of Another CPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 855

Reading from other CPU shared memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .856

CHAPTER 10 MULTIPLE CPU HIGH-SPEED TRANSMISSION DEDICATED

INSTRUCTIONS 861

10.1 Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .861

10.2 Writing Devices to Another CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 872

10.3 Reading Devices from Another CPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 876

CHAPTER 11 REDUNDANT SYSTEM INSTRUCTIONS (FOR REDUNDANT CPU) 880

11.1 System Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 880

APPENDICES 883

Appendix 1 Operation Processing Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .883

Definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 883

Operation processing time of Basic model QCPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 884

Operation processing time of High Performance model QCPU/Process CPU/Redundant CPU. . . . . . . . . . . .898

Operation processing time of Universal model QCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 921

Operation processing time of LCPU . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1025

Appendix 2 CPU Performance Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1064

Comparison of Q, LCPU with AnNCPU, AnACPU, and AnUCPU. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1064

Appendix 3 Application Program Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1070

Concept of programs which perform operations of a nth power of X, a nth root X . . . . . . . . . . . . . . . . . . . . .1070

CONTENTS

INDEX 1071

INSTRUCTION INDEX 1073

REVISIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1078

WARRANTY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1079

TRADEMARKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1080

MANUALS

To understand the main specifications, functions, and usage of the CPU module, refer to the basic manuals. Read other manuals as well when using a different type of CPU module and its functions. Order each manual as needed, referring to the following lists. The numbers in the "CPU module" and the respective modules are as follows.

Number CPU module

1) Basic model QCPU

2) High Performance model QCPU

3) Process CPU

4) Redundant CPU

5) Universal model QCPU

6) LCPU

●: Basic manual, : Other CPU module manuals

Manual name <Manual number>

 User's manual

QCPU User's Manual (Hardware Design, Maintenance and Inspection) <SH-080483ENG>

QnUCPU User's Manual (Function Explanation, Program Fundamentals) <SH-080807ENG>

Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals) <SH-080808ENG>

QnUCPU User's Manual (Communication via Built-in Ethernet Port) <SH-080811ENG>

MELSEC-L CPU Module User's Manual (Hardware Design, Maintenance and Inspection) <SH-080890ENG>

MELSEC-L CPU Module User's Manual (Function Explanation, Program Fundamentals) <SH-080889ENG>

MELSEC-L CPU Module User's Manual (Built-In I/O Function) <SH-080892ENG>

MELSEC-L CPU Module User's Manual (Built-In Ethernet Function) <SH-080891ENG>

QnUDVCPU/LCPU User's Manual (Data Logging Function) <SH-080893ENG>

Description CPU module

1) 2) 3) 4) 5) 6)

Specifications of the hardware (CPU modules, power supply modules, base units, extension cables, memory cards, SD memory cards, extended SRAM cassettes, and batteries), system maintenance and inspection, and troubleshooting

Functions, methods, and devices for programming ●

Functions, methods, and devices for programming ●●●●

Functions for the communication via built-in Ethernet port of the CPU module

Specifications of the hardware (CPU modules, power supply modules, a branch module, an extension module, and SD memory cards), system maintenance and inspection, troubleshooting, and error codes

Functions, methods, and devices for programming ●

Built-in I/O Functionality of the CPU 

Functions for the communication via built-in Ethernet port of the CPU module

Data Logging Functionality of the CPU Module 

●●●●●



●



Manual name <Manual number>

 Programming manual

MELSEC-Q/L Programming Manual (Common Instructions) <SH-080809ENG>

MELSEC-Q/L/QnA Programming Manual (SFC) <SH-080041>

MELSEC-Q/L Programming Manual (MELSAP-L) <SH-080076>

MELSEC-Q/L Programming Manual (Structured Text) <SH-080366E>

MELSEC-Q/L/QnA Programming Manual (PID Control Instructions) <SH-080040>

MELSEC-Q Programming/Structured Programming Manual (Process Control Instructions) <SH-080316E>

Related Manuals

Description CPU module

1) 2) 3) 4) 5) 6)

How to use sequence instructions, basic instructions, and application instructions

System configuration, performance specifications, functions, programming, debugging, and error codes for SFC (MELSAP3) programs

Programming methods, specifications, and functions for SFC (MELSAP-L) programs

Programming methods using structured languages 

Dedicated instructions for PID control  

Describes the dedicated instructions for performing process control.

●●●●●●





Manual name <Manual number>

MELSEC-Q CC-Link IE Controller Network Reference Manual <SH-080668ENG>

MELSEC-Q CC-Link IE Field Network Master/Local Module User's Manual <SH-080917ENG>

MELSEC-L CC-Link IE Field Network Master/Local Module User's Manual <SH-080972ENG>

Q Corresponding MELSECNET/H Network System Reference Manual (PLC to PLC network) <SH-080049>

Q Corresponding MELSECNET/H Network System Reference Manual (Remote I/O network) <SH-080124>

Type MELSECNET, MELSECNET/B Data Link System Reference Manual <IB-66350>

MELSEC-Q/L Ethernet Interface Module User's Manual (Application) <SH-080010>

Description

Specifications, procedures and settings before system operation, parameter settings, programming, and troubleshooting of the CC-Link IE Controller Network module

Specifications, procedures and settings before system operation, parameter settings, programming, and troubleshooting of the CC-Link IE Field Network module

Specifications, procedures and settings before system operation, parameter setting, programming, and troubleshooting of a MELSECNET/H network system (PLC to PLC network)

Specifications, procedures and settings before system operation, parameter setting, programming, and troubleshooting of a MELSECNET/H network system (remote I/O network)

Describes the general concept, specifications, and part names and settings for MELSECNET () and MELSECNET/B.

E-mail function, programmable controller CPU status monitoring function, communication via CC-Link IE Field Network, CC-Link IE Controller Network, MELSECNET/H, or MELSECNET/ 10, communication using the data link instructions, and file transfer function (FTP server) of the Ethernet module

TERMS

This manual uses the generic names and abbreviations shown below to refer to Q/L series CPU modules, unless otherwise specified.  indicates a part of the model or version.

Term Description

A5B A generic term for the power source-free type A52B, A55B, and A58B extension base unit on which the A Series

I/O module and special function module can be mounted

A6B A generic term for the A62B, A65B, and A68B extension base unit on which the A Series I/O module and special

Basic model QCPU A generic term for Q00JCPU, Q00CPU and Q01CPU

Built-in Ethernet port LCPU A generic term for the L02CPU, L02CPU-P, L06CPU, L06CPU-P, L26CPU, L26CPU-P, L26CPU-BT, and

Built-in Ethernet port QCPU A generic term for Q03UDVCPU, Q03UDECPU, Q04UDVCPU, Q04UDEHCPU, Q06UDVCPU,

CC-Link IE A generic term for the CC-Link IE Controller Network and the CC-Link IE Field Network

CPU module A generic term for Basic model QCPU, High Performance model QCPU, Process CPU, Redundant CPU,

GX Developer The product name of Q/L series Corresponding SW  D5C-GPPW-type GPP function software package

GX Works2 The product name of Q/L series Corresponding SW  D5C-GXW2-type GPP function software package

High Performance model QCPU A generic term for Q02CPU, Q02HCPU, Q06HCPU, Q12HCPU and Q25HCPU

High-speed Universal model QCPU A generic term for Q03UDVCPU, Q04UDVCPU, Q06UDVCPU, Q13UDVCPU and Q26UDVCPU

Intelligent function module device A generic term for intelligent function module devices and special function module devices

L series The abbreviation for Mitsubishi MELSEC-L series programmable controller

LCPU A generic term for L02SCPU, L02SCPU-P, L02CPU, L02CPU-P, L06CPU, L06CPU-P, L26CPU, L26CPU-P,

MELSECNET(, /B) The abbreviation for MELSECNET and MELSECNET/B data link system

MELSECNET/10 The abbreviation for MELSECNET/10 network system

MELSECNET/H The abbreviation for MELSECNET/H network system

Process CPU A generic term for Q02PHCPU, Q06PHCPU, Q12PHCPU and Q25PHCPU

Programming tool A generic term for GX Developer and GX Works2

Q series The abbreviation for Mitsubishi MELSEC-Q series programmable controller

Q3DB A generic term for the Q35DB, Q38DB and Q312DB type Multiple CPU high speed main base unit on which

Q5B A generic term for Q52B and Q55B extension base unit on which the Q Series I/O and intelligent function

Q6B A generic term for Q63B, Q65B, Q68B and Q612B extension base unit on which Q Series power supply

Q6WRB Another term for Q65WRB extension base unit for redundant system on which redundant power supply module,

QA1S5B A generic term for QA1S51B extension base unit on which AnS Series I/O module, special function module can

QA1S6B A generic term for QA1S65B and QA1S68B extension base units on which AnS Series power supply module, I/

QA6ADP The abbreviation for the QA6ADP QA conversion adapter module

QA6ADP+A5B/A6B The abbreviation for the A large type extension base unit equipped with the QA6ADP

QA6B A generic term for the QA65B and QA68B extension base units on which the A Series power supply module, A

QnCPU A generic term for Q00JCPU, Q00CPU, Q01CPU and Q02CPU

QnHCPU A generic term for Q02HCPU, Q06HCPU, Q12HCPU and Q25HCPU

function module can be mounted

L26CPU-PBT

Q06UDEHCPU, Q10UDEHCPU, Q13UDVCPU, Q13UDEHCPU, Q20UDEHCPU, Q26UDVCPU, Q26UDEHCPU, Q50UDEHCPU and Q100UDEHCPU

Universal model QCPU and LCPU

: Version of the software Check the GX Developer versions that can be used for each CPU module in "System Configuration," User's Manual (Hardware Design, Maintenance and Inspection).

: Version of the software Check the GX Works2 versions that can be used for each CPU module in "System Configuration," User's Manual (Hardware Design, Maintenance and Inspection).

L26CPU-BT and L26CPU-PBT

CPU module (except the Q00JCPU), Q series power supply module, Q series I/O module, and intelligent function module can be mounted

module can be mounted

module, I/O module, intelligent function module can be mounted

Q series I/O module, and intelligent function module can be mounted.

be mounted

O module, special function module can be mounted

Series I/O module, and special function module can be mounted

Ter m Description

QnPHCPU A generic term for Q02PHCPU, Q06PHCPU, Q12PHCPU and Q25PHCPU

QnPRHCPU A generic term for Q12PRHCPU and Q25PRHCPU

QnU(D)(H)CPU A generic term for Q02UCPU, Q03UDCPU, Q04UDHCPU, Q06UDHCPU, Q10UDHCPU, Q13UDHCPU,

QnUCPU A generic term for Q00UJCPU, Q00UCPU, Q01UCPU, Q02UCPU, Q03UDCPU, Q03UDVCPU, Q03UDECPU,

QnUD(H)CPU A generic term for Q03UDCPU, Q04UDHCPU, Q06UDHCPU, Q10UDHCPU, Q13UDHCPU, Q20UDHCPU and

QnUDE(H)CPU A generic term for Q03UDECPU, Q04UDEHCPU, Q06UDEHCPU, Q10UDEHCPU, Q13UDEHCPU,

QnUDVCPU A generic term for Q03UDVCPU, Q04UDVCPU, Q06UDVCPU, Q13UDVCPU and Q26UDVCPU

Redundant CPU A generic term for Q12PRHCPU and Q25PRHCPU

Universal model QCPU A generic term for Q00UJCPU, Q00UCPU, Q01UCPU, Q02UCPU, Q03UDCPU, Q03UDVCPU, Q03UDECPU,

Q20UDHCPU and Q26UDHCPU

Q26UDHCPU

Q20UDEHCPU, Q26UDEHCPU, Q50UDEHCPU and Q100UDEHCPU

1 GENERAL DESCRIPTION

This manual

Describes SFC.

Qn(H)/QnPH/ QnPRHCPU User's Manual (Function Explanation, Program Fundamentals)

MELSEC-Q/L Programming Manual (Common Instructions)

Describes the instructions other than those described in the manuals on the right.

MELSEC-Q/L/ QnA Programming Manual (PID Control Instructions)

Describes the instructions to perform PID control.

MELSEC-Q/L/ QnA Programming Manual (SFC)

MELSEC-Q/L Programming Manual (MELSAP-L)

Describes MELSAP-L.

MELSEC-Q/L Programming Manual (Structured Text)

Describes the ST language.

Describes the functions and devices of the CPU module, and programming.

This manual describes the common instructions required for programming of the QCPU and LCPU. "Common instructions" are all instructions except for dedicated instructions for intelligent function modules; PID control instructions; process control instruction; SFC instructions; ST instructions; instructions for socket communication features; trigger logging instructions for the LCPU; and dedicated instructions for LCPU positioning/counter functionality.

1.1 Related Programming Manuals

Before reading this manual, check the functions, programming methods, devices and others that are necessary to create programs with the CPU in the manuals below:

 QnUCPU User's Manual (Function Explanation, Program Fundamentals)  Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals)  MELSEC-L CPU Module User's Manual (Function Explanation, Program Fundamentals)

Basic model QCPU

1 GENERAL DESCRIPTION

1.1 Related Programming Manuals

High Performance model QCPU

Describes SFC.

This manual

Qn(H)/QnPH/ QnPRHCPU User's Manual (Function Explanation, Program Fundamentals)

MELSEC-Q/L Programming Manual (Common Instructions)

Describes the instructions other than those described in the manuals on the right.

MELSEC-Q/L/ QnA Programming Manual (PID Control Instructions)

Describes the instructions to perform PID control.

MELSEC-Q/L/ QnA Programming Manual (SFC)

MELSEC-Q/L Programming Manual (MELSAP-L)

Describes MELSAP-L.

MELSEC-Q/L Programming Manual (Structured Text)

Describes the ST language.

Describes the functions and devices of the CPU module, and programming.

Qn(H)/QnPH/ QnPRHCPU User's Manual

Describes the functions and devices of the CPU module, and programming.

MELSEC-Q/L Programming Manual (Common Instruction)

MELSEC-Q/L/QnA Programming Manual (SFC)

MELSEC-Q/L Programming Manual (MELSAP-L)

MELSEC-Q/L Programming Manual (Structured Text)

(Function Explanation, Program Fundamentals)

Describes the instructions other than those described in the manuals on the right.

Describes the instructions to perform process control.

Describes SFC. Describes MELSAP-L. Describes the ST

language.

MELSEC-Q Programming/ Structured Programming Manual (Process Control Instructions)

This manual

Process CPU

1 GENERAL DESCRIPTION

1.1 Related Programming Manuals

Redundant CPU

Qn(H)/QnPH/ QnPRHCPU User's Manual

Describes the functions and devices of the CPU module, and programming.

MELSEC-Q/L Programming Manual (Common Instruction)

MELSEC-Q/L/QnA Programming Manual (SFC)

MELSEC-Q/L Programming Manual (MELSAP-L)

MELSEC-Q/L Programming Manual (Structured Text)

(Function Explanation, Program Fundamentals)

MELSEC-Q Programming/ Structured Programming Manual (Process Control Instructions)

This manual

Describes the instructions to perform process control.

Describes the instructions to perform PID control.

Describes the instructions other than those described in the manuals on the right.

Describes SFC. Describes MELSAP-L. Describes the ST

language.

MELSEC-Q/L/QnA Programming Manual (PID Control Instructions)

1 GENERAL DESCRIPTION

1.1 Related Programming Manuals

Universal model QCPU

QnUCPU User's Manual

Describes the functions and devices of the CPU module, and programming.

MELSEC-Q/L Programming Manual (Common Instruction)

MELSEC-Q/L/QnA Programming Manual (SFC)

MELSEC-Q/L Programming Manual (MELSAP-L)

MELSEC-Q/L Programming Manual (Structured Text)

(Function Explanation, Program Fundamentals)

MELSEC-Q Programming/ Structured Programming Manual (Process Control Instructions)

This manual

Describes the instructions to perform process control.

Describes the instructions to perform PID control.

Describes the instructions other than those described in the manuals on the right.

Describes SFC. Describes MELSAP-L. Describes the ST

language.

MELSEC-Q/L/QnA Programming Manual (PID Control Instructions)

1 GENERAL DESCRIPTION

1.1 Related Programming Manuals

LCPU

MELSEC-L CPU Module User's Manual

MELSEC-Q/L Programming Manual (Common Instruction)

MELSEC-Q/L/QnA Programming Manual (PID Control Instructions)

MELSEC-Q/L/QnA Programming Manual (SFC)

MELSEC-Q/L Programming Manual (MELSAP-L)

MELSEC-Q/L Programming Manual (Structured Text)

Describes the instructions other than those described in the manuals on the right.

Describes the instructions to perform process control.

Describes SFC. Describes MELSAP-L. Describes the ST

language.

This manual

(Function Explanation, Program Fundamentals)

Describes the functions and devices of the CPU module, and programming.

1 GENERAL DESCRIPTION

1.1 Related Programming Manuals

2 INSTRUCTION TABLES

2.1 Types of Instructions

The major types of CPU module instructions consist of sequence instructions, basic instructions, application instructions, data link instructions, QCPU instructions and redundant system instructions. These types of instructions are listed in the following Table.

Types of instructions Description Reference

Sequence instruction

Basic instruction Comparison operation

Contact instruction Operation start, series connection, parallel connection Page 131 SEQUENCE

Association instruction Ladder block connection, store/read operation results, creation of pulses

from operation results

Output instruction Bit device output, pulse output, output reversal

Shift instruction Bit device shift

Master control instruction Master control

Termination instruction Program termination

Other instruction Program stop, instructions such as no operation which do not fit in the

above categories

instructions

Arithmetic operation instruction Addition, subtraction, multiplication or division of BIN or BCD

BCD  BIN conversion instruction

Data transfer instruction Transmits designated data

Program branch instruction Program jumps

Program run control instruction Enables or inhibits interrupt programs

I/O refresh instruction Executes partial refresh

Other convenient instruction Instructions for: Counter increment/decrement, teaching timer, special

Comparisons such as =, >, < Page 187 BASIC

Conversion from BCD to BIN and from BIN to BCD

function timer, rotary table shortest direction control, etc.

INSTRUCTIONS

2 INSTRUCTION TABLES

2.1 Types of Instructions

Types of instructions Description Reference

Application instruction

Data link instruction

Multiple CPU dedicated instruction

Multiple CPU highspeed transmission dedicated instruction

Redundant system instruction

Logical operation instruction Logical operations such as logical sum, logical product, etc. Page 355

Rotation instruction Rotation of designated data

Shift instruction Shift of designated data

Bit processing instruction Bit set and reset, bit test, batch reset of bit devices

Data processing instruction 16-bit data searches, data processing such as decoding and encoding

Structure creation instruction Repeated operation, subroutine program calls, indexing in ladder units

Table operation instruction Data table read/write

Buffer memory access instruction

Display instruction Print ASCII code, etc.

Debugging and failure diagnosis instruction

Character string processing instruction

Special function instruction Trigonometric functions, conversion between angles and radians,

Data control instruction Upper and lower limit controls, dead band controls, zone controls

Switching instruction File register block No. switches, designation of file registers and comment

Clock instruction Reading/writing of the values of year, month, day, hour, minute, second, and

Expansion clock instruction Reading of the values of year, month, day, hour, minute, second,

Program control instruction Instructions to switch program execution conditions

Other instruction Instructions that do not fit in the above categories, such as watchdog timer

Link refresh instruction Designated network refresh Page 820

Routing information read/write instruction

Refresh device write/read instruction

Multiple CPU dedicated instruction

Multiple CPU device write/read instruction

Instruction for Redundant CPU System switching Page 880

Data read/write from/to an intelligent function module

Check, status latch, sampling trace

Conversion between BIN/BCD and ASCII; conversion between BIN and character string; conversion between floating decimal point data and character strings, character string processing, etc.

exponential operations, natural logarithm, common logarithm, square roots

files

day of the week; addition/subtraction of the values of hour, minute, and second; conversion of the values of hour, minute, and second into second; comparison between the values of year, month, and day; and comparison between the values of hour, minute, and second

millisecond, and day of the week; addition/subtraction of the values of hour, minute, second, and millisecond

reset instructions and timing clock instructions

Reads, writes, and registers routing information

Reads or writes the refresh device.

Writing to host CPU shared memory, Reading from other CPU shared memory

Writes/reads devices to/from another CPU. Page 861 MULTIPLE

APPLICATION INSTRUCTIONS

INSTRUCTIONS FOR DATA LINK

Page 846 MULTIPLE CPU DEDICATED INSTRUCTIONS

CPU HIGH-SPEED TRANSMISSION DEDICATED INSTRUCTIONS

REDUNDANT SYSTEM INSTRUCTIONS (FOR REDUNDANT CPU)

2 INSTRUCTION TABLES

2.1 Types of Instructions

2.2 How to Read Instruction Tables

ÒÓÔ Õ Ö×ØÙ

Example

D+

16-bit instruction 32-bit instruction

Example

Instruction executed when ON

Instruction executed only at the leading edge of OFF to ON

Example

E+

Real number instructions

Example + $+

Character string instructions

Indicates destination. Indicates source.

Indicates instruction symbol.

Indicates destination. Indicates source.

Indicates instruction symbol.

S1 S2

The instruction tables found from Page 25 Sequence Instructions to Page 79 Redundant System Instructions (For Redundant CPU) have been made according to the following format:

 Classifies instructions according to their application.  Indicates the instruction symbol added to the instruction in a program.

Instruction code is built around the 16-bit instruction. The following notations are used to mark 32-bit instructions, instructions executed only at the rising edge of OFF to ON, real number instructions, and character

string instructions:

• 32-bit instruction: The letter "D" is added to the first line of the instruction.

• Instructions executed only at the rising edge of OFF to ON: The letter "P" is added to the end of the instruction.

• Real number instructions: The letter "E" is added to the first line of the instruction.

• Character string instructions: A dollar sign $ is added to the first line of the instruction.

 Shows symbol diagram on the ladder.

• Destination: Indicates where data will be sent after operation.

• Source: Stores data prior to operation.

2 INSTRUCTION TABLES

2.2 How to Read Instruction Tables

 Indicates the type of processing that is performed by individual instructions.

(D)+(S) (D)

Indicates 16 bits.

 Indicates execution conditions for individual instructions.

(D+1, D) +(S+1, S) (D +1, D)

16 bits

Indicates 32 bits.

D+1 D

Upper 16 bits Lower 16 bits

Execution condition Non-conditional

execution

Recorded code No symbol recorded

For execution conditions, refer to Page 117 Conditions for Execution of Instructions.  Indicates the basic number of steps for individual instructions. See Page 118 Counting Step Number for a description of the number of steps.  The ● mark indicates instructions for which subset processing is possible. See Page 108 Reducing Instruction Processing Time for details on subset processing.  Indicates the page numbers where the individual instructions are explained.

Executed at ON Executed at the

rising edge

Executed at OFF Executed at the

falling edge

2 INSTRUCTION TABLES

2.2 How to Read Instruction Tables

2.3 Sequence Instructions

Contact instructions

Category Instruction

Symbol Processing details Execution

symbol

Contact LD • Starts logic operation (Starts A contact logic operation)

LDI • Starts logical NOT operation (Starts B contact logic

AND • Logical product (A contact series connection)

ANI • Logical product NOT (B contact series connection)

OR • Logical sum (A contact parallel connection)

ORI • Logical sum NOT (B contact parallel connection)

LDP • Starts rising edge pulse operation

LDF • Starts falling edge pulse operation

ANDP • Rising edge pulse series connection

ANDF • Falling edge pulse series connection

ORP • Rising edge pulse parallel connection

ORF • Falling edge pulse parallel connection

operation)

condition

Number of basic steps

Subset Reference

● Page 131

● Page 134

LDPI • Starts rising edge pulse NOT operation 3

LDFI • Starts falling edge pulse NOT operation 3

ANDPI • Rising edge pulse NOT series connection 4

ANDFI • Falling edge pulse NOT series connection 4

ORPI • Rising edge pulse NOT parallel connection 4

ORFI • Falling edge pulse NOT parallel connection 4

*2*3

● Page 136

2 INSTRUCTION TABLES

2.3 Sequence Instructions

*1 The number of steps may vary depending on the device being used.

ORB

MPS

MRD

MPP

Device Number of steps

Internal device, file register (R0 to R32767) 1

Direct access input (DX) 2

Devices other than above 3

*2 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of steps

Basic model QCPU High Performance model QCPU Process CPU Redundant CPU

Universal model QCPU LCPU

• Internal device, file register (R0 to R32767)

• Direct access input (DX)

Devices other than above 3

Internal device, file register (R0 to R32767) Number of basic steps

• Serial number access format file register (ZR), Extended data register (D), Extended link register (W), Multiple CPU shared device (U3En\G10000)

• Direct access input (DX)

Devices other than above Number of basic steps +2

Number of basic steps +1

*3 For the High-speed Universal model QCPU, the number of basic steps is two.

Association instructions

Category Instruction

Symbol Processing details Execution

symbol

Connection ANB • AND between logical blocks

ANB

ORB • OR between logical blocks

MPS • Memory storage of operation

MRD • Read of operation results

MPP • Read and reset of operation

INV • Inversion of operation result 1  Page 143

MEP • Conversion of operation result

MEF • Conversion of operation result

EGP • Conversion of operation result

EGF • Conversion of operation result

(Series connection between logical blocks)

results

stored with MPS instruction

results stored with MPS instruction

to rising edge pulse

to falling edge pulse

to rising edge pulse (Stored at Vn)

to falling edge pulse (Stored at Vn)

*1 The number of steps may differ, depending on CPU modules.

CPU module Number of basic steps

High Performance model QCPU Process CPU Redundant CPU Universal model QCPU LCPU

Basic model QCPU 2

condition

Number

Subset Reference of basic steps

1  Page 138

1  Page 140

1  Page 145

1  Page 146

2 INSTRUCTION TABLES

2.3 Sequence Instructions

Output instructions

RST D

PLS D

MC n D

Category Instruction

symbol

Output OUT • Device output

SET • Sets device

RST • Resets device

PLS • Generates 1 cycle program pulse

PLF • Generates 1 cycle program pulse

FF • Reversal of device output 2  Page 167

DELTA • Pulse conversion of direct output 2  Page 169

DELTAP

Symbol Processing details Execution

SET D

at rising edge of input signal.

PLF D

DELTA D

DELTAP D

at falling edge of input signal.

condition

Annunciator (F)

Number of basic steps

2  Page 164

Subset Reference

 Page 148

Page 150 Page 154 Page 156

 Page 158

Page 162

 Page 160

Page 162

*1 The number of steps may vary depending on the device being used. See description pages of individual instructions for number of steps.

Shift instructions

Category Instruction

symbol

Shift SFT • 1-bit shift of device 2  Page 171

SFTP

Symbol Processing details Execution

condition

SFT D

SFTP D

Number of basic steps

Subset Reference

Master control instructions

Category Instruction

symbol

Master control

MC • Starts master control 2  Page 173

MCR • Resets master control 1

Symbol Processing details Execution

condition

MCR n

Number of basic steps

Subset Reference

2 INSTRUCTION TABLES

2.3 Sequence Instructions

Termination instructions

STOP

NOPLF

PAGE n

Category Instruction

Symbol Processing details Execution

symbol

Termination FEND • Termination of main

END • Termination of sequence

FEND

END

program

*1 For the High-speed Universal model QCPU, the number of basic steps is two.

Other instructions

Category Instruction

symbol

Stop STOP • Terminates sequence

Ignored NOP  • Ignored (For program

NOPLF • Ignored (To change pages

PAGE n • Ignored (Subsequent

Symbol Processing details Execution

operation after input condition has been met.

• Sequence program is executed by placing the RUN/STOP key switch back in the RUN position.

deletion or space)

during printouts)

programs will be controlled from step 0 of page n)

condition

Number

Subset Reference of basic steps

Number

1 Page 177

1 Page 179

Subset Reference of basic steps

1  Page 181

1  Page 183

2 INSTRUCTION TABLES

2.3 Sequence Instructions

2.4 Basic Instructions

S1 S2

DS2S1CMP

DS2S1CMPP

S3S2S1 DZCP

S3S2S1 DZCPP

Comparison operation instructions

Category Instruction

symbol

BIN 16-bit data comparisons

LD= • Conductive status when (S1)

AND=

OR=

LD<> • Conductive status when (S1)

AND<>

OR<>

LD> • Conductive status when (S1)

AND>

OR>

LD<= • Conductive status when (S1)

AND<=

Symbol Processing details Execution

condition

S1 S2

= (S2)

• Non-conductive status when

(S1)  (S2)

S1 S2

 (S2)

• Non-conductive status when (S1) = (S2)

S1 S2

> (S2)

• Non-conductive status when

S1 S2

(S1)  (S2)

S1 S2

 (S2)

• Non-conductive status when

S1 S2

(S1) > (S2)

Number

Subset Reference of basic steps

3 ● Page 187

3 ●

BIN 16-bit data comparisons

OR<=

LD< • Conductive status when (S1)

AND<

OR<

S1 S2

< (S2)

• Non-conductive status when

(S1)  (S2)

S1 S2

LD>= • Conductive status when (S1)

AND>=

OR>=

CMP • (D) Conductive status when

CMPP

ZCP • (D) Conductive status when

ZCPP

S1 S2

 (S2)

• Non-conductive status when (S1) < (S2)

(S1) > (S2)

• (D)+1 Conductive status when (S1) = (S2)

• (D)+2 Conductive status when (S1) < (S2)

(S1) > (S3)

• (D)+1 Conductive status when (S1)  (S3)  (S2)

• (D)+2 Conductive status when (S3) > (S2)

3 ●

4  Page 205

5  Page 208

2 INSTRUCTION TABLES

2.4 Basic Instructions

Category Instruction

DS1S2

S1 S2

DS1S2

DS2S1DCMP

DS2S1DCMPP

S3S2S1 DDZCP

S3S2S1 DDZCPP

symbol

BIN 32-bit data comparisons

LDD= • Conductive status when

ANDD=

ORD=

LDD<> • Conductive status when

ANDD<>

ORD<>

LDD> • Conductive status when

ANDD>

ORD>

LDD<= • Conductive status when

ANDD<=

ORD<=

Symbol Processing details Execution

condition

DS1S2

(S1+1, S1) = (S2+1, S2)

• Non-Conductive status when (S1+1, S1)  (S2+1, S2)

DS1S2

(S1+1, S1)  (S2+1, S2)

• Non-Conductive status when (S1+1, S1) = (S2+1, S2)

DS1S2

(S1+1, S1) > (S2+1, S2)

• Non-Conductive status when (S1+1, S1)  (S2+1, S2)

S1 S2D

DS1S2

(S1+1, S1)  (S2+1, S2)

• Non-Conductive status when (S1+1, S1) > (S2+1, S2)

Number of basic steps

Subset Reference

● Page 189

●

BIN 32-bit data comparisons

DS1S2

LDD< • Conductive status when

ANDD<

ORD<

LDD>= • Conductive status when

ANDD>=

ORD>=

DS1S2

S1 S2

DS1S2

(S1+1, S1) < (S2+1, S2)

• Non-Conductive status when (S1+1, S1)  (S2+1, S2)

(S1+1, S1)  (S2+1, S2)

• Non-Conductive status when (S1+1, S1) < (S2+1, S2)

DS1S2

DCMP • (D) Conductive status when

DCMPP

DZCP • (D) Conductive status when

DZCPP

(S1, S1+1) > (S2, S2+1)

• (D)+1 Conductive status when (S1, S1+1) = (S2, S2+1)

• (D)+2 Conductive status when (S1, S1+1) < (S2, S2+1)

(S1, S1+1) > (S3, S3+1)

• (D)+1 Conductive status when (S1, S1+1)  (S3, S3+1)  (S2, S2+1)

• (D)+2 Conductive status when (S3, S3+1) > (S2, S2+1)

4  Page 207

5  Page 210

●

2.4 Basic Instructions

2 INSTRUCTION TABLES

Category Instruction

ES1S2

ECMPP DS1 S2

EZCP DS1 S2 S3

EZCPP DS1 S2 S3

symbol

Floating decimal point data comparisons (single precision)

LDE= • Conductive status when

ANDE=

ORE=

LDE<> • Conductive status when

ANDE<>

ORE<>

Symbol Processing details Execution

condition

ES1S2

(S1+1, S1) = (S2+1, S2)

• Non-Conductive status when (S1+1, S1)  (S2+1, S2)

ES1S2

S1 S2

(S1+1, S1)  (S2+1, S2)

• Non-Conductive status when (S1+1, S1) = (S2+1, S2)

Number

Subset Reference of basic steps

3  Page 191

3 

LDE> • Conductive status when

ANDE>

ORE>

ES1S2

(S1+1, S1) > (S2+1, S2)

• Non-Conductive status when

(S1+1, S1)  (S2+1, S2)

ES1S2

LDE<= • Conductive status when

ANDE<=

ORE<=

LDE< • Conductive status when

ANDE<

ORE<

ES1S2

(S1+1, S1)  (S2+1, S2)

• Non-Conductive status when (S1+1, S1) > (S2+1, S2)

(S1+1, S1) < (S2+1, S2)

• Non-Conductive status when (S1+1, S1)  (S2+1, S2)

ES1S2

LDE>= • Conductive status when

ANDE>=

ORE>=

ES1S2

(S1+1, S1)  (S2+1, S2)

• Non-Conductive status when (S1+1, S1) < (S2+1, S2)

3 

Floating point comparisons (single precision)

Floating point band comparisons (single precision)

ECMP • (D) is on when (S1, S1+1) >

ECMPP

EZCP • (D) is on when (S1, S1+1) >

EZCPP

ECMP DS1 S2

(S2, S2+1)

• (D)+1 is on when (S1, S1+1) = (S2, S2+1)

• (D)+2 is on when (S1, S1+1) < (S2, S2+1)

(S3, S3+1)

• (D)+1 is on when (S1, S1+1)  (S3, S3+1)  (S2, S2+1)

• (D)+2 is on when (S3, S3+1) > (S2, S2+1)

4  Page 212

5  Page 216

2 INSTRUCTION TABLES

2.4 Basic Instructions

Category Instruction

ED S1 S2

EDCMPP DS1 S2

symbol

Floating decimal point data comparisons (double precision)

LDED= • Conductive status when

ANDED=

ORED=

LDED<> • Conductive status when

ANDED<>

ORED<>

Symbol Processing details Execution

condition

ED S1 S2

(S1+3, S1+2, S1+1, S1) = (S2+3, S2+2, S2+1, S2)

• Non-Conductive status when (S1+3, S1+2, S1+1, S1)  (S2+3, S2+2, S2+1, S2)

ED S1 S2

(S1+3, S1+2, S1+1, S1)  (S2+3, S2+2, S2+1, S2)

• Non-Conductive status when (S1+3, S1+2, S1+1, S1) = (S2+3, S2+2, S2+1, S2)

Number

Subset Reference of basic steps

3  Page 193

3 

LDED> • Conductive status when

ANDED>

ORED>

DS1S2

(S1+3, S1+2, S1+1, S1) > (S2+3, S2+2, S2+1, S2)

• Non-Conductive status when

(S1+3, S1+2, S1+1, S1)  (S2+3, S2+2, S2+1, S2)

ED S1 S2

LDED<= • Conductive status when

ANDED<=

ORED<=

LDED< • Conductive status when

ANDED<

ORED<

EDS1S2

ED S1 S2

(S1+3, S1+2, S1+1, S1)  (S2+3, S2+2, S2+1, S2)

• Non-Conductive status when (S1+3, S1+2, S1+1, S1) > (S2+3, S2+2, S2+1, S2)

(S1+3, S1+2, S1+1, S1) < (S2+3, S2+2, S2+1, S2)

• Non-Conductive status when (S1+3, S1+2, S1+1, S1)  (S2+3, S2+2, S2+1, S2)

ED S1 S2

LDED>= • Conductive status when

ANDED>=

ORED>=

ED S1 S2

(S1+3, S1+2, S1+1, S1)  (S2+3, S2+2, S2+1, S2)

• Non-Conductive status when (S1+3, S1+2, S1+1, S1) < (S2+3, S2+2, S2+1, S2)

3 

Floating point comparisons (double precision)

Floating point band comparisons (double precision)

2 INSTRUCTION TABLES

2.4 Basic Instructions

EDCMP • (D) is on when (S1 to S1+3)

EDCMPP

EDZCP • (D) is on when (S1 to S1+3)

EDZCPP

EDCMP DS1 S2

EDZCP DS1 S2 S3

EDZCPP DS1 S2 S3

> (S2 to S2+3)

• (D)+1 is on when (S1 to S1+3) = (S2 to S2+3)

• (D)+2 is on when (S1 to S1+3) < (S2 to S2+3)

> (S3 to S3+3)

• (D)+1 is on when (S1 to S1+3)  (S3 to S3+3)  (S2 to S2+3)

• (D)+2 is on when (S3 to S3

) > (S2 to S2+3)

4  Page 214

5  Page 218

Category Instruction

$S1S2

symbol

Character string data comparisons

LD$= • Compares character string

AND$=

OR$=

LD$<> • Compares character string

AND$<>

OR$<>

LD$> • Compares character string

AND$>

OR$>

LD$<= • Compares character string

AND$<=

OR$<=

LD$< • Compares character string

AND$<

OR$<

LD$>= • Compares character string

AND$>=

OR$>=

Symbol Processing details Execution

condition

$S1S2

S1 S2$

$S1S2

S1 and character string S2 one character at a time.

• Conductive status when (character string S1) = (character string S2)

• Non-Conductive status when (character string S1)  (character string S2)

S1 and character string S2 one character at a time.

• Conductive status when (character string S1)  (character string S2)

• Non-Conductive status when (character string S1) = (character string S2)

S1 and character string S2 one character at a time.

• Conductive status when (character string S1) > (character string S2)

• Non-Conductive status when (character string S1)  (character string S2)

S1 and character string S2 one character at a time.

• Conductive status when (character string S1)  (character string S2)

• Non-Conductive status when (character string S1) > (character string S2)

S1 and character string S2 one character at a time.

• Conductive status when (character string S1) < (character string S2)

• Non-Conductive status when (character string S1)  (character string S2)

S1 and character string S2 one character at a time.

• Conductive status when (character string S1)  (character string S2)

• Non-Conductive status when (character string S1) < (character string S2)

Number

Subset Reference of basic steps

3  Page 196

3 

2 INSTRUCTION TABLES

2.4 Basic Instructions

Category Instruction

BKCMP nS1 S2 D

BKCMP n

S1 S2 D

BKCMP nS1 S2 D

BKCMP nS1 S2 DP

BKCMP

nS1 S2 D

BKCMP

nS1 S2 D

BKCMP nS1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

S1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

nS1 S2 D

DBKCMP

nS1 S2 D

symbol

BIN 16-bit Block data comparisons

BKCMP= • This instruction compares

BKCMP<>

BKCMP>

BKCMP<=

BKCMP<

BKCMP>=

BKCMP=P

BKCMP<>P

Symbol Processing details Execution

condition

BIN 16-bit data stored in npoint devices starting from

BKCMP

S1 S2 D

BKCMP nS1 S2 D

the device specified by S1 with BIN 16-bit data stored in n-point devices starting from the device specified by S2, and then stores the result into the nth device specified by (D) and up.

Number

Subset Reference of basic steps

5  Page 199

BIN 32-bit block data comparisons

BKCMP>P

BKCMP<=P

BKCMP<P

BKCMP>=P

DBKCMP= • This instruction compares

DBKCMP<>

DBKCMP>

DBKCMP<=

DBKCMP<

DBKCMP>=

DBKCMP=P

DBKCMP<> P

DBKCMP>P

DBKCMP<= P

DBKCMP<P

BKCMP nS1 S2 DP

BKCMP

DBKCMP

nS1 S2 D

BIN 32-bit data stored in npoint devices starting from

nS1 S2 D

the device specified by S1 with BIN 32-bit data stored in n-point devices starting from the device specified by a constant and S2, and then stores the result into the nth device specified by (D) and up.

nS1 S2 D

5  Page 202

2.4 Basic Instructions

2 INSTRUCTION TABLES

DBKCMP>= P

DBKCMP

nS1 S2 D

*1 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

Remark

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 3 The number of steps may increase

All devices that can be used 3

5 When using a High Performance model

QCPU, Process CPU or Redundant CPU, the number of steps increases but the processing speed becomes faster.

depending on the conditions. Page 118 Conditions for increasing the number of steps

*2 The conditions under which character string comparisons can be made are as shown below:

• Match: All characters in the strings must match

• Larger string: If character strings are different, determines the string with the largest number of character codes. If the lengths of the character strings are different, determines the longest character string.

• Smaller string: If the character strings are different, determines the string with the smallest number of character codes. If the lengths of the character strings are different, determines the shortest character string.

2 INSTRUCTION TABLES

2.4 Basic Instructions

Arithmetic operation instruction

+ S1 S2 D

+P S1 S2 D

S1 S2 D

D+ S1 S2 D

D+P S1 S2 D

D DS

D S1 S2 D

D S1 S2 DP

S1 S2 D

/ S1 S2 D

/P S1 S2 D

S1 S2 D

D/ S1 S2 D

D/P S1 S2 D

Category Instruction

symbol

BIN 16-bit addition and subtraction operations

BIN 32-bit addition and subtraction operations

+•D+(S)(D) 3 ● Page 220

+•(S1)+(S2)(D) 4 ● Page 222

- • (D)-(S)(D) 3 ● Page 220

-P

- • (S1)-(S2)(D) 4 ● Page 222

-P

D+ • (D+1, D)+(S+1, S)(D+1, D)

D+P

D+ • (S1+1, S1)+(S2+1, S2)(D+1,

D+P

Symbol Processing details Execution

condition

+ SD

+P SD

D+ SD

D+P S

Number of basic steps

Subset Reference

● Page 224

● Page 226

BIN 16-bit multiplication and division operations

BIN 32-bit multiplication and division operations

D- • (D+1, D)-(S+1, S)(D+1, D)

D-P

D- • (S1+1, S1)-(S2+1, S2)(D+1,

D-P

*•(S1)(S2)(D+1, D)

/•(S1)(S2)Quotient(D),

D* • (S1+1, S1)(S2+1, S2)(D+3,

D*P

D/ • (S1+1, S1)(S2+1,

D/P

D SDP

Remainder (D+1)

D+2, D+1, D)

S2)Quotient (D+1, D), Remainder (D+3, D+2)

● Page 224

● Page 226

● Page 228

●

● Page 230

●

2.4 Basic Instructions

2 INSTRUCTION TABLES

Category Instruction

B+ DS

B+P SD

B+ S1 S2 D

B+P S1 S2 D

B DS

B DSP

B S1 S2 D

B S1 S2 DP

DB+ SD

DB+P SD

DB+ S1 S2 D

DB+P S1 S2 D

DB SD

DB SDP

DB S1 S2 D

DB S1 S2 DP

BS1S2D

B/ S1 S2 D

B/P S1 S2 D

DB S1 S2 D

DB S1 S2 DP

DB/ S1 S2 D

DB/P S1 S2 D

symbol

BCD 4-digit addition and subtraction operations

B+ • (D)+(S)(D) 3 ● Page 232

B+P

B+ • (S1)+(S2)(D) 4  Page 234

B+P

B- • (D)-(S)(D) 3 ● Page 232

B-P

B- • (S1)-(S2)(D) 4  Page 234

B-P

Symbol Processing details Execution

condition

Number of basic steps

Subset Reference

BCD 8-digit addition and subtraction operations

BCD 4-digit multiplication and division operations

BCD 8-digit multiplication and division operations

DB+ • (D+1, D)+(S+1, S)(D+1, D) 3  Page 236

DB+P

DB+ • (S1+1, S1)+(S2+1, S2)(D+1,

DB+P

DB- • (D+1, D)-(S+1, S)(D+1, D) 3  Page 236

DB-P

DB- • (S1+1, S1)-(S2+1, S2)(D+1,

DB-P

B* • (S1)(S2)(D+1, D) 4 ● Page 240

B*P

B/ • (S1)(S2)Quotient(D),

Remainder (D+1)

B/P

DB* • (S1+1, S1)(S2+1, S2)(D+3,

D+2, D+1, D)

DB*P

4  Page 238

4 ●

4  Page 242

DB/ • (S1+1, S1)(S2+1,

DB/P

S2)Quotient (D+1, D), Remainder (D+3, D+2)

4 ●

2 INSTRUCTION TABLES

2.4 Basic Instructions

Category Instruction

E+ SD

E+P SD

E+ S1 S2 D

E+P S1 S2 D

E S1 S2 D

E S1 S2 DP

D+ SD

ED+PSD

ED+ S1 S2 D

ED+PS1S2D

EDSD

EDS1S2D

EDS1S2DP

S1 S2 D

E/ S1 S2 D

E/P S1 S2 D

EDS1S2

EDS1S2DP

ED/ S1 S2 D

ED/PS1S2D

symbol

Floating decimal point data addition and subtraction operations (single precision)

E+ • (D+1, D)+(S+1, S)(D+1, D) 3 ●

E+P

E+ • (S1+1, S1)+(S2+1, S2)(D+1,

E+P

E- • (D+1, D)-(S+1, S)(D+1, D) 3 ●

Symbol Processing details Execution

condition

E SD

Number of basic steps

Subset Reference

Page 244

●

Page 246

Page 244

Floating decimal point data addition and subtraction operations (double precision)

Floating decimal point data multiplication and division operations (single precision)

E-P

E- • (S1+1, S1)-(S2+1, S2)(D+1,

E-P

ED+ • (D+3, D+2, D+1, D)+(S+3, S+2,

ED+P

ED+ • (S1+3, S1+2, S1+1, S1)+(S2+3,

ED+P

ED- • (D+3, D+2, D+1, D)-(S+3, S+2,

ED-P

ED- • (S1+3, S1+2, S1+1, S1)-(S2+3,

ED-P

E* • (S1+1, S1)(S2+1, S2)(D+1,

E*P

E/ • (S1+1, S1)(S2+1,

E/P

E SDP

S+1, S)(D+3, D+2, D+1, D)

S2+2, S2+1, S2)(D+3, D+2, D+1, D)

S+1, S)(D+3, D+2, D+1, D)

EDSDP

S2+2, S2+1, S2)(D+3, D+2, D+1, D)

S2)Quotient (D+1, D)

3 ● Page 248

4 ● Page 250

3 ● Page 248

4 ● Page 250

3 ●

4 ●

●

Page 246

Page 252

Floating decimal point data multiplication and division operations (double precision)

2 INSTRUCTION TABLES

2.4 Basic Instructions

ED* • (S1+3, S1+2, S1+1, S1)(S2+3,

S2+2, S2+1, S2)(D+3, D+2,

ED*P

ED/ • (S1+3, S1+2, S1+1, S1)(S2+3,

ED/P

D+1, D)

S2+2, S2+1, S2)Quotient (D+3, D+2, D+1, D)

4 ● Page 254

4 ●

Category Instruction

BK+ S1 S2 nD

BK+P S1 S2 nD

BK S1 S2 nD

BK S1 S2 nDP

DBK+ S1 S2 nD

DBK+P S1 S2 nD

DBK

S1 S2 nD

DBK

S1 S2 nDP

$+ SD

S1 S2 D

$+P

S1 S2 D

INC D

INCP D

DINC D

DINCP D

DEC D

DECP D

DDEC D

DDECP D

symbol

BIN 16-bit data block addition and subtraction operations

BIN 32-bit data block addition and subtraction operations

Character string data Connection

BIN data increment, decrement

BK+ • This instruction adds BIN 16-bit

BK+P

BK- • This instruction subtracts BIN

BK-P

DBK+ • Adds BIN 32-bit data stored in

DBK+P

DBK- • Subtracts BIN 32-bit data stored

DBK-P

$+ • Links character string

$+P

$+ • Links character string

$+P

INC • (D)+1(D) 2 ● Page 265

INCP

Symbol Processing details Execution

condition

data stored in n-point devices starting from the device specified by (S1) to the n-point data stored in the devices starting from the device specified by (S2) in batch.

16-bit data stored in the n-point devices starting from the devices specified by (S2) from BIN 16-bit data stored in n-point devices starting from the device specified by (S1) in batch.

the n-point devices starting from the device specified by (S1) and a constant to BIN 32-bit data stored in the n-point devices starting from the device specified by (S2) and stores the result into the nth device specified by (D) and up.

in the n-point devices starting from the device specified by (S2) or a constant from BIN 32bit data stored in n-point devices starting from the device specified by (S1) and stores the operation result into the nth device specified by (D) and up.

designated with (S) to character string designated with (D), and

$+P SD

stores the result from (D) onward.

designated with (S2) to character string designated with (S1), and stores the result from (D) onward.

Number

Subset Reference of basic steps

5  Page 256

5 

5  Page 259

5 

3  Page 262

4  Page 264

DINC • (D+1, D)+1(D+1, D)

DINCP

DEC • (D)-1(D) 2 ● Page 265

DECP

DDEC • (D+1, D)-1(D+1, D)

DDECP

● Page 267

2 INSTRUCTION TABLES

2.4 Basic Instructions

*1 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 3 The number of steps may increase

All devices that can be used 3

5 When using a High Performance model

*2 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU All devices that can be used 4

Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 4 The number of steps may increase

6 When using a High Performance model

Remark

QCPU, Process CPU or Redundant CPU, the number of steps increases but the processing speed becomes faster.

depending on the conditions. Page 118 Conditions for increasing the number of steps

Remark

QCPU, Process CPU or Redundant CPU, the number of steps increases but the processing speed becomes faster.

depending on the conditions. Page 118 Conditions for increasing the number of steps

*3 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

steps

QCPU, LCPU • Word device: Internal device (except for file register

ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 4 The number of steps may increase

3 

*4 The number of basic steps is three for the Universal model QCPU and LCPU. *5 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 2 The number of steps may increase

All devices that can be used 2

3 When using a High Performance model

Remark

depending on the conditions. Page 118 Conditions for increasing the number of steps

Remark

QCPU, Process CPU or Redundant CPU, the number of steps increases but the processing speed becomes faster.

depending on the conditions. Page 118 Conditions for increasing the number of steps

*6 The subset is effective only with Universal model QCPU and LCPU.

2 INSTRUCTION TABLES

2.4 Basic Instructions

Data conversion instructions

BCD SD

(S) (D)

BIN (0 to 9999)

BCD conversions

BCDP SD

DBCD SD

(S+1, S) (D+1, D)

BIN (0 to 99999999)

BCD conversions

DBCDP SD

BIN SD

BINP SD

DBIN SD

(S+1, S) (D+1, D)

BCD (0 to 99999999)

BIN conversions

DBINP SD

FLT SD

FLTP SD

DFLT SD

DFLTP SD

FLT

DSD

(S)

Conversion to real number

( D+3, D+2, D+1, D)

BIN( 32768 to 32767)

FLTDP S D

DFLTD S D

DFLTDP S D

INT

INTP SD

DINT SD

(S+1, S) (D+1, D)

Real number

(-2147483648 to 2147483647)

Conversion to BIN

DINTP SD

INTDSD

(S+3, S+2, S+1, S)

Conversion to BIN

(D)

Real number (-32768 to 32767)

INTDP S D

DINTD S D

(S+3, S+2, S+1, S)

Conversion to BIN

(D+1, D)

Real number (-2147483648 to 2147483647)

DINTDP S D

Category Instruction

symbol

BCD conversions

BIN conversions

BIN  Floating point conversions (single precision)

BIN  Floating point conversions (double precision)

Floating point (single precision)  BIN conversions

BCD 3

BCDP

DBCD 3

DBCDP

BIN 3

BINP

DBIN 3

DBINP

FLT 3

FLTP

DFLT 3

DFLTP

FLTD 4 ● Page 275

FLTDP

DFLTD 4 ●

DFLTDP

INT 3

INTP

DINT 3

Symbol Processing details Execution

condition

BIN conversions

(S) (D)

BCD (0 to 9999)

Conversion to real number

(S)

BIN(

(

D+1, D)

32768 to 32767)

Conversion to real number

(S+1, S) (D+1, D)

BIN( 2147483648 to

2147483647)

Conversion to real number

(S+1, S) (D+3, D+2, D+1, D)

BIN( 2147483648 to

2147483647)

Conversion to BIN

(S+1, S) (D)

Real number (-32768 to 32767)

Number of basic steps

Subset Reference

● Page 269

●

● Page 271

●

Page 273

Page 277

DINTP

Floating point (double precision)  BIN conversions

INTD 3 ● Page 279

INTDP

DINTD 3 ●

DINTDP

2 INSTRUCTION TABLES

2.4 Basic Instructions

Category Instruction

DBL SD

(S)

Conversion

(D+1, D)

BIN (-32768 to 32767)

DBLP SD

WORD SD

WORDP SD

GRY SD

(S) (D)

BIN (-32768 to 32767)

Conversion to gray code

GRYP SD

DGRY SD

+1, S)

(D+1, D)

BIN (-2147483648 to

2147483647)

Conversion to gray code

DGRYP SD

GBIN SD

(S) (D)

Gray code (-32768 to 32767)

Conversion to BIN data

DGBIN SD

DGBINP SD

(D) (D)

BIN data

NEGP D

(D+1, D) (D+1, D)

BIN data

DNEGP D

Real number data

(D+1, D) (D+1, D)

BKBCD

nS D

BKBCDP nS D

BKBIN nS D

BKBINP nS D

ECON S D

(S+1, S)

Conversion to double precision

(D+3, D+2, D+1, D)

32-bit floating-point real number

EDCON S D

(S+3, S+2, S+1, S)

Conversion to single precision

(D+1, D)

64-bit floating-point real number

EDCONP S D

symbol

BIN 16-bit  32-bit conversions

DBL 3

DBLP

Symbol Processing details Execution

condition

Number of basic steps

Subset Reference

 Page 281

BIN  Gray code conversions

Gray code  BIN conversions

Complement to 2

WORD 3

(S+1, S)

WORDP

GRY 3

GRYP

DGRY 3

DGRYP

GBIN 3

GBINP

DGBIN 3

GBINP SD

Conversion

(D)

BIN (-32768 to 32767)

Conversion to BIN data

 Page 282

 Page 283



 Page 285



(S+1, S) (D+1, D)

DGBINP

Gray code (-2147483648 to 2147483647)

NEG 2  Page 287

NEGP

NEG D

Block conversion

Floatingpoint Single precision  Double precision

Floatingpoint Double precision  Single precision

DNEG 2 

DNEGP

ENEG 2  Page 289

ENEGP

EDNEG 3  Page 290

EDNEGP

BKBCD • Batch converts BIN data n points

BKBCDP

BKBIN • Batch converts BCD data n points

BKBINP

ECON 3  Page 295

ECONP

EDCON 3  Page 296

EDCONP

DNEG D

ENEG D

ENEGP D

EDNEGD

EDNEGP D

ECONP S D

Real number data

(D+3, D+2, D+1, D)(D+3, D+2, D+1, D)

4  Page 291

from (S) to BCD data and stores the result from (D) onward.

4  Page 293

from (S) to BIN data and stores the result from (D) onward.

2 INSTRUCTION TABLES

2.4 Basic Instructions

*1 The number of basic steps is two for the Universal model QCPU and LCPU. *2 The subset is effective only with Universal model QCPU and LCPU. *3 For the High-speed Universal model QCPU, the number of basic steps is two.

2 INSTRUCTION TABLES

2.4 Basic Instructions

Data transfer instruction

MOV SD

MOVP SD

DMOV SD

DMOVP SD

EMOV SD

(S+1, S) (D+1, D)

Real number data

EMOVP SD

DMOV S D

(S+3, S+2, S+1, S) (D+3, D+2, D+1, D)

Real number data

EDMOVP S D

MOV

$MOVP SD

CML SD

CMLP SD

DCML SD

DCMLP SD

(S)

(D)

FMOVP nSD

XCH

XCHP

DXCH

DXCHP

BXCH nSD

(S)

(D)

Category Instruction

symbol

16-bit data transfer

32-bit data transfer

Floating decimal point data transfer (single precision)

Floating decimal point data transfer (double precision)

Character string data transfer

MOV • (S)(D)

MOVP

DMOV • (S+1, S)(D+1, D)

DMOVP

EMOV

EMOVP

EDMOV 2 ●

EDMOVP

$MOV • Transfers character string

$MOVP

Symbol Processing details Execution

condition

designated by (S) to device designated by (D) onward.

Number

Subset Reference of basic steps

3  Page 302

● Page 297

●

Page 299

Page 301

16-bit data negation transfer

32-bit data negation transfer

Block transfer

Identical 16-bit data block transfers

Identical 32-bit data block transfers

16-bit data exchange

32-bit data exchange

CML • (S)

CMLP

DCML • (S+1, S)

DCMLP

BMOV 4 ● Page 307

BMOVP

FMOV 4 ● Page 310

FMOVP

DFMOV 4 ● Page 312

DFMOVP

XCH • (D1)(D2) 3 ● Page 314

XCHP

DXCH • (D1+1, D1)(D2+1, D2) 3 ●

DXCHP

BMOV nSD

BMOVP nSD

FMOV nSD

DFMOV nSD

DFMOVP nSD

(D)

(S)

(S+1,S)

(D+1, D)

(D)

(D+1,D)

● Page 304

●

Block data exchange

2 INSTRUCTION TABLES

2.4 Basic Instructions

BXCH 4  Page 316

BXCHP

BXCHP nSD

Category Instruction

b0b15 b8 b7

... ...

b0b15 b8 b7

... ...

(D)

8 bits 8 bits

n2 Dn1Sn3SMOV

n2 Dn1Sn3SMOVP

symbol

Exchange of upper and lower bytes

SWAP 3  Page 318

SWAPP

Symbol Processing details Execution

condition

SWAP D

SWAPP D

Number of basic steps

Subset Reference

Shift SMOV 6  Page 319

SMOVP

4th digit 3rd digit 2nd digit 1st digit

*1 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

Remark

steps

QCPU, LCPU • Word device: Internal device (except for file register

ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K4, and which use no indexing.

• Constant: No limitations

Devices other than above 3 The number of steps may increase

2 

depending on the conditions. Page 118 Conditions for increasing the number of steps

*2 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

Remark

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU • Word device: Internal device (except for file register

Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 3 The number of steps may increase

ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

(The number of steps is 3 when the above device + constant are used.)

Devices other than above 3 The number of steps may increase

All devices that can be used 2

3 

depending on the conditions. Page 118 Conditions for increasing the number of steps

2 

depending on the conditions. Page 118 Conditions for increasing the number of steps

*3 The subset is effective only with Universal model QCPU and LCPU.

2 INSTRUCTION TABLES

2.4 Basic Instructions

Program branch instructions

JMP Pn

GOEND

IMASK S

IRET

RFS nS

RFSP nS

Category Instruction

Symbol Processing details Execution

symbol

Jump CJ • Jumps to Pn when input

SCJ • Jumps to Pn from the scan

JMP • Jumps unconditionally to Pn. 2 ●

GOEND • Jumps to END instruction

CJ Pn

SCJ Pn

conditions are met.

after the meeting of input condition.

when input condition is met.

Program execution control instructions

Category Instruction

symbol

Disable interrupts

Enable interrupts

Interrupt disable/ enable setting

Return IRET • Returns to sequence

DI • Prohibits the running of an

EI • Resets interrupt program

IMASK • Inhibits or permits interrupts

Symbol Processing details Execution

interrupt program.

execution prohibition.

for each interrupt program.

program from an interrupt program.

condition

Number

Subset Reference of basic steps

2 ● Page 321

2 ●

1  Page 324

Number

Subset Reference of basic steps

1  Page 325

1 

2 

1  Page 331

I/O refresh instructions

Category Instruction

symbol

I/O Refresh RFS • Refreshes the relevant I/O

RFSP

Symbol Processing details Execution

area during scan.

condition

Number

Subset Reference of basic steps

3  Page 332

2 INSTRUCTION TABLES

2.4 Basic Instructions

Other convenient instructions

UDCNT1 nSD

UDCNT2 nSD

12 45 43 10-10 3 2

(S)+1

(S)+0

Present Cn value

Cn contact

STMR nSD

ROTC n2n1SD

SPD nSD

PLSY n1 n2 D

PWM n1 n2 D

Category Instruction

Symbol Processing details Execution

symbol

Up/Down counter

Teaching timer

Special timer

Shortest direction control

Ramp signal

Pulse density

Fixed cycle pulse output

Pulse width modulation

Matrix input MTR • Reads data of 16 points  n

UDCNT1 4  Page 334

(S)+0

(S)+1 Present

Cn value

Cn contact

1 2 3 4 6 7 6 5 3 2 1 0 -1 -2 -3 -2 -1 0045

Down

UDCNT2 4  Page 336

TTMR 3  Page 338

TTMR nD

(Time that TTMR is ON)

n=0:1, n=1:10, n=2:100

STMR The 4 points from the bit device

designated by (D) operate as shown below, depending on the ON/OFF status of the input conditions for the STMR instruction:

• (D)+0: Off delay timer output

• (D)+1: One shot after off timer output

• (D)+2: One shot after on timer output

• (D)+3: On delay and off delay timer output

ROTC • Rotates a rotary table with n1

divisions from the stop position to the position designated by (S+1) in the shortest direction.

RAMP • Changes device data

RAMP D1 n3n1 n2 D2

designated by D1 from n1 to n2 in n3 scans.

SPD • Counts the pulse input from the

device designated by (S) for the duration of time designated by n, and stores the count in the device designated by (D).

PLSY • Outputs a pulse at a frequency

designated by n1 the number of times designated by n2, to the output number (Y) designated by (D).

PWM • Outputs the pulse of the cycle

set by n2, for the amount of time ON designated by n1, to the output number (Y) designated by (D).

MTR D2 nD1S

rows from the devices starting from the one specified by (S), and stores them to the devices starting from the one specified by (D2).

(D)

condition

Number

Subset Reference of basic steps

3  Page 340

5  Page 343

6  Page 345

4  Page 347

4  Page 349

4  Page 351

5  Page 353

2 INSTRUCTION TABLES

2.4 Basic Instructions

2.5 Application Instructions

WANDP S1 S2 D

DANDP SD

WOR S1 S2 D

BKORP nS1 S2 D

Logical operation instructions

Category Instruction

symbol

Logical product

Logical sum

WAND • (D)(S)(D) 3 ● Page 356

WANDP

WAND • (S1)(S2)(D) 4

WANDP

DAND • (D+1, D)(S+1, S)(D+1, D)

DANDP

DAND • (S1+1, S1)(S2+1, S2)(D+1,

DANDP

BKAND 5  Page 361

BKANDP

WOR • (D)(S)(D) 3 ● Page 363

WORP

WOR • (S1)(S2)(D) 4

Symbol Processing details Execution

condition

WAND SD

WANDP SD

WAND S1 S2 D

DAND SD

DAND S1 S2 D

DANDP S1 S2 D

BKAND nS1 S2 D

(S1) (S2) (D)

BKANDP nS1 S2 D

WOR SD

WORP SD

Number of basic steps

Subset Reference

● Page 358

● Page 356

● Page 358

● Page 365

WORP

DOR • (D+1, D)(S+1, S)(D+1, D)

DORP

DOR • (S1+1, S1)(S2+1, S2)(D+1,

DORP

BKOR 5  Page 367

BKORP

WORP S1 S2 D

DOR DS

DORP DS

DOR S1 S2 D

DORP S1 S2 D

BKOR nS1 S2 D

(S1) (S2) (D)

● Page 363

● Page 365

2.5 Application Instructions

2 INSTRUCTION TABLES

Category Instruction

WXORP S1 S2 D

WXNR DS

(D)

(S)

(D)

WXNR S1 S2 D

(S1)

(S2)

(D)

(D+1,D)

(S+1,S)

(D+1,D)

BKXNRP nS1 S2 D

symbol

Symbol Processing details Execution

condition

Number of basic

Subset Reference

steps

Exclusive ORWXOR • (D)(S)(D) 3 ● Page 369

WXOR SD

NON exclusive logical sum

WXORP

WXOR • (S1)(S2)(D) 4

WXORP

DXOR • (D+1, D)(S+1, S)(D+1, D)

DXORP

DXOR • (S1+1, S1)(S2+1, S2)(D+1,

DXORP

BKXOR 5  Page 373

BKXORP

WXNR 3 ● Page 375

WXNRP

WXNR 4

WXNRP

DXNR

WXORP SD

WXOR S1 S2 D

DXOR SD

DXORP SD

DXOR S1 S2 D

DXORP S1 S2 D

BKXOR nS1 S2 D

BKXORP nS1 S2 D

WXNRP DS

WXNRP S1 S2 D

DXNR DS

(S1) (S2) (D)

● Page 371

● Page 369

● Page 371

● Page 377

● Page 375

DXNRP

DXNR

DXNRP

BKXNR 5  Page 379

BKXNRP

DXNRP DS

DXNR S1 S2 D

DXNRP S1 S2 D

BKXNR nS1 S2 D

(S1+1,S1)

(S2+1,S2)

(S1) (S2) (D)

(D+1,D)

● Page 377

2 INSTRUCTION TABLES

2.5 Application Instructions

*1 The number of basic steps is three for the Universal model QCPU and LCPU. *2 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 3 The number of steps may increase

All devices that can be used 3

5 When using a High Performance model

*3 The number of steps may differ, depending on the device or CPU module to be used.

CPU module Device Number of

steps

High Performance model QCPU Process CPU Redundant CPU

Basic model QCPU All devices that can be used 4

Universal model QCPU LCPU

• Word device: Internal device (except for file register ZR)

• Bit device: Devices whose device Nos. are multiples of 16, whose digit designation is K8, and which use no indexing.

• Constant: No limitations

Devices other than above 4 The number of steps may increase

All devices that can be used 3

6 When using a High Performance model

Remark

QCPU, Process CPU or Redundant CPU, the number of steps increases but the processing speed becomes faster.

depending on the conditions. Page 118 Conditions for increasing the number of steps

Remark

QCPU, Process CPU or Redundant CPU, the number of steps increases but the processing speed becomes faster.

depending on the conditions. Page 118 Conditions for increasing the number of steps

2 INSTRUCTION TABLES

2.5 Application Instructions

Rotation instructions

ROR nD

RORP nD

RCR nD

SM700

Right rotation by n bits

(D) b0b15

Carry flag

RCRP nD

ROL nD

ROLP nD

RCL nD

SM700

Left rotation by n bits

(D) b0b15

Carry flag

RCLP nD

DROR nD

b0b31 SM700b16

b15

(D+1) (D)

Right rotation by n bits Carry flag

DRORP nD

DRCR nD

b0b31 SM700b16

b15

(D+1) (D)

Right rotation by n bits Carry flag

DRCRP nD

DROL nD

b0b31SM700 b16

b15

(D+1) (D)

Left rotation by n bitsCarry flag

DROLP nD

DRCL nD

(D+1) (D)

SM700 b31 to b16 b15 to b0

Left rotation by n bitsCarry flag

DRCLP nD

Category Instruction

symbol

Right rotation of 16-bit data

Left r otation of 16-bit data

Right rotation of 32-bit data

ROR 3

RORP

RCR 3

RCRP

ROL 3

ROLP

RCL 3

RCLP

DROR 3

DRORP

Symbol Processing details Execution

condition

(D) b0b15

SM700

Right rotation by n bits Carry flag

SM700

(D) b0b15

Left rotation by n bitsCarry flag

Number of basic steps

Subset Reference

● Page 381

●

● Page 384

●

● Page 387

DRCR 3

DRCRP

Left r otation of 32-bit data

DROL 3

DROLP

DRCL 3

DRCLP

*1 For the High-speed Universal model QCPU, the number of basic steps is four.

●

● Page 389

●

2 INSTRUCTION TABLES

2.5 Application Instructions

Shift instructions

SFR nD

b15 bn b0

0 to 0

b15

SM700

Carry flag

SFLP nD

BSFR nD

(D)

SM700

Carry flag

SFTBR Dn1n2

SFTBRP D n1 n2

SFTBL Dn1n2

(D)

SM700

Carry flag

SFTBLP Dn1n2

DSFR nD

(D)

DSFL nD

(D)

DSFLP nD

SFTWR Dn1n2

(D)

SFTWRP Dn1n2

SFTWL Dn1n2

(D)

SFTWLP Dn1n2

Category Instruction

symbol

n-bit shift of 16-bit data

1-bit shift of n-bit data

n-bit shift of n-bit data

SFR 3

SFRP

SFL 3

SFLP

BSFR 3  Page 394

BSFRP

BSFL 3 

BSFLP

SFTBR 4  Page 396

SFTBRP

SFTBL 4 

Symbol Processing details Execution

condition

b15

Carry flag

SFRP nD

b0 SM700b15

0 to 0

SFL nD

BSFRP nD

BSFL nD

BSFLP nD

Carry flag

SM700

(D)

Carry flag

SM700

Number of basic steps

Subset Reference

● Page 391

●

1-word shift of n-words data

n-words shift of nwords data

SFTBLP

DSFR 3 ● Page 399

DSFRP

DSFL 3 ●

DSFLP

SFTWR 4  Page 401

SFTWRP

SFTWL 4 

SFTWLP

DSFRP nD

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

SFTR n2SDn1

SFTL n2SDn1

(D) (S)

WSFRP n2SDn1

WSFL n2SDn1

(D) (S)

WSFLP n2SDn1

symbol

Bit shift right/shift left

SFTR 5  Page 404

SFTRP

SFTL 5  Page 406

Symbol Processing details Execution

condition

n2n2

(D)(S)

SFTRP n2SDn1

Number of basic steps

Subset Reference

SFTLP

SFTLP n2SDn1

Word shift right/shift left

WSFR 5  Page 408

WSFR n2SDn1

WSFRP

WSFL 5  Page 408

WSFLP

*1 For the High-speed Universal model QCPU, the number of basic steps is four.

n2n2

(D)(S)

2 INSTRUCTION TABLES

2.5 Application Instructions

Bit processing instructions

TEST S1 S2 D

DTEST S1 S2 D

(D)

b31

(S1)

Bit designated by (S2)

BKRST nD

OFF OFF

(D)

Reset

OFF

ON ON

(D)

Category Instruction

symbol

Bit set/reset BSET 3 ● Page 412

BSETP

BRST 3 ●

BRSTP

Bit tests TEST 4  Page 414

TESTP

DTEST 4 

DTESTP

Batch reset of bit devices

BKRST 3  Page 416

BKRSTP

Symbol Processing details Execution

condition

BSET nD

BSETP nD

BRST nD

BRSTP nD

TESTP S1 S2 D

DTESTP S1 S2 D

BKRSTP nD

(D)

b15

(D)

b15

(S1)

Bit designated by (S2)

b0bn

(D)b0b15

Number of basic steps

Subset Reference

2 INSTRUCTION TABLES

2.5 Application Instructions

Data processing instructions

(S1)

(S2)

(D): Match No. (D + 1): nNumber of

matches

DSER nS1 S2 D

(S2)

(D): Match No. (D + 1):

(S1)

32 bits

Number of matches

DSERP nS1 S2 D

b15

(S)

(D): Number of 1s

SUMP SD

DSUM SD

(S)(S + 1)

(D): Number of 1s

DSUMP SD

(S)

Encode

(D)

2 bits

Decode from 256 to 8

Category Instruction

symbol

Symbol Processing details Execution

condition

Number of basic

Subset Reference

steps

Data searches

Bit checks SUM 3 ● Page 421

Decode DECO 4  Page 423

Encode ENCO 4  Page 425

7-segment decode

SER 5  Page 418

SERP

DSER 5 

DSERP

SER nS1 S2 D

SERP nS1 S2 D

SUM SD

SUMP

DSUM 3 ●

DSUMP

Decode from 8 to 256

(S)

Decode

(D)

bits

DECOP

DECO nDS

DECOP nDS

ENCO nDS

ENCOP

SEG 3 ● Page 427

SEGP

ENCOP nDS

SEG SD

SEGP SD

(S)

0to

7SEG

(D)

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

DISP nSD

UNI nSD

UNIP nSD

NDIS S1 S2D

NDISP S1 S2D

NUNI S1 S2D

WTOB nSD

MAX nSD

MIN nSD

MINP nSD

DMIN nSD

DMINP nSD

Symbol Processing details Execution

symbol

Separating and linking

Search MAX • Searches the data of n points

DIS • Separates 16-bit data

DISP

UNI • Links the lower 4 bits of n

UNIP

NDIS • Separates the data in the

NDISP

NUNI • Links the data in the devices

NUNIP

WTOB • Breaks n points of 16-bit data

WTOBP

BTOW • Links the lower 8 bits of 16-bit

BTOWP

MAXP

MIN • Searches the data of n points

MINP

DMAX • Searches the data of 2n

DMAXP

DMIN • Searches the data of 2n

DMINP

DIS nSD

NUNIP S1 S2D

WTOBP nSD

BTOW nSD

BTOWP nSD

MAXP nSD

DMAX nSD

DMAXP nSD

designated by (S) into 4-bit units, and stores at the lower 4 bits of n points from (D). (n4)

points from the device designated by (S) and stores at the device designated by (D). (n4)

devices starting from the one specified by (S1) into bits specified by the devices from (S2), and stores them to the devices starting from the one specified by (D).

starting from the one specified by (S1) with bits specified by the devices from (S2), and stores them to the devices starting from the one specified by (D).

from the device designated by (S) into 8-bit units, and stores in sequence at the device designated by (D).

data of n points from the device designated by (S) into 16-bit units, and stores in sequence at the device designated by (D).

from the device designated by (S) in 16-bit units, and stores the maximum value at the device designated by (D).

from the device designated by (S) in 16-bit units, and stores the minimum value at the device designated by (D).

points from the device designated by (S) in 32-bit units, and stores the maximum value at the device designated by (D).

points from the device specified by (S) in 32-bit units, and stores the minimum value in the device specified by (D).

condition

Number

Subset Reference of basic steps

4  Page 429

4  Page 431

4  Page 433

4  Page 437

4  Page 440

Page 442

4  Page 440

Page 442

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

DSORT S1nS2 D1 D2

WSUM nSD

WSUMP nSD

DWSUM nSD

DWSUMP nSD

MEAN SDn

CCDP nSD

symbol

Sort SORT

DSORT

Tota l v a l u e calculations

WSUM • Adds 16 bit BIN data of n

WSUMP

Symbol Processing details Execution

condition

SORT S2 D1S1

• S2: Number of comparisons to be made during a single run

• D1: Device to be turned ON at the completion of sort

• D2: For system use

• S2: Number of comparisons to be made during a single run

• D1: Device to be turned ON at the completion of sort

• D2: For system use

• Sorts data of n points from

device designated by (S1) in 16-bit units. (n  (n-1)/2 scans required)

• Sorts data of 2n points from

device designated by (S1) in 32-bit units. (n  (n-1)/2 scans required)

points from the device specified by (S), and stores it in the device specified by (D).

Number

Subset Reference of basic steps

6  Page 444

4  Page 448

DWSUM • Adds 32 bit BIN data of n

DWSUMP

Calculation of averages

Check code CCD • Performs addition of the data

MEAN • Calculates the mean of n-

MEANP

DMEAN • Calculates the mean of n-

DMEANP

MEANP SDn

DMEAN SDn

DMEANP SDn

CCD nSD

CCDP

CRC operation

CRC • Generates the CRC value of

CRC nSD

CRCP

CRCP nSD

points from the device specified by (S), and stores it in the device specified by (D).

point devices (in 16-bit units) starting from the device specified by (S), and then stores the result into the device specified by (D).

point devices (in 32-bit units) starting from the device specified by (S), and then stores the result into the device specified by (D).

stored in the devices designated by (S) to (S)+n-1 and calculates the horizontal parity, and stores the added data in the device designated by (D) and the horizontal parity in the device designated by (D)+1.

n points of 8-bit data starting from the device designated by (S) and stores it in the device designated by (D).

Page 449

4  Page 450

4  Page 452

4  Page 455

2 INSTRUCTION TABLES

2.5 Application Instructions

Structure creation instructions

FOR n

BREAK PnD

BREAKP PnD

CALL Pn S1 Sn

CALLP Pn S1 Sn

RET

FCALL

FCALLP

ECALL Pn

ECALLP

EFCALL

EFCALLP Pn

EFCALLPPn

S1toSn

:File name

XCALL

S1 Sn

Category Instruction

symbol

Number of repeats

Subroutine program calls

FOR • Executes n times between

NEXT 1 

BREAK • Forcibly ends the

BREAKP

CALL • Executes subroutine

CALLP

RET • Returns from subroutine

FCALL • Performs non-execution

FCALLP

Symbol Processing details Execution

condition

the [FOR] and [NEXT].

execution of the [FOR] to [NEXT] cycle and jumps pointer Pn.

CALL Pn

program Pn when input condition is met. (S1 to Sn are arguments sent to subroutine program. n5)

CALLP Pn

program

FCALL Pn

FCALLP Pn

processing of subroutine program Pn if input conditions have not been met. (S1 to Sn are arguments sent to subroutine program. n5)

Number

Subset Reference of basic steps

2  Page 457

3  Page 460

2+n

1  Page 467

2+n

●

 Page 468

Page 462

Subroutine program calls

ECALL • Executes subroutine

ECALL

PnS1 Sn

: File name

ECALLP

program Pn from within designated program name when input condition is met. (S1 to Sn are arguments sent to subroutine program. n5)

ECALLP PnS1 Sn

File name

EFCALL • Performs non-execution

EFCALL Pn

S1toSn

:File name

EFCALLP

XCALL • Executes subroutine

processing of subroutine program Pn if input conditions have not been met. (S1 to Sn are arguments sent to subroutine program. n5)

program Pn when input condition is met.

• Performs non-execution processing of subroutine program Pn if input conditions have not been met. (S1 to Sn are arguments sent to subroutine program. n5)

3+n

2+n

 Page 472

 Page 477

 Page 481

2.5 Application Instructions

2 INSTRUCTION TABLES

Category Instruction

CCOM

symbol

Select refresh

Fixed indexing

COM • Performs auto refresh of

CCOM • Performs auto refresh of

CCOMP 1 

IX • Perform indexing for

IXEND 1 

IXDEV • Stores indexing value used

IXSET 3 

Symbol Processing details Execution

condition

COM

CCOMP

Device indexing ladder

intelligent function modules, auto refresh of link refresh, and communications with peripherals.

• Performs auto refresh of intelligent function modules, link refresh, auto refresh of CPU shared memory, and communications with peripherals.

intelligent function modules, auto refresh of CPU shared memory, and communications with peripherals after the input conditions are met.

individual devices used in device indexing ladder.

IXEND

IXDEV

IXSET SD

for indexing performed between the [IX] and [IXEND] to the device designated by D or later.

Number

Subset Reference of basic steps

1  Page 487

1  Page 489

1  Page 492

2  Page 493

1  Page 496

Designates indexing value.

*1 n indicates number of arguments for subroutine program. *2 n indicates the total of the number of arguments used in the subroutine program and the number of program name steps.

The number of program name steps is calculated as "number of characters in the program  2" (decimal fraction is rounded up).

*3 The subset is effective only with the Universal model QCPU and LCPU.

2 INSTRUCTION TABLES

2.5 Application Instructions

Data table operation instructions

FIFW SD

(S)

Pointer

(D)

Pointer + 1

Device at pointer + 1

FIFWP SD

FIFR SD

(S)

Pointer

(D)

Pointer - 1

FIFRP SD

FPOP SD

(S)

Pointer

(D)

Pointer - 1

Device at pointer + 1

FPOPP SD

FDEL nSD

FDELP nSD

FINS nSD

(S)

Pointer

(D)

Designated by n

Pointer + 1

FINSP nSD

FROM n3n1 n2 D

FROMP n3n1 n2 D

DFRO n3n1 n2 D

DFROP n3n1 n2 D

TO n3n1 n2 S

TOP n3n1 n2 S

DTO n3n1 n2 S

DTOP n3n1 n2 S

Category Instruction

symbol

Data table processing

FIFW 3  Page 498

FIFWP

FIFR 3  Page 500

FIFRP

FPOP 3  Page 502

FPOPP

FDEL 4  Page 504

FDELP

FINS 4  Page 504

Symbol Processing details Execution

condition

(S)

Pointer

Pointer - 1

(D)

Designated by n

Number of basic steps

Subset Reference

FINSP

Buffer memory access instructions

Category Instruction

symbol

Data read FROM • Reads data in 16-bit units from an

FROMP

DFRO • Reads data in 32-bit units from an

DFROP

Data write TO • Writes data in 16-bit units to an

TOP

DTO • Writes data in 32-bit units to an

DTOP

Symbol Processing details Execution

intelligent function module.

condition

Number

Subset Reference of basic steps

5  Page 506

5 

5  Page 509

5 

2 INSTRUCTION TABLES

2.5 Application Instructions

Display instructions

When SM701 is OFF

PR S D

PRC SD

Check condition

CHK

CHKCIR

Category Instruction

symbol

Symbol Processing details Execution

condition

Number of basic

Subset Reference

steps

ASCII print PR • Outputs ASCII code from

PR • Outputs ASCII code of 8

When SM701 is ON

PR S D

PRC • Converts comments from

Reset LEDR • Resets an annunciator. 1  Page 518

LEDR

device designated by (S) to 00H to output module.

points (16 characters) from device designated by (S) to output module.

device designated by (S) to ASCII code and outputs to output module.

3  Page 512

Page 515

Debugging and failure diagnosis instructions

Category Instruction

symbol

Checks CHKST • The CHK instruction is

CHK • During normal conditions

CHKCIR • Starts update in the ladder

CHKEND • Ends update in the ladder

Symbol Processing details Execution

condition

CHKST

CHKEND

executed when CHKST is executable.

• Jumps to the step following the CHK instruction when CHKST is in a nonexecutable status.

 SM80: OFF, SD80: 0

• During abnorm al conditions  SM80: ON, SD80: Failure No.

pattern being checked by the CHK instruction.

Number

Subset Reference of basic steps

1  Page 520

1  Page 524

2 INSTRUCTION TABLES

2.5 Application Instructions

Character string processing instructions

BCDDAP SD

DABIN SD

DHABINP SD

Category Instruction

symbol

BIN  Decimal ASCII

BIN  Hexadecimal ASCII

BCD  Decimal ASCII

Decimal ASCII  BIN

Hexadecimal ASCII  BIN

BINDA • Converts 1-word BIN value

BINDAP

DBINDA • Converts 2-word BIN value

DBINDAP

BINHA • Converts 1-word BIN value

BINHAP

DBINHA • Converts 2-word BIN value

DBINHAP

BCDDA • Converts 1-word BCD value

BCDDAP

DBCDDA • Converts 2-word BCD value

DBCDDAP

DABIN • Converts a 5-digit, decimal

DABINP

DDABIN • Converts a 10-digit, decimal

DDABINP

HABIN • Converts a 4-digit, hexadecimal

HABINP

DHABIN • Converts a 8-digit, hexadecimal

DHABINP

Symbol Processing details Execution

condition

BINDA SD

BINDAP SD

DBINDA SD

DBINDAP SD

BINHA SD

BINHAP DS

DBINHA SD

DBINHAP SD

BCDDA SD

DBCDDA SD

DBCDDAP SD

DABINP SD

DDABIN SD

DDABINP SD

HABIN SD

HABINP SD

DHABIN SD

designated by (S) to a 5-digit, decimal ASCII value, and stores it at the word device designated by (D).

designated by (S) to a 10-digit, decimal ASCII value, and stores it at word devices following the word device number designated by (D).

designated by (S) to a 4-digit, hexadecimal ASCII value, and stores it at a word device following the word device number designated by (D).

designated by (S) to a 8-digit, hexadecimal ASCII value, and stores it at a word device following the word device number designated by (D).

designated by (S) to a 4-digit, decimal ASCII value, and stores it at a word device following the word device number designated by (D).

designated by (S) to a 8-digit, decimal ASCII value, and stores it at a word device following the word device number designated by (D).

ASCII value designated by (S) to a 1-word BIN value, and stores it at a word device number designated by (D).

ASCII value designated by (S) to a 2-word BIN value, and stores it at a word device number designated by (D).

ASCII value designated by (S) to a 1-word BIN value, and stores it at a word device number designated by (D).

ASCII value designated by (S) to a 2-word BIN value, and stores it at a word device number designated by (D).

Number

Subset Reference of basic steps

3  Page 528

3 

3  Page 531

3 

3  Page 534

3 

3  Page 537

3 

3  Page 540

3 

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

COMRD SD

STR S1 S2 D

STRP S1 S2 D

DSTR S1 S2 D

DSTRP S1 S2 D

VAL D1 D2S

VALP D1 D2S

DVAL D1 D2S

DVALP D1 D2S

ESTR S1 S2 D

ESTRP S1 S2 D

symbol

Decimal ASCII  BCD

Device comment read operation

DABCD • Converts a 4-digit, decimal

DABCDP

DDABCD • Converts a 8-digit, decimal

DDABCDP

COMRD • Stores comment from device

COMRDP

Symbol Processing details Execution

condition

DABCD SD

DABCDP SD

DDABCD SD

DDABCDP SD

ASCII value designated by (S) to a 1-word BCD value, and stores it at a word device number designated by (D).

ASCII value designated by (S) to a 2-word BCD value, and stores it at a word device number designated by (D).

designated by (S) at a device designated by (D).

COMRDP SD

Number

Subset Reference of basic steps

3  Page 543

3 

3  Page 546

Character string length detection

BIN  Decimal character string

Decimal character string  BIN

Floating decimal point  Character string

Character st

ing 

Floating decimal point

LEN • Stores data length (number of

LENP

STR • Converts a 1-word BIN value

STRP

DSTR • Converts a 2-word BIN value

DSTRP

VAL • Converts a character string

VAL P

DVAL • Converts a character string

DVALP

ESTR • Converts the 32-bit floating

ESTRP

EVAL • Converts the character string

EVALP

LEN SD

LENP SD

EVAL SD

EVALP SD

characters) in character string designated by (S) at a device designated by (D).

designated by (S2) to a decimal character string with the total number of digits and the number of decimal fraction digits designated by (S1) and stores them at a device designated by (D).

including decimal point designated by (S) to a 1-word BIN value and the number of decimal fraction digits, and stores them into devices designated by (D1) and (D2).

including decimal point designated by (S) to a 2-word BIN value and the number of decimal fraction digits, and stores them into devices designated by (D1) and (D2).

decimal point data designated by (S) to a character string, and stores it in devices designated by (D).

designated by (S) to a 32-bit floating decimal point data, and stores it in devices designated by (D).

3  Page 549

4  Page 551

4 

4  Page 556

4 

4  Page 561

3  Page 568

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

ASC nSD

ASCP nSD

HEX nSD

HEXP nSD

RIGHT nSD

RIGHTP nSD

LEFT nSD

LEFTP nSD

MIDR S1 S2D

MIDRP S1 S2D

MIDW S1 S2D

MIDWP S1 S2D

INSTR nS1 S2 D

INSTRP nS1 S2 D

STRINS SDn

EMOD S1 S2 D

EMODP S1 S2 D

EREXP S1 S2 D

EREXPP S1 S2 D

symbol

Hexadecimal BIN  ASCII

ASCII  Hexadecimal BIN

Character string

ASC • Converts the 1-word BIN value

ASCP

HEX • Converts n hexadecimal ASCII

HEXP

RIGHT • Stores n characters from the end

RIGHTP

Symbol Processing details Execution

condition

at the device numbers designated by (S) to hexadecimal ASCII, and stores n characters of them at the device numbers designated by (D) and after.

characters of the device numbers designated by (S) and after to BIN values, and stores them at the device numbers designated by (D).

of a character string designated by (S) at the device designated by (D).

Number

Subset Reference of basic steps

4  Page 572

4  Page 574

4  Page 576

Floating decimal point  BCD

BCD  Floating decimal point

LEFT • Stores n characters from the

LEFTP

MIDR • Stores the designated number of

MIDRP

MIDW • Stores the character string of

MIDWP

INSTR • Searches character string (S1)

INSTRP

STRINS • Inserts the character string data

STRINSP

STRDEL • Deletes the (n2) characters data

STRDELP

EMOD • Converts 32-bit floating decimal

EMODP

EREXP • Converts BCD data (S1) to 32-

EREXPP

STRINSP SDn

STRDEL Dn1n2

STRDELP Dn1n2

beginning of a character string designated by (S) at the device designated by (D).

characters in the character string designated by (S1) from the position designated by (S2) at the device designated by (D).

(S1) in the specified number to the character string of (D) at the position specified by (S2).

from the nth character of character string (S2), and stores matched positions at (D).

specified by (S) to the (n)th character (insert position) from the initial character string data specified by (D).

specified by (D) starting from the device (insert position) specified by n1.

point data (S1) to BCD data with number of decimal fraction digits designated by (S2), and stores at device designated by (D).

bit floating decimal point data with the number of decimal fraction digits designated by (S2), and stores at device designated by (D).

4  Page 579

5  Page 584

4  Page 586

4  Page 588

4  Page 590

4  Page 592

2.5 Application Instructions

2 INSTRUCTION TABLES

Special function instructions

SIN SD

SINP SD

COS SD

COSP SD

TAN SD

TANP SD

ASIN SD

ASINP SD

ACOS SD

ACOSP SD

ATAN SD

ATANP SD

SINDSD

SINDP S D

COSD S D

COSDP S D

TANDSD

TANDP S D

ASINDSD

ASINDP S D

ACOSD S D

ACOSDP S D

ATANDSD

ATANDP S D

Category Instruction

symbol

Trigonometric functions (Floating-point singleprecision)

SIN • Sin(S+1, S)(D+1, D) 3  Page 594

SINP

COS • Cos(S+1, S)(D+1, D) 3  Page 598

COSP

TAN • Tan(S+1, S)(D+1, D) 3  Page 602

TAN P

ASIN • Sin

ASINP

ACOS • Cos

ACOSP

ATA N • Tan

Symbol Processing details Execution

condition

-1

(S+1, S)(D+1, D) 3  Page 606

-1

(S+1, S)(D+1, D) 3  Page 610

-1

(S+1, S)(D+1, D) 3  Page 614

Number of basic steps

Subset Reference

Trigonometric functions (Floating-point doubleprecision)

ATA NP

SIND • Sin(S+3, S+2, S+1, S)(D+3, D+2,

SINDP

COSD • Cos(S+3, S+2, S+1, S)(D+3, D+2,

COSDP

TAND • Tan(S+3, S+2, S+1, S)(D+3, D+2,

TANDP

ASIND • Sin

ASINDP

ACOSD • Cos

ACOSDP

ATA ND • Tan

ATANDP

D+1, D)

-1

(S+3, S+2, S+1, S)(D+3, D+2,

D+1, D)

-1

(S+3, S+2, S+1, S)(D+3,

D+2, D+1, D)

-1

(S+3, S+2, S+1, S)(D+3,

D+2, D+1, D)

3  Page 596

3  Page 600

3  Page 604

3  Page 608

3  Page 612

3  Page 616

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

RAD SD

RADP SD

RADD S D

RADDP S D

DEG SD

DEGP SD

DEGD S D

DEGDP S D POWPS1S2D

SQRP SD

EXPD S D

LOGDP S D

LOG10 SD

LOG10PSD

LOG10DP S D

symbol

Angles  Radians conversion

RAD • (S+1, S)(D+1, D)

RADP

Symbol Processing details Execution

condition

Conversion from angles to radians

Number

Subset Reference of basic steps

3  Page 618

RADD • (S+3, S+2, S+1, S)(D+3, D+2,

D+1, D)

RADDP

DEG • (S+1, S)(D+1, D)

DEGP

DEGD • (S+3, S+2, S+1, S)(D+3, D+2,

DEGDP

Expone ntiation

Square root SQR • (S+1, S)

POW • (S1+1, S1)

POWP

POWD • (S1+3, S1+2, S1+1, S1)

POWDP

POW S1 S2 D

POWDS1S2D

POWDP S1 S2 D

SQR SD

SQRP

Conversion from angle to radian

Conversion from radians to angles

D+1, D)

Conversion from radian to angle

S2+1, S2)

3  Page 620

3  Page 622

3  Page 624

(S2+1, S2)

(D+1, D) 4  Page 626

(S2+3, S2+2,

(D+3, D+2, D+1, D)

(D+1, D) 3  Page 630

4  Page 628

Exponent operations

Natural logarithms

Common logarithm

SQRD • (S+3, S+2, S+1, S)

SQRDP

EXP • e

EXPP

SQRD S D

SQRDP S D

EXP SD

D+1, D)

(S+1, S)

(D+1, D) 3  Page 634

EXPP SD

EXPD • e

EXPDP

(S+3, S+2, S+1, S)

(D+3, D+2, D+1,

EXPDP S D

LOG • log

LOGP

LOGD • log

LOGDP

LOG10 • log

LOG10P

LOG SD

LOGP SD

LOGD S D

(S+1, S)(D+1, D) 3  Page 638

(S+3, S+2, S+1, S)(D+3, D+2,

D+1, D)

(S+1, S)(D+1, D) 3  Page 642

(D+3, D+2,

3  Page 632

3  Page 636

3  Page 640

2.5 Application Instructions

2 INSTRUCTION TABLES

LOG10D • log

LOG10DP

LOG10DSD

D+1, D)

(S+3, S+2, S+1, S)(D+3, D+2,

3  Page 644

Category Instruction

RNDP D

SRNDP D

BSQRP SD

(D)+0

(S+1, S)

Integer part Decimal fraction part

Sin(S)

(D)+0

Integer part Decimal fraction part

Sign

Cos(S)

(D)+0

Sign

Decimal fraction part

Integer part

BCOSP SD

BTAN SD

Tan(S)

(D)+0

Sign

Decimal fraction part

Integer part

Cos-1(S)

(D) +0

Sign

Decimal fraction part

Integer part

BATAN SD

Tan-1(S)

(D)+0

Sign

Decimal fraction part

Integer part

symbol

Random number generation

Random number series update

RND • Generates a random number (from 0

RNDP

SRND • Updates random number series

SRNDP

Symbol Processing details Execution

condition

RND D

SRND D

to less than 32767) and stores it at the device designated by (D).

according to the 16-bit BIN data stored in the device designated by (S).

Number

Subset Reference of basic steps

2  Page 646

Square root BSQR 3  Page 647

BSQRP

BDSQR 3 

BDSQRP

Trigonometric functions

BSIN 3  Page 650

BSINP

BCOS 3  Page 652

BCOSP

BTAN 3  Page 654

BTANP

BASIN 3  Page 656

BASINP

BSQR SD

BDSQR SD

BDSQRP SD

BSIN SD

BSINP SD

BCOS SD

BTANP SD

BASIN SD

BASINP SD

(S)

Sin -1(S)

(D)+0

Integer part

Decimal fraction part

(D)+0

Sign

Integer part

Decimal fraction part

BACOS 3  Page 658

BACOSP

BATAN 3  Page 660

BATANP

BACOS SD

BACOSP SD

BATANP SD

2 INSTRUCTION TABLES

2.5 Application Instructions

Data control instructions

LIMIT S3S1 S2

LIMITP S3S1 S2

DLIMIT S3S1 S2 D

DLIMITP S3S1 S2 D

BAND S3S1 S2 D

BANDP S3S1 S2 D

DBAND S3S1 S2 D

DZONE S3S1 S2 D

DZONEP S3S1 S2 D

Category Instruction

symbol

Upper and lower limit controls

Dead band controls

Zone controls

LIMIT • When (S3) < (S1), a value of (S1)

LIMITP

DLIMIT • When (S3+1, S3) < (S1+1, S1),

DLIMITP

BAND • 0  (D) when (S1)  (S3)  (S2).

BANDP

DBAND • 0  ((D)+1, (D)) when (S1+1, S1)

DBANDP

ZONE • 0  (D) when (S3) = 0.

ZONEP

Symbol Processing details Execution

condition

is stored at (D).

• When (S1)  (S3)  (S2), a value

of (S3) is stored at (D).

• When (S2) < (S3), a value of (S2) is stored at (D).

values of (S1+1, S1) are stored at ((D)+1, (D)).

• When (S1+1, S1)  (S3+1, S3)  (S2+1, S2), values of (S3+1, S3) are stored at ((D)+1, (D)).

• When (S2, S2+1)  (S3, S3+1), values of (S2+1, S2) are stored at ((D)+1, (D)).

• (S3)-(S1)  (D) when (S3) < (S1).

• (S3)-(S2)  (D) when (S2) < (S3).

 (S3+1, S3)  (S2+1, S2).

• (S3+1, S3)-(S1+1, S1)  ((D)+1,

DBANDP S3S1 S2 D

ZONE S3S1 S2 D

(D)) when (S3+1, S3) < (S1+1, S1).

• (S3+1, S3)-(S2+1, S2)  ((D)+1, (D)) when (S2+1, S2) < (S3+1, S3).

•(S3)+(S2)  (D) when (S3) > 0.

• (S3)-(S1)  (D) when (S3) < 0.

ZONEP S3S1 S2 D

Number

Subset Reference of basic steps

5  Page 662

5 

5  Page 665

5 

5  Page 668

Point-bypoint coordinate data

DZONE • 0  ((D)+1, (D)) when (S3+1, S3)

DZONEP

L • Executes scaling for the scaling

SCLP

DSCL • Executes scaling for the scaling

DSCLP

SCL S1 S2 D

SCLP S1 S2 D

DSCL S1 S2 D

DSCLP S1 S2 D

= 0.

• (S3+1, S3)+(S2+1, S2)  ((D)+1,

(D)) when (S3+1, S3) > 0.

• (S3+1, S3)+(S1+1, S1)  ((D)+1,

(D)) when (S3+1, S3) < 0.

conversion data (16-bit data units) specified by (S2) with the input value specified by (S1), and then stores the result into the device specified by (D). The scaling conversion is executed based on the scaling conversion data stored in the device specified by (S2) and up.

conversion data (32-bit data units) specified by (S2) with the input value specified by (S1), and then stores the result into the device specified by (D). The scaling conversion is executed based on the scaling conversion data stored in the device specified by (S2) and up.

5 

4  Page 670

4 

2.5 Application Instructions

2 INSTRUCTION TABLES

Category Instruction

RSET S

RSETP S

QDRSET

File name

QDRSETP

File name

QCDSET

File name

QCDSETP

File name

Symbol Processing details Execution

symbol

X or Y coordinate data

SCL2 • Executes scaling for the scaling

SCL2P

DSCL2 • Executes scaling for the scaling

DSCL2P

SCL2 S1 S2 D

SCL2P S1 S2 D

DSCL2 S1 S2 D

DSCL2P S1 S2 D

Switching instructions

condition

Number

Subset Reference of basic steps

4  Page 674

4 

Category Instruction

Symbol Processing details Execution

symbol

Block number switching

File set QDRSET • Sets file names used as file

RSET • Converts extension file register

block number to number

RSETP

QDRSETP

QCDSET • Sets file names used as comment

QCDSETP

designated by (S).

registers.

files.

*1 n indicates ([number of file name characters]  2) steps. (Decimal fraction is rounded up.)

condition

Number

Subset Reference of basic steps

2  Page 677

2+n

 Page 679

 Page 681

2 INSTRUCTION TABLES

2.5 Application Instructions

Clock instructions

(D)+0

Year

Month

Day

Hour

Sec.

Day of the week

+1 +2 +3 +4 +5 +6

(Clock elements)

Minute

DATEWRP S

DATE+ S1 S2 D

DATE+P S1 S2 D

DATE- S1 S2 D

DATE-P S1 S2 D

SECOND SD

(D)

Sec. (Lower 16 bits) Sec. (Upper 16 bits)

(S)

Hour

Minute

Sec.

SECONDP SD

HOUR SD

HOURP SD

Category Instruction

symbol

Read/write clock data

Clock data addition/ subtraction

Clock data translation

DATERD 2  Page 683

DATERDP

DATEWR 2  Page 685

DATEWRP

DATE+ 4  Page 687

DATE+P

DATE- 4  Page 689

DATE-P

SECOND 3  Page 691

SECONDP

Symbol Processing details Execution

condition

DATERD D

DATERDP D

(Clock elements) (D)+0

Year

Month

Day

Hour

Minute

Sec.

Day of the week

DATEWR S

(S2)

(S1)

Hour

Minute Minute Minute

Sec.

(S1)

(S2)

Hour

Minute Minute Minute

Sec.

Hour

Sec.

Hour

Sec.

(D)

Hour

Sec.

(D)

Hour

Sec.

Number of basic steps

Subset Reference

HOUR 3  Page 693

HOURP

Hour meter HOURM • While the execution

HOURM D2SD1

DHOURM • While the execution

DHOURM D2SD1

(S)

Sec. (Lower 16 bits) Sec. (Upper 16 bits)

specification is on, the current value is stored in increments of hour in the device designated by (D1) and the current value less than an hour is stored in increments of second in the device designated by (D1)+1.

• The device designated by (D2) turns on when the cumulative ON time of the execution command exceeds the time designated by (S).

specification is on, the current value is stored in increments of hour in the devices designated by (D1), (D1)+1 and the current value less than an hour is stored in increments of second in the device designated by (D1)+2.

• The device designated by (D2) turns on when the cumulative ON time of the execution command exceeds the time designated by (S).

(D)

Hour

Minute

Sec.

4  Page 695

4  Page 696

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

S1 S2DT n

S1 S2

DT n

DT S1 S2

Year Year

Day

Month

Day

Month

Comparison operation result

DT S1 S2

S1 S2

nDT

S1 S2DT n

S1 S2

nDT

Year Year

Day

Month

Day

Month

Comparison operation result

DT S1 S2 n

S1 S2

nDT

DT S1 S2 n

S1 S2

DT S1 S2 n

Year Year

Day

Month

Day

Month

Comparison operation result

S1 S2DT n

S1 S2

DT n

symbol

Date comparison

LDDT= 4  Page 697

ANDDT=

ORDT=

LDDT<> 4 

ANDDT<>

ORDT<>

Symbol Processing details Execution

condition

Year Year

DT S1 S2 n

Month

Day

Comparison operation

Month

result

Day

Number of basic steps

Subset Reference

LDDT< 4 

S1 S2 nDT

ANDDT<

Year Year

Month

Day

Comparison operation

Month

result

Day

ORDT<

LDDT<= 4 

DT S1 S2 n

ANDDT<=

ORDT<=

LDDT> 4 

DT S1 S2 n

ANDDT>

Year Year

Month

Day

Comparison operation

Month

result

Day

ORDT>

LDDT>= 4 

ANDDT>=

ORDT>=

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

Hour

Second

Minute

Hour

Second

Minute

Comparison operation result

S1 S2TM n

S1 S2

TM n

TM S1 S2

S1 S2

nTM

Comparison operation result

Hour Hour

Second

Minute

Second

Minute

S1 S2TM n

S1 S2

nTM

TM S1 S2 n

S1 S2

nTM

Comparison operation result

Hour Hour

Second

Minute

Second

Minute

TM S1 S2 n

S1 S2

TM S1 S2 n

Comparison operation result

Hour Hour

Second

Minute

Second

Minute

S1 S2TM n

S1 S2

TM n

DS3S2TCMP S1 S4

DS3S2TCMPP S1 S4

symbol

Clock comparison

LDTM= 4  Page 701

ANDTM=

ORTM=

Symbol Processing details Execution

condition

TM S1 S2 n

Number of basic steps

Subset Reference

LDTM<> 4 

ANDTM<>

Hour Hour

Minute

Second

Minute

Second

Comparison operation result

ORTM<>

LDTM< 4 

S1 S2 nTM

ANDTM<

ORTM<

LDTM<= 4 

TM S1 S2 n

ANDTM<=

Hour Hour

Minute

Second

Minute

Second

Comparison operation result

ORTM<=

LDTM> 4 

TM S1 S2 n

ANDTM>

Clock data comparison

ORTM>

LDTM>= 4 

ANDTM>=

ORTM>=

TCMP 6  Page 705

TCMPP

Hour

min.

Sec.

S3 S4

Hour

min.

Sec.

Hour

min.

Sec.

Hour

min.

Sec.

Hour

min.

Sec.

Hour

min.

Sec.

turns on.

+2 turns on.

+1 +1 turns on.

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

turns on.

+2 turns on.

Hour

Sec.

min.

Hour

Sec.

min.

Hour

Sec.

min.

Hour

Sec.

min.

Hour

Sec.

min.

Hour

Sec.

min.

Hour

Sec.

min.

turns on.

TZCPP DS1 S2 S3

(Clock elements)

(D)+0

Year

Month

Day

Hour

Sec.

Day of the week

+1 +2 +3

+5 +6

1/1000 sec.

Minute

S.DATE+ S1 S2 D

SP.DATE+ S1 S2 D

S.DATE S1 S2 D

SP.DATE S1 S2 D

Symbol Processing details Execution

symbol

Clock data band comparison

TZCP 5  Page 707

TZCP DS1 S2 S3

TZCPP

Expansion clock instructions

condition

Number of basic steps

Subset Reference

Category Instruction

symbol

Reading data of the expansion clock

Adding or subtracting data values of the expansion clock

S.DATERD 6  Page 709

SP.DATERD

S.DATE+ 8  Page 712

SP.DATE+

S.DATE- 8 

SP.DATE-

Symbol Processing details Execution

condition

S.DATERD D

SP.DATERD D

(S1)

Hour

Minute Minute Minute

Sec.

1/1000 sec.

(S1)

Hour

Minute

Sec.

1/1000 sec.

(S2) (D)

Hour

Sec.

1/1000 sec.

(S2) (D)

Hour

Minute Minute

Sec.

1/1000 sec.

Hour

Sec.

1/1000 sec.

Hour

Sec.

1/1000 sec.

Number of basic steps

Subset Reference

2 INSTRUCTION TABLES

2.5 Application Instructions

Program control instructions

PSTOP

File name

PSTOPP

File name

POFF

File name

POFFP

File name

PSCAN

File name

PSCANP

File name

PLOW

File name

PLOWP

File name

PCHK

File name

PCHK

File name

PID DS1 S2 S3

Category Instruction

symbol

Program control instructions

PSTOP • Places designated program in

PSTOPP

POFF • Turns OUT instruction coil of

POFFP

PSCAN • Registers designated program

PSCANP

PLOW • Registers designated program

PLOWP

LDPCHK • In conduction when program of

ANDPCHK

ORPCHK

Symbol Processing details Execution

condition

standby status.

designated program OFF, and places program in standby status.

as scan execution type.

as low-speed execution type.

PCHK

File name

specified file name is being executed.

• In non-conduction when program of specified file name is not executed.

Number of basic steps

2+n

Subset Reference

 Page 719

 Page 720

 Page 722

 Page 724

 Page 725

*1 n indicates ([number of file name characters]  2) steps. (Decimal fraction is rounded up.)

PID instruction

Category Instruction

symbol

PID operation

PID • Performs PID operation based

Symbol Processing details Execution

on the value set in the devices designated by (S1), (S2), and (S3) and stores the operation result every sampling time in the device designated by (D).

condition

Number

Subset Reference of basic steps

5  Page 729

2.5 Application Instructions

2 INSTRUCTION TABLES

Other instructions

DUTY n1 n2 D

TIMCHK S1 S2 D

Lower 8 bits

(D)

Upper 8 bits Lower 8 bits Upper 8 bits

8 bits

0 1 2 3

ZR0

ZR1

ZRRDBP nD

ZRWRB n S

Lower 8 bits

(S)

Upper 8 bits Lower 8 bits Upper 8 bits

8 bits

1 2 3

ZR0

ZR1

ADRSET DS

(S) (D)

Indirect address of designated device

Device name

KEY D1 D2nS

ZPUSHP D

ZPOP D

ZPOPP D

UNIRD n1 n2D

TRACE

TRACER

Category Instruction

Symbol Processing details Execution

symbol

WDT reset WDT • Resets watchdog timer during

WDTP

Timing clock

Time check TIMCHK • Turns ON device specified by (D)

Direct read/ write operations in 1-byte units

DUTY 4  Page 754

ZRRDB 3  Page 757

ZRRDBP

ZRWRB 3  Page 759

ZRWRBP

WDT

WDTP

ZRRDB nD

ZRWRBP n S

sequence program.

(D)

n1 scans

SM420 to SM424, SM430 to SM434

if measured ON time of input condition is longer than preset time continuously.

n2 scans

condition

Number

Subset Reference of basic steps

1  Page 752

4  Page 756

ADRSET 3  Page 761

ADRSETP

Numerical key input from keyboard

Batch save of index register

Batch recovery of index register

Reading module information

Module model name read

Trace set TRACE • Stores the trace data set with

Trace reset TRACER • Resets the data set the TRACE

KEY • Takes in ASCII data for 8 points of

ZPUSH • Saves the contents of index

ZPUSHP

ZPOP • Reads the data stored in the

ZPOPP

UNIRD • Reads the module information

UNIRDP

TYPERD • Reads the module model name of

TYPERDP

ADRSETP SD

ZPUSH D

UNIRDP n1 n2D

TYPERD Dn

TYPERDP Dn

input unit designated by (S), converts to hexadecimal value following device number designated by (D1), and stores.

registers to a location starting from the device designated by (D).

location starting from the device designated by (D) to index registers.

stored in the area starting from the I/O No. designated by (n1) by the points designated by (n2), and stores it in the area starting from the device designated by (D).

the head I/O No. designated by (n) and stores it in the area starting from the device designated by (D).

peripheral device by the number of times set when SM800, SM801 and SM802 turn on, to the sampling trace file.

instruction.

5  Page 762

2  Page 766

4  Page 769

3  Page 773

1  Page 777

1 

2 INSTRUCTION TABLES

2.5 Application Instructions

Category Instruction

SP.FWRITE S1 S2S0 D0 D1U0

SP.FREAD S1 S2S0 D0 D1U0

SSP.DEVST n1 Dn2

SP.DEVLDn1 n2D

PUNLOADP SD

PSWAPP S1 S2 D

RBMOV SnD

RBMOVP

SnD

UMSG S

symbol

Writing data to the designated file

Reading data from designated file

Writing data to standard ROM

Reading data from standard ROM

Loading program from memory

Unloading program from program memory

Loading + Unload

High-speed block transfer of file register

SP.FWRITE • Writes data to the designated file. 11  Page 779

SP.FREAD • Reads data from the designated

SP.DEVST • Writes data to the device data

S.DEVLD • Reads data from the device data

SP.DEVLD

PLOADP • Transfers the program stored in a

PUNLOADP • Deletes the standby program

PSWAPP • Deletes standby program stored in

RBMOV • Transfers n points of 16-bit data

RBMOVP

Symbol Processing details Execution

condition

file.

storage file in the standard ROM.

S.DEVLDn1 n2D

PLOADP SD

storage file in the standard ROM.

memory card or standard memory (other than drive 0) to drive 0 and places the program in standby status.

stored in standard memory (drive

0).

standard memory (drive 0) designated by (S1). Then, transfers the program stored in a memory card or standard memory (other than drive 0) designated by (S2) to drive 0 and places it in standby status.

from the device designated by (S) to the devices of n points starting from the one designated by (D).

Number

Subset Reference of basic steps

11  Page 789

9  Page 801

8  Page 803

3  Page 805

3  Page 808

4  Page 810

4  Page 812

User message

UMSG • Displays the specified character

strings on the display unit as a user message.

2  Page 817

2 INSTRUCTION TABLES

2.5 Application Instructions

2.6 Instructions for Data Link

S.ZCOM Jn

SP.ZCOM Jn

S.ZCOM Un

SP.ZCOM Un

D1n2S2S1SP.REFDVWRB n1

D2n2D1S1SP.REFDVRDW n1

Instructions for network refresh

Category Instruction

symbol

Symbol Processing details Execution

condition

Number of basic steps

Link instruction: Network refresh

S.ZCOM • Refreshes the designated

network.

SP.ZCOM

S.ZCOM

SP.ZCOM

5  Page 820

Instructions for reading/writing routing information

Category Instruction

symbol

Reading routing information

Registering routing information

S.RTREAD • Reads data set at routing

SP.RTREAD

S.RTWRITE • Writes routing information to

SP.RTWRIT E

Symbol Processing details Execution

condition

DnS.RTREAD

parameters.

DnSP.RTREAD

SnS.RTWRITE

the area designated by routing parameters.

SnSP.RTWRITE

Number of basic steps

7  Page 825

8  Page 827

Subset Reference

Refresh device write/read instruction

Category Instruction

symbol

Refresh device write instruction

Refresh device read instruction

S.REFDVW RB

SP.REFDVW RB

S.REFDVW RW

SP.REFDVW RW

S.REFDVRD B

SP.REFDVR DB

S.REFDVRD W

SP.REFDVR DW

Symbol Processing details Execution

• Writes data in 1-bit units to

D1n2S2S1S.REFDVWRB n1

the specified refresh device.

• Writes data in 16-bit units to

D1n2S2S1S.REFDVWRW n1

the specified refresh device.

D1n2S2S1SP.REFDVWRW n1

• Reads data in 1-bit units

D2n2D1S1S.REFDVRDB n1

from the specified refresh

n2D1S1SP.REFDVRDB n1 D2

device.

• Reads data in 16-bit units

D2n2D1S1S.REFDVRDW n1

from the specified refresh device.

condition

Number

Subset Reference of basic steps

11  Page 829

11  Page 833

11  Page 838

11  Page 842

2 INSTRUCTION TABLES

2.6 Instructions for Data Link

2.7 Multiple CPU Dedicated Instruction

Dn4n3n2S.TO n1

n4n3n2SP.TO

n3n2

TOP

n3n2

DTO

n3n2

DTOP

n3Dn2n1FROM

n3Dn2n1FROMP

n3Dn2n1DFRO

n3Dn2n1DFROP

Instructions for writing to the CPU shared memory of host CPU

Category Instruction

symbol

Write to host CPU shared memory

S.TO • Writes device data of the host

SP.TO

TO • Writes device data of the host

TOP

DTO • Writes device data of the host

DTOP

Symbol Processing details Execution

condition

station to the host CPU shared memory.

station to the host CPU shared memory in 32-bit units.

Number of basic steps

5  Page 848

5  Page 851

5 

Subset Reference

Instructions for reading from the CPU shared memory of another CPU

Category Instruction

symbol

Read from other CPU shared memory

FROM • Reads device data from the

FROMP

Symbol Processing details Execution

condition

other CPU shared memories, and stores the data in the host station.

Number of basic steps

5  Page 856

Subset Reference

DFRO • Reads device data from the

DFROP

other CPU shared memories in 32-bit units, and stores the data in the host station.

5 

2 INSTRUCTION TABLES

2.7 Multiple CPU Dedicated Instruction

2.8 Multiple CPU High-speed Transmission Dedicated

D2D1S2S1D.DDWR n

Instruction

Instructions for multiple CPU high-speed transmission

Category Instruction

symbol

Writing devices to another CPU

Reading devices from another CPU

D.DDWR • In multiple CPU system, data

DP.DDWR 10 

D.DDRD • In multiple CPU system, data

DP.DDRD 10 

Symbol Processing details Execution

condition

stored in a device specified by host CPU ((S2)) or later is

DP.DDWR

DP.DDRD

D2D1S2S1

D2D1S2S1D.DDRD n

D2D1S2S1

stored by the number of write points specified by ((S1)+1) into a device specified by another CPU (n) ((D1)) or later

stored in a device specified by another CPU (n) ((D1)) or later is stored by the number of read points specified by ((S1)+1) into a device specified by host CPU ((S2)) or late

Number of basic steps

10  Page 872

10  Page 876

Subset Reference

2.9 Redundant System Instructions (For Redundant

CPU)

Instructions for redundant system (for Redundant CPU)

Category Instruction

symbol

System switching

SP.CONTS W

Symbol Processing details Execution

condition

SP.CONTSW SD

• Switches between the control system and standby system at the END processing of the scan executed with the SP.CONTSW instruction.

Number of basic steps

8  Page 880

Subset Reference

2 INSTRUCTION TABLES

2.8 Multiple CPU High-speed Transmission Dedicated Instruction

3 CONFIGURATION OF INSTRUCTIONS

Ex.

DS2S1

Stores only the operation results.

Stores the data needed for operation before the actual operation.

DSBMOV

Designates the number of transfers used by a BMOV instruction

3.1 Configuration of Instructions

Most CPU module instructions consist of an instruction part and a device part. Each part is used for the following purpose:

• Instruction part: indicates the function of the instruction.

• Device part: indicates the data that is to be used with the instruction. The device part consists of source data, destination data, and number of devices.

Source (S)

Source is the data used for operations. The following source types are available, depending on the designated device:

Typ e Description

Constant Designates a numeric value to be used in the operation. This is set when the program is created, and cannot

Bit devices and word devices Designates the device that stores the data to be used in the operation. Data must be stored in the designated

Destination (D)

The destination stores the data after the operation has been conducted. However, some instructions require storing the data to be used in an operation at the destination prior to the operation execution.

be changed during the execution of the program. Constants should be indexed when used as variable data.

device until the operation is executed. By changing the data stored in a designated device during program execution, the data to be used in the instruction can be changed.

An addition instruction involving BIN 16-bit data

A device for the data storage must always be set to the destination.

Number of devices and number of transfers (n)

The number of devices and number of transfers designate the numbers of devices and transfers used by instructions involving multiple devices.

Block transfer instruction

The number of devices or number of transfers can be set between 0 and 32767. However, if the number is 0, the instruction will be a no-operation instruction.

3 CONFIGURATION OF INSTRUCTIONS

3.1 Configuration of Instructions

3.2 Designating Data

(1)

(6)

(2)

(3)

(4)

(5)

Word data

Data that can be handled by CPU module

Bit data

Numeric data

Character string data

Integer data

Real number (floating point) data

Single-precision floating point data

Double-precision floating point data

Double-word data

The following six types of data can be used with CPU module instructions.

(1) Page 82 Using bit data (2) Page 83 Using word (16 bits) data (3) Page 85 Using double word (32 bits) data (4) Page 87 Single-precision real number data (single-precision floating-point data) (5) Page 88 Double-precision real number data (double-precision floating-point data) (6) Page 91 Using character string data

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Using bit data

SET Y10

Designation of 1 point of bit device Y10

Designation of 1 point of bit device M0

b15 b0

1/01/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0 1/0

Word device

Each bit of a word device can be used (1=ON, 0=OFF)

D0.5

SET Y10

Bit designated for word device (Turns ON Y10 if bit 5 (b5) of D0 is ON (1).)

SET D0.5

Bit designated for word device (Bit 5 (b5) of D0 is turned ON if X0 is ON.)

Bit data is data used in one-bit units, such as for contacts or coils. "Bit devices" and "Bit designated word devices" can be used as bit data.

When using bit devices

Bit devices are designated in one-point units.

Using word devices

Word devices enable the use of a designated bit number 1/0 as bit data by the designation of that bit number.

Word device bit designation is done by designating "[Word device].[Bit No.]". (Designation of bit numbers is done in hexadecimal.) For example, bit 5 (b5) of D0 is designated as D0.5, and bit 10 (b10) of D0 is designated as D0.A. However, there can be no bit designation for timers (T), retentive timers (ST), counters (C) or index register (Z). (Example Z0.0 is not available).

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Using word (16 bits) data

K1 designation range

(4 points)

K2 designation range

(8 points)

K3 designation range

(12 points)

K4 designation range

(16 points)

XC XB X8 X7

X3 X0

to to to

X010

MOV K1X0D0

Source (S) data

Word data is 16-bit numeric data used by basic instructions and application instructions. The following two types of word data can be used with CPU module:

• Decimal constants: K-32768 to K32767

• Hexadecimal constants: H0000 to HFFFF Word devices and bit devices designated by digit can be used as word data. For direct access input (DX) and direct access output (DY), word data cannot be designated by digit. (For details of direct access input and direct access output, refer to the User's Manual (Function Explanation, Program Fundamentals) for the CPU module used.)

When Using Bit Devices

Bit devices can deal with word data when digits are designated. Digit designation of bit devices is done by designating "[Number of digits][Head number of bit device]". Digit designation of bit devices can be done in 4-point (4-bit) units, and designation can be made for K1 to K4. (For link direct devices, designation is done by "J[Network No.]\[Number of digits][Head number of bit device]". When X100 to X10F are designated for Network No.2, it is done by J2\K4X100). For example, if X0 is designated for digit designation, the following points would be designated:

•K1X0  The 4 points X0 to X3 are designated.

•K2X0  The 8 points X0 to X7 are designated.

•K3X0  The 12 points X0 to XB are designated.

•K4X0  The 16 points X0 to XF are designated.

In cases where digit designation has been made at the source (S), the numeric values shown in the following table are those which can be dealt with as source data.

Number of digits designated With 16-bit instructions

K1 (4 points) 0 to 15

K2 (8 points) 0 to 255

K3 (12 points) 0 to 4095

K4 (16 points) -32768 to 32767

When destination (D) data is a word device, the word device for the destination becomes 0 following the bit designated by digit designation at the source.

Ladder example Processing

• With 16-bit instructions

Filled with 0s

b15 b4

0 0

0000000000

3 CONFIGURATION OF INSTRUCTIONS

K1X0

X3 X2 X1 X0

X2 X1 X0

3.2 Designating Data

b1b2b3

In cases where digit designation is made at the destination (D), the number of points designated are used as the destination.

X010

MOV H1234 K2M0

Destination (D)

M15 M8

0 0 1 1 0 1 00

Not changed

K2M0

0 0

1 101

H1234

1 2

X10

MOV D0 K2M100

Destination (D)

MOV K100 D0

Designation of 1 point of word device D0 (16 bits)

Bit devices below the number of points designated as digits do not change.

Ladder example Processing

• When source (S) data is a numerical value

• When source (S) data is a word device

Using word devices

Word devices are designated in 1-point (16 bits) units.

• When digit designation processing is conducted, a random value can be used for the bit device initial device number.

• Digit designation cannot be made for the direct access I/O (DX, DY).

b15 b8

10011101

M115 M108

K2M100

Not changed

b7 b0

1 0 0 1 1 1 01

M107

0 0

1 1 1

M100

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Using double word (32 bits) data

X1F X1C X1B X18 X17 X14 X13 X10 XF XC XB X8 X7 X4 X3 X0

K1 designation range

(4 points)

K2 designation range

(8 points)

K3 designation range

(12 points)

K4 designation range

(16 points)

K5 designation range

(20 points)

K6 designation range

(24 points)

K7 designation range

(28 points)

K8 designation range

(32 points)

Double word data is 32-bit numerical data used by basic instructions and application instructions. The two types of double word data that can be dealt with by CPU module are as follows:

• Decimal constants: K-2147483648 to K2147483647

• Hexadecimal constants: H00000000 to HFFFFFFFF Word devices and bit devices designated by digit designation can be used as double word data. For direct access input (DX) and direct access output (DY), designation of double word data is not possible by digit designation.

When Using Bit Devices

Digit designation can be used to enable a bit device to deal with double word data. Digit designation of bit devices is done by designating "[Number of digits][Head number of bit device]". (For link direct devices, designation is done by "J[Network No.]\[Number of digits][Head number of bit device]". When X100 to X11F are designated for Network No.2, it is done by J2\K8X100.) Digit designation of bit devices can be done in 4-point (4-bit) units, and designation can be made for K1 to K8. For example, if X0 is designated for digit designation, the following points would be designated:

•K1X0  The 4 points X0 to X3 are designated.

•K2X0  The 8 points X0 to X7 are designated.

•K3X0  The 12 points X0 to XB are designated.

•K4X0  The 16 points X0 to XF are designated.

•K5X0  The 20 points X0 to X13 are designated.

•K6X0  The 24 points X0 to X17 are designated.

•K7X0  The 28 points X0 to X1B are designated.

•K8X0  The 32 points X0 to X1F are designated.

In cases where digit designation has been made at the source (S), the numeric values shown in the following table are those which can be dealt with as source data.

Number of digits designated With 32-bit instructions Number of digits designated With 32-bit instructions

K1 (4 points) 0 to 15 K5 (20 points) 0 to 1048575

K2 (8 points) 0 to 255 K6 (24 points) 0 to 16777215

K3 (12 points) 0 to 4095 K7 (28 points) 0 to 268435455

K4 (16 points) 0 to 65535 K8 (32 points) -2147483648 to 2147483647

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

When destination (D) data is a word device, the word device for the destination becomes 0 following the bit designated by

X10

DMOV K1X0D0

Source (S) data

0 0

K1X0

b2b3

0000000000

X2 X1 X0

Filled with 0s

X2 X1

00D100000000000000

Filled with 0s

b31b16

b15 b4

X10

DMOV H78123456 K5M0

Destination (D)

100 1 1 101

M17

M10

b15 b80b7

01 1 0 1 11

Not changed

100 1 1 101

b7 b0

1001110 0

10000011

1001110 0

b15 b8

M25 M18

M41M30M29 M26

digit designation at the source.

Ladder example Processing

• With 32-bit instructions

In cases where digit designation is made at the destination (D), the number of points designated are used as the destination. Bit devices below the number of points designated as digits do not change.

Ladder example Processing

• When source (S) data is a numerical value

H78123456

0 0

11 1

• When source (S) data is a word device

X10

DMOV D0 K5M10

Destination (D)

• When digit designation processing is conducted, a random value can be used for the bit device initial device number.

• Digit designation cannot be made for the direct access I/O (DX, DY).

3 4

10000011

K5M0

M15 M8

M31M20

8 1 2

Not changed

00 1 00 011

10 0 10100

10011 100

M19

000

M16

Using word devices

A word device designates devices used by the lower 16 bits of data. A 32-bit instruction uses (designation device number) and (designation device number + 1).

DMOV K100 D0

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Designation of 2 points of word devices D0 and D1 (32 bits)

32-bit data transfer instruction

Using single/double-precision real number data

Designation of 2 points of R100 and R101 (32 bits)

EMOV R100

Designation of 2 points of word devices D0 and D1 (32 bits)

Single-precision floating-point data transfer instruction

b31b30

b23 b22 b16

b15 b0

b31 Sign

b23 to b30

Exponent

b0 to b22

Mantissa

b23 to b30 FFH FEH FDH 81 80 7FH 7EH 02 01 00

Not used

127

126

1 0 -1

-125

-126

Not used

Real number data is floating decimal point data used with basic instructions and application instructions. Only word devices are capable of storing real number data.

Single-precision real number data (single-precision floating-point data)

Instructions which deal with single-precision floating-point data designate devices which are used for the lower 16 bits of data. Single-precision floating-point data are stored in the 32 bits which make up (designated device number) and (designated device number + 1).

In a sequence program, floating-point data are designated by E. Single-precision floating-point data can be represented as follows, using two word devices. [Sign] 1.[Mantissa]  2 The bit configuration and meaning for the internal representation of single-precision floating-point data are described below:

[Exponent]

• Sign: The most significant bit, b31, is the sign bit.

• 0: Positive

•1: Negative

• Exponent: The 8 bits, b23 to b30, represent the excess n of 2

. The following shows the excess n according to the binary

values in b23 to b30.

• Mantissa: Each of the 23 bits, b0 to b22, represents the "XXXXXX..." portion when the data is represented in binary, "1.XXXXXX...".

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Double-precision real number data (double-precision floating-point data)

Designation of 4 points of R100, R101, R102 and R103 (64 bits)

EDMOV R100

Designation of 4 points of word devices D0, D1, D2 and D3 (64 bits)

Double-precision floating-point data transfer instruction

b63 b62

b52 b51b16tob15 b0

b63

Sign

b52 to b62

Exponent

b0 to 51

Mantissa

b52 to b62 7FFH 7FEH 7FDH 400H 3FFH 3FEH 3FCH 02H 01H 00H

Not used

1023 1022

3FD

-2 -301 -1 -1021 -1022 Not used

Instructions which deal with double-precision floating-point data designate devices which are used for the lower 16 bits of data. Double-precision floating-point data are stored in the 64 bits which make up (designated device number) to (designated device number + 3).

In a sequence program, floating-point data are designated by E. Double-precision floating-point data can be represented as follows, using four word devices. [Sign] 1.[Mantissa]  2 The bit configuration and meaning for the internal representation of double-precision floating-point data are described below:

[Exponent]

• Sign: The most significant bit, b63, is the sign bit.

• 0: Positive

•1: Negative

• Exponent: The 11 bits, b52 to b62, represent the excess n of 2n. The following shows the excess n according to the binary values in b52 to b62.

• Mantissa: Each of the 52 bits, b0 to b51, represents the "XXXXXX..." portion when the data is represented in binary, "1.XXXXXX...".

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Precautions

Example 1: When '2147483647' is set for the input value

8th digit '6' is rounded. The value is handled as '2147484000'.

Example 2: When 'E1.1754943562' is set for the input value

8th digit '3' is rounded. The value is handled as 'E1.175494'.

Example 1: When '2147483646.12345678' is set for the input value

16th digit '6' is rounded. The value is handled as '2147483646.12346'.

Example 2: When 'E1.7976931348623157+307' is set for the input value

16th digit '5' is rounded. The value is handled as 'E1.79769313486232+307'.

Precautions when an input value of a single/double-precision real number is set using a programming tool are shown below.

■Single-precision real number

Because single-precision real number data are processed as the 32-bit single-precision in a programming tool, the number of significant digits becomes approximately 7. An input value of the single-precision real number data exceeds 7 digits, 8th digit is rounded. If the value after rounding exceeds the range of -2147483648 to 2147483647, an operation error occurs.

■Double-precision real number

Because double-precision real number data are processed as the 64-bit double-precision in a programming tool, the number of significant digits becomes approximately 15. An input value of the double-precision real number data exceeds 15 digits, 16th digit is rounded. If the value after rounding exceeds the range of -2147483648 to 2147483647, an operation error occurs.

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

The CPU module floating decimal point data can be monitored using the monitoring function of a programming tool. When floating-point data is used to express 0, all data in the following range are turned to 0.

• Single-precision floating-point data: b0 to b31

• Double-precision floating-point data: b0 to b63 The setting range of floating decimal point data is as follows.

• Single-precision floating-point data: -2

• Double-precision floating-point data: -2

128

< Device data  -2

1024

< Device data  -2

-126

, 0, 2

-1022

-126

 Device data < 2

-1022

, 0, 2

 Device data < 2

128

1024

Do not specify -0 in floating-point data (only when the most significant bit of the floating-point real number is

1). (An operation error will occur if floating-point operation is performed with -0.) When -0 is specified, the following CPU module internally converts the value to 0 to perform a floating-point operation. Therefore an operation error does not occur.

• The High Performance model QCPU with the internal processing set to "double precision".

(Double

precision is set by default for the floating-point operation processing.)

• Universal model QCPU (QnUDVCPU only) When -0 is specified, the following CPU module performs a floating-point operation with -0, keeping its processing speed. Therefore an operation error occurs.

• Basic model QCPU

• High Performance model QCPU where internal operation is set to single precision

• Process CPU

• Redundant CPU

• Universal model QCPU (QnUDVCPU is excluded)

•LCPU

*1 For operations when a real number is out of range and operations when an invalid value is input, refer to the QnUCPU User's Manual

(Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals).

*2 Switch between single precision and double precision of the internal operation of floating-point operation in the PLC system of the PLC

parameter dialog box. For the single precision and double precision of floating-point operation, refer to the QnUCPU User's Manual (Function Explanation, Program Fundamentals) or Qn(H)/QnPH/QnPRHCPU User's Manual (Function Explanation, Program Fundamentals).

*3 The Basic model QCPU can perform floating-point operation if its first five digits of serial No. are "04122 or later".

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

Using character string data

Designation of NULL code (00H)

$MOV

" "

Character string data transfer instruction

NULL

Designation of a character string composed of even numbers

$MOV

"ABCD"

Character string data transfer instruction

44H

41H

43H

NULL

Designation of a character string composed of odd numbers

$MOV

"ABCDE"

Character string data transfer instruction

44H

41H

43H

NULL

45H

Character string data is character data used by basic instructions and application instructions. The target ranges from the designated character to the NULL code (00H) that indicates the end of the character string.

When designated character is the NULL code

One word is used to store the NULL code.

When character string is even

Uses (number of characters/2 + 1) words, and stores character string and NULL code. For example, if "ABCD" is transferred to D0, the character string ABCD is stored at D0 and D1, and the NULL code is stored at D2. (The NULL code is stored as the last one word.)

When number of characters is odd

Uses (number of characters/2) words (rounds up decimal fractions) and stores the character string and NULL code. For example, if "ABCDE" is transferred to devices starting from D0, the character string (ABCDE) and the NULL code are stored from D0 to D2. (The NULL code is stored into the upper 8 bits of the last one word.)

3 CONFIGURATION OF INSTRUCTIONS

3.2 Designating Data

3.3 Indexing

MOV

MOV D10Z0

Indexing

Stores -1 at Z0.

Stores the data of D10Z0= D{10+(-1)} = D9 at D0.

Overview of indexing

Indexing is an indirect setting made by using an index register. When an Indexing is used in a sequence program, the device to be used will become the device number specified directly plus the contents of the index register. For example, if D2Z2 has been specified, the specified device is calculated as follows: D(2+3) = D5 and the content of Z2 is 3 become the specified device. Indexing with 32-bit index registers in addition to 16-bit index registers is available with the Universal model QCPU and LCPU.

Indexing with 16-bit index registers

■Example of indexing

Each index register can be set between -32768 and 32767. Indexing is performed in the way shown below:

*1 For the specifications of index registers, refer to the User's Manual (Function Explanation, Program Fundamentals) for the CPU module

used.

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

■Device that indexing can be used

T0Z0

T1Z1

K100

C0Z1

C1Z0

K100

SM400

Present value of timer

Value set for timer

K100

T0Z4 K4Y30

BCD

SM400

Present value of counter

Value set for counter

C100

K10

C100Z6 K2Y40

BCD

With the exception of the restrictions noted below, indexing can be used with devices used with contacts, coils, basic instructions, and application instructions.

• Devices to which indexing cannot be used

Device Description

E Floating decimal point data

$ Character string data

. Word device bit designation

FX, FY, FD Function devices

P Pointers used as labels

I Interrupt pointers used as labels

Z Index register

S Step relay

TR SFC transfer devices

BL SFC block device

*1 SFC transfer devices and SFC block devices are devices for SFC use.

Refer to the manual below for how to use these devices.  MELSEC-Q/L/QnA Programming Manual (SFC)

*2 For the High-speed Universal model QCPU, the SFC block device (BL) and step relay (S) can be modified using indices within the

following range.

• For the SFC block device (BL), the range is BL0 to BL319.

• For the step relay (S), the range is specified in the device settings using parameters.

Note that if a step relay (S) in the SFC block is specified, index modification can be specified within the range of S0 to S511.

• Devices with limits for use with index registers

Device Description Application example

T, ST • Only Z0 and Z1 can be used for timer contacts and coils.

*1*2

C • Only Z0 and Z1 can be used for counter contacts and coils.

*3 Universal model high speed type QCPU is excluded.

For timer and counter present values, there are no limits on index register numbers used.

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

■A case where indexing has been performed, and the actual process device (Z0 =20, Z1 = -5)

Description

Hexadecimal number

MOV D20

K3Y12A

0Z0

K3Y12FZ1

D (0 + 20) = D20 K3Y(12F - 5) = K3Y12A

Ladder example Actual process device

MOV K20 Z0

MOV K 5 Z1

MOV K2X50Z0 K1M38Z1

MOV K20 Z0

MOV K Z1

MOV D0Z0 K3Y12FZ1

Description

K2X50Z0

K1M38Z1

MOV K2X64

K2X(50 + 14) = K2X64

Converts K20 into a hexadecimal number.

K1M(38 - 5) = K1M33

K1M33

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

Indexing with 32-bit index registers

MOV

ZR10Z0

Indexing

DMOV

K40000 Z0

Stores 40000 at Z0.

Stores the data of ZR10Z0= ZR{10+40000}=ZR40010 at D0.

GX Developer 8.68R or earlier

GX Developer 8.68W or later

A method of specifying index registers in indexing with 32-bit can be selected from the following two methods.

• Specifying the index registers' range used for indexing with 32-bit.

• Specifying the 32-bit indexing using "ZZ" specification.

*1 The methods applies only to Universal model QCPU (excluding Q00UJCPU) and LCPU.

32-bit indexing with the "ZZ" specification is only available for the following CPU modules. See the programming tool operating manual for the available programming tools.

• The first five digits of the serial No. for QnU(D)(H)CPU is "10042" or higher (excluding Q00UJCPU).

• Built-in Ethernet port QCPU

•LCPU

■Example of specifying the range of index registers for use of 32-bit indexing

Each index register can be set between -2147483648 and 2147483647. An example of indexing is shown below.

• Specification method

For indexing with a 32-bit index register, specify the head number of an index register to be used on the Device tab of the Q parameter setting screen.

When the head number of the index register used is changed on the Device tab of the Q parameter setting screen, do not change the parameters only or do not write only the parameters into the programmable controller. Be sure to write the parameter into the programmable controller with the program. When the parameter is forced to be written into the programmable controller, an error of CAN'T EXE. PRG. occurs. (Error code: 2500)

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

• Device that indexing can be used

DMOV K100000 Z0

MOV ZR1000Z0 D13000Z2

DMOV K-20 Z2

MOV ZR101000 D12980

Description ZR1000Z0 ZR (1000 + 100000) = ZR101000

D13000Z2 D (13000 - 20) = D12980

Indexing can be used only for the device shown below.

Device Description

ZR Serial number access format file register

D Extended data register (D)

W Extended link register (W)

• Usable range of index registers

The following table shows the usable range of index registers for indexing with 32-bit index registers. For indexing with 32-bit index registers, the specified index register (Zn) and the next index register of the specified register (Zn+1) are used. Be sure not to overlap index registers to be used.

Set value Index registers to be used Set value Index registers to be used

Z0 Z0, Z1 Z10 Z10, Z11

Z1 Z1, Z2 Z11 Z11, Z12

Z2 Z2, Z3 Z12 Z12, Z13

Z3 Z3, Z4 Z13 Z13, Z14

Z4 Z4, Z5 Z14 Z14, Z15

Z5 Z5, Z6 Z15 Z15, Z16

Z6 Z6, Z7 Z16 Z16, Z17

Z7 Z7, Z8 Z17 Z17, Z18

Z8 Z8, Z9 Z18 Z18, Z19

Z9 Z9, Z10 Z19 Unusable

• A case where Indexing has been performed, and the actual process device (Z0 (32-bit) =100000, Z2 (32-bit) = -20)

Ladder example Actual process device

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

■Example of specifying 32-bit indexing with "ZZ" specification

MOVP K100

DMOVP K100000 Z4

ZR0ZZ4

Stores 100000 at Z4 and Z5.

Indexing ZR device with 32-bit index registers (Z4 and Z5) ZR (0+100000) =ZR100000

One index register can specify 32-bit indexing by using "ZZ" specification such as "ZR0ZZ4". The 32-bit indexing with "ZZ" specification is as follows.

• Specification method

To perform 32-bit indexing by using "ZZ" specification, select "Use of ZZ" in "Indexing Setting for ZR Device" in PC parameter.

• Device that indexing can be used

The following device is available for indexing.

Device Description

ZR Serial number access format file register

D Extended data register (D)

W Extended link register (W)

Jn\B

Jn\W

Internal relay

Link relay

Data register

Link register

Link relay

Link register

*1 This device can be used only for the High-speed Universal model QCPU.

• Usable range of index registers

The following table shows the usable range of index registers in 32-bit indexing used "ZZ" specification. The 32-bit indexing with "ZZ" specification is specified as the format ZRmZZn. Specifying ZRmZZn enables Zn and Zn+1 of 32-bit values to index the device number, ZRm.

"ZZ" specification

ZZ0 Z0, Z1 ZZ10 Z10, Z11

ZZ1 Z1, Z2 ZZ11 Z11, Z12

ZZ2 Z2, Z3 ZZ12 Z12, Z13

ZZ3 Z3, Z4 ZZ13 Z13, Z14

ZZ4 Z4, Z5 ZZ14 Z14, Z15

ZZ5 Z5, Z6 ZZ15 Z15, Z16

ZZ6 Z6, Z7 ZZ16 Z16, Z17

ZZ7 Z7, Z8 ZZ17 Z17, Z18

ZZ8 Z8, Z9 ZZ18 Z18, Z19

ZZ9 Z9, Z10 ZZ19 Unusable

Index registers used "ZZ" specification

*2  refers to device name (ZR, D, W) for indexing target.

Index registers used

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

• A case where 32-bit indexing used "ZZ" specification has been performed, and the actual process device (Z0 (32-bit)

DMOV

MOV

MOV ZR1000ZZ0 D30Z2

K-20

K100000 Z0

MOV ZR101000 D10

END

ZR1000ZZ0 ZR(1000+100000)=ZR101000 D30Z2 D(30-20)=D10

Description

=100000, Z2 (32-bit) = -20)

Ladder example Actual process device

• Available functions for "ZZ" specification

The 32-bit indexing specification with "ZZ" specification applies in the following functions.

No. Function name and description

1 Specifying devices in program instruction

2 Monitoring device registrations

3 Testing devices execution type

4 Testing devices with conditions

5 Setting monitor conditions

6 Tracing sampling (Trace point (specifying devices), trace target device)

7 Data logging function (Sampling interval (specifying devices), logging target data)

ZZn cannot be used alone as a device like "DMOV K100000 ZZ0". When setting values of index registers to specify 32-bit indexing with "ZZ" specification, set the value of Zn (Z0 to Z19). ZZn alone cannot be input to each function.

3 CONFIGURATION OF INSTRUCTIONS

3.3 Indexing

Mitsubishi Electric MELSEC-Q/L Programming Manual

Specifications and Main Features

Frequently Asked Questions

User Manual

SAFETY PRECAUTIONS

CONDITIONS OF USE FOR THE PRODUCT

INTRODUCTION

CONTENTS

MANUALS

TERMS

1 GENERAL DESCRIPTION

1.1 Related Programming Manuals

2 INSTRUCTION TABLES

2.1 Types of Instructions

2.2 How to Read Instruction Tables

Contact instructions

2.3 Sequence Instructions

Association instructions

Output instructions

Shift instructions

Master control instructions

Termination instructions

Other instructions

Comparison operation instructions

2.4 Basic Instructions

Arithmetic operation instruction

Data conversion instructions

Data transfer instruction

Program branch instructions

Program execution control instructions

I/O refresh instructions

Other convenient instructions

Logical operation instructions

2.5 Application Instructions

Rotation instructions

Shift instructions

Bit processing instructions

Data processing instructions

Structure creation instructions

Data table operation instructions

Buffer memory access instructions

Display instructions

Debugging and failure diagnosis instructions

Character string processing instructions

Special function instructions

Data control instructions

Switching instructions

Clock instructions

Expansion clock instructions

Program control instructions

PID instruction

Other instructions

Instructions for network refresh

Instructions for reading/writing routing information

Refresh device write/read instruction

2.6 Instructions for Data Link

Instructions for writing to the CPU shared memory of host CPU

Instructions for reading from the CPU shared memory of another CPU

2.7 Multiple CPU Dedicated Instruction

Instructions for multiple CPU high-speed transmission

Instructions for redundant system (for Redundant CPU)

2.8 Multiple CPU High-speed Transmission Dedicated Instruction

3 CONFIGURATION OF INSTRUCTIONS

3.1 Configuration of Instructions

3.2 Designating Data

Using bit data

Using word (16 bits) data

Using double word (32 bits) data

Using single/double-precision real number data

Using character string data

3.3 Indexing