Mitsubishi M62001FP, M62002L, M62002FP, M62001L, M62008L Datasheet
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MITSUBISHI<Dig.Ana.INTERFACE>
mode to backup mode and vice versa. these output signals are
classified into pulse type(M62001~M62004) and hold type
(M62005~M62008).
equipment,and home-use electronic appliances.
M62001L,FP/M62002L,FP/M62003L,FP/M62004L,FP/
M62005L,FP/M62006L,FP/M62007L,FP/M62008L,FP
LOW POWER 2 OUTPUT SYSTEM RESET IC SERIES
DESCRIPTION
The M62001~8 are semiconductor integrated circuits whose
optimum use is for the detection of the rise and fall in the
power supply to a microcomputer system in order to reset or
release the microcomputer system.
The M62001~8 carry out voltage detection in 2 steps and
have 2 output pins.As Bi-CMOS process and low power
dissipating circuits are employed,they output optimum signals
through each output pin to a system that requires RAM
backup, As output signals,interruption(INT) and compulsive
reset(RESET) signals are available.The interruption
signal(INT) is used to alter the microcomputer from normal
FEATURES
•
Bi-CMOS process realizes a configuration of low current
dissipating circuits.
Circuit current
Icc=5µA(Typ.,normal mode,Vcc=5.0V)
Icc=1µA(Typ.,backup mode,Vcc=2.5V)
•Two-step detection of supply voltage
Detection voltage in normal mode (2 types)
Vs=4.45V/4.25V(Typ.)
Detection voltage in backup mode
VBATT=2.15V(Typ.)
•Two outputs
Reset output (RESET):Output of compulsive reset signal
Interruption output(INT):Output of interruption signal
•Two types of output forms:CMOS and open drain
•Two types of interruption output (INT) signals
Pulse type (M62001~M62004)
Hold type (M62005~M62008)
•Two types of outline packages
5-pin plastic SIP (single in-line package)
8-pin plastic SOP (mini flat package)
•Output based on RAM backup mode (See the timing chart.)
PIN CONFIGURATION (TOP VIEW)
5
Vcc
4
Cd
3
RESET
M62001L
Outline 5P5T(M62001L~8L)
RESET
Vcc
NC
1
2
Cd
3
4
Outline 8P2S-A(M62001FP~8FP)
M62001FP
2
INT
1
GND
8
INT
7
GND
6
NC
5
NC
NC:NO CONNECTION
APPLICATION
Prevention of malfunction of microcomputer systems in
electronic,equipment such as OA equipment, industrial
BLOCK DIAGRAM
Vcc
5
+
-
+
-
1
GND(GROUND PIN)
NOTE:This is an example showing pin Nos.of M62001L~8L.(See PIN CONFIGURATION.)
INTERRUPTION SIGNAL
GENERATION BLOCK
RESET SIGNAL
GENERATION BLOCK
4
Cd(PIN TO DELAY CAPACITANCE)
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2
3
INT
RESET
1
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Pulse output
Hold output
M62001L,FP/M62002L,FP/M62003L,FP/M62004L,FP/
M62005L,FP/M62006L,FP/M62007L,FP/M62008L,FP
LOW POWER 2 OUTPUT SYSTEM RESET IC SERIES
ABSOLUTE MAXIMUM RATINGS
(Ta=25°C, unless otherwise noted,These ratings commonly apply to the M62001L/FP~M62008L/FP.)
Symbol Ratings
Vcc
ISINK
Pd
K
Topr
Tstg Storage temperature
Supply voltage
Output sink current
Power dissipation
Thermal derating
Operating temperature
Parameter
(Ta≥25°C)
ELECTRICAL CHARACTERISTICS
(Ta=25°C, unless otherwise noted,These ratings commonly apply to the M62001L/8L.)
Symbol
Vs
VBATT Battery voltage
∆Vs
ICC
Vsat1
Vsat2
td
tpw
tRESET
tINT
Supply voltage
Hysteresis voltage
Circuit current
Sink ability
Source ability
Delay time
Pulse width
Reset output response time
Interruption output reset time
Parameter
Interruption level
during Vcc drop
(Equivalent to VSL)
Reset level at backup
∆Vs=VSH-VSL
Vcc=5.0V:In normal mode
Vcc=2.5V:In backup mode
Vcc=4V,Io=4mA
(Output saturation voltage of N-ch transistor)
Vcc=4V,Io=1mA
(Output saturation voltage of P-ch transistor:
[CMOS output] M62001,M62003,
M62005,M62007)
External capacitance Cd=0.33µF
Output pulse width (M62001,M62002,
M62003,M62004)
Time between Vcc(when falling)=VBATT and
output of RESET signal
Time between Vcc(when falling)=VS and
output of INT signal
Conditions
Test conditions
(M62001,M62002,
M62005,M62006)
(M62003,M62004,
M62007,M62008)
440
-20 ~ +75
-40 ~ +125
Limits
Min.
4.30
4.05
2.00
8
5
4.4
Typ.
4.45
4.25
2.15 2.30
5.0 20
1.0
0.2
100
Max.
4.60
4.45
50
7
30
4
0.4
0.40.2
10
Unit
V
mA
mW
mW/°C
°C
°C
Unit
V
V
mV100
µA
V
V
ms
µS
µS
µS
SUMMARY OF M62001L/FP~M62008L/FP
Type Output form
M62001
M62002
M62003
M62004
M62005
M62006
M62007
M62008
Supply voltage detection level Vs(V)
4.45
4.25
4.45
4.25
Battery voltage detection level VBATT(V)
2.15
Open drain
Open drain
Open drain
Open drain
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CMOS
CMOS
CMOS
CMOS
Interruption signal output mode
2
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