Mitsubishi M5M5W816WG-85LI, M5M5W816WG-85L, M5M5W816WG-10LI, M5M5W816WG-10L, M5M5W816WG-10HI Datasheet

...

1999.1.15 Ver. 0.1

Some parametric limits are subject to change

of distribution, and not 100% tested.

DQ3A7DQ1S2VCC

GND

DQ7A2S1

DQ2

DQ4

DQ5

DQ6A1A4A6A5

A17

A16

A15A0A3

GND

A14OEBC2

DQ11

DQ12

DQ13

DQ14

BC1

DQ9

DQ10

GND

VCC

DQ15

DQ8WA13

A12

N.C.

DQ16

N.C.

A11

A10A9A8

M5M5W816WG -85L

M5M5W816WG -10L

M5M5W816WG -85H

M5M5W816WG -10H

M5M5W816WG -85LI

M5M5W816WG -10LI

M5M5W816WG -85HI

M5M5W816WG -10HI

M5M5W816WG -85L, 10L, 85H, 10H

-85LI, 10LI, 85HI, 10HI

8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM

Those are summarized in the part name table below.

MITSUBISHI LSIs

PRELIMINARY

Notice: This is not a final specification.

DESCRIPTION

The M5M5W816 is a family of low voltage 8-Mbit static RAMs organized as 524288-words by 16-bit, fabricated by Mitsubishi's high-performance 0.18µm CMOS technology.

The M5M5W816 is suitable for memory applications where a simple interfacing , battery operating and battery backup are the important design objectives.

M5M5W816WG is packaged in a CSP (chip scale package), with the outline of 7.0mm x 8.5mm, ball matrix of 6 x 8 (48ball) and ball pitch of 0.75mm. It gives the best solution for a compaction of mounting area as well as flexibility of wiring pattern of printed circuit boards.

From the point of operating temperature, the family is divided into two versions; "Standard" and "I-version".

Version,

Operating

temperature

Standard

0 ~ +70°C

I-version

-40 ~ +85°C

Part name

Power

Supply

1.8 ~ 2.7V

Access time

max.

85ns

100ns

85ns

100ns

85ns

100ns

85ns

100ns

FEATURES

- Single 1.8~2.7V power supply

- Small stand-by current: 0.1µA (2.7V, typ.)

- No clocks, No refresh

- Data retention supply voltage =1.0V

- All inputs and outputs are TTL compatible.

- Easy memory expansion by S1, S2, BC1 and BC2

- Common Data I/O

- Three-state outputs: OR-tie capability

- OE prevents data contention in the I/O bus

- Process technology: 0.18µm CMOS

- Package: 48ball 7.0mm x 8.5mm CSP

Stand-by current (Vcc=2.7V)

* Typical

Ratings (max.)

40°C25°C 40°C

---

0.20.1

---

0.20.1

* Typical parameter indicates the value for the center

---

70°C 85°C25°C

---

Active

current

Icc1

(2.7V, typ.)

40mA

(10MHz)

5mA

(1MHz)

PIN CONFIGURATION

G H

A18

Outline: 48FHA NC: No Connection

(TOP VIEW)

1 2 3 4 5 6

Pin Function

A0 ~ A18

DQ1 ~ DQ16

S1 S2

OE BC1 BC2

Vcc

GND

Address input Data input / output Chip select input 1 Chip select input 2 Write control input Output enable input

Lower Byte (DQ1 ~ 8) Upper Byte (DQ9 ~ 16) Power supply

Ground supply

MITSUBISHI ELECTRIC

1999.1.15 Ver. 0.1

Some parametric limits are subject to change

The M5M5W816WG is organized as 524288-words by 16bit. These devices operate on a single +1.8~2.7V power supply, and are directly TTL compatible to both input and output. Its fully static circuit needs no clocks and no refresh, and makes it useful.

The operation mode are determined by a combination of the device control inputs BC1 , BC2 , S1, S2 , W and OE. Each mode is summarized in the function table.

A write operation is executed whenever the low level W overlaps with the low level BC1 and/or BC2 and the low level S1 and the high level S2. The address(A0~A18) must be set up before the write cycle and must be stable during the entire cycle.

A read operation is executed by setting W at a high level and OE at a low level while BC1 and/or BC2 and S1 and S2 are in an active state(S1=L,S2=H).

When setting BC1 at the high level and other pins are in an active stage , upper-byte are in a selectable mode in which both reading and writing are enabled, and lower-byte are in a non-selectable mode. And when setting BC2 at a high level and other pins are in an active stage, lower-byte are in a selectable mode and upper-byte are in a non-selectable mode.

When setting BC1 and BC2 at a high level or S1 at a high level or S2 at a low level, the chips are in a non-selectable mode in which both reading and writing are disabled. In this mode, the output stage is in a high-impedance state, allowing OR-tie with other chips and memory expansion by BC1, BC2 and S1, S2.

The power supply current is reduced as low as 0.1µA(25°C, typical), and the memory data can be held at +1V power supply, enabling battery back-up operation during power failure or power-down operation in the non-selected mode.

MEMORY ARRAY

524288 WORDS

x 16 BITS

CLOCK

GENERATOR

Non selection

M5M5W816WG -85L, 10L, 85H, 10H

-85LI, 10LI, 85HI, 10HI

8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM

FUNCTION

FUNCTION TABLE

H L H X L L L L L L L L L

BLOCK DIAGRAM

BC1 BC2 OE

L X X L X X H X X X H H X X H XLL H Din H HL H H HL Active H H L L Write Din ActiveX H L H H H L Active H L DinLL X H L DoutHL L H L

MITSUBISHI LSIs

PRELIMINARY

Notice: This is not a final specification.

W X X

X X X X

H H High-Z High-Z

H High-Z

Mode

Write Read

Read

Write Read

H High-Z

DQ1~8

High-Z High-Z High-Z High-Z High-Z

High-Z

High-Z ActiveHL

DQ9~16

High-Z High-Z High-Z

High-Z High-ZDout ActiveL

Din Active Dout Active

Icc

Standby Standby Standby Standby

Active

ActiveL DoutH High-Z

A17

A18

BC1

BC2

MITSUBISHI ELECTRIC

Vcc

GND

1999.1.15 Ver. 0.1

Some parametric limits are subject to change

Vcc

Low-level input voltage

Input leakage current

Output leakage current

( AC,MOS level )

Stand by supply current

( AC,MOS level )

Stand by supply current

Other inputs= 0 ~ Vcc

Symbol

Conditions

Limits

Typ

Input capacitance

<=<=>

* -1.0V in case of AC (Pulse width 30ns)

(1)

>=other inputs = 0 ~ Vcc

(2)

>=other inputs = 0 ~ Vcc

<=>

(3)

>=other inputs = 0 ~ Vcc

M5M5W816WG -85L, 10L, 85H, 10H

-85LI, 10LI, 85HI, 10HI

8388608-BIT (524288-WORD BY 16-BIT) CMOS STATIC RAM

ABSOLUTE MAXIMUM RATINGS

MITSUBISHI LSIs

PRELIMINARY

Notice: This is not a final specification.

Symbol Parameter Units

VI VO Pd

Ta Tstg

Supply voltage

Input voltage

Output voltage

Power dissipation

Operating temperature

Storage temperature

DC ELECTRICAL CHARACTERISTICS

Symbol

VIH VIL VOH IOH= -0.1mA

VOL IOL=0.1mA

II IO

Icc1

Icc2

Icc3

Icc4

Parameter

High-level input voltage

High-level output voltage

Low-level output voltage

Active supply current

( AC,TTL level )

Conditions With respect to GND With respect to GND With respect to GND

Ta=25∞C Standard I-version

(-L, -H) (-LI, -HI)

Conditions

( Vcc=1.8 ~ 2.7V, unless otherwise noted)

-0.2* ~ Vcc + 0.2 (max. 4.6V)

* -3.0V in case of AC (Pulse width 30ns)

VI =0 ~ Vcc

BC1 and BC2=VIHor S1=VIHor S2=VIL or OE=VIH, VI/O=0 ~ Vcc BC1 and BC2 0.2V, S1 0.2V, S2 Vcc-0.2V

other inputs 0.2V or Vcc-0.2V Output - open (duty 100%)

BC1 and BC2=VIL , S=VIL ,S2=VIH other pins =VIH or VIL Output - open (duty 100%)

S1 Vcc - 0.2V,

S2 0.2V,

BC1 and BC2 Vcc - 0.2V S1 0.2V, S2 Vcc - 0.2V

BC1 and BC2=VIH or S1=VIH or S2=VIL

-H, -HI

-HI

-L, -LI

-LI

f= 10MHz f= 1MHz f= 10MHz

f= 1MHz

~ +25°C ~ +40°C ~ +70°C

~ +85°C ~ +70°C

~ +85°C

Ratings

-0.5* ~ +4.6

0 ~

700

0 ~ +70

- 40 ~ +85

- 65 ~ +150

0.7 x Vcc

-0.2 *

1.6

Limits

0.1

0.2

< =

MaxTypMin

Vcc+0.2V

0.4

0.2 ±1

±1

5040 10 5040

105

1 2

8 15 16 30

0.5

°C °C

Units

µA

Note 1: Direction for current flowing into IC is indicated as positive (no mark) Note 2: Typical parameter indicates the value for the center of distribution at 2.7V, and not 100% tested.

CAPACITANCE

Parameter

CI CO

Output capacitance

VI=GND, VI=25mVrms, f=1MHz VO=GND,VO=25mVrms, f=1MHz

MITSUBISHI ELECTRIC

< =

(Vcc=1.8 ~ 2.7V, unless otherwise noted)

Min

Max

Units

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