The M35047-XXXSP/FP is a character pattern display control IC
can display on the CRT display the liquid crystal display and the
plasma display. It uses a silicon gate CMOS process and it
housed in a 20-pin shrink DIP package (M35047-XXXSP) or a 20pin shrink SOP package (M35047-XXXFP).
For M35047-002SP/FP that is a standard ROM version of
M35047-XXXSP/FP respectively, the character pattern is also
mentioned.
Filter output. Connect loop filter to this pin.
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
VSS2
__
AC
TEST
SCL
SDA
TCK
VDD1
P6
P7
VSS1
P0/BLNK0
P1/R
P2
P3/G
P4
P5/B
Earthing pin
Auto-clear input
Test input
Clock input
Data I/O
External clock
Power pin
Port P6 output
Port P7 output
Earthing pin
Port P0 output
Port P1 output
Port P2 output
Port P3 output
Port P4 output
Port P5 output
–
Input
Input
Input
I/O
Input
–
Output
Output
–
Output
Output
Output
Output
Output
Output
Connect to GND.
When “L”, this pin resets the internal IC circuit. Hysteresis input. Built-in pull-up resistor.
Test pin. Connect to +5V.
SDA pin serial data is taken in when SCL rises. Hysteresis input.
This is the pin for serial input of display control register and display RAM data. Also, this
pin output acknowledge signal. Hysteresis input. Nch opendrain output.
This is the pin for external clock input.
Please connect to +5V with the power pin.
This is the output port.
This is the output port.
Please connect to GND using circuit earthing pin.
This pin can be toggled between port pin output and BLNK0 signal output.
This pin can be toggled between port pin output and R signal output.
This is the output port.
This pin can be toggled between port pin output and G signal output.
This is the output port.
This pin can be toggled between port pin output and B signal output.
18
19
20
HOR
VERT
VDD2
Horizontal synchronous signal input
Vertical synchronous signal input
Power pin
Input
Input
–
This pin inputs the horizontal synchronous signal. Hysteresis input.
This pin inputs the vertical synchronous signal. Hysteresis input.
Please connect to +5V with the power pin.
2
5
7
6
8
20
4
SCL
SDA
V
DD1
V
DD2
3AC
11V
SS12VSS2
TEST
Clock oscillation
circuit display
Timing generator
Polarity switching circuit
Address control
circuit
Data control
circuit
Display control
register
Display RAM
Shift register
Blinking circuit
Reading address
control circuit
Display location
detection circuit
H counter
TCK
1
CPOUT
18
HOR
19
12
VERT
Synchronous signal
switching circuit
Display control
circuit
Port output
control circuit
P0/BLNK0
13 P1/R
15 P3/G
17 P5/B
14 P2
16 P4
9P6
10 P7
Input control circuit
Polarity switching circuit
Display character
RAM
Display character
ROM
MITSUBISHI MICROCOMPUTERS
M35047-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
BLOCK DIAGRAM
3
MITSUBISHI MICROCOMPUTERS
M35047-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
MEMORY CONSTITUTION
Address 00016 to 11F16 are assigned to the display RAM, address
12016 to 12916 are assigned to the display control registers and
address 20016 to 2F116 are assigned to the RAM characters. The
internal circuit is reset and all display control registers (address
12016 to 12916) are set to "0" when the AC pin level is "L". And
✽The hexadecimal numbers in the boxes show the display RAM address.
MITSUBISHI MICROCOMPUTERS
M35047-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
16
16
16
16
16
16
16
16
16
16
16
16
Fig.10 Screen constitution
RAM Character CONSTITUTION
The dot lines and dot rows of the character RAM are determined
from each address and bit of the character RAM . The RAM character constitution is shown in Figure 11.
Dot
Dot
10
11
12
13
14
15
16
17
18
✽ The number in the boxes show the bit address of the RAM character :n. ("n" is RAM number : 0 to 7)
Fig.11 RAM charcter consititution
Note. When the RAM character is used, it is necessary to clear all areas of the RAM character first.
Set display frequency by division value
(multiply value) setting.
For details, see REGISTER
SUPPLEMENTARY DESCRIPTION
(1).
Also, set the display frequency range by
registers DIVS0, DIVS1, DIVS2, RSEL0
and RSEL1(address 12116) in accordance with the display frequency.
Any of this settings above is required
only when EXCK1 = 0, EXCK0 = 1 and
EXCK1 = 1, EXCK0 = 1.
9
DIV9
1
0
0
A
DIV10
1
0
TEST10
B
SPACE0
C
SPACE1
D
E
SPACE2
Note. The mark around the status value means the reset status by the "L" level is input to AC pin.
It should be fixed to "0".
1
Can not be used.
0
1
0
1
0
1
SPACE
2
1
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
(S) represents one line worth of space
Number of Lines and Space
<(S) represents space>
0
0
1
0
1
0
1
0
1
1 (S) 10 (S) 1
2 (S) 8 (S) 2
3 (S) 6 (S) 3
4 (S) 4 (S) 4
5 (S) 2 (S) 5
6 (S) 6
6 (S)(S) 6
12
Leave one line worth of space in the vertical direction.
For example, 6 (S) 6 indicates two sets
of 6 lines with a line of spaces between
lines 6 and 7.
A line is 18 ✕ N horizontal scan lines.
N is determined by the character size in
the vertical direction
10
(2) Address 12116
MITSUBISHI MICROCOMPUTERS
M35047-XXXSP/FP
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
DA
Register
Status
0
0
1
2
3
4
5
6
PTC0
PTC1
PTC2
PTC3
PTC4
PTC5
PTC6
P0 output (port P0).
1
BLNK0 output.
0
P1 output (port P1).
1
R signal output.
0
P2 output (port P2).
1
Can not be used.
0
P3 output (port P3).
1
G signal output.
0
P4 output (port P4).
1
Can not be used.
0
P5 output (port P5).
1
B signal output.
0
P6 output (port P6).
1
Can not be used.
Function
P0 pin output control.
P1 pin output control.
P2 pin output control.
P3 pin output control.
P4 pin output control.
P5 pin output control.
P6 pin output control.
Remarks
Contents
0
7
8
PTC7
DIVS0
P7 output (port P7).
1
Can not be used.
0
For setting, see REGISTER SUPPLEMENTARY DESCRIPTION
(2).
P7 pin output control.
Set display frequency range.
1
0
9
DIVS1
1
0
A
DIVS2
1
0
B
RSEL0
1
0
C
RSEL1
1
0
D
EXCK0
1
0
E
EXCK1
1
EXCK1
0
0
1
1
EXCK0
0
External synchronous (external clock)
1
0
1
Display clock input
Internal synchronous
Do not set
External synchronous (internal clock)
Display clock setting
See REGISTER SUPPLEMENTARY
DESCRIPTION (1)
Note. The mark around the status value means the reset status by the "L" level is input to AC pin.
11
(3) Address 12216
DA
Register
0
1
2
3
PTD0
PTD1
PTD2
PTD3
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Status
0
"L" output or negative polarity output (BLNK0 output).
1
"H" output or positive polarity output (BLNK0 output).
0
"L" output or negative polarity output (R signal output).
1
"H" output or positive polarity output (R signal output).
0
"L" output.
1
"H" output.
0
"L" output or negative polarity output (G signal output).
1
"H" output or positive polarity output (G signal output).
Function
MITSUBISHI MICROCOMPUTERS
M35047-XXXSP/FP
Remarks
P0 pin data control.
P1 pin data control.
P2 pin data control.
P3 pin data control.
0
4
5
6
7
8
9
A
B
PTD4
PTD5
PTD6
PTD7
TEST11
TEST12
TEST13
TEST14
"L" output.
1
"H" output.
0
"L" output or negative polarity output (B signal output).
1
"H" output or positive polarity output (B signal output).
0
"L" output.
1
"H" output.
0
"L" output.
1
"H" output.
0
Can not be used.
1
It should be fixed to "1".
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
P4 pin data control.
P5 pin data control.
P6 pin data control.
P7 pin data control.
0
C
TEST15
D
TEST16
E
TEST17
Note. The mark around the status value means the reset status by the "L" level is input to AC pin.
12
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
(4) Address 12316
DA
Register
0
1
2
3
4
5
HP0
HP1
HP2
HP3
HP4
HP5
Status
0
1
0
1
0
1
0
1
0
1
0
1
SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS
Contents
Function
If HS is the horizontal display start location,
HS = T ✕ ( 2nNPn+m)
T: Period of display frequency
2007 settings are possible.
m : offset value differ for the setting of the register EXCK0 and
EXCK1. It shown below.
EXCK1
EXCK0
10
Σ
n = 0
001 1
010 1
m
1313 Do not set19
HOR
MITSUBISHI MICROCOMPUTERS
M35047-XXXSP/FP
Remarks
Horizontal display start location is specified using the 11 bits from HP10 to HP0.
HP10 to HP0 = (000000000002) and
(000001001112) setting is forbidden.
HS*(shown left) shows horizontal display start location this is register B/F
(address 12916) = "0" is set.
6
HP6
0
VS
1
7
8
HP7
HP8
0
1
VERT
0
HS*
Display area
1
9
HP9
0
1
A
HP10
0
1
0
B
C
D
E
TEST0
TEST1
TEST2
TEST3
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
0
It should be fixed to "0".
1
Can not be used.
It should be fixed to "0".
0
Can not be used.
1
Note. The mark around the status value means the reset status by the "L" level is input to AC pin.
13
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