PIC12C5XX
DS40139B-page 70 1997 Microchip Technology Inc.
LIST OF EXAMPLES
Example 3-1: Instruction Pipeline Flow ............................10
Example 4-1: Indirect Addressing.................................... 17
Example 4-2: How To Clear RAM Using Indirect
Addressing................................................. 17
Example 5-1: Read-Modify-Write Instructions on an
I/O Port ...................................................... 20
Example 6-1: Changing Prescaler (Timer0→WDT)......... 24
Example 6-2: Changing Prescaler (WDT→Timer0)......... 24
LIST OF FIGURES
Figure 3-1: PIC12C5XX Block Diagram......................... 8
Figure 3-2: Clock/Instruction Cycle.............................. 10
Figure 4-1: Program Memory Map and Stack for the
PIC12C5XX ............................................... 11
Figure 4-2: PIC12C508 Register File Map................... 12
Figure 4-3: PIC12C509 Register File Map................... 12
Figure 4-4: STATUS Register (Address:03h)............... 14
Figure 4-5: OPTION Register....................................... 15
Figure 4-6: Loading of PC Branch Instructions -
PIC12C508/C509....................................... 16
Figure 4-7: Direct/Indirect Addressing.......................... 17
Figure 5-1: Equivalent Circuit for a Single I/O Pin........ 19
Figure 5-2: Successive I/O Operation.......................... 20
Figure 6-1: Timer0 Block Diagram............................... 21
Figure 6-2: Timer0 Timing: Internal Clock/
No Prescale............................................... 22
Figure 6-3: Timer0 Timing: Internal Clock/
Prescale 1:2............................................... 22
Figure 6-4: Timer0 Timing With External Clock ........... 23
Figure 6-5: Block Diagram of the Timer0/
WDT Prescaler .......................................... 24
Figure 7-1: Configuration Word for PIC12C508 or
PIC12C509................................................ 25
Figure 7-2: Crystal Operation (or Ceramic Resonator)
(XT or LP OSC Configuration)................... 26
Figure 7-3: External Clock Input Operation
(XT or LP OSC Configuration)................... 26
Figure 7-4: External Parallel Resonant Crystal
Oscillator Circuit......................................... 27
Figure 7-5: External Series Resonant Crystal
Oscillator Circuit .........................................27
Figure 7-6: External RC Oscillator Mode ..................... 27
Figure 7-7: MCLR
Select.............................................. 29
Figure 7-8: Simplified Block Diagram of
On-Chip Reset Circuit................................ 30
Figure 7-9: Time-Out Sequence on Power-Up
(MCLR Pulled Low).................................... 31
Figure 7-10: Time-Out Sequence on Power-Up
(MCLR Tied to Vdd): Fast VDD
Rise Time................................................... 31
Figure 7-11: Time-Out Sequence on Power-Up
(MCLR Tied to VDD): Slow VDD
Rise Time................................................... 31
Figure 7-12: Watchdog Timer Block Diagram................ 33
Figure 7-13: Brown-Out Protection Circuit 1.................. 34
Figure 7-14: Brown-Out Protection Circuit 2.................. 34
Figure 7-15: Typical In-Circuit Serial Programming
Connection................................................. 36
Figure 8-1: General Format for Instructions................. 37
Figure 10-1: Load Conditions - PIC12C5XX.................. 56
Figure 10-2: External Clock Timing - PIC12C5XX......... 57
Figure 10-3: I/O Timing - PIC12C5XX............................ 58
Figure 10-4: Reset, Watchdog Timer, and Device
Reset Timer Timing - PIC12C5XX............. 59
Figure 10-5: Timer0 Clock Timings - PIC12C5XX ......... 60
Figure 11-1: Calibrated Internal RC Frequency
Range vs. Temperature (V
DD = 5.0V)
(Internal RC is Calibrated to 25°C, 5.0V) .. 61
Figure 11-2: Calibrated Internal RC Frequency
Range vs. Temperature (VDD = 3.0V)
(Internal RC is Calibrated to 25°C, 5.0V) .. 61
Figure 11-3: Internal RC Frequency vs.
Calibration Value (VDD = 5.5V)................... 62
Figure 11-4: Internal RC Frequency vs.
Calibration Value (VDD = 3.5V)................... 62
Figure 11-5: WDT Timer Time-out Period vs. VDD ........ 63
Figure 11-6: Short DRT Period vs. VDD......................... 63
Figure 11-7: IOH vs. VOH, VDD = 2.5 V........................... 64
Figure 11-8: IOH vs. VOH, VDD = 5.5 V........................... 64
Figure 11-9: IOL vs. VOL, VDD = 2.5 V............................ 64
Figure 11-10: IOL vs. VOL, VDD = 5.5 V............................ 64
LIST OF TABLES
Table 1-1: PIC12C5XX Family of Devices.................... 4
Table 3-1: PIC12C5XX Pinout Description................... 9
Table 4-1: Special Function Register Summary......... 13
Table 5-1: Summary of Port Registers ....................... 19
Table 6-1: Registers Associated With Timer0 ............ 22
Table 7-1: Capacitor Selection For Ceramic
Resonators - PIC12C5XX ......................... 26
Table 7-2: Capacitor Selection For Crystal
Oscillator - PIC12C5XX............................. 26
Table 7-3: Reset Conditions For Registers ................ 28
Table 7-4: Reset Condition For Special
Registers................................................... 29
Table 7-5: DRT (Device Reset Timer Period).............. 32
Table 7-6: Summary of Registers Associated
with the Watchdog Timer........................... 33
Table 7-7: TO
/PD/GPWUF Status After Reset........... 34
Table 7-8: Events Affecting TO/PD Status Bits .......... 34
Table 8-1: OPCODE Field Descriptions ..................... 37
Table 8-2: Instruction Set Summary........................... 38
Table 9-1: Development Tools From Microchip.......... 52
Table 10-1: External Clock Timing Requirements -
PIC12C5XX............................................... 57
Table 10-2: Timing Requirements - PIC12C5XX.......... 58
Table 10-3: Reset, Watchdog Timer, and Device
Reset Timer - PIC12C5XX........................ 59
Table 10-4: DRT (Device Reset Timer Period).............. 59
Table 10-5: Timer0 Clock Requirements -
PIC12C5XX............................................... 60
Table 10-6: Pull-up Resistor Ranges............................ 60
Table 11-1: Dynamic IDD (Typical) -
WDT Enabled, 25°C.................................. 62