Microchip Technology Inc MCP3201-CI-P, MCP3201-CI-SN Datasheet
MCP3201
2.7V 12-Bit A/D Converter with SPI® Serial Interface
FEATURES
• 12-bit resolution
• ±1 LSB max DNL
• ±1 LSB max INL (MCP3201-B)
• ±2 LSB max INL (MCP3201-C)
• On-chip sample and hold
®
• SPI
serial interface (modes 0,0 and 1,1)
• Single supply operation: 2.7V - 5.5V
• 100ksps max. sampling rate at VDD = 5V
• 50ksps max. sa mpling rate at V
= 2.7V
DD
• Low power CMOS technology
- 500nA typical standby current, 2µA max.
- 400µA max. active current at 5V
• Industrial temp range: -40°C to +85°C
• 8-pin PDIP, SOIC and TSSOP packages
APPLICATIONS
• Sensor Interface
• Process Control
• Data Acquisition
• Battery Operated Systems
DESCRIPTION
PAC K AGE TYPES
PDIP
SOIC, TSSOP
V
REF
IN+
IN–
V
V
SS
REF
IN+
IN–
V
SS
MCP3201
1
2
3
4
1
2
3
4
8
V
DD
7
CLK
6
D
OUT
CS/SHDN
5
MCP3201
8
V
DD
7
CLK
6
D
OUT
5
CS/SHDN
FUNCTIONAL BLOCK DIAGRAM
V
V
REF
DD
V
SS
The Microchip Technology Inc. MCP3201 is a succes-
DAC
sive approximation 12-bit Analog-to-Digital (A/D) Converter with on-board sample and hold circuitry. The
device provides a single pseudo-differential input. Differential Nonlinearity (DNL) is specified at ±1 LSB, and
Integral Nonlinearity (INL) is offered in ±1 LSB
(MCP3201-B) and ±2 LSB (MCP3201-C) versions.
Communication with the device is done using a simple
serial interface compatible with the SPI protocol. The
device is capable of sample rates of up to 100ksps at a
clock rate of 1.6MHz. The MCP3201 operates over a
IN+
IN-
Sample
and
Hold
Control Logic
CS/SHDN
Comparator
CLK
12-Bit SAR
Shift
Register
D
OUT
broad voltage range (2.7V - 5.5V). Low current design
permits operation with typical standby and active currents of only 500nA and 300µA, respectively. The
device is offered in 8-pin PDIP, TSSOP and 150mil
SOIC packages.
1999 Microchip Technology Inc. Preliminary DS21290B-page 1
MCP3201
1.0 ELECTRICAL
PIN FUNCTION TABLE
CHARACTERISTICS
1.1 Maximum Ratings*
VDD.........................................................................7.0V
All inputs and outputs w.r.t. V
Storage temperature..........................-65°C to +150°C
Ambient temp. with power applied......-65°C to +125°C
Soldering temperature of leads (10 seconds)..+300°C
ESD protection on all pins...................................> 4kV
*Notice: Stresses above those listed under “Maximum ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listin gs of this spe cificat ion is
not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
...... -0.6V to VDD +0.6V
SS
NAME FUNCTION
V
DD
V
SS
IN+
INCLK
D
OUT
CS/SHDN
V
REF
+2.7V to 5.5V Power Supply
Ground
Positive Analog Input
Negative Analog Input
Serial Clock
Serial Data Out
Chip select/Shutdown Input
Reference Voltage Input
ELECTRICAL CHARACTERISTICS
All parameters apply at VDD = 5V, VSS = 0V, V
and f
CLK
= 16*f
unless otherwise noted.
SAMPLE
PARAMETER SYMBOL MIN. TYP. MAX. UNITS CONDITIONS
Convers ion Rate
Conversion Time t
Analog Input Sample Time t
Throughput Rate f
CONV
SAMPLE
SAMPLE
DC Accuracy
Resolution 12 bits
Integral Nonlinearity INL ±0.75
Different ial Nonlinea rity DNL ±0.5 ±1 LSB No missing codes over tem-
Offset Error ±1.25 ±3 LSB
Gain Error ±1.25 ±5 LSB
Dynamic Performance
Total Harmonic Distortion -82 dB V
Signal to Noise and Distortion
(SINAD)
Spurious Free Dynamic Range 86 dB V
Reference Input
Voltage Range 0.25 V
Current Drain 100
Analog Inputs
Input Voltage Range (IN+) IN- V
Input Voltage Range (IN-) V
Leakage Current 0.001 ±1 µA
Switch Resistance R
Sample Capacitor C
SS
SAMPLE
REF
= 5V, T
= -40°C to +85°C, f
AMB
12 clock
1.5 clock
100
50
±1
±1
±2
72 dB V
DD
150
.001
-100 VSS+100 mV
SS
3
+IN- V
REF
1K Ω See Figure 4-1
20 pF See Figure 4-1
= 100ksps
SAMPLE
cycles
cycles
ksps
ksps
LSB
LSB
V
= V
DD
REF
V
= V
DD
REF
MCP3201-B
MCP3201-C
perature
= 0.1V to 4.9V@1kHz
IN
= 0.1V to 4.9V@1kHz
IN
= 0.1V to 4.9V@1kHz
IN
VNote2
µA
µA CS
= VDD = 5V
= 5V
= 2.7V
DS21290B-page 2 Preliminary 1999 Microchip Technology Inc.
MCP3201
ELECTRICAL CHARACTERISTICS (CONTINUED)
All parameters apply at VDD = 5V, VSS = 0V, V
and f
CLK
= 16*f
unless otherwise noted.
SAMPLE
PARAMETER SYMBOL MIN. TYP. MAX. UNITS CONDITIONS
Digital Input/Output
Data Coding Format Straight Binary
High Level Input Voltage V
Low Level Input Voltage V
High Level Output Voltage V
Low Level Output Voltage V
Input Leakage Current I
Output Leakage Current I
Pin Capacitance (all
inputs/outputs)
LO
CIN, C
IH
IL
OH
OL
LI
OUT
Timing Parameters
Clock Frequency f
Clock High Time t
Clock Low Tim e t
Fall To First Rising CLK
CS
Edge
CLK Fall To Output Data Valid t
CLK Fall To Output Enable t
CS
Rise To Output Disable t
CS Disable Time t
D
Rise Time t
OUT
D
Fall Time t
OUT
CLK
t
SUCS
DIS
CSH
HI
LO
DO
EN
R
F
Power Requirements
Operating Voltage V
Operating Current
Standby Current I
I
DDS
DD
DD
Note 1: This parameter is guaranteed by characterization and not 100% tested.
2: See graph that relates linearity performance to V
3: Because the sample cap will eventually lose charge, effective clock rates below 10kHz can affect linearity
performance, especially at elevated temperatures. See Section 6.2 for more informatio n.
REF
0.7 V
= 5V, T
= -40°C to +85°C, f
AMB
DD
0.3 V
DD
SAMPLE
V
V
= 100ksps
4.1 V IOH = -1mA, VDD = 4.5V
0.4 V IOL = 1mA, VDD = 4.5V
-10 10 µA VIN = VSS or V
-10 10 µA V
= VSS or V
OUT
DD
10 pF VDD = 5.0V (Note 1)
T
= 25°C, f = 1 MHz
AMB
1.6
0.8
MHz
MHz
VDD = 5V (Note 3)
VDD = 2.7V (Note 3)
312 ns
312 ns
100 ns
200 ns See Test Circuits, Figure 1-2
200 ns See Test C i rcuits, Figu re 1-2
100 ns See Test C i rcuits, Figu re 1-2
(Note 1)
625 ns
100 ns See Test C i rcuits, Figu re 1-2
(Note 1)
100 ns See Test C i rcuits, Figu re 1-2
(Note 1)
2.7 5.5 V
300
210
400 µAµAVDD = 5.0V, D
VDD = 2.7V, D
OUT
OUT
0.5 2 µA CS = VDD = 5.0V
level.
REF
DD
unloaded
unloaded
1999 Microchip Technology Inc. Preliminary DS21290B-page 3
MCP3201
t
CSH
CS
t
SUCS
CLK
D
OUT
HI-Z
FIGURE 1-1: Serial Timing.
Load circuit for tR, t
1.4V
3K
D
OUT
C
Voltage Waveforms for tR, t
F, tDO
= 100pF
L
Test Point
F
t
t
HI
LO
t
EN
t
DO
NULL BIT
MSB OUT
t
R
Load circuit for
t
t
DIS
F
and t
LSB
EN
t
DIS
HI-Z
Test Point
V
DD
3K
D
OUT
100pF
V
SS
Voltage Waveforms for t
VDD/2
t
Waveform 2
DIS
tEN Waveform
t
Waveform 1
DIS
EN
CLK
D
D
OUT
Voltage Waveforms for t
OUT
V
OH
V
OL
t
R
t
DO
t
F
DO
CS
CLK
D
OUT
CS
D
OUT
Waveform 1*
D
OUT
Waveform 2
12
t
Voltage Waveforms for t
V
IH
T
DIS
†
EN
DIS
3
10%
4
B11
90%
* Waveform 1 is for an output with internal condi-
tions such that the output is high, unless disabled by the output control.
† Waveform 2 is for an output with internal condi-
tions such that the output is low, unless disabled
by the output control.
FIGURE 1-2: Test Circuits.
DS21290B-page 4 Preliminary 1999 Microchip Technology Inc.
2.0 TYPICAL PERFORMANCE CHARACTERISTICS
)
Note: Unless otherwise indicated, VDD = V
= 5V, VSS = 0V, f
REF
SAMPLE
= 100ksps, f
CLK
= 16*f
MCP3201
SAMPLE,TA
= 25°C
1.0
0.8
Positive INL
0.6
0.4
0.2
0.0
-0.2
INL (LSB)
-0.4
Negative INL
-0.6
-0.8
-1.0
0 25 50 75 100 125 150
Sample Rat e (ksps)
FIGURE 2-1: Integral Nonlinearity (INL) vs. Sample
Rate.
2.0
1.5
1.0
0.5
0.0
-0.5
INL (LSB)
-1.0
-1.5
-2.0
012345
Positive INL
Negative INL
V
(V)
REF
2.0
VDD = V
= 2.7V
1.5
1.0
REF
Posi tive INL
0.5
0.0
-0.5
INL (LSB)
Negative INL
-1.0
-1.5
-2.0
0 20406080100
Sample Rate (ksps)
FIGURE 2-4: Integral Nonl inearity (INL) vs. Sample
Rate (V
= 2.7V).
DD
2.0
1.5
1.0
0.5
0.0
-0.5
INL (LSB
-1.0
-1.5
-2.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
Positive INL
Negative INL
V
REF
(V)
VDD = 2.7V
F
SAMPLE
= 50ksps
FIGURE 2-2: Integral Nonlinearity (INL) vs. V
REF
.
FIGURE 2-5: Integral Nonlinearity (INL) vs. V
REF
(VDD = 2.7V).
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
INL (LSB)
-0.4
-0.6
-0.8
-1.0
0 512 1024 1536 2048 2560 3072 3584 4096
Digital Code
FIGURE 2-3: Integral Nonlinearity (INL) vs. Code
(Representative Part).
1999 Microchip Technology Inc. Preliminary DS21290B-page 5
1.0
VDD = V
= 2.7V
REF
= 50ksps
F
SAMPLE
0 512 1024 1536 2048 2560 3072 3584 4096
INL (LSB)
0.8
0.6
0.4
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
Digit a l Code
FIGURE 2-6: Integral Nonlinearity (INL) vs. Code
(Representative Part, V
= 2.7V).
DD
MCP3201
Note: Unless otherwise indicated, VDD = V
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
INL (LSB)
-0.4
-0.6
-0.8
-1.0
-50 -25 0 25 50 75 100
Positive INL
Negative INL
= 5V, VSS = 0V, f
REF
Tem perature ( °C)
FIGURE 2-7: Integral Nonlinearity (INL) vs.
Temperature.
1.0
0.8
0.6
0.4
0.2
0.0
-0.2
DNL (LSB)
-0.4
-0.6
-0.8
-1.0
0 25 50 75 100 125 150
Positive DNL
Negative DNL
Sampl e Rat e (ksps)
SAMPLE
= 100ksps, f
1.0
VDD = V
0.8
F
SAMPLE
0.6
0.4
0.2
0.0
-0.2
INL (LSB)
-0.4
-0.6
-0.8
-1.0
-50 -25 0 25 50 75 100
CLK
= 2.7V
REF
= 50ksps
= 16*f
SAMPLE,TA
Positive INL
Negative INL
= 25°C
Tem perature ( °C)
FIGURE 2-10: Integral Nonlinearity (INL) vs.
Temperature (V
2.0
1.5
1.0
0.5
0.0
-0.5
DNL (LSB)
-1.0
-1.5
-2.0
VDD = V
= 2.7V)
DD
= 2.7V
REF
.
Positive DNL
Negative DNL
0 20 40 60 80 100
Sample Rate (ksps)
FIGURE 2-8: Differential Nonlinearity (DNL) vs.
Sample Rate.
3.0
2.0
1.0
0.0
DNL (LSB)
-1.0
-2.0
012345
Positive DNL
Negative DNL
V
REF
(V)
FIGURE 2-9: Differential Nonlinearity (DNL) vs.
V
REF
.
FIGURE 2-11: Differential Nonlinearity (DNL) vs.
Sample Rate (V
3.0
2.0
1.0
0.0
DNL (LSB)
-1.0
-2.0
-3.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0
FIGURE 2-12: Differe nti al N onl ine arity (DNL) vs . V
= 2.7V)
DD
Positive DNL
Negative DNL
.
VDD = 2.7V
= 50ksps
F
SAMPLE
V
(V)
REF
REF
(VDD = 2.7V).
DS21290B-page 6 Preliminary 1999 Microchip Technology Inc.
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