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PIC16F913/914/916/917/946
Data Sheet
28/40/44/64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
♥ 2007 Microchip Technology Inc. |
DS41250F |
Note the following details of the code protection feature on Microchip devices:
•Microchip products meet the specification contained in their particular Microchip Data Sheet.
•Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions.
•There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•Microchip is willing to work with the customer who is concerned about the integrity of their code.
•Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer’s risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their respective companies.
© 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified.
DS41250F-page ii |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
28/40/44/64-Pin Flash-Based, 8-Bit CMOS Microcontrollers with LCD Driver and nanoWatt Technology
High-Performance RISC CPU:
•Only 35 instructions to learn:
-All single-cycle instructions except branches
•Operating speed:
-DC – 20 MHz oscillator/clock input
-DC – 200 ns instruction cycle
•Program Memory Read (PMR) capability
•Interrupt capability
•8-level deep hardware stack
•Direct, Indirect and Relative Addressing modes
Special Microcontroller Features:
•Precision Internal Oscillator:
-Factory calibrated to ±1%, typical
-Software selectable frequency range of 8 MHz to 125 kHz
-Software tunable
-Two-Speed Start-up mode
-External Oscillator fail detect for critical applications
-Clock mode switching during operation for power savings
•Software selectable 31 kHz internal oscillator
•Power-Saving Sleep mode
•Wide operating voltage range (2.0V-5.5V)
•Industrial and Extended temperature range
•Power-on Reset (POR)
•Power-up Timer (PWRT) and Oscillator Start-up Timer (OST)
•Brown-out Reset (BOR) with software control option
•Enhanced Low-Current Watchdog Timer (WDT) with on-chip oscillator (software selectable nominal 268 seconds with full prescaler) with software enable
•Multiplexed Master Clear with pull-up/input pin
•Programmable code protection
•High-Endurance Flash/EEPROM cell:
-100,000 write Flash endurance
-1,000,000 write EEPROM endurance
-Flash/Data EEPROM retention: > 40 years
Low-Power Features:
•Standby Current:
-<100 nA @ 2.0V, typical
•Operating Current:
-11 μA @ 32 kHz, 2.0V, typical
-220 μA @ 4 MHz, 2.0V, typical
•Watchdog Timer Current:
-1 μA @ 2.0V, typical
Peripheral Features:
•Liquid Crystal Display module:
-Up to 60/96/168 pixel drive capability on 28/40/64-pin devices, respectively
-Four commons
•Up to 24/35/53 I/O pins and 1 input-only pin:
-High-current source/sink for direct LED drive
-Interrupt-on-change pin
-Individually programmable weak pull-ups
•In-Circuit Serial Programming™ (ICSP™) via two pins
•Analog comparator module with:
-Two analog comparators
-Programmable on-chip voltage reference (CVREF) module (% of VDD)
-Comparator inputs and outputs externally accessible
•A/D Converter:
-10-bit resolution and up to 8 channels
•Timer0: 8-bit timer/counter with 8-bit programmable prescaler
•Enhanced Timer1:
-16-bit timer/counter with prescaler
-External Timer1 Gate (count enable)
-Option to use OSC1 and OSC2 as Timer1 oscillator if INTOSCIO or LP mode is selected
•Timer2: 8-bit timer/counter with 8-bit period register, prescaler and postscaler
•Addressable Universal Synchronous Asynchronous Receiver Transmitter (AUSART)
•Up to 2 Capture, Compare, PWM modules:
-16-bit Capture, max. resolution 12.5 ns
-16-bit Compare, max. resolution 200 ns
-10-bit PWM, max. frequency 20 kHz
•Synchronous Serial Port (SSP) with I2C™
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♥ 2007 Microchip Technology Inc. |
DS41250F-page 1 |
PIC16F913/914/916/917/946
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Program |
Data Memory |
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LCD |
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Memory |
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10-bit A/D |
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Timers |
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Device |
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I/O |
(segment |
CCP |
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Flash |
SRAM |
EEPROM |
(ch) |
8/16-bit |
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drivers) |
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(words/bytes) |
(bytes) |
(bytes) |
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PIC16F913 |
4K/7K |
256 |
256 |
24 |
5 |
16(1) |
1 |
2/1 |
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PIC16F914 |
4K/7K |
256 |
256 |
35 |
8 |
24 |
2 |
2/1 |
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PIC16F916 |
8K/14K |
352 |
256 |
24 |
5 |
16(1) |
1 |
2/1 |
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PIC16F917 |
8K/14K |
352 |
256 |
35 |
8 |
24 |
2 |
2/1 |
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PIC16F946 |
8K/14K |
336 |
256 |
53 |
8 |
42 |
2 |
2/1 |
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Note 1: COM3 and SEG15 share the same physical pin on the PIC16F913/916, therefore SEG15 is not available when using 1/4 multiplex displays.
Pin Diagrams – PIC16F914/917, 40-Pin
40-pin PDIP
RE3/MCLR/VPP 
1 RA0/AN0/C1-/SEG12 
2 RA1/AN1/C2-/SEG7 
3 RA2/AN2/C2+/VREF-/COM2 
4 RA3/AN3/C1+/VREF+/SEG15 
5 RA4/C1OUT/T0CKI/SEG4 
6 RA5/AN4/C2OUT/SS/SEG5 
7 RE0/AN5/SEG21 
8 RE1/AN6/SEG22 
9
RE2/AN7/SEG23 
10 VDD 
11 VSS 
12
RA7/OSC1/CLKIN/T1OSI 
13 RA6/OSC2/CLKOUT/T1OSO 
14 RC0/VLCD1 
15 RC1/VLCD2 
16 RC2/VLCD3 
17 RC3/SEG6 
18 RD0/COM3 
19 RD1 
20
PIC16F914/917
40 |
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RB7/ICSPDAT/ICDDAT/SEG13 |
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39 |
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RB6/ICSPCLK/ICDCK/SEG14 |
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38 |
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RB5/COM1 |
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37 |
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RB4/COM0 |
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36 |
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RB3/SEG3 |
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35 |
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RB2/SEG2 |
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34 |
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RB1/SEG1 |
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33 |
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RB0/INT/SEG0 |
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32 |
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VDD |
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31 |
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VSS |
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30 |
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RD7/SEG20 |
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29 |
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RD6/SEG19 |
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28 |
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RD5/SEG18 |
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27 |
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RD4/SEG17 |
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26 |
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RC7/RX/DT/SDI/SDA/SEG8 |
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25 |
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RC6/TX/CK/SCK/SCL/SEG9 |
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24 |
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RC5/T1CKI/CCP1/SEG10 |
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23 |
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RC4/T1G/SDO/SEG11 |
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22 |
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RD3/SEG16 |
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21 |
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RD2/CCP2 |
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DS41250F-page 2 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
TABLE 1: |
PIC16F914/917 40-PIN SUMMARY |
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I/O |
Pin |
A/D |
LCD |
Comparators |
Timers |
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CCP |
AUSART |
SSP |
Interrupt |
Pull-Up |
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Basic |
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RA0 |
2 |
AN0 |
SEG12 |
C1- |
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— |
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— |
— |
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— |
— |
— |
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— |
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RA1 |
3 |
AN1 |
SEG7 |
C2- |
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— |
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— |
— |
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— |
— |
— |
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— |
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RA2 |
4 |
AN2/VREF- |
COM2 |
C2+ |
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— |
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— |
— |
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— |
— |
— |
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— |
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RA3 |
5 |
AN3/VREF+ |
SEG15 |
C1+ |
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— |
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— |
— |
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— |
— |
— |
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— |
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RA4 |
6 |
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SEG4 |
C1OUT |
T0CKI |
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— |
— |
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— |
— |
— |
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— |
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RA5 |
7 |
AN4 |
SEG5 |
C2OUT |
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— |
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— |
— |
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— |
— |
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— |
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SS |
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RA6 |
14 |
— |
— |
— |
T1OSO |
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— |
— |
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— |
— |
— |
OSC2/CLKOUT |
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RA7 |
13 |
— |
— |
— |
T1OSI |
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— |
— |
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— |
— |
— |
OSC1/CLKIN |
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RB0 |
33 |
— |
SEG0 |
— |
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— |
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— |
— |
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— |
INT |
Y |
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— |
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RB1 |
34 |
— |
SEG1 |
— |
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— |
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— |
— |
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— |
— |
Y |
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— |
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RB2 |
35 |
— |
SEG2 |
— |
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— |
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— |
— |
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— |
— |
Y |
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— |
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RB3 |
36 |
— |
SEG3 |
— |
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— |
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— |
— |
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— |
— |
Y |
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— |
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RB4 |
37 |
— |
COM0 |
— |
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— |
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— |
— |
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— |
IOC |
Y |
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— |
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RB5 |
38 |
— |
COM1 |
— |
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— |
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— |
— |
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— |
IOC |
Y |
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— |
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RB6 |
39 |
— |
SEG14 |
— |
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— |
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— |
— |
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— |
IOC |
Y |
ICSPCLK/ICDCK |
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RB7 |
40 |
— |
SEG13 |
— |
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— |
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— |
— |
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— |
IOC |
Y |
ICSPDAT/ICDDAT |
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RC0 |
15 |
— |
VLCD1 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RC1 |
16 |
— |
VLCD2 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RC2 |
17 |
— |
VLCD3 |
— |
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— |
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— |
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— |
— |
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RC3 |
18 |
— |
SEG6 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RC4 |
23 |
— |
SEG11 |
— |
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T1G |
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— |
— |
SDO |
— |
— |
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— |
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RC5 |
24 |
— |
SEG10 |
— |
T1CKI |
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CCP1 |
— |
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— |
— |
— |
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— |
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RC6 |
25 |
— |
SEG9 |
— |
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— |
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— |
TX/CK |
SCK/SCL |
— |
— |
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— |
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RC7 |
26 |
— |
SEG8 |
— |
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— |
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— |
RX/DT |
SDI/SDA |
— |
— |
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— |
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RD0 |
19 |
— |
COM3 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RD1 |
20 |
— |
— |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RD2 |
21 |
— |
— |
— |
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— |
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CCP2 |
— |
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— |
— |
— |
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— |
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RD3 |
22 |
— |
SEG16 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RD4 |
27 |
— |
SEG17 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RD5 |
28 |
— |
SEG18 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RD6 |
29 |
— |
SEG19 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RD7 |
30 |
— |
SEG20 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RE0 |
8 |
AN5 |
SEG21 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RE1 |
9 |
AN6 |
SEG22 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RE2 |
10 |
AN7 |
SEG23 |
— |
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— |
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— |
— |
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— |
— |
— |
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— |
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RE3 |
1 |
— |
— |
— |
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— |
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— |
— |
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— |
— |
Y(1) |
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PP |
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MCLR/V |
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— |
11 |
— |
— |
— |
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— |
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— |
— |
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— |
— |
— |
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VDD |
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— |
32 |
— |
— |
— |
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— |
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— |
— |
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— |
— |
— |
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VDD |
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— |
12 |
— |
— |
— |
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— |
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— |
— |
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— |
— |
— |
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VSS |
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— |
31 |
— |
— |
— |
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— |
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— |
— |
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— |
— |
— |
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VSS |
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Note |
1: |
Pull-up enabled only with external |
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configuration. |
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MCLR |
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♥ 2007 Microchip Technology Inc. |
DS41250F-page 3 |
PIC16F913/914/916/917/946
Pin Diagrams – PIC16F913/916, 28-Pin
28-pin PDIP, SOIC, SSOP
RE3/MCLR/VPP 
1 RA0/AN0/C1-/SEG12 
2 RA1/AN1/C2-/SEG7 
3 RA2/AN2/C2+/VREF-/COM2 
4 RA3/AN3/C1+/VREF+/COM3/SEG15 
5 RA4/C1OUT/T0CKI/SEG4 
6 RA5/AN4/C2OUT/SS/SEG5 
7 VSS 
8 RA7/OSC1/CLKIN/T1OSI 
9 RA6/OSC2/CLKOUT/T1OSO 
10 RC0/VLCD1 
11 RC1/VLCD2 
12 RC2/VLCD3 
13 RC3/SEG6 
14
PIC16F913/916
28 |
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RB7/ICSPDAT/ICDDAT/SEG13 |
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27 |
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RB6/ICSPCLK/ICDCK/SEG14 |
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26 |
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RB5/COM1 |
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25 |
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RB4/COM0 |
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24 |
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RB3/SEG3 |
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23 |
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RB2/SEG2 |
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22 |
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RB1/SEG1 |
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21 |
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RB0/INT/SEG0 |
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20 |
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VDD |
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19 |
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VSS |
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18 |
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RC7/RX/DT/SDI/SDA/SEG8 |
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17 |
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RC6/TX/CK/SCK/SCL/SEG9 |
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16 |
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RC5/T1CKI/CCP1/SEG10 |
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15 |
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RC4/T1G/SDO/SEG11 |
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28-pin QFN
RA1/AN1/C2-/SEG7 |
RA0/AN0/C1-/SEG12 |
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RE3/MCLR/VPP |
RB7/ICSPDAT/ICDDAT/SEG13 |
RB6/ICSPCLK/ICDCK/SEG14 |
RB5/COM1 |
RB4/COM0 |
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RA2/AN2/C2+/VREF-/COM2 
1
RA3/AN3/C1+/VREF+/COM3/SEG15 
2
RA4/C1OUT/T0CKI/SEG4 
3
RA5/AN4/C2OUT/SS/SEG5 
4 VSS 
5 RA7/OSC1/CLKIN/T1OSI 
6 RA6/OSC2/CLKOUT/T1OSO 
7
28
RC0/VLCD1 8
27 |
26 |
25 |
24 |
23 |
PIC16F913/916
9 |
10 |
11 |
12 |
13 |
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RC1/VLCD2 |
RC2/VLCD3 |
RC3/SEG6 |
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RC4/T1G/SDO/SEG11 |
RC5/T1CKI/CCP1/SEG10 |
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22
RC6/TX/CK/SCK/SCL/SEG9 14
21 
RB3/SEG3
20 
RB2/SEG2
19 
RB1/SEG1
18 
RB0/INT/SEG0 17 
VDD
16 
VSS
15 
RC7/RX/DT/SDI/SDA/SEG8
DS41250F-page 4 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
TABLE 2: |
PIC16F913/916 28-PIN (PDIP, SOIC, SSOP) SUMMARY |
|
|
|
|
|
|||||||||||||
I/O |
Pin |
A/D |
LCD |
Comparators |
Timers |
|
CCP |
AUSART |
SSP |
Interrupt |
Pull-Up |
|
Basic |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA0 |
2 |
AN0 |
SEG12 |
C1- |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA1 |
3 |
AN1 |
SEG7 |
C2- |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA2 |
4 |
AN2/VREF- |
COM2 |
C2+ |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA3 |
5 |
AN3/VREF+ |
SEG15/ |
C1+ |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
|
|
|
COM3 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA4 |
6 |
— |
SEG4 |
C1OUT |
T0CKI |
|
— |
— |
|
— |
— |
— |
|
— |
|||||
RA5 |
7 |
— |
SEG5 |
C2OUT |
|
— |
|
— |
— |
|
|
|
— |
— |
|
— |
|||
SS |
|||||||||||||||||||
RA6 |
10 |
— |
— |
— |
T1OSO |
|
— |
— |
|
— |
— |
— |
OSC2/CLKOUT |
||||||
RA7 |
9 |
— |
— |
— |
T1OSI |
|
— |
— |
|
— |
— |
— |
OSC1/CLKIN |
||||||
RB0 |
21 |
— |
SEG0 |
— |
|
— |
|
— |
— |
|
— |
INT |
Y |
|
— |
||||
RB1 |
22 |
— |
SEG1 |
— |
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB2 |
23 |
— |
SEG2 |
— |
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB3 |
24 |
— |
SEG3 |
— |
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB4 |
25 |
— |
COM0 |
— |
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB5 |
26 |
— |
COM1 |
— |
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB6 |
27 |
— |
SEG14 |
— |
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPCLK/ICDCK |
|||||
RB7 |
28 |
— |
SEG13 |
— |
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPDAT/ICDDAT |
|||||
RC0 |
11 |
— |
VLCD1 |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC1 |
12 |
— |
VLCD2 |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC2 |
13 |
— |
VLCD3 |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC3 |
14 |
— |
SEG6 |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC4 |
15 |
— |
SEG11 |
— |
|
T1G |
|
|
— |
— |
SDO |
— |
— |
|
— |
||||
RC5 |
16 |
— |
SEG10 |
— |
T1CKI |
|
CCP1 |
— |
|
— |
— |
— |
|
— |
|||||
RC6 |
17 |
— |
SEG9 |
— |
|
— |
|
— |
TX/CK |
SCK/SCL |
— |
— |
|
— |
|||||
RC7 |
18 |
— |
SEG8 |
— |
|
— |
|
— |
RX/DT |
SDI/SDA |
— |
— |
|
— |
|||||
RE3 |
1 |
— |
— |
— |
|
— |
|
— |
— |
|
— |
— |
Y(1) |
|
|
PP |
|||
|
|
|
MCLR/V |
||||||||||||||||
— |
20 |
— |
— |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
8 |
— |
— |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
— |
19 |
— |
— |
— |
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
Note |
1: |
Pull-up enabled only with external |
|
configuration. |
|
|
|
|
|
|
|
|
|
|
|||||
MCLR |
|
|
|
|
|
|
|
|
|
|
|||||||||
♥ 2007 Microchip Technology Inc. |
DS41250F-page 5 |
PIC16F913/914/916/917/946
TABLE 3: |
PIC16F913/916 28-PIN (QFN) SUMMARY |
|
|
|
|
|
|
|
|
|||||||||||
I/O |
Pin |
A/D |
LCD |
Comparators |
|
Timers |
|
CCP |
AUSART |
SSP |
Interrupt |
Pull-Up |
|
Basic |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA0 |
27 |
AN0 |
SEG12 |
C1- |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA1 |
28 |
AN1 |
SEG7 |
C2- |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA2 |
1 |
AN2/VREF- |
COM2 |
C2+ |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA3 |
2 |
AN3/VREF+ |
SEG15/ |
C1+ |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
|
|
|
COM3 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA4 |
3 |
— |
SEG4 |
C1OUT |
|
T0CKI |
|
— |
— |
|
— |
— |
— |
|
— |
|||||
RA5 |
4 |
AN4 |
SEG5 |
C2OUT |
|
|
— |
|
— |
— |
|
|
|
— |
— |
|
— |
|||
SS |
||||||||||||||||||||
RA6 |
7 |
— |
— |
— |
|
T1OSO |
|
— |
— |
|
— |
— |
— |
OSC2/CLKOUT |
||||||
RA7 |
6 |
— |
— |
— |
|
T1OSI |
|
— |
— |
|
— |
— |
— |
OSC1/CLKIN |
||||||
RB0 |
18 |
— |
SEG0 |
— |
|
|
— |
|
— |
— |
|
— |
INT |
Y |
|
— |
||||
RB1 |
19 |
— |
SEG1 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB2 |
20 |
— |
SEG2 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB3 |
21 |
— |
SEG3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB4 |
22 |
— |
COM0 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB5 |
23 |
— |
COM1 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB6 |
24 |
— |
SEG14 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPCLK/ICDCK |
|||||
RB7 |
25 |
— |
SEG13 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPDAT/ICDDAT |
|||||
RC0 |
8 |
— |
VLCD1 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC1 |
9 |
— |
VLCD2 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC2 |
10 |
— |
VLCD3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC3 |
11 |
— |
SEG6 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC4 |
12 |
— |
SEG11 |
— |
|
|
T1G |
|
|
— |
— |
SDO |
— |
— |
|
— |
||||
RC5 |
13 |
— |
SEG10 |
— |
|
T1CKI |
|
CCP1 |
— |
|
— |
— |
— |
|
— |
|||||
RC6 |
14 |
— |
SEG9 |
— |
|
|
— |
|
— |
TX/CK |
SCK/SCL |
— |
— |
|
— |
|||||
RC7 |
15 |
— |
SEG8 |
— |
|
|
— |
|
— |
RX/DT |
SDI/SDA |
— |
— |
|
— |
|||||
RE3 |
26 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y(1) |
|
|
PP |
|||
|
|
|
|
MCLR/V |
||||||||||||||||
— |
17 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
5 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
— |
16 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
Note |
1: |
Pull-up enabled only with external |
|
configuration. |
|
|
|
|
|
|
|
|
|
|
||||||
MCLR |
|
|
|
|
|
|
|
|
|
|
||||||||||
DS41250F-page 6 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
Pin Diagrams – PIC16F914/917, 44-Pin
44-pin TQFP
RC6/TX/CK/SCK/SCL/SEG9 RC5/T1CKI/CCP1/SEG10 RC4/T1G/SDO/SEG11 RD3/SEG16 RD2/CCP2 RD1 RD0/COM3 RC3/SEG6 RC2/VLCD3 RC1/VLCD2 NC
RC7/RX/DT/SDI/SDA/SEG8
RD4/SEG17
RD5/SEG18
RD6/SEG19
RD7/SEG20 VSS VDD
RB0/SEG0/INT
RB1/SEG1
RB2/SEG2
RB3/SEG3
44-pin QFN
1 |
44 43 42 41 40 39 38 37 36 35 34 |
33 |
|
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NC |
|||
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|||||
2 |
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32 |
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RC0/VLCD1 |
||
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||||||
3 |
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31 |
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RA6/OSC2/CLKOUT/T1OSO |
||
4 |
|
|
30 |
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RA7/OSC1/CLKIN/T1OSI |
||
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|||||
5 |
|
PIC16F914/917 |
29 |
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VSS |
||
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||||||
6 |
|
28 |
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VDD |
|||
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|
||||||
7 |
|
|
27 |
|
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RE2/AN7/SEG23 |
||
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|||||
8 |
|
|
26 |
|
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RE1/AN6/SEG22 |
||
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|||||
9 |
|
|
25 |
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RE0/AN5/SEG21 |
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|||||
10 |
|
24 |
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RA5/AN4/C2OUT/SS/SEG5 |
|||
11 |
|
23 |
|
|
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|
RA4/C1OUT/T0CKI/SEG4 |
|||
12 13 14 15 16 17 18 19 20 21 22 |
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|||||||||
NC NC RB4/COM0 RB5/COM1 RB6/ICSPCLK/ICDCK/SEG14 RB7/ICSPDAT/ICDDAT/SEG13 |
|
RE3/MCLR/VPP RA0/C1-/AN0/SEG12 RA1/C2-/AN1/SEG7 RA2/AN2/C2+/VREF-/COM2 RA3/AN3/VREF+/C1+/SEG15 |
|
RC6/TX/CK/SCK/SCL/SEG9 |
RC5/T1CKI/CCP1/SEG10 |
|
RC4/T1G/SDO/SEG11 RD3/SEG16 RD2/CCP2 RD1 RD0/COM3 RC3/SEG6 RC2/VLCD3 RC1/VLCD2 RC0/VLDC1 |
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RC7/RX/DT/SDI/SDA/SEG8 |
|
|
1 |
44 43 42 41 40 39 38 37 36 35 34 |
33 |
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RA6/OSC2/CLKOUT/T1OSO |
|||||||||||||||||||||||||||||||||||
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|
|
RD4/SEG17 |
|
|
2 |
|
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|
32 |
|
|
|
RA7/OSC1/CLKIN/T1OSI |
||||||||||
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|
|
|
RD5/SEG18 |
|
|
3 |
|
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31 |
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VSS |
||||||||||
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|
||||||||||||||
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RD6/SEG19 |
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|
4 |
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30 |
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VSS |
||||||||||
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|
|||||||||||||||
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RD7/SEG20 |
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|
5 |
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29 |
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NC |
||||||||||
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VSS |
|
|
6 |
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PIC16F914/917 |
28 |
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|
VDD |
|||||||||||||||
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||||||||||||||||||||
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VDD |
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|
7 |
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27 |
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RE2/AN7/SEG23 |
|||||
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|||||||||
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VDD |
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|
8 |
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26 |
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RE1/AN6/SEG22 |
|||||
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RB0/INT/SEG0 |
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9 |
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25 |
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RE0/AN5/SEG21 |
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|||||||||||||||
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RB1/SEG1 |
|
|
10 |
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24 |
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RA5/AN4/C2OUT/SS/SEG5 |
|||||||||
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|||||||||||||
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RB2/SEG2 |
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11 |
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23 |
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RA4/C1OUT/T0CKI/SEG4 |
|||||||||
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|||||||||||||
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12 13 14 15 16 17 18 19 20 21 22 |
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|||||||||||||||||
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RB3/SEG3 |
NC RB4/COM0 RB5/COM1 RB6/ICSPCLK/ICDCK/SEG14 RB7/ICSPDAT/ICDDAT/SEG13 |
|
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|||||||||
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RE3/MCLR/VPP RA0/AN0/C1-/SEG12 RA1/AN1/C2-/SEG7 RA2/AN2/C2+/VREF-/COM2 RA3/AN3/C1+/VREF+/SEG15 |
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||||||||||||||||
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|||||||||||||||||
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|||||||||||||||||
♥ 2007 Microchip Technology Inc. |
DS41250F-page 7 |
PIC16F913/914/916/917/946
TABLE 4: |
PIC16F914/917 44-PIN (TQFP) SUMMARY |
|
|
|
|
|
|
|
|
|||||||||||
I/O |
Pin |
A/D |
LCD |
Comparators |
|
Timers |
|
CCP |
AUSART |
SSP |
Interrupt |
Pull-Up |
|
Basic |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA0 |
19 |
AN0 |
SEG12 |
C1- |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA1 |
20 |
AN1 |
SEG7 |
C2- |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA2 |
21 |
AN2/VREF- |
COM2 |
C2+ |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA3 |
22 |
AN3/VREF+ |
SEG15 |
C1+ |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA4 |
23 |
— |
SEG4 |
C1OUT |
|
T0CKI |
|
— |
— |
|
— |
— |
— |
|
— |
|||||
RA5 |
24 |
AN4 |
SEG5 |
C2OUT |
|
|
— |
|
— |
— |
|
|
|
— |
— |
|
— |
|||
SS |
||||||||||||||||||||
RA6 |
31 |
— |
— |
— |
|
T1OSO |
|
— |
— |
|
— |
— |
— |
OSC2/CLKOUT |
||||||
RA7 |
30 |
— |
— |
— |
|
T1OSI |
|
— |
— |
|
— |
— |
— |
OSC1/CLKIN |
||||||
RB0 |
8 |
— |
SEG0 |
— |
|
|
— |
|
— |
— |
|
— |
INT |
Y |
|
— |
||||
RB1 |
9 |
— |
SEG1 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB2 |
10 |
— |
SEG2 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB3 |
11 |
— |
SEG3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB4 |
14 |
— |
COM0 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB5 |
15 |
— |
COM1 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB6 |
16 |
— |
SEG14 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPCLK/ICDCK |
|||||
RB7 |
17 |
— |
SEG13 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPDAT/ICDDAT |
|||||
RC0 |
32 |
— |
VLCD1 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC1 |
35 |
— |
VLCD2 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC2 |
36 |
— |
VLCD3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC3 |
37 |
— |
SEG6 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC4 |
42 |
— |
SEG11 |
— |
|
|
T1G |
|
|
— |
— |
SDO |
— |
— |
|
— |
||||
RC5 |
43 |
— |
SEG10 |
— |
|
T1CKI |
|
CCP1 |
— |
|
— |
— |
— |
|
— |
|||||
RC6 |
44 |
— |
SEG9 |
— |
|
|
— |
|
— |
TX/CK |
SCK/SCL |
— |
— |
|
— |
|||||
RC7 |
1 |
— |
SEG8 |
— |
|
|
— |
|
— |
RX/DT |
SDI/SDA |
— |
— |
|
— |
|||||
RD0 |
38 |
— |
COM3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD1 |
39 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD2 |
40 |
— |
— |
— |
|
|
— |
|
CCP2 |
— |
|
— |
— |
— |
|
— |
||||
RD3 |
41 |
— |
SEG16 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD4 |
2 |
— |
SEG17 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD5 |
3 |
— |
SEG18 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD6 |
4 |
— |
SEG19 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD7 |
5 |
— |
SEG20 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE0 |
25 |
AN5 |
SEG21 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE1 |
26 |
AN6 |
SEG22 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE2 |
27 |
AN7 |
SEG23 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE3 |
18 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y(1) |
|
|
PP |
|||
|
|
|
|
MCLR/V |
||||||||||||||||
— |
7 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
28 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
6 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
— |
29 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
— |
12 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
NC |
||||
— |
13 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
NC |
||||
— |
33 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
NC |
||||
— |
34 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
NC |
||||
Note |
1: |
Pull-up enabled only with external |
|
configuration. |
|
|
|
|
|
|
|
|
|
|
||||||
MCLR |
|
|
|
|
|
|
|
|
|
|
||||||||||
DS41250F-page 8 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
TABLE 5: |
PIC16F914/917 44-PIN (QFN) SUMMARY |
|
|
|
|
|
|
|
|
|||||||||||
I/O |
Pin |
A/D |
LCD |
Comparators |
|
Timers |
|
CCP |
AUSART |
SSP |
Interrupt |
Pull-Up |
|
Basic |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA0 |
19 |
AN0 |
SEG12 |
C1- |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA1 |
20 |
AN1 |
SEG7 |
C2- |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA2 |
21 |
AN2/VREF- |
COM2 |
C2+ |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA3 |
22 |
AN3/VREF+ |
SEG15 |
C1+ |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RA4 |
23 |
— |
SEG4 |
C1OUT |
|
T0CKI |
|
— |
— |
|
— |
— |
— |
|
— |
|||||
RA5 |
24 |
AN4 |
SEG5 |
C2OUT |
|
|
— |
|
— |
— |
|
|
|
— |
— |
|
— |
|||
SS |
||||||||||||||||||||
RA6 |
33 |
— |
— |
— |
|
T1OSO |
|
— |
— |
|
— |
— |
— |
OSC2/CLKOUT |
||||||
RA7 |
32 |
— |
— |
— |
|
T1OSI |
|
— |
— |
|
— |
— |
— |
OSC1/CLKIN |
||||||
RB0 |
9 |
— |
SEG0 |
— |
|
|
— |
|
— |
— |
|
— |
INT |
Y |
|
— |
||||
RB1 |
10 |
— |
SEG1 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB2 |
11 |
— |
SEG2 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB3 |
12 |
— |
SEG3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y |
|
— |
||||
RB4 |
14 |
— |
COM0 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB5 |
15 |
— |
COM1 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
|
— |
||||
RB6 |
16 |
— |
SEG14 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPCLK/ICDCK |
|||||
RB7 |
17 |
— |
SEG13 |
— |
|
|
— |
|
— |
— |
|
— |
IOC |
Y |
ICSPDAT/ICDDAT |
|||||
RC0 |
34 |
— |
VLCD1 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC1 |
35 |
— |
VLCD2 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC2 |
36 |
— |
VLCD3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC3 |
37 |
— |
SEG6 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RC4 |
42 |
— |
SEG11 |
— |
|
|
T1G |
|
|
— |
— |
SDO |
— |
— |
|
— |
||||
RC5 |
43 |
— |
SEG10 |
— |
|
T1CKI |
|
CCP1 |
— |
|
— |
— |
— |
|
— |
|||||
RC6 |
44 |
— |
SEG9 |
— |
|
|
— |
|
— |
TX/CK |
SCK/SCL |
— |
— |
|
— |
|||||
RC7 |
1 |
— |
SEG8 |
— |
|
|
— |
|
— |
RX/DT |
SDI/SDA |
— |
— |
|
— |
|||||
RD0 |
38 |
— |
COM3 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD1 |
39 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD2 |
40 |
— |
— |
— |
|
|
— |
|
CCP2 |
— |
|
— |
— |
— |
|
— |
||||
RD3 |
41 |
— |
SEG16 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD4 |
2 |
— |
SEG17 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD5 |
3 |
— |
SEG18 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD6 |
4 |
— |
SEG19 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RD7 |
5 |
— |
SEG20 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE0 |
25 |
AN5 |
SEG21 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE1 |
26 |
AN6 |
SEG22 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE2 |
27 |
AN7 |
SEG23 |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
— |
||||
RE3 |
18 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
Y(1) |
|
|
PP |
|||
|
|
|
|
MCLR/V |
||||||||||||||||
— |
7 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
8 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
28 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VDD |
||||
— |
6 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
— |
30 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
VSS |
||||
— |
13 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
NC |
||||
— |
29 |
— |
— |
— |
|
|
— |
|
— |
— |
|
— |
— |
— |
|
NC |
||||
Note |
1: |
Pull-up enabled only with external |
|
configuration. |
|
|
|
|
|
|
|
|
|
|
||||||
MCLR |
|
|
|
|
|
|
|
|
|
|
||||||||||
♥ 2007 Microchip Technology Inc. |
DS41250F-page 9 |
PIC16F913/914/916/917/946
Pin Diagram – PIC16F946
64-pin TQFP
RD6/SEG19 
1 RD7/SEG20 
2 RG0/SEG36 
3 RG1/SEG37 
4 RG2/SEG38 
5 RG3/SEG39 
6 RG4/SEG40 
7 RG5/SEG41 
8
VSS 
9
VDD 
10 RF0/SEG32 
11 RF1/SEG33 
12 RF2/SEG34 
13 RF3/SEG35 
14
RB0/INT/SEG0 
15 RB1/SEG1 
16
VV RD5/SEG18RD4/SEG17RC7/RX/DT/SDI/SDA/SEG8RC6/TX/CK/SCK/SCL/SEG9RC5/T1CKI/CCP1/SEG10RC4/T1G/SDO/SEG11RD3/SEG16DDSSRD2/CCP2RD1RD0/COM3RC3/SEG6RC2/VLCD3RC1/VLCD2RC0/VLCD1
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
PIC16F946
17 18 19 20 21 22 |
23 24 25 26 27 28 29 30 31 32 |
||||||||||||||||||||||||||||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RB2/SEG2 RB3/SEG3 VDD VSS RB4/COM0 RB5/COM1 |
RB6/ICSPCLK/ICDCK/SEG14 RB7/ICSPDAT/ICDDAT/SEG13 AVSS AVDD RA0/AN0/C1-/SEG12 RA1/AN1/C2-/SEG7 RA2/AN2/C2+/VREF-/COM2 RA3/AN3/C1+/VREF+/SEG15 RA4/C1OUT/T0CKI/SEG4 |
|
RA5/AN4/C2OUT/SS/SEG5 |
||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||
|
|||||||||||||||||||||||||||||||||
48 |
|
RF7/SEG31 |
||
|
||||
47 |
|
RF6/SEG30 |
||
|
||||
46 |
|
RF5/SEG29 |
||
|
||||
45 |
|
RF4/SEG28 |
||
|
||||
44 |
|
RE7/SEG27 |
||
|
||||
43 |
|
RE6/SEG26 |
||
|
||||
42 |
|
RE5/SEG25 |
||
|
||||
41 |
|
VSS |
||
|
||||
40 |
|
RA6/OSC2/CLKOUT/T1OSO |
||
|
||||
39 |
|
RA7/OSC1/CLKIN/T1OSI |
||
|
||||
38 |
|
VDD |
||
|
||||
37 |
|
RE4/SEG24 |
||
|
||||
36 |
|
|
|
|
|
RE3/MCLR/V |
PP |
||
|
||||
35 |
|
RE2/AN7/SEG23 |
||
|
||||
34 |
|
RE1/AN6/SEG22 |
||
|
||||
|
||||
33 |
|
RE0/AN5/SEG21 |
||
|
||||
|
||||
|
|
|
|
|
DS41250F-page 10 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
TABLE 6: |
PIC16F946 64-PIN (TQFP) SUMMARY |
|
|
|
|
|
|
|
|
|
||||||||||
I/O |
Pin |
A/D |
LCD |
Comparators |
Timers |
|
CCP |
|
AUSART |
SSP |
Interrupt |
Pull-Up |
|
Basic |
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RA0 |
27 |
AN0 |
SEG12 |
C1- |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RA1 |
28 |
AN1 |
SEG7 |
C2- |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RA2 |
29 |
AN2/VREF- |
COM2 |
C2+ |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RA3 |
30 |
AN3/VREF+ |
SEG15 |
C1+ |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RA4 |
31 |
— |
SEG4 |
C1OUT |
T0CKI |
|
— |
|
— |
|
— |
— |
— |
|
— |
|||||
RA5 |
32 |
AN4 |
— |
C2OUT |
|
— |
|
— |
|
— |
|
|
|
— |
— |
|
— |
|||
SS |
||||||||||||||||||||
RA6 |
40 |
SEG5 |
— |
— |
T1OSO |
|
— |
|
— |
|
— |
— |
— |
OSC2/CLKOUT |
||||||
RA7 |
39 |
— |
— |
— |
T1OSI |
|
— |
|
— |
|
— |
— |
— |
OSC1/CLKIN |
||||||
RB0 |
15 |
— |
SEG0 |
— |
|
— |
|
— |
|
— |
|
— |
INT |
Y |
|
— |
||||
RB1 |
16 |
— |
SEG1 |
— |
|
— |
|
— |
|
— |
|
— |
— |
Y |
|
— |
||||
RB2 |
17 |
— |
SEG2 |
— |
|
— |
|
— |
|
— |
|
— |
— |
Y |
|
— |
||||
RB3 |
18 |
— |
SEG3 |
— |
|
— |
|
— |
|
— |
|
— |
— |
Y |
|
— |
||||
RB4 |
21 |
— |
COM0 |
— |
|
— |
|
— |
|
— |
|
— |
IOC |
Y |
|
— |
||||
RB5 |
22 |
— |
COM1 |
— |
|
— |
|
— |
|
— |
|
— |
IOC |
Y |
|
— |
||||
RB6 |
23 |
— |
SEG14 |
— |
|
— |
|
— |
|
— |
|
— |
IOC |
Y |
ICSPCLK/ICDCK |
|||||
RB7 |
24 |
— |
SEG13 |
— |
|
— |
|
— |
|
— |
|
— |
IOC |
Y |
ICSPDAT/ICDDAT |
|||||
RC0 |
49 |
— |
VLCD1 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RC1 |
50 |
— |
VLCD2 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RC2 |
51 |
— |
VLCD3 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RC3 |
52 |
— |
SEG6 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RC4 |
59 |
— |
SEG11 |
— |
|
|
|
|
— |
|
— |
SDO |
— |
— |
|
— |
||||
|
T1G |
|||||||||||||||||||
RC5 |
60 |
— |
SEG10 |
— |
T1CKI |
|
CCP1 |
|
— |
|
— |
— |
— |
|
— |
|||||
RC6 |
61 |
— |
SEG9 |
— |
|
— |
|
— |
|
TX/CK |
SCK/SCL |
— |
— |
|
— |
|||||
RC7 |
62 |
— |
SEG8 |
— |
|
— |
|
— |
|
RX/DT |
SDI/SDA |
— |
— |
|
— |
|||||
RD0 |
53 |
— |
COM3 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RD1 |
54 |
— |
— |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RD2 |
55 |
— |
— |
— |
|
— |
|
CCP2 |
|
— |
|
— |
— |
— |
|
— |
||||
RD3 |
58 |
— |
SEG16 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RD4 |
63 |
— |
SEG17 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RD5 |
64 |
— |
SEG18 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RD6 |
1 |
— |
SEG19 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RD7 |
2 |
— |
SEG20 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE0 |
33 |
AN5 |
SEG21 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE1 |
34 |
AN6 |
SEG22 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE2 |
35 |
AN7 |
SEG23 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE3 |
36 |
— |
— |
— |
|
— |
|
— |
|
— |
|
— |
— |
Y(1) |
|
|
|
|||
|
|
|
MCLR/VPP |
|||||||||||||||||
RE4 |
37 |
— |
SEG24 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE5 |
42 |
— |
SEG25 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE6 |
43 |
— |
SEG26 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RE7 |
44 |
— |
SEG27 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RF0 |
11 |
— |
SEG32 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RF1 |
12 |
— |
SEG33 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
RF2 |
13 |
— |
SEG34 |
— |
|
— |
|
— |
|
— |
|
— |
— |
— |
|
— |
||||
Note |
1: |
Pull-up enabled only with external |
|
configuration. |
|
|
|
|
|
|
|
|
|
|
|
|||||
MCLR |
|
|
|
|
|
|
|
|
|
|
|
|||||||||
♥ 2007 Microchip Technology Inc. |
DS41250F-page 11 |
PIC16F913/914/916/917/946
TABLE 6: |
PIC16F946 64-PIN (TQFP) SUMMARY (CONTINUED) |
|
|
|
|||||||||
I/O |
Pin |
A/D |
LCD |
Comparators |
Timers |
|
CCP |
AUSART |
SSP |
Interrupt |
Pull-Up |
Basic |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RF3 |
14 |
— |
SEG35 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RF4 |
45 |
— |
SEG28 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RF5 |
46 |
— |
SEG29 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RF6 |
47 |
— |
SEG30 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RF7 |
48 |
— |
SEG31 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RG0 |
3 |
— |
SEG36 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RG1 |
4 |
— |
SEG37 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RG2 |
5 |
— |
SEG38 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RG3 |
6 |
— |
SEG39 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RG4 |
7 |
— |
SEG40 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
RG5 |
8 |
— |
SEG41 |
— |
— |
|
— |
— |
— |
— |
— |
— |
|
— |
26 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
AVDD |
|
— |
25 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
AVSS |
|
— |
10 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VDD |
|
— |
19 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VDD |
|
— |
38 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VDD |
|
— |
57 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VDD |
|
— |
9 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VSS |
|
— |
20 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VSS |
|
— |
41 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VSS |
|
— |
56 |
— |
— |
— |
— |
|
— |
— |
— |
— |
— |
VSS |
|
Note |
1: |
Pull-up enabled only with external |
|
configuration. |
|
|
|
|
|
|
|||
MCLR |
|
|
|
|
|
|
|||||||
DS41250F-page 12 |
♥ 2007 Microchip Technology Inc. |
|
PIC16F913/914/916/917/946 |
|
Table of Contents |
|
|
1.0 |
Device Overview ........................................................................................................................................................................ |
15 |
2.0 |
Memory Organization ................................................................................................................................................................. |
23 |
3.0 |
I/O Ports ..................................................................................................................................................................................... |
43 |
4.0 |
Oscillator Module (With Fail - Safe Clock Monitor) ....................................................................................................................... |
87 |
5.0 |
Timer0 Module ........................................................................................................................................................................... |
99 |
6.0 |
Timer1 Module with Gate Control ............................................................................................................................................. |
102 |
7.0 |
Timer2 Module ......................................................................................................................................................................... |
107 |
8.0 |
Comparator Module .................................................................................................................................................................. |
109 |
9.0 |
Addressable Universal Synchronous Asynchronous Receiver Transmitter (AUSART) ........................................................... |
121 |
10.0 |
Liquid Crystal Display (LCD) Driver Module ............................................................................................................................. |
143 |
11.0 |
Programmable Low - Voltage Detect (PLVD) Module ................................................................................................................ |
171 |
12.0 |
Analog - to - Digital Converter (ADC) Module .............................................................................................................................. |
175 |
13.0 |
Data EEPROM and Flash Program Memory Control ............................................................................................................... |
187 |
14.0 |
SSP Module Overview ............................................................................................................................................................. |
193 |
15.0 |
Capture/Compare/PWM (CCP) Module ................................................................................................................................... |
211 |
16.0 |
Special Features of the CPU .................................................................................................................................................... |
219 |
17.0 |
Instruction Set Summary .......................................................................................................................................................... |
241 |
18.0 |
Development Support ............................................................................................................................................................... |
251 |
19.0 |
Electrical Specifications ............................................................................................................................................................ |
255 |
20.0 |
DC and AC Characteristics Graphs and Tables ....................................................................................................................... |
283 |
21.0 |
Packaging Information .............................................................................................................................................................. |
305 |
Appendix A: Data Sheet Revision History.......................................................................................................................................... |
315 |
|
Appendix B: Migrating From Other PIC® Devices.............................................................................................................................. |
315 |
|
Appendix C: Conversion Considerations ........................................................................................................................................... |
316 |
|
Index |
.................................................................................................................................................................................................. |
317 |
The Microchip .....................................................................................................................................................................Web Site |
325 |
|
Customer ..............................................................................................................................................Change Notification Service |
325 |
|
Customer ..............................................................................................................................................................................Support |
325 |
|
Reader ..............................................................................................................................................................................Response |
327 |
|
Product ............................................................................................................................................................Identification System |
328 |
|
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com or fax the Reader Response Form in the back of this data sheet to (480) 792-4150. We welcome your feedback.
Most Current Data Sheet
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You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000A is version A of document DS30000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
•Microchip’s Worldwide Web site; http://www.microchip.com
•Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include literature number) you are using.
Customer Notification System
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♥ 2007 Microchip Technology Inc. |
DS41250F-page 13 |
PIC16F913/914/916/917/946
NOTES:
DS41250F-page 14 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
1.0DEVICE OVERVIEW
The PIC16F91X/946 devices are covered by this data sheet. They are available in 28/40/44/64-pin packages. Figure 1-1 shows a block diagram of the PIC16F913/916 device, Figure 1-2 shows a block diagram of the PIC16F914/917 device, and Figure 1-3 shows a block diagram of the PIC16F946 device. Table 1-1 shows the pinout descriptions.
FIGURE 1-1: PIC16F913/916 BLOCK DIAGRAM
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Direct Addr |
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MUX |
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Power-up |
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Instruction |
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Watchdog |
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Brown-out |
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||||
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Reset |
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||||
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Internal |
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RE3/MCLR |
||||
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||||||
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|
Oscillator |
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|||
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Block |
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|||||
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VDD VSS |
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Data EEPROM
256 bytes
Timer0 |
Timer1 |
Timer2 |
10-bit A/D |
Comparators |
|
CCP1 |
|
SSP |
|
Addressable |
|
PLVD |
|
LCD |
|
|
|
USART |
|
|
|||||
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|
♥ 2007 Microchip Technology Inc. |
DS41250F-page 15 |
PIC16F913/914/916/917/946 |
|
|
|
|||||
FIGURE 1-2: |
PIC16F914/917 BLOCK DIAGRAM |
|
|
|
||||
|
|
|
INT |
|
|
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|
|
Configuration |
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|
13 |
|
|
|
Data Bus |
8 |
PORTA |
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|
|
Program Counter |
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|||
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RA0 |
||
|
Flash |
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RA1 |
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|
4K/8K x 14 |
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RA2 |
|
Program |
8-Level Stack (13-bit) |
RAM |
|
|
RA3 |
||
|
|
|
RA4 |
|||||
|
Memory |
256/352 bytes |
|
|
||||
|
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|
|
RA5 |
||
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File |
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RA6 |
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Registers |
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|
Program |
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RA7 |
|
14 |
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|
||
Program Memory Read |
RAM Addr |
|
|
|||||
Bus |
|
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|
|||||
|
|
|
(PMR) |
|
9 |
|
PORTB |
|
Instruction Reg |
|
|
|
Addr MUX |
|
|
RB0 |
|
|
|
|
Indirect |
|
RB1 |
|||
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|
|
Direct Addr |
7 |
|
RB2 |
||
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|
8 |
Addr |
|
RB3 |
|
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|
FSR Reg |
|
RB4 |
|
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RB5 |
||
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RB6 |
|
8 |
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STATUS Reg |
|
RB7 |
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PORTC |
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3 |
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RC0 |
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MUX |
|
|
RC1 |
|
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|
|
Power-up |
|
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|
||
|
|
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|
|
RC2 |
|
|
Instruction |
|
Timer |
|
|
|
|
RC3 |
|
|
|
|
|
|
|
||
|
|
Oscillator |
|
|
|
|
RC4 |
|
|
Decode and |
|
|
|
|
|
||
|
|
|
ALU |
|
|
RC5 |
||
|
Control |
Start-up Timer |
|
|
|
|||
|
|
|
|
RC6 |
||||
OSC1/CLKIN |
|
|
Power-on |
|
|
|
|
|
|
|
8 |
|
|
|
RC7 |
||
|
Timing |
|
Reset |
|
|
|
|
|
OSC2/CLKOUT |
|
Watchdog |
|
W Reg |
|
PORTD |
|
|
Generation |
|
|
|
|
||||
|
|
|
|
RD0 |
||||
|
|
|
Timer |
|
|
|
|
|
|
|
Brown-out |
|
|
|
|
RD1 |
|
|
|
|
|
|
|
RD2 |
||
|
|
|
Reset |
|
|
|
|
|
Internal |
|
|
|
|
|
|
RD3 |
|
|
|
|
|
|
|
|
||
|
|
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|
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|
|
RD4 |
|
Oscillator |
|
|
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|
|
|
RD5 |
|
Block |
|
|
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|
|
|
|
RD6 |
|
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|
|
VDD |
VSS |
|
|
|
|
RD7 |
|
|
|
|
|
|
|
|
PORTE |
RE0 |
|
|
|
|
|
|
|
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|
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|
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|
|
RE1 |
|
|
|
|
|
|
|
|
RE2 |
|
|
|
|
|
|
|
|
RE3/MCLR |
Timer0 |
Timer1 |
|
|
Timer2 |
10-bit A/D |
|
Data EEPROM |
|
|
|
|
|
|
|
|
|
256 bytes |
Comparators |
CCP1 |
|
CCP2 |
SSP |
Addressable |
PLVD |
LCD |
|
|
USART |
|||||||
|
|
|
|
|
|
|
||
DS41250F-page 16 |
♥ 2007 Microchip Technology Inc. |
|
|
|
|
PIC16F913/914/916/917/946 |
||||
FIGURE 1-3: |
PIC16F946 BLOCK DIAGRAM |
|
|
|
||||
|
|
|
INT |
|
|
|
PORTA |
|
Configuration |
|
|
|
|
|
RA0 |
||
|
|
|
|
|
|
|||
|
|
13 |
|
|
|
8 |
|
|
|
|
|
|
Data Bus |
|
RA1 |
||
|
|
|
Program Counter |
|
|
|||
|
|
|
|
|
|
RA2 |
||
|
Flash |
|
|
|
|
|
|
RA3 |
|
8K x 14 |
|
|
|
|
|
|
RA4 |
|
|
|
|
|
|
|
RA5 |
|
|
Program |
|
|
|
RAM |
|
|
|
|
8-Level Stack (13-bit) |
|
|
RA6 |
||||
|
Memory |
336 x 8 bytes |
|
|||||
|
|
|
|
|
RA7 |
|||
|
|
|
|
|
File |
|
PORTB |
|
|
|
|
|
|
Registers |
|
|
|
Program |
|
|
|
|
|
|
RB0 |
|
14 |
|
|
|
|
|
|
||
Program Memory Read |
RAM Addr |
|
RB1 |
|||||
Bus |
|
|
||||||
|
|
|
(PMR) |
|
9 |
|
|
RB2 |
|
|
|
|
|
Addr MUX |
|
|
RB3 |
Instruction Reg |
|
|
|
|
|
RB4 |
||
|
|
|
|
|
|
|||
|
|
7 |
|
Indirect |
|
RB5 |
||
|
|
Direct Addr |
8 |
|
||||
|
|
|
|
|
Addr |
|
RB6 |
|
|
|
|
|
|
FSR Reg |
|
RB7 |
|
|
|
|
|
|
PORTC |
RC0 |
||
|
|
|
|
|
|
|
|
|
|
8 |
|
|
|
STATUS Reg |
|
RC1 |
|
|
|
|
|
|
|
|
|
RC2 |
|
|
|
|
|
|
|
|
RC3 |
|
|
|
Power-up |
3 |
|
|
|
RC4 |
|
|
|
|
|
|
RC5 |
||
|
|
|
Timer |
MUX |
|
|
||
|
|
|
|
|
|
RC6 |
||
|
|
|
Oscillator |
|
|
|
|
|
|
Instruction |
|
|
|
|
|
RC7 |
|
|
Start-up Timer |
|
|
|
PORTD |
|
||
|
Decode and |
|
|
|
|
|
|
|
|
|
Power-on |
|
ALU |
|
|
RD0 |
|
|
Control |
|
|
|
|
|||
OSC1/CLKIN |
|
|
Reset |
|
|
|
|
RD1 |
|
|
Watchdog |
8 |
|
|
|
RD2 |
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
RD3 |
|
OSC2/CLKOUT |
Timing |
|
Timer |
|
|
|
|
|
Generation |
Brown-out |
|
W Reg |
|
|
RD4 |
||
|
|
|
Reset |
|
|
|
|
RD5 |
|
|
|
|
|
|
|
RD6 |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
RD7 |
Internal |
|
|
|
|
|
|
PORTE |
|
Oscillator |
|
VDD |
VSS |
|
|
|
|
RE0 |
Block |
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
RE1 |
|
|
|
|
|
|
|
|
RE2 |
|
|
|
|
|
|
|
|
RE3/MCLR |
|
|
|
|
|
|
|
|
RE4 |
|
|
|
|
|
|
|
|
RE5 |
|
|
|
|
|
|
|
|
RE6 |
|
|
|
|
|
|
|
|
RE7 |
|
|
|
|
|
|
|
PORTF |
|
|
|
|
|
|
|
|
|
RF0 |
|
|
|
|
|
|
|
|
RF1 |
|
|
|
|
|
|
|
|
RF2 |
|
|
|
|
|
|
|
|
RF3 |
|
|
|
|
|
|
|
|
RF4 |
|
|
|
|
|
|
|
|
RF5 |
|
|
|
|
|
|
|
|
RF6 |
|
|
|
|
|
|
|
|
RF7 |
|
|
|
|
|
|
|
PORTG |
|
|
|
|
|
|
|
|
|
RG0 |
|
|
|
|
|
|
|
|
RG1 |
|
|
|
|
|
|
|
|
RG2 |
|
|
|
|
|
AVDD |
AVSS |
|
RG3 |
|
|
|
|
|
|
RG4 |
||
|
|
|
|
|
|
|
|
RG5 |
|
Timer0 |
|
Timer1 |
Timer2 |
10-bit A/D |
Data EEPROM |
|
|
|
|
256 bytes |
|
|||||
|
|
|
|
|
|
|
|
|
Comparators |
CCP1 |
|
CCP2 |
SSP |
Addressable |
PLVD |
LCD |
|
|
USART |
|||||||
|
|
|
|
|
|
|
||
♥ 2007 Microchip Technology Inc. |
DS41250F-page 17 |
PIC16F913/914/916/917/946
TABLE 1-1: |
PIC16F91X/946 PINOUT DESCRIPTIONS |
|||||||
Name |
Function |
Input |
Output |
Description |
||||
|
|
|
|
|
|
Type |
Type |
|
|
|
|
|
|
||||
RA0/AN0/C1-/SEG12 |
RA0 |
TTL |
CMOS |
General purpose I/O. |
||||
|
|
|
AN0 |
AN |
— |
Analog input Channel 0. |
||
|
|
|
C1- |
AN |
— |
Comparator 1 negative input. |
||
|
|
|
SEG12 |
— |
AN |
LCD analog output. |
||
RA1/AN1/C2-/SEG7 |
RA1 |
TTL |
CMOS |
General purpose I/O. |
||||
|
|
|
AN1 |
AN |
— |
Analog input Channel 1. |
||
|
|
|
C2- |
AN |
— |
Comparator 2 negative input. |
||
|
|
|
SEG7 |
— |
AN |
LCD analog output. |
||
RA2/AN2/C2+/VREF-/COM2 |
RA2 |
TTL |
CMOS |
General purpose I/O. |
||||
|
|
|
AN2 |
AN |
— |
Analog input Channel 2. |
||
|
|
|
C2+ |
AN |
— |
Comparator 2 positive input. |
||
|
|
|
VREF- |
AN |
— |
External A/D Voltage Reference – negative. |
||
|
|
|
COM2 |
— |
AN |
LCD analog output. |
||
RA3/AN3/C1+/VREF+/COM3(1)/ |
RA3 |
TTL |
CMOS |
General purpose I/O. |
||||
SEG15 |
|
|
|
|
|
|
|
|
|
|
AN3 |
AN |
— |
Analog input Channel 3. |
|||
|
|
|
||||||
|
|
|
C1+ |
AN |
— |
Comparator 1 positive input. |
||
|
|
|
VREF+ |
AN |
— |
External A/D Voltage Reference – positive. |
||
|
|
|
COM3(1) |
— |
AN |
LCD analog output. |
||
|
|
|
SEG15 |
— |
AN |
LCD analog output. |
||
RA4/C1OUT/T0CKI/SEG4 |
RA4 |
TTL |
CMOS |
General purpose I/O. |
||||
|
|
|
C1OUT |
— |
CMOS |
Comparator 1 output. |
||
|
|
|
T0CKI |
ST |
— |
Timer0 clock input. |
||
|
|
|
SEG4 |
— |
AN |
LCD analog output. |
||
|
|
|
RA5 |
TTL |
CMOS |
General purpose I/O. |
||
RA5/AN4/C2OUT/SS/SEG5 |
|
|||||||
|
|
|
AN4 |
AN |
— |
Analog input Channel 4. |
||
|
|
|
C2OUT |
— |
CMOS |
Comparator 2 output. |
||
|
|
|
|
|
|
TTL |
— |
Slave select input. |
|
|
|
|
SS |
||||
|
|
|
SEG5 |
— |
AN |
LCD analog output. |
||
RA6/OSC2/CLKOUT/T1OSO |
RA6 |
TTL |
CMOS |
General purpose I/O. |
||||
|
|
|
OSC2 |
— |
XTAL |
Crystal/Resonator. |
||
|
|
|
CLKOUT |
— |
CMOS |
TOSC/4 reference clock. |
||
|
|
|
T1OSO |
— |
XTAL |
Timer1 oscillator output. |
||
RA7/OSC1/CLKIN/T1OSI |
RA7 |
TTL |
CMOS |
General purpose I/O. |
||||
|
|
|
OSC1 |
XTAL |
— |
Crystal/Resonator. |
||
|
|
|
CLKIN |
ST |
— |
Clock input. |
||
|
|
|
T1OSI |
XTAL |
— |
Timer1 oscillator input. |
||
RB0/INT/SEG0 |
|
|
RB0 |
TTL |
CMOS |
General purpose I/O. Individually enabled pull-up. |
||
|
|
|
INT |
ST |
— |
External interrupt pin. |
||
|
|
|
SEG0 |
— |
AN |
LCD analog output. |
||
Legend: AN |
= Analog input or output |
|
TTL |
= |
TTL compatible input |
HV |
= |
High Voltage |
CMOS = |
CMOS compatible input or output |
OD = |
Open Drain |
|
ST |
= |
Schmitt Trigger input with CMOS levels P = |
Power |
|
XTAL |
= |
Crystal |
|
|
Note 1: COM3 is available on RA3 for the PIC16F913/916 and on RD0 for the PIC16F914/917 and PIC16F946.
2:Pins available on PIC16F914/917 and PIC16F946 only.
3:Pins available on PIC16F946 only.
4:I2C Schmitt trigger inputs have special input levels.
DS41250F-page 18 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
TABLE 1-1: |
PIC16F91X/946 PINOUT DESCRIPTIONS (CONTINUED) |
||||||||
|
|
Name |
Function |
Input |
Output |
Description |
|||
|
|
|
|
|
|
|
Type |
Type |
|
|
|
|
|
|
|
|
|||
RB1/SEG1 |
|
|
RB1 |
TTL |
CMOS |
General purpose I/O. Individually enabled pull-up. |
|||
|
|
|
|
SEG1 |
— |
AN |
LCD analog output. |
||
RB2/SEG2 |
|
|
RB2 |
TTL |
CMOS |
General purpose I/O. Individually enabled pull-up. |
|||
|
|
|
|
SEG2 |
— |
AN |
LCD analog output. |
||
RB3/SEG3 |
|
|
RB3 |
TTL |
CMOS |
General purpose I/O. Individually enabled pull-up. |
|||
|
|
|
|
SEG3 |
— |
AN |
LCD analog output. |
||
RB4/COM0 |
|
|
RB4 |
TTL |
CMOS |
General purpose I/O. Individually controlled |
|||
|
|
|
|
|
|
|
|
|
interrupt-on-change. Individually enabled pull-up. |
|
|
|
|
COM0 |
— |
AN |
LCD analog output. |
||
RB5/COM1 |
|
|
RB5 |
TTL |
CMOS |
General purpose I/O. Individually controlled |
|||
|
|
|
|
|
|
|
|
|
interrupt-on-change. Individually enabled pull-up. |
|
|
|
|
COM1 |
— |
AN |
LCD analog output. |
||
RB6/ICSPCLK/ICDCK/SEG14 |
RB6 |
TTL |
CMOS |
General purpose I/O. Individually controlled |
|||||
|
|
|
|
|
|
|
|
|
interrupt-on-change. Individually enabled pull-up. |
|
|
|
|
ICSPCLK |
ST |
— |
ICSP™ clock. |
||
|
|
|
|
ICDCK |
ST |
— |
ICD clock. |
||
|
|
|
|
SEG14 |
— |
AN |
LCD analog output. |
||
RB7/ICSPDAT/ICDDAT/SEG13 |
|
RB7 |
TTL |
CMOS |
General purpose I/O. Individually controlled inter- |
||||
|
|
|
|
|
|
|
|
|
rupt-on-change. Individually enabled pull-up. |
|
|
|
|
ICSPDAT |
ST |
CMOS |
ICSP Data I/O. |
||
|
|
|
|
ICDDAT |
ST |
CMOS |
ICD Data I/O. |
||
|
|
|
|
SEG13 |
— |
AN |
LCD analog output. |
||
RC0/VLCD1 |
|
RC0 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
VLCD1 |
AN |
— |
LCD analog input. |
||
RC1/VLCD2 |
|
RC1 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
VLCD2 |
AN |
— |
LCD analog input. |
||
RC2/VLCD3 |
|
RC2 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
VLCD3 |
AN |
— |
LCD analog input. |
||
RC3/SEG6 |
|
RC3 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
SEG6 |
— |
AN |
LCD analog output. |
||
|
|
|
|
RC4 |
ST |
CMOS |
General purpose I/O. |
||
RC4/T1G/SDO/SEG11 |
|||||||||
|
|
|
|
|
|
|
ST |
— |
Timer1 gate input. |
|
|
|
|
|
T1G |
||||
|
|
|
|
SDO |
— |
CMOS |
Serial data output. |
||
|
|
|
|
SEG11 |
— |
AN |
LCD analog output. |
||
RC5/T1CKI/CCP1/SEG10 |
RC5 |
ST |
CMOS |
General purpose I/O. |
|||||
|
|
|
|
T1CKI |
ST |
— |
Timer1 clock input. |
||
|
|
|
|
CCP1 |
ST |
CMOS |
Capture 1 input/Compare 1 output/PWM 1 output. |
||
|
|
|
|
SEG10 |
— |
AN |
LCD analog output. |
||
Legend: AN |
= Analog input or output |
|
TTL |
= |
TTL compatible input |
HV |
= |
High Voltage |
CMOS = |
CMOS compatible input or output |
OD = |
Open Drain |
|
ST |
= |
Schmitt Trigger input with CMOS levels P = |
Power |
|
XTAL |
= |
Crystal |
|
|
Note 1: COM3 is available on RA3 for the PIC16F913/916 and on RD0 for the PIC16F914/917 and PIC16F946.
2:Pins available on PIC16F914/917 and PIC16F946 only.
3:Pins available on PIC16F946 only.
4:I2C Schmitt trigger inputs have special input levels.
♥ 2007 Microchip Technology Inc. |
DS41250F-page 19 |
PIC16F913/914/916/917/946
TABLE 1-1: |
PIC16F91X/946 PINOUT DESCRIPTIONS (CONTINUED) |
||||||||
|
|
Name |
Function |
Input |
Output |
Description |
|||
|
|
|
|
|
|
|
Type |
Type |
|
|
|
|
|
|
|
||||
RC6/TX/CK/SCK/SCL/SEG9 |
|
RC6 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
|
TX |
— |
CMOS |
USART asynchronous serial transmit. |
|
|
|
|
|
|
CK |
ST |
CMOS |
USART synchronous serial clock. |
|
|
|
|
|
|
SCK |
ST |
CMOS |
SPI clock. |
|
|
|
|
|
|
SCL |
ST(4) |
OD |
I2C™ clock. |
|
|
|
|
|
|
SEG9 |
— |
AN |
LCD analog output. |
|
RC7/RX/DT/SDI/SDA/SEG8 |
|
RC7 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
|
RX |
ST |
— |
USART asynchronous serial receive. |
|
|
|
|
|
|
DT |
ST |
CMOS |
USART synchronous serial data. |
|
|
|
|
|
|
SDI |
ST |
CMOS |
SPI data input. |
|
|
|
|
|
|
SDA |
ST(4) |
OD |
I2C™ data. |
|
|
|
|
|
|
SEG8 |
— |
AN |
LCD analog output. |
|
RD0/COM3(1, 2) |
|
|
RD0 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
COM3 |
— |
AN |
LCD analog output. |
||
RD1(2) |
|
|
RD1 |
ST |
CMOS |
General purpose I/O. |
|||
RD2/CCP2(2) |
|
|
RD2 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
|
CCP2 |
ST |
CMOS |
Capture 2 input/Compare 2 output/PWM 2 output. |
|
RD3/SEG16(2) |
|
|
RD3 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
SEG16 |
— |
AN |
LCD analog output. |
||
RD4/SEG17(2) |
|
|
RD4 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
SEG17 |
— |
AN |
LCD analog output. |
||
RD5/SEG18(2) |
|
|
RD5 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
SEG18 |
— |
AN |
LCD analog output. |
||
RD6/SEG19(2) |
|
|
RD6 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
SEG19 |
— |
AN |
LCD analog output. |
||
RD7/SEG20(2) |
|
|
RD7 |
ST |
CMOS |
General purpose I/O. |
|||
|
|
|
|
SEG20 |
— |
AN |
LCD analog output. |
||
RE0/AN5/SEG21(2) |
|
RE0 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
|
AN5 |
AN |
— |
Analog input Channel 5. |
|
|
|
|
|
SEG21 |
— |
AN |
LCD analog output. |
||
RE1/AN6/SEG22(2) |
|
RE1 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
|
AN6 |
AN |
— |
Analog input Channel 6. |
|
|
|
|
|
SEG22 |
— |
AN |
LCD analog output. |
||
RE2/AN7/SEG23(2) |
|
RE2 |
ST |
CMOS |
General purpose I/O. |
||||
|
|
|
|
|
AN7 |
AN |
— |
Analog input Channel 7. |
|
|
|
|
|
SEG23 |
— |
AN |
LCD analog output. |
||
|
|
|
|
|
RE3 |
ST |
— |
Digital input only. |
|
RE3/MCLR/V |
PP |
|
|
||||||
|
|
|
|
|
|
|
ST |
— |
Master Clear with internal pull-up. |
|
|
|
|
|
MCLR |
||||
|
|
|
|
|
VPP |
HV |
— |
Programming voltage. |
|
Legend: AN |
= Analog input or output |
|
TTL |
= |
TTL compatible input |
HV |
= |
High Voltage |
CMOS = |
CMOS compatible input or output |
OD = |
Open Drain |
|
ST |
= |
Schmitt Trigger input with CMOS levels P = |
Power |
|
XTAL |
= |
Crystal |
|
|
Note 1: COM3 is available on RA3 for the PIC16F913/916 and on RD0 for the PIC16F914/917 and PIC16F946.
2:Pins available on PIC16F914/917 and PIC16F946 only.
3:Pins available on PIC16F946 only.
4:I2C Schmitt trigger inputs have special input levels.
DS41250F-page 20 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
TABLE 1-1: |
PIC16F91X/946 PINOUT DESCRIPTIONS (CONTINUED) |
||||
Name |
Function |
Input |
Output |
Description |
|
|
|
|
Type |
Type |
|
|
|
|
|
|
|
RE4/SEG24(3) |
|
RE4 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG24 |
— |
AN |
LCD analog output. |
RE5/SEG25(3) |
|
RE5 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG25 |
— |
AN |
LCD analog output. |
RE6/SEG26(3) |
|
RE6 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG26 |
— |
AN |
LCD analog output. |
RE7/SEG27(3) |
|
RE7 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG27 |
— |
AN |
LCD analog output. |
RF0/SEG32(3) |
|
RF0 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG32 |
— |
AN |
LCD analog output. |
RF1/SEG33(3) |
|
RF1 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG33 |
— |
AN |
LCD analog output. |
RF2/SEG34(3) |
|
RF2 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG34 |
— |
AN |
LCD analog output. |
RF3/SEG35(3) |
|
RF3 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG35 |
— |
AN |
LCD analog output. |
RF4/SEG28(3) |
|
RF4 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG28 |
— |
AN |
LCD analog output. |
RF5/SEG29(3) |
|
RF5 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG29 |
— |
AN |
LCD analog output. |
RF6/SEG30(3) |
|
RF6 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG30 |
— |
AN |
LCD analog output. |
RF7/SEG31(3) |
|
RF7 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG31 |
— |
AN |
LCD analog output. |
RG0/SEG36(3) |
|
RG0 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG36 |
— |
AN |
LCD analog output. |
RG1/SEG37(3) |
|
RG1 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG37 |
— |
AN |
LCD analog output. |
RG2/SEG38(3) |
|
RG2 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG38 |
— |
AN |
LCD analog output. |
RG3/SEG39(3) |
|
RG3 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG39 |
— |
AN |
LCD analog output. |
RG4/SEG40(3) |
|
RG4 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG10 |
— |
AN |
LCD analog output. |
RG5/SEG41(3) |
|
RG5 |
ST |
CMOS |
General purpose I/O. |
|
|
SEG41 |
— |
AN |
LCD analog output. |
AVDD(3) |
|
AVDD |
P |
— |
Analog power supply for microcontroller. |
AVSS(3) |
|
AVSS |
P |
— |
Analog ground reference for microcontroller. |
VDD |
|
VDD |
P |
— |
Power supply for microcontroller. |
Legend: AN |
= Analog input or output |
|
TTL |
= |
TTL compatible input |
HV |
= |
High Voltage |
CMOS = |
CMOS compatible input or output |
OD = |
Open Drain |
|
ST |
= |
Schmitt Trigger input with CMOS levels P = |
Power |
|
XTAL |
= |
Crystal |
|
|
Note 1: COM3 is available on RA3 for the PIC16F913/916 and on RD0 for the PIC16F914/917 and PIC16F946.
2:Pins available on PIC16F914/917 and PIC16F946 only.
3:Pins available on PIC16F946 only.
4:I2C Schmitt trigger inputs have special input levels.
♥ 2007 Microchip Technology Inc. |
DS41250F-page 21 |
PIC16F913/914/916/917/946
TABLE 1-1: PIC16F91X/946 PINOUT DESCRIPTIONS (CONTINUED)
Name |
Function |
Input |
Output |
Description |
|
|
Type |
Type |
|
VSS |
VSS |
P |
— |
Ground reference for microcontroller. |
Legend: AN |
= Analog input or output |
|
TTL |
= |
TTL compatible input |
HV |
= |
High Voltage |
CMOS = |
CMOS compatible input or output |
OD = |
Open Drain |
|
ST |
= |
Schmitt Trigger input with CMOS levels P = |
Power |
|
XTAL |
= |
Crystal |
|
|
Note 1: COM3 is available on RA3 for the PIC16F913/916 and on RD0 for the PIC16F914/917 and PIC16F946.
2:Pins available on PIC16F914/917 and PIC16F946 only.
3:Pins available on PIC16F946 only.
4:I2C Schmitt trigger inputs have special input levels.
DS41250F-page 22 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
2.0MEMORY ORGANIZATION
2.1Program Memory Organization
The PIC16F91X/946 has a 13-bit program counter capable of addressing a 4K x 14 program memory space for the PIC16F913/914 (0000h-0FFFh) and an 8K x 14 program memory space for the PIC16F916/ 917 and PIC16F946 (0000h-1FFFh). Accessing a location above the memory boundaries for the PIC16F913 and PIC16F914 will cause a wrap around within the first 4K x 14 space. The Reset vector is at 0000h and the interrupt vector is at 0004h.
FIGURE 2-1: PROGRAM MEMORY MAP AND STACK FOR THE PIC16F913/914
|
|
pc<12:0> |
|
|
|
|
||
CALL, RETURN |
|
|
13 |
|
|
|
||
|
|
|
|
|
||||
RETFIE, RETLW |
|
|
|
|
|
|
||
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
||
|
|
Stack Level 1 |
|
|
|
|||
|
|
Stack Level 2 |
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
Stack Level 8 |
|
|
|
|||
|
|
|
|
0000h |
|
|||
|
|
Reset Vector |
|
|||||
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Interrupt Vector |
0004h |
|
||||
On-chip |
|
Page 0 |
|
0005h |
|
|||
|
|
|
||||||
|
|
07FFh |
|
|||||
|
|
|
|
|
|
|||
Program |
|
|
|
|
|
|||
|
|
|
|
0800h |
|
|||
Memory |
|
Page 1 |
|
|
||||
|
|
|
||||||
|
|
|
|
|
||||
|
|
|
0FFFh |
|
||||
|
|
|
|
|
|
|
||
|
|
|
|
|
|
1000h |
|
|
|
|
|
|
|
|
|
||
1FFFh
FIGURE 2-2: PROGRAM MEMORY MAP AND STACK FOR THE PIC16F916/917/PIC16F946
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
pc<12:0> |
|
|
|
|
|
|||||
CALL, RETURN |
|
|
|
|
|
13 |
|
|
|
|
||
|
|
|
|
|
|
|||||||
RETFIE, RETLW |
|
|
|
|
|
|
|
|
|
|
||
|
|
|
|
|
|
|
|
|
|
|||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Stack Level 1 |
|
|
|
|
||||||
|
|
Stack Level 2 |
|
|
|
|
||||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Stack Level 8 |
|
|
|
|
||||||
|
|
|
|
0000h |
|
|
||||||
|
|
Reset Vector |
|
|
||||||||
|
|
|
|
|
|
|
|
|||||
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Interrupt Vector |
0004h |
|
|
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Program |
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Memory |
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♥ 2007 Microchip Technology Inc. |
DS41250F-page 23 |
PIC16F913/914/916/917/946
2.2Data Memory Organization
The data memory is partitioned into multiple banks which contain the General Purpose Registers (GPRs) and the Special Function Registers (SFRs). Bits RP0 and RP1 are bank select bits.
RP1 |
RP0 |
|
|
0 |
0 |
→ Bank 0 is selected |
|
0 |
1 |
→ Bank 1 is selected |
|
1 |
0 |
→ |
Bank 2 is selected |
1 |
1 |
→ |
Bank 3 is selected |
Each bank extends up to 7Fh (128 bytes). The lower locations of each bank are reserved for the Special Function Registers. Above the Special Function Registers are the General Purpose Registers, implemented as static RAM. All implemented banks contain Special Function Registers. Some frequently used Special Function Registers from one bank are mirrored in another bank for code reduction and quicker access.
2.2.1GENERAL PURPOSE REGISTER FILE
The register file is organized as 256 x 8 bits in the PIC16F913/914, 352 x 8 bits in the PIC16F916/917 and 336 x 8 bits in the PIC16F946. Each register is accessed either directly or indirectly through the File Select Register (FSR) (see Section 2.5 “Indirect Addressing, INDF and FSR Registers”).
2.2.2SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by the CPU and peripheral functions for controlling the desired operation of the device (see Tables 2-1, 2-2, 2-3 and 2-4). These registers are static RAM.
The Special Function Registers can be classified into two sets: core and peripheral. The Special Function Registers associated with the “core” are described in this section. Those related to the operation of the peripheral features are described in the section of that peripheral feature.
DS41250F-page 24 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
FIGURE 2-3: |
PIC16F913/916 SPECIAL FUNCTION REGISTERS |
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File |
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File |
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File |
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File |
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Address |
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Address |
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Address |
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Address |
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|
Indirect addr. (1) |
00h |
Indirect addr. (1) |
80h |
Indirect addr. (1) |
100h |
|
Indirect addr. (1) |
|
180h |
|||||
|
TMR0 |
01h |
OPTION_REG |
81h |
TMR0 |
101h |
|
OPTION_REG |
|
181h |
|||||
|
PCL |
02h |
PCL |
82h |
PCL |
102h |
|
PCL |
|
182h |
|||||
|
STATUS |
03h |
STATUS |
83h |
STATUS |
103h |
|
STATUS |
|
183h |
|||||
|
FSR |
04h |
FSR |
84h |
FSR |
104h |
|
FSR |
|
184h |
|||||
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PORTA |
05h |
TRISA |
85h |
WDTCON |
105h |
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|
185h |
|||||
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PORTB |
06h |
TRISB |
86h |
PORTB |
106h |
|
TRISB |
|
186h |
|||||
|
PORTC |
07h |
TRISC |
87h |
LCDCON |
107h |
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|
187h |
|||||
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|
08h |
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|
88h |
LCDPS |
108h |
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|
188h |
||
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PORTE |
09h |
TRISE |
89h |
LVDCON |
109h |
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|
189h |
|||||
|
PCLATH |
0Ah |
PCLATH |
8Ah |
PCLATH |
10Ah |
|
PCLATH |
|
18Ah |
|||||
|
INTCON |
0Bh |
INTCON |
8Bh |
INTCON |
10Bh |
|
INTCON |
|
18Bh |
|||||
|
PIR1 |
0Ch |
PIE1 |
8Ch |
EEDATL |
10Ch |
|
EECON1 |
|
18Ch |
|||||
|
PIR2 |
0Dh |
PIE2 |
8Dh |
EEADRL |
10Dh |
|
EECON2(1) |
|
18Dh |
|||||
|
TMR1L |
0Eh |
PCON |
8Eh |
EEDATH |
10Eh |
|
Reserved |
|
18Eh |
|||||
|
TMR1H |
0Fh |
OSCCON |
8Fh |
EEADRH |
10Fh |
|
Reserved |
|
18Fh |
|||||
|
T1CON |
10h |
OSCTUNE |
90h |
LCDDATA0 |
110h |
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|
190h |
|||||
|
TMR2 |
11h |
ANSEL |
91h |
LCDDATA1 |
111h |
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T2CON |
12h |
PR2 |
92h |
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|
112h |
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||||
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SSPBUF |
13h |
SSPADD |
93h |
LCDDATA3 |
113h |
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|||||
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SSPCON |
14h |
SSPSTAT |
94h |
LCDDATA4 |
114h |
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|||||
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CCPR1L |
15h |
WPUB |
95h |
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|
115h |
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||||
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CCPR1H |
16h |
IOCB |
96h |
LCDDATA6 |
116h |
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|||||
|
CCP1CON |
17h |
CMCON1 |
97h |
LCDDATA7 |
117h |
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|||||
|
RCSTA |
18h |
TXSTA |
98h |
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|
118h |
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||||
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TXREG |
19h |
SPBRG |
99h |
LCDDATA9 |
119h |
|
General |
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|||||
|
RCREG |
1Ah |
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|
9Ah |
LCDDATA10 |
11Ah |
|
Purpose |
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||||
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1Bh |
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9Bh |
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11Bh |
|
Register(2) |
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1Ch |
CMCON0 |
9Ch |
LCDSE0 |
11Ch |
|
96 Bytes |
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|||
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1Dh |
VRCON |
9Dh |
LCDSE1 |
11Dh |
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||||
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ADRESH |
1Eh |
ADRESL |
9Eh |
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11Eh |
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ADCON0 |
1Fh |
ADCON1 |
9Fh |
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11Fh |
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||||
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20h |
General |
A0h |
General |
120h |
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||||
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General |
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Purpose |
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Purpose |
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||||
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Purpose |
|
Register |
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Register |
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||||
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Register |
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80 Bytes |
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80 Bytes |
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||||
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96 Bytes |
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EFh |
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|
16Fh |
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1EFh |
|||
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||||
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accesses |
|
F0h |
|
accesses |
|
170h |
|
accesses |
|
1F0h |
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||||||
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|
7Fh |
70h-7Fh |
|
FFh |
|
70h-7Fh |
|
17Fh |
|
70h-7Fh |
|
1FFh |
|
Bank 0 |
|
Bank 1 |
|
|
|
Bank 2 |
|
|
|
Bank 3 |
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||
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|
|
Unimplemented data memory locations, read as ‘0’. |
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|
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|||||||
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||||||||
|
Note 1: Not a physical register. |
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|
|||||
2:On the PIC16F913, unimplemented data memory locations, read as ‘0’.
♥ 2007 Microchip Technology Inc. |
DS41250F-page 25 |
PIC16F913/914/916/917/946
FIGURE 2-4: |
PIC16F914/917 SPECIAL FUNCTION REGISTERS |
|
|
|
|
||||||||||
|
|
|
|
File |
|
|
File |
|
|
File |
|
|
|
File |
|
|
|
|
|
Address |
|
|
Address |
|
|
Address |
|
|
|
Address |
|
|
Indirect addr. (1) |
00h |
Indirect addr. (1) |
|
80h |
Indirect addr. (1) |
100h |
|
Indirect addr. (1) |
|
180h |
||||
|
TMR0 |
01h |
OPTION_REG |
|
81h |
TMR0 |
101h |
|
OPTION_REG |
|
181h |
||||
|
PCL |
02h |
PCL |
|
82h |
PCL |
102h |
|
PCL |
|
182h |
||||
|
STATUS |
03h |
STATUS |
|
83h |
STATUS |
103h |
|
STATUS |
|
183h |
||||
|
FSR |
04h |
FSR |
|
84h |
FSR |
104h |
|
FSR |
|
184h |
||||
|
PORTA |
05h |
TRISA |
|
85h |
WDTCON |
105h |
|
|
|
185h |
||||
|
PORTB |
06h |
TRISB |
|
86h |
PORTB |
106h |
|
TRISB |
|
186h |
||||
|
PORTC |
07h |
TRISC |
|
87h |
LCDCON |
107h |
|
|
|
187h |
||||
|
PORTD |
08h |
TRISD |
|
88h |
LCDPS |
108h |
|
|
|
188h |
||||
|
PORTE |
09h |
TRISE |
|
89h |
LVDCON |
109h |
|
|
|
189h |
||||
|
PCLATH |
0Ah |
PCLATH |
|
8Ah |
PCLATH |
10Ah |
|
PCLATH |
|
18Ah |
||||
|
INTCON |
0Bh |
INTCON |
|
8Bh |
INTCON |
10Bh |
|
INTCON |
|
18Bh |
||||
|
PIR1 |
0Ch |
PIE1 |
|
8Ch |
EEDATL |
10Ch |
|
EECON1 |
|
18Ch |
||||
|
PIR2 |
0Dh |
PIE2 |
|
8Dh |
EEADRL |
10Dh |
|
EECON2(1) |
|
18Dh |
||||
|
TMR1L |
0Eh |
PCON |
|
8Eh |
EEDATH |
10Eh |
|
Reserved |
|
18Eh |
||||
|
TMR1H |
0Fh |
OSCCON |
|
8Fh |
EEADRH |
10Fh |
|
Reserved |
|
18Fh |
||||
|
T1CON |
10h |
OSCTUNE |
|
90h |
LCDDATA0 |
110h |
|
|
|
190h |
||||
|
TMR2 |
11h |
ANSEL |
|
91h |
LCDDATA1 |
111h |
|
|
|
|
||||
|
T2CON |
12h |
PR2 |
|
92h |
LCDDATA2 |
112h |
|
|
|
|
||||
|
SSPBUF |
13h |
SSPADD |
|
93h |
LCDDATA3 |
113h |
|
|
|
|
||||
|
SSPCON |
14h |
SSPSTAT |
|
94h |
LCDDATA4 |
114h |
|
|
|
|
||||
|
CCPR1L |
15h |
WPUB |
|
95h |
LCDDATA5 |
115h |
|
|
|
|
||||
|
CCPR1H |
16h |
IOCB |
|
96h |
LCDDATA6 |
116h |
|
|
|
|
||||
|
CCP1CON |
17h |
CMCON1 |
|
97h |
LCDDATA7 |
117h |
|
|
|
|
||||
|
RCSTA |
18h |
TXSTA |
|
98h |
LCDDATA8 |
118h |
|
|
|
|
||||
|
TXREG |
19h |
SPBRG |
|
99h |
LCDDATA9 |
119h |
|
General |
|
|
||||
|
RCREG |
1Ah |
|
|
9Ah |
LCDDATA10 |
11Ah |
|
Purpose |
|
|
||||
|
CCPR2L |
1Bh |
|
|
9Bh |
LCDDATA11 |
11Bh |
|
Register(2) |
|
|
||||
|
CCPR2H |
1Ch |
CMCON0 |
|
9Ch |
LCDSE0 |
11Ch |
|
96 Bytes |
|
|
||||
|
CCP2CON |
1Dh |
VRCON |
|
9Dh |
LCDSE1 |
11Dh |
|
|
|
|||||
|
|
|
|
|
|
||||||||||
|
ADRESH |
1Eh |
ADRESL |
|
9Eh |
LCDSE2 |
11Eh |
|
|
|
|
||||
|
ADCON0 |
1Fh |
ADCON1 |
|
9Fh |
|
|
11Fh |
|
|
|
|
|||
|
|
|
|
20h |
General |
|
A0h |
General |
120h |
|
|
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||
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|||
|
General |
|
Purpose |
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|
Purpose |
|
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|||
|
Purpose |
|
Register |
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|
Register |
|
|
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|||
|
Register |
|
80 Bytes |
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|
80 Bytes |
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|||
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|
96 Bytes |
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|
EFh |
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|
16Fh |
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1EFh |
|||
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||||
|
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|
accesses |
|
F0h |
|
accesses |
|
170h |
|
accesses |
|
1F0h |
|
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||||||
|
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|
|
7Fh |
70h-7Fh |
|
FFh |
|
70h-7Fh |
|
17Fh |
|
70h-7Fh |
|
1FFh |
|
Bank 0 |
|
Bank 1 |
|
|
|
Bank 2 |
|
|
|
Bank 3 |
|
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||
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|
|
Unimplemented data memory locations, read as ‘0’. |
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|||||||
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||||||||
|
Note 1: Not a physical register. |
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|
|
||||
2:On the PIC16F914, unimplemented data memory locations, read as ‘0’.
DS41250F-page 26 |
♥ 2007 Microchip Technology Inc. |
PIC16F913/914/916/917/946
FIGURE 2-5: |
PIC16F946 SPECIAL FUNCTION REGISTERS |
|
|
|
||||||
|
|
|
|
File |
|
File |
|
File |
|
File |
|
|
|
|
Address |
|
Address |
|
Address |
|
Address |
|
Indirect addr. (1) |
00h |
Indirect addr. (1) |
80h |
Indirect addr. (1) |
100h |
Indirect addr. (1) |
180h |
||
|
TMR0 |
01h |
OPTION_REG |
81h |
TMR0 |
101h |
OPTION_REG |
181h |
||
|
PCL |
02h |
PCL |
82h |
PCL |
102h |
PCL |
182h |
||
|
STATUS |
03h |
STATUS |
83h |
STATUS |
103h |
STATUS |
183h |
||
|
FSR |
04h |
FSR |
84h |
FSR |
104h |
FSR |
184h |
||
|
PORTA |
05h |
TRISA |
85h |
WDTCON |
105h |
TRISF |
185h |
||
|
PORTB |
06h |
TRISB |
86h |
PORTB |
106h |
TRISB |
186h |
||
|
PORTC |
07h |
TRISC |
87h |
LCDCON |
107h |
TRISG |
187h |
||
|
PORTD |
08h |
TRISD |
88h |
LCDPS |
108h |
PORTF |
188h |
||
|
PORTE |
09h |
TRISE |
89h |
LVDCON |
109h |
PORTG |
189h |
||
|
PCLATH |
0Ah |
PCLATH |
8Ah |
PCLATH |
10Ah |
PCLATH |
18Ah |
||
|
INTCON |
0Bh |
INTCON |
8Bh |
INTCON |
10Bh |
INTCON |
18Bh |
||
|
PIR1 |
0Ch |
PIE1 |
8Ch |
EEDATL |
10Ch |
EECON1 |
18Ch |
||
|
PIR2 |
0Dh |
PIE2 |
8Dh |
EEADRL |
10Dh |
EECON2(1) |
18Dh |
||
|
TMR1L |
0Eh |
PCON |
8Eh |
EEDATH |
10Eh |
Reserved |
18Eh |
||
|
TMR1H |
0Fh |
OSCCON |
8Fh |
EEADRH |
10Fh |
Reserved |
18Fh |
||
|
T1CON |
10h |
OSCTUNE |
90h |
LCDDATA0 |
110h |
LCDDATA12 |
190h |
||
|
TMR2 |
11h |
ANSEL |
91h |
LCDDATA1 |
111h |
LCDDATA13 |
191h |
||
|
T2CON |
12h |
PR2 |
92h |
LCDDATA2 |
112h |
LCDDATA14 |
192h |
||
|
SSPBUF |
13h |
SSPADD |
93h |
LCDDATA3 |
113h |
LCDDATA15 |
193h |
||
|
SSPCON |
14h |
SSPSTAT |
94h |
LCDDATA4 |
114h |
LCDDATA16 |
194h |
||
|
CCPR1L |
15h |
WPUB |
95h |
LCDDATA5 |
115h |
LCDDATA17 |
195h |
||
|
CCPR1H |
16h |
IOCB |
96h |
LCDDATA6 |
116h |
LCDDATA18 |
196h |
||
|
CCP1CON |
17h |
CMCON1 |
97h |
LCDDATA7 |
117h |
LCDDATA19 |
197h |
||
|
RCSTA |
18h |
TXSTA |
98h |
LCDDATA8 |
118h |
LCDDATA20 |
198h |
||
|
TXREG |
19h |
SPBRG |
99h |
LCDDATA9 |
119h |
LCDDATA21 |
199h |
||
|
RCREG |
1Ah |
|
9Ah |
LCDDATA10 |
11Ah |
LCDDATA22 |
19Ah |
||
|
CCPR2L |
1Bh |
|
9Bh |
LCDDATA11 |
11Bh |
LCDDATA23 |
19Bh |
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CCPR2H |
1Ch |
CMCON0 |
9Ch |
LCDSE0 |
11Ch |
LCDSE3 |
19Ch |
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CCP2CON |
1Dh |
VRCON |
9Dh |
LCDSE1 |
11Dh |
LCDSE4 |
19Dh |
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ADRESH |
1Eh |
ADRESL |
9Eh |
LCDSE2 |
11Eh |
LCDSE5 |
19Eh |
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ADCON0 |
1Fh |
ADCON1 |
9Fh |
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11Fh |
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19Fh |
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20h |
General |
A0h |
General |
120h |
General |
1A0h |
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General |
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Purpose |
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Purpose |
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Purpose |
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Purpose |
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Register |
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Register |
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Register |
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Register |
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80 Bytes |
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80 Bytes |
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80 Bytes |
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96 Bytes |
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EFh |
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16Fh |
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1EFh |
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accesses |
F0h |
accesses |
170h |
accesses |
1F0h |
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7Fh |
70h-7Fh |
FFh |
70h-7Fh |
17Fh |
70h-7Fh |
1FFh |
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Bank 0 |
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Bank 1 |
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Bank 2 |
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Bank 3 |
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Unimplemented data memory locations, read as ‘0’. |
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Note 1: Not a physical register. |
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♥ 2007 Microchip Technology Inc. |
DS41250F-page 27 |
PIC16F913/914/916/917/946
TABLE 2-1: |
PIC16F91X/946 SPECIAL FUNCTION REGISTERS SUMMARY BANK 0 |
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Addr |
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Name |
Bit 7 |
Bit 6 |
|
Bit 5 |
Bit 4 |
Bit 3 |
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Bit 2 |
Bit 1 |
Bit 0 |
Value on |
Page |
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POR, BOR |
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Bank 0 |
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00h |
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INDF |
Addressing this location uses contents of FSR to address data memory (not a physical register) |
xxxx xxxx |
41,226 |
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01h |
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TMR0 |
Timer0 Module Register |
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xxxx xxxx |
99,226 |
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02h |
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PCL |
Program Counter’s (PC) Least Significant Byte |
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0000 |
0000 |
40,226 |
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03h |
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STATUS |
IRP |
RP1 |
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RP0 |
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TO |
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PD |
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Z |
DC |
C |
0001 |
1xxx |
32,226 |
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04h |
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FSR |
Indirect Data Memory Address Pointer |
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xxxx xxxx |
41,226 |
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05h |
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PORTA |
RA7 |
RA6 |
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RA5 |
RA4 |
RA3 |
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RA2 |
RA1 |
RA0 |
xxxx xxxx |
44,226 |
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06h |
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PORTB |
RB7 |
RB6 |
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RB5 |
RB4 |
RB3 |
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RB2 |
RB1 |
RB0 |
xxxx xxxx |
54,226 |
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07h |
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PORTC |
RC7 |
RC6 |
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RC5 |
RC4 |
RC3 |
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RC2 |
RC1 |
RC0 |
xxxx xxxx |
62,226 |
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08h |
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PORTD(2) |
RD7 |
RD6 |
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RD5 |
RD4 |
RD3 |
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RD2 |
RD1 |
RD0 |
xxxx xxxx |
71,226 |
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09h |
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PORTE |
RE7(3) |
RE6(3) |
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RE5(3) |
RE4(3) |
RE3 |
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RE2(2) |
RE1(2) |
RE0(2) |
xxxx xxxx |
76,226 |
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0Ah |
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PCLATH |
— |
— |
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— |
Write Buffer for upper 5 bits of Program Counter |
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---0 0000 |
40,226 |
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0Bh |
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INTCON |
GIE |
PEIE |
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T0IE |
INTE |
RBIE |
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T0IF |
INTF |
RBIF |
0000 |
000x |
34,226 |
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0Ch |
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PIR1 |
EEIF |
ADIF |
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RCIF |
TXIF |
SSPIF |
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CCP1IF |
TMR2IF |
TMR1IF |
0000 |
0000 |
37,226 |
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0Dh |
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PIR2 |
OSFIF |
C2IF |
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C1IF |
LCDIF |
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— |
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LVDIF |
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— |
CCP2IF(2) |
0000 |
-0-0 |
38,226 |
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0Eh |
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TMR1L |
Holding Register for the Least Significant Byte of the 16-bit TMR1 |
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xxxx xxxx |
102,226 |
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0Fh |
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TMR1H |
Holding Register for the Most Significant Byte of the 16-bit TMR1 |
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xxxx xxxx |
102,226 |
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10h |
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T1CON |
T1GINV |
TMR1GE |
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T1CKPS1 |
T1CKPS0 |
T1OSCEN |
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T1SYNC |
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TMR1CS |
TMR1ON |
0000 |
0000 |
105,226 |
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11h |
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TMR2 |
Timer2 Module Register |
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0000 |
0000 |
107,226 |
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12h |
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T2CON |
— |
TOUTPS3 |
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TOUTPS2 |
TOUTPS1 |
TOUTPS0 |
TMR2ON |
T2CKPS1 |
T2CKPS0 |
-000 0000 |
108,226 |
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13h |
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SSPBUF |
Synchronous Serial Port Receive Buffer/Transmit Register |
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xxxx xxxx |
196,226 |
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14h |
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SSPCON |
WCOL |
SSPOV |
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SSPEN |
CKP |
SSPM3 |
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SSPM2 |
SSPM1 |
SSPM0 |
0000 |
0000 |
195,226 |
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15h |
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CCPR1L |
Capture/Compare/PWM Register 1 (LSB) |
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xxxx xxxx |
213,226 |
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16h |
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CCPR1H |
Capture/Compare/PWM Register 1 (MSB) |
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xxxx xxxx |
213,226 |
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17h |
|
CCP1CON |
— |
— |
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CCP1X |
CCP1Y |
CCP1M3 |
CCP1M2 |
CCP1M1 |
CCP1M0 |
--00 0000 |
212,226 |
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18h |
|
RCSTA |
SPEN |
RX9 |
|
SREN |
CREN |
ADDEN |
|
FERR |
OERR |
RX9D |
0000 |
000x |
131,226 |
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19h |
|
TXREG |
USART Transmit Data Register |
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0000 |
0000 |
130,226 |
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1Ah |
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RCREG |
USART Receive Data Register |
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0000 |
0000 |
128,227 |
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1Bh(2) |
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CCPR2L |
Capture/Compare/PWM Register 2 (LSB) |
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xxxx xxxx |
213,227 |
|||||||
1Ch(2) |
|
CCPR2H |
Capture/Compare/PWM Register 2 (MSB) |
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xxxx xxxx |
213,227 |
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1Dh(2) |
|
CCP2CON |
— |
— |
|
CCP2X |
CCP2Y |
CCP2M3 |
CCP2M2 |
CCP2M1 |
CCP2M0 |
--00 0000 |
212,227 |
|||||||||
1Eh |
|
ADRESH |
A/D Result Register High Byte |
|
|
|
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|
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|
|
xxxx xxxx |
182,227 |
||||
1Fh |
|
ADCON0 |
ADFM |
VCFG1 |
|
VCFG0 |
CHS2 |
CHS1 |
|
CHS0 |
GO/DONE |
|
ADON |
0000 |
0000 |
180,227 |
||||||
Legend: |
- = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, shaded = unimplemented |
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Note 1: Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.
2:PIC16F914/917 and PIC16F946 only, forced ‘0’ on PIC16F913/916.
3:PIC16F946 only, forced to ‘0’ on PIC16F91X.
DS41250F-page 28 |
♥ 2007 Microchip Technology Inc. |
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