______________ Detailed Description
Analog Signal Path
The MAX1450’s signal path is fully differential and combines the following three stages: a 3-bit PGA with
selectable gains of 39, 65, 91, 117, 143, 169, 195, and
221; a summing junction; and a differential to singleended output buffer (Figure 1).
Programmable-Gain Amplifier
The analog signal is first fed into a programmable-gain
instrumentation amplifier with a CMRR of 90dB and a
common-mode input range from VSSto VDD. Pins A0,
A1, and A2 set the PGA gain anywhere from 39V/V to
221V/V (in steps of 26).
MAX1450
Low-Cost, 1%-Accurate Signal Conditioner
for Piezoresistive Sensors
4 _______________________________________________________________________________________
NAME FUNCTION
1 INP Positive Sensor Input. Input impedance is typically 1MΩ. Rail-to-rail input range.
PIN
2, 3,
12, 16
I.C. Internally connected. Leave unconnected.
4 SOTC
Offset TC Sign Bit Input. A logic low inverts V
OFFTC
with respect to V
SS.
This pin is internally pulled to V
SS
via a 1MΩ (typical) resistor. Connect to VDDto add V
OFFTC
to the PGA output, or leave unconnected (or
connect to VSS) to subtract V
OFFTC
from the PGA output.
8 OFFTC
Offset TC Adjust. Analog input summed with PGA output and V
OFFSET
. Input impedance is typically 1MΩ.
Rail-to-rail input range.
7 A0
PGA Gain-Set LSB Input. Internally pulled to VSSvia a 1MΩ (typical) resistor. Connect to VDDfor a logic
high or VSSfor a logic low.
6 A1
PGA Gain-Set Input. Internally pulled to VSSvia a 1MΩ (typical) resistor. Connect to VDDfor a logic high or
VSSfor a logic low.
5 SOFF
Offset Sign Bit Input. A logic low inverts V
OFFSET
with respect to VSS. This pin is internally pulled to VSSvia
a 1MΩ (typical) resistor. Connect to VDDto add V
OFFSET
to the PGA output, or leave unconnected (or con-
nect to VSS) to subtract V
OFFSET
from the PGA output.
14 OUT PGA Output Voltage. Connect a 0.1µF capacitor from OUT to VSS.
13 A2
PGA Gain-Set MSB Input. Internally pulled to VSSvia a 11kΩ (typical) resistor. Connect to VDDfor a logic
high or VSSfor a logic low.
11 FSOTRIM Bridge Drive Current-Set Input. The voltage on this pin sets the nominal I
ISRC
. See the
Bridge Drive
section.
10 BBUF
Buffered Bridge-Voltage Output (the voltage at BDRIVE). Use with correction resistor R
STC
to correct for FSO
tempco.
9 OFFSET
Offset Adjust Input. Analog input summed with PGA output and V
OFFTC
. Input impedance is typically
1MΩ. Rail-to-rail input range.
Pin Description
15 V
DD
Positive Supply Voltage Input. Connect a 0.1µF capacitor from VDDto VSS.
20 INM Negative Sensor Input. Input impedance is typically 1MΩ. Rail-to-rail input range.
19 V
SS
Negative Power-Supply Input.
18 BDRIVE Sensor Excitation Current Output. This pin drives a nominal 0.5mA through the bridge.
17 ISRC Current-Source Reference. Connect a 50kΩ (typical) resistor from ISRC to VSS.