MAXIM MAX1123 Technical data

General Description

The MAX1123 is a monolithic 10-bit, 210Msps analog­to-digital converter (ADC) optimized for outstanding
dynamic performance at high IF frequencies up to
500MHz. The product operates with conversion rates of
up to 210Msps while consuming only 460mW.

At 210Msps and an input frequency of 100MHz, the
MAX1123 achieves a spurious-free dynamic range
(SFDR) of 74.5dBc. Its excellent signal-to-noise ratio
(SNR) of 57.4dB at 10MHz remains flat (within 1.5dB)
for input tones up to 500MHz. This makes the MAX1123
ideal for wideband applications such as digital predis­tortion in cellular base-station transceiver systems.

The MAX1123 requires a single 1.8V supply. The ana­log input is designed for either differential or single­ended operation and can be AC- or DC-coupled. The
ADC also features a selectable on-chip divide-by-2
clock circuit, which allows the user to apply clock fre­quencies as high as 420MHz. This helps to reduce the
phase noise of the input clock source. A differential
LVDS sampling clock is recommended for best perfor­mance. The converter’s digital outputs are LVDS com­patible, and the data format can be selected to be
either two’s complement or offset binary.

The MAX1123 is available in a 68-pin QFN with
exposed pad (EP) and is specified over the industrial
(-40°C to +85°C) temperature range.

For pin-compatible, lower and higher speed versions of
the MAX1123, refer to the MAX1122 (170Msps) and the
MAX1124 (250Msps) data sheets. For a higher speed,
pin-compatible 8-bit version of the MAX1123, refer to
the MAX1121 data sheet.

Applications

Wireless and Wired Broadband Communication

Cable-Head End Systems

Digital Predistortion Receivers

Communications Test Equipment

Radar and Satellite Subsystems Antenna Array
Processing

Features

o 210Msps Conversion Rate

o SNR = 57.4dB/56dB at f

IN

= 100MHz/500MHz

o SFDR = 74.5dBc/62.6dBc at f

IN

= 100MHz/500MHz

o NPR = 53.6dB at f

NOTCH

= 28.8MHz

o Single 1.8V Supply

o 460mW Power Dissipation at 210Msps

o On-Chip Track-and-Hold and Internal Reference

o On-Chip Selectable Divide-by-2 Clock Input

o LVDS Digital Outputs with Data Clock Output

o Evaluation Kit Available (Order MAX1124EVKIT)

MAX1123

1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications

________________________________________________________________

Maxim Integrated Products

1

Pin Configuration

Ordering Information

19-3028; Rev 2; 8/08

For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.

PART TEMP RANGE PIN-PACKAGE

MAX1123EGK -40°C to +85°C 68 QFN-EP*

*

EP = Exposed pad.

TOP VIEW

CC

CC

AVCCOGND

OVCCORP

ORN

D9P

D9N

D8P

D8N

D7P

D7N

5253

51 D6P

50

49

48 D5N

47

46

45

44

43

42

41

40

39

38

37 D2N

36

35

AV

CC

AGND

REFIO

REFADJ

AGND

AV

CC

AGND

INP

INN

AGND

AV

CC

AV

CC

AV

CC

AV

CC

AGND

AGND

CLKDIV 17

T/B

68

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

AV

64

656667

EP

5859606162 5455565763

MAX1123

AGND

AGND

AGND

AV

D6N

D5P

D4P

D4N

OGND

OV

CC

DCLKP

DCLKN

OV

CC

D3P

D3N

D2P

D1P

D1N

AGND

AGND

2322212019 2726252418 2928 323130

CC

AV

CLKP

CLKN

AGND

AGND

3433

CC

CC

CC

N.C.

OGND

N.C.

OV

OV

AV

N.C.

N.C.

D0N

D0P

MAX1123

1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications

2 _______________________________________________________________________________________

ABSOLUTE MAXIMUM RATINGS

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.

AVCCto AGND ......................................................-0.3V to +2.1V

OV

CC

to OGND .....................................................-0.3V to +2.1V

AGND to OGND ....................................................-0.3V to +0.3V

Analog Inputs to AGND ...........................-0.3V to (AV

CC

+ 0.3V)

Digital Inputs to AGND.............................-0.3V to (AV

CC

+ 0.3V)

REF, REFADJ to AGND............................-0.3V to (AV

CC

+ 0.3V)

Digital Outputs to OGND.........................-0.3V to (OV

CC

+ 0.3V)

ESD on All Pins (Human Body Model).............................±2000V

Continuous Power Dissipation (T

A

= +70°C)

68-Pin QFN (derate 41.7mW/°C above +70°C) .........3333mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature......................................................+150°C

Storage Temperature Range .............................-60°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Maximum Current into Any Pin............................................50mA

ELECTRICAL CHARACTERISTICS

(AVCC= OVCC= 1.8V, V

AGND

= V

OGND

= 0, f

SAMPLE

= 210MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential R

L

= 100Ω ±1%, CL= 5pF, TA= T

MIN

to T

MAX

, unless otherwise noted. ≥ +25°C

guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are at T

A

= +25°C.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

DC ACCURACY

Resolution 10 Bits

Integral Nonlinearity INL (Note 1) -2 ±0.4 +2 LSB

Differential Nonlinearity DNL No missing codes (Note 1) -1.0 ±0.3 +1.5 LSB

Transfer Curve Offset V

Offset Temperature Drift ±20 µV/°C

ANALOG INPUTS (INP, INN)

Full-Scale Input Voltage Range V

Full-Scale Range Temperature
Drift

Common-Mode Input Range V

Input Capacitance C

Differential Input Resistance R

Full-Power Analog Bandwidth FPBW Figure 8 600 MHz

REFERENCE (REFIO, REFADJ)

Reference Output Voltage V

Reference Temperature Drift 90 ppm/°C

REFADJ Input High Voltage V

SAMPLING CHARACTERISTICS

Maximum Sampling Rate f

Minimum Sampling Rate f

OS

FS

CM

IN

IN

REFIO

REFADJ

SAMPLE

SAMPLE

(Note 1)

(Note 1) 1100 1250 1375 mV

Used to disable the internal reference

TA ≥ +25°C -25 +25

(Note 2) -37 +37

3.00 4.3 6.25 kΩ

1.18 1.24 1.30 V

AV

CC

0.3

210 MHz

130 ppm/°C

1.38

±0.18

3pF

-

20 MHz

LSB

P-P

V

V

MAX1123

1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications

_______________________________________________________________________________________ 3

ELECTRICAL CHARACTERISTICS (continued)

(AVCC= OVCC= 1.8V, V

AGND

= V

OGND

= 0, f

SAMPLE

= 210MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential R

L

= 100Ω ±1%, CL= 5pF, TA= T

MIN

to T

MAX

, unless otherwise noted. ≥ +25°C

guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are at T

A

= +25°C.)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

Clock Duty Cycle Set by clock management circuit 40 to 60 %

Aperture Delay t

Aperture Jitter t

CLOCK INPUTS (CLKP, CLKN)

Differential Clock Input Amplitude (Note 2) 200 500 mV

Clock Input Common-Mode
Voltage Range

Clock Differential Input
Resistance

Clock Differential Input
Capacitance

DYNAMIC CHARACTERISTICS (at -0.5dBFS)

Signal-to-Noise Ratio SNR

Signal-to-Noise
and Distortion

Spurious-Free
Dynamic Range

Worst Harmonics
(HD2 or HD3)

Two-Tone Intermodulation
Distortion

LVDS DIGITAL OUTPUTS (D0P/N–D9P/N, ORP/N)

Differential Output Voltage |VOD| 250 450 mV

AD

AJ

R

CLK

C

CLK

SINAD

SFDR

IMD

100

IMD

500

fIN = 10MHz, TA ≥ +25°C 56 57.5

fIN = 100MHz, TA ≥ +25°C 55.5 57.1

fIN = 180MHz 57

= 500MHz 56

f

IN

fIN = 10MHz, TA ≥ +25°C 55.5 57.4

fIN = 100MHz, TA ≥ +25°C5557

fIN = 180MHz 56.5

f

= 500MHz 55

IN

fIN = 10MHz, TA ≥ +25°C6377

fIN = 100MHz, TA ≥ +25°C6172

fIN = 180MHz 66.3

= 500MHz 62.5

f

IN

fIN = 10MHz -77

fIN = 100MHz -72

fIN = 180MHz -66.3

= 500MHz -62.5

f

IN

f

= 99MHz at -7dBFS,

IN1

= 101MHz at -7dBFS

f

IN2

f

= 498.5MHz at -7dBFS,

IN1

= 502.5MHz at -7dBFS

f

IN2

350 ps

0.21 ps

1.15
±0.2

11 ±

25%

5pF

-75

-58

RMS

P-P

V

kΩ

dB

dB

dBc

dBc

dBc

MAX1123

1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications

4 _______________________________________________________________________________________

ELECTRICAL CHARACTERISTICS (continued)

(AVCC= OVCC= 1.8V, V

AGND

= V

OGND

= 0, f

SAMPLE

= 210MHz, differential sine-wave clock input drive, 0.1µF capacitor on REFIO,

internal reference, digital output pins differential R

L

= 100Ω ±1%, CL= 5pF, TA= T

MIN

to T

MAX

, unless otherwise noted. ≥ +25°C

guaranteed by production test, < +25°C guaranteed by design and characterization. Typical values are at T

A

= +25°C.)

Note 1: Static linearity and offset parameters are computed from a best-fit straight line through the code transition points. The full-

scale range is defined as 1023 x slope of the line.

Note 2: Parameter guaranteed by design and characterization; T

A

= T

MIN

to T

MAX

.

Note 3: PSRR is measured with both analog and digital supplies connected to the same potential.

Output Offset Voltage OV

LVCMOS DIGITAL INPUTS (CLKDIV, T/B)

Digital Input Voltage Low V

Digital Input Voltage High V

TIMING CHARACTERISTICS

CLK to Data Propagation Delay t

CLK to DCLK Propagation Delay t

Data Valid to DCLK Rising Edge

LVDS Output Rise-Time t

LVDS Output Fall-Time t

Output Data Pipeline Delay t

POWER REQUIREMENTS

Analog Supply Voltage Range AV

Digital Supply Voltage Range OV

Analog Supply Current

Digital Supply Current I

Total Power Dissipation P

Power-Supply Rejection Ratio
(Note 3)

PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS

OS

IL

IH

PDL

CPDL

t

-

CPDL

t

PDL

RISE

FALL

LATENCY

CC

CC

I

AVCCfIN

OVCCfIN

DISS

PSRR

Figure 4 1.5 ns

Figure 4 3.01 ns

Figure 4 (Note 2) 1.23 1.51 1.84 ns

20% to 80%, CL = 5pF 460 ps

20% to 80%, CL = 5pF 460 ps

= 100MHz 210 280 mA

= 100MHz 45 75 mA

fIN = 100MHz 460 640 mW

Offset 1.6 mV/V

Gain 1.9 %FS/V

1.125 1.310 V

0.8 x

AV

CC

1.7 1.8 1.9 V

1.7 1.8 1.9 V

8

0.2 x

AV

CC

V

V

Clock

cycles

MAX1123

1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications

_______________________________________________________________________________________

5

)

Typical Operating Characteristics

(AVCC= OVCC= 1.8V, V

AGND

= V

OGND

= 0, f

SAMPLE

= 210.0057MHz, -0.5dBFS; see TOCs for detailed information on test condi­tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential R

L

= 100Ω, TA= +25°C.)

FFT PLOT (8192-POINT DATA RECORD,

COHERENT SAMPLING)

0

-10

-20

-30

-40

-50

-60

AMPLITUDE (dB)

-70

-80

-90

-100

HD2

HD3

0 40608020 100 120

ANALOG INPUT FREQUENCY (MHz)

FFT PLOT (8192-POINT DATA RECORD,

COHERENT SAMPLING)

0

f

= 210.0057MHz

SAMPLE

-10

= 500.0196MHz

f

IN

= -0.4975dBFS

A

IN

-20

SNR = 55.9dB

-30

SFDR = 62.5dBc
HD2 = -69.5dBc

-40

HD3 = -62.5dBc

-50

-60

AMPLITUDE (dB)

-70

-80

-90

-100
0 40608020 100 120

HD3

ANALOG INPUT FREQUENCY (MHz)

HD2/HD3 vs. ANALOG INPUT FREQUENCY

= 210.0057MHz, AIN = -0.5dBFS)

(f

SAMPLE

-50

f

= 210.0057MHz

SAMPLE

= 11.5103MHz

f

IN

= -0.542dBFS

A

IN

SNR = 57.5dB
SFDR = 79.5dBc
HD2 = -82dBc
HD3 = -86.3dBc

HD2

MAX1123 toc01

MAX1123 toc04

FFT PLOT (8192-POINT DATA RECORD,

COHERENT SAMPLING)

0

-10

-20

-30

-40

-50

-60

AMPLITUDE (dB)

-70

-80

-90

-100
0 40608020 100 120

ANALOG INPUT FREQUENCY (MHz)

HD3

f

SAMPLE

= 60.1152MHz

f

IN

= -0.4885dBFS

A

IN

SNR = 57.4dB
SFDR = 76.2dBc
HD2 = -83.9dBc
HD3 = -76.2dBc

SNR vs. ANALOG INPUT FREQUENCY

= 210.0057MHz, AIN = -0.5dBFS)

(f

SAMPLE

59

58

57

56

55

54

SNR (dB)

53

52

51

50

0 500

f

(MHz)

IN

SNR vs. ANALOG INPUT AMPLITUDE

= 210.0057MHz, fIN = 60.0126MHz

(f

SAMPLE

62

= 210.0057MHz

HD2

400300200100

MAX1123 toc02

AMPLITUDE (dB)

MAX1123 toc05

FFT PLOT (8192-POINT DATA RECORD,

COHERENT SAMPLING)

0

-10

-20

-30

-40

-50

-60

-70

-80

-90

-100
0 40608020 100 120

ANALOG INPUT FREQUENCY (MHz)

f

= 210.0057MHz

SAMPLE

= 183.5242MHz

f

IN

= -0.5245dBFS

A

IN

SNR = 57dB
SFDR = 66.6dBc
HD2 = -82.9dBc
HD3 = -66.9dBc

HD2

SFDR vs. ANALOG INPUT FREQUENCY

= 210.0057MHz, AIN = -0.5dBFS)

(f

SAMPLE

85

80

75

70

65

60

55

SFDR (dBc)

50

45

40

35

30

0 500

f

(MHz)

IN

SFDR vs. ANALOG INPUT AMPLITUDE

= 210.0057MHz, fIN = 60.0126MHz)

(f

SAMPLE

80

HD3

400300200100

MAX1123 toc03

MAX1123 toc06

-60

-70

HD3

-80

HD2/HD3 (dBc)

-90

-100
0 500

HD2

f

(MHz)

IN

57

MAX1123 toc07

52

47

SNR (dB)

42

37

32

27

400300200100

-28 -16 -12-24 -20 -8 -4 0
ANALOG INPUT AMPLITUDE (dBFS)

MAX1123 toc08

75

70

65

SFDR (dBc)

60

55

50

-28 -16 -12-24 -20 -8 -4 0
ANALOG INPUT AMPLITUDE (dBFS)

MAX1123 toc09

MAX1123

1.8V, 10-Bit, 210Msps Analog-to-Digital Converter
with LVDS Outputs for Wideband Applications

6 _______________________________________________________________________________________

Typical Operating Characteristics (continued)

(AVCC= OVCC= 1.8V, V

AGND

= V

OGND

= 0, f

SAMPLE

= 210.0057MHz, -0.5dBFS; see TOCs for detailed information on test condi­tions, differential input drive, differential sine-wave clock input drive, 0.1µF capacitor on REFIO, internal reference, digital output pins
differential R

L

= 100Ω, TA= +25°C.)

HD2/HD3 vs. ANALOG INPUT AMPLITUDE

= 210.0057MHz, fIN = 60.0126MHz)

(f

SAMPLE

-50

-55

-60

-65

-70

HD2/HD3 (dBc)

-75

-80

-85

-90

-28 -16 -12-24 -20 -8 -4 0

HD2

ANALOG INPUT AMPLITUDE (dBFS)

HD2/HD3 vs. f

(fIN = 60.0126MHz, AIN = -0.5dBFS)

-60

-68

-76

-84

HD2/HD3 (dBc)

-92

-100
10 2101501107030 190

f

SAMPLE

HD3

DIFFERENTIAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

0.5

0.4

0.3

0.2

0.1

0

DNL (LSB)

-0.1

-0.2

-0.3

-0.4

-0.5
256 3841280 512 640 768 896 1024

DIGITAL OUTPUT CODE

HD3

SAMPLE

HD2

(MHz)

1701309050

MAX1123 toc10

MAX1123 toc13

MAX1123 toc16

SNR vs. f

SAMPLE

(fIN = 60.0126MHz, AIN = -0.5dBFS)

60

59

58

57

56

55

SNR (dB)

54

53

52

51

50

10 210

f

(MHz)

SAMPLE

TWO-TONE IMD PLOT (8192-POINT

DATA RECORD, COHERENT SAMPLING)

0

f

= 210.0057MHz

SAMPLE

-10

= 99.0298MHz

f

IN1

= 101.0293MHz

f

IN2

-20

= A

= -7dBFS

A

IN1

-30

-40

-50

-60

AMPLITUDE (dB)

-70

-80

-90

-100

IN2

IMD = -75dBc

2f

- f

IN1

0 40608020 100 120

ANALOG INPUT FREQUENCY (MHz)

GAIN BANDWIDTH PLOT

= 210.0057MHz, AIN = -0.5dBFS)

(f

SAMPLE

2

0

-2

-4

-6

GAIN (dB)

-8

-10

-12

10 100 1000

ANALOG INPUT FREQUENCY (MHz)

SFDR vs. f

SAMPLE

(fIN = 60.0126MHz, AIN = -0.5dBFS)

90

MAX1123 toc11

80

70

SFDR (dBc)

60

50

40

170130 150 1909050 70 11030

10 2101501107030 190

f

(MHz)

SAMPLE

INTEGRAL NONLINEARITY

vs. DIGITAL OUTPUT CODE

0.5

0.4

MAX1123 toc14

0.3

0.2

f

IN1

f

IN2

2f

-

IN2

f

IN2

IN1

0.1

0

INL (LSB)

-0.1

-0.2

-0.3

-0.4

-0.5
256 3841280 512 640 768 896 1024

DIGITAL OUTPUT CODE

SNR vs. TEMPERATURE (fIN = 64.9974MHz,

= 210.0428MHz, AIN = -0.5dBFS)

f

SAMPLE

60

59

MAX1123 toc17

58

57

56

55

SNR (dB)

54

53

52

51

50

-40 85
TEMPERATURE (°C)

MAX1123 toc12

1701309050

MAX1123 toc15

MAX1123 toc18

603510-15