Maxim MAX1113CPE, MAX1113CEE, MAX1112MJP, MAX1112EPP, MAX1112EAP Datasheet

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General Description
The MAX1112/MAX1113 are low-power, 8-bit, 8-chan­nel analog-to-digital converters (ADCs) that feature an internal track/hold, voltage reference, clock, and serial interface. They operate from a single +4.5V to +5.5V supply and consume only 135µA while sampling at rates up to 50ksps. The MAX1112’s 8 analog inputs and the MAX1113’s 4 analog inputs are software-con­figurable, allowing unipolar/bipolar and single­ended/differential operation.
Successive-approximation conversions are performed using either the internal clock or an external serial-inter­face clock. The full-scale analog input range is deter­mined by the 4.096V internal reference, or by an externally applied reference ranging from 1V to VDD. The 4-wire serial interface is compatible with the SPI™, QSPI™, and MICROWIRE™ serial-interface standards. A serial-strobe output provides the end-of-conversion signal for interrupt-driven processors.
The MAX1112/MAX1113 have a software-program­mable, 2µA automatic power-down mode to minimize power consumption. Using power-down, the supply current is reduced to 13µA at 1ksps, and only 82µA at 10ksps. Power-down can also be controlled using the SHDN input pin. Accessing the serial interface automat­ically powers up the device.
The MAX1112 is available in 20-pin SSOP and DIP packages. The MAX1113 is available in small 16-pin QSOP and DIP packages.
________________________Applications
Portable Data Logging Hand-Held Measurement Devices Medical Instruments System Diagnostics Solar-Powered Remote Systems 4–20mA-Powered Remote
Data-Acquisition Systems
____________________________Features
+4.5V to +5.5V Single SupplyLow Power: 135µA at 50ksps
13µA at 1ksps
8-Channel Single-Ended or 4-Channel Differential
Inputs (MAX1112)
4-Channel Single-Ended or 2-Channel Differential
Inputs (MAX1113)
Internal Track/Hold; 50kHz Sampling RateInternal 4.096V ReferenceSPI/QSPI/MICROWIRE-Compatible Serial InterfaceSoftware-Configurable Unipolar or Bipolar InputsTotal Unadjusted Error: ±1LSB (max)
±0.3LSB (typ)
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
________________________________________________________________
Maxim Integrated Products
1
INPUT SHIFT
REGISTER
CONTROL
LOGIC
INT
CLOCK
OUTPUT
SHIFT
REGISTER
+4.096V
REFERENCE
T/H
ANALOG
INPUT
MUX
8-BIT
SAR ADC
IN
DOUT SSTRB
V
DD
DGND AGND
SCLK
DIN
CH0 CH1
CH3
CH2
CH7*
CH6*
CH5*
CH4*
COM
REFOUT
*MAX1112 ONLY
REFIN
OUT
REF
CLOCK
MAX1112 MAX1113
CS
SHDN
Functional Diagram
19-1231; Rev 1; 10/98
PART
MAX1112CPP
MAX1112CAP 0°C to +70°C
0°C to +70°C
TEMP. RANGE PIN-PACKAGE
20 Plastic DIP 20 SSOP
EVALUATION KIT
AVAILABLE
Ordering Information
Ordering Information continued at end of data sheet.
*
Dice are specified at TA= +25°C, DC parameters only.
Pin Configurations appear at end of data sheet.
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp.
MAX1112C/D 0°C to +70°C Dice*
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs
2 _______________________________________________________________________________________
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
VDDto AGND..............................................................-0.3V to 6V
AGND to DGND.......................................................-0.3V to 0.3V
CH0–CH7, COM, REFIN,
REFOUT to AGND...................................-0.3V to (V
DD
+ 0.3V)
Digital Inputs to DGND...............................................-0.3V to 6V
Digital Outputs to DGND............................-0.3V to (V
DD
+ 0.3V) Continuous Power Dissipation (T
A
= +70°C)
16 Plastic DIP (derate 10.53mW/°C above +70°C) ......842mW
16 QSOP (derate 8.30mW/°C above +70°C)................667mW
16 CERDIP (derate 10.00mW/°C above +70°C) ..........800mW
20 Plastic DIP (derate 11.11mW/°C above +70°C) ......889mW
20 SSOP (derate 8.00mW/°C above +70°C) ................640mW
20 CERDIP (derate 11.11mW/°C above +70°C) ..........889mW
Operating Temperature Ranges
MAX1112C_P/MAX1113C_E................................0°C to +70°C
MAX1112E_P/MAX1113E_E .............................-40°C to +85°C
MAX1112MJP/MAX1113MJE..........................-55°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10sec).............................+300°C
ELECTRICAL CHARACTERISTICS
(VDD= +4.5V to +5.5V; unipolar input mode; COM = 0V; f
SCLK
= 500kHz, external clock (50% duty cycle); 10 clocks/conversion
cycle (50ksps); 1µF capacitor at REFOUT; T
A
= T
MIN
to T
MAX
; unless otherwise noted.)
-3dB rolloff MHz1.5Small-Signal Bandwidth kHz800
V
CH_
= 4.096Vp-p, 25kHz (Note 3)
External reference, 4.096V
No missing codes over temperature
CONDITIONS
Full-Power Bandwidth
±1Internal or external reference LSBGain Error (Note 2)
dB-75Channel-to-Channel Crosstalk
dB68SFDRSpurious-Free Dynamic Range
dB-70THD
Total Harmonic Distortion (up to the 5th harmonic)
LSB±0.1
Channel-to-Channel Offset Matching
ppm/°C±0.8Gain Temperature Coefficient
LSB±1DNLDifferential Nonlinearity
UNITSMIN TYP MAXSYMBOLPARAMETER
MAX111_C/E LSB±0.3 ±1TUETotal Unadjusted Error
Bits8Resolution
dB49SINAD
Signal-to-Noise and Distortion Ratio
LSB±0.1 ±0.5INLRelative Accuracy (Note 1)
LSB±0.3 ±1Offset Error
DC ACCURACY
DYNAMIC SPECIFICATIONS (10.034kHz sine-wave input, 4.096Vp-p, 50ksps, 500kHz external clock)
µA
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
_______________________________________________________________________________________ 3
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +4.5V to +5.5V; unipolar input mode; COM = 0V; f
SCLK
= 500kHz, external clock (50% duty cycle); 10 clocks/conversion
cycle (50ksps); 1µF capacitor at REFOUT; T
A
= T
MIN
to T
MAX
; unless otherwise noted.)
On/off leakage current, V
CH_
= 0V or V
DD
Used for data transfer only
(Note 5)
External clock, 2MHz
CONDITIONS
ppm/°C±50
mA6REFOUT Short-Circuit Current
pF18Input Capacitance
µA±0.01 ±1Multiplexer Leakage Current
1
2
50 500
kHz400Internal Clock Frequency
0mA to 0.5mA output load mV4.5Load Regulation (Note 7)
ns10Aperture Delay
µs1t
ACQ
Track/Hold Acquisition Time
UNITSMIN TYP MAXSYMBOLPARAMETER
ps
V
1
V
DD
+
50mV
Input Voltage Range
(Note 8) µA120Input Current
<50Aperture Jitter
External clock, 500kHz, 10 clocks/conversion 20
Internal clock
µs
25 55
t
CONV
Conversion Time (Note 4)
Bipolar input, COM = V
REFIN
/ 2
Unipolar input, COM = 0V
COM ±
V
REFIN
/ 2
V
0V
REFIN
Input Voltage Range, Single­Ended and Differential (Note 6)
V3.936 4.096 4.256REFOUT Voltage
External Clock-Frequency Range
MHz
kHz
Capacitive Bypass at REFOUT µF
REFOUT Temperature Coefficient
V4.5 5.5V
DD
Supply Voltage
VDD= 4.5V to 5.5V; external reference,
4.096V; full-scale input
mV±0.4 ±4PSR
Power-Supply Rejection (Note 9)
2
Power-down
3.2 10
Software SHDN at DGND
Operating mode 135 250
Full-scale input C
LOAD
= 10pF
Reference disabled 95
I
DD
µASupply Current
CONVERSION RATE
ANALOG INPUT
INTERNAL REFERENCE
EXTERNAL REFERENCE AT REFIN
POWER REQUIREMENTS
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs
4 _______________________________________________________________________________________
ELECTRICAL CHARACTERISTICS (continued)
(VDD= +4.5V to +5.5V; unipolar input mode; COM = 0V; f
SCLK
= 500kHz, external clock (50% duty cycle); 10 clocks/conversion
cycle (50ksps); 1µF capacitor at REFOUT; T
A
= T
MIN
to T
MAX
; unless otherwise noted.)
CS = VDD(Note 5)
CS = V
DD
I
SOURCE
= 0.5mA
I
SINK
= 5mA
SHDN = open
SHDN = 0V or V
DD
(Note 5)
Digital inputs = 0V or V
DD
SHDN = open
CONDITIONS
pF15C
OUT
Three-State Output Capacitance
µA±0.01 ±10I
L
Three-State Leakage Current
VVDD- 0.5V
OH
Output High Voltage
V
0.4
V
OL
Output Low Voltage
nA±100
SHDN Maximum Allowed Leakage for Mid-Input
VV
DD
/ 2V
FLT
SHDN Voltage, Floating
µA±4
SHDN Input Current
VV
DD
- 0.4V
SH
SHDN Input High Voltage
V0.8V
IL
DIN, SCLK, CS Input Low Voltage
V1.1 VDD- 1.1
I
SINK
= 16mA
V
SM
0.8
pF15C
IN
DIN, SCLK, CS Input Capacitance
µA±1I
IN
DIN, SCLK, CS Input Leakage
SHDN Input Mid-Voltage
V0.2V
HYST
DIN, SCLK, CS Input Hysteresis
UNITSMIN TYP MAXSYMBOLPARAMETER
V0.4V
SL
SHDN Input Low Voltage
VV
IH
DIN, SCLK, CS Input High Voltage
3
DIGITAL INPUTS: DIN, SCLK, CS
DIGITAL OUTPUTS: DOUT, SSTRB
SHDN INPUT
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel,
Serial 8-Bit ADCs
_______________________________________________________________________________________ 5
ns100t
CSS
Figure 1, external clock mode only, C
LOAD
= 100pF
ns
CS to SCLK Rise Setup
240
Figure 1, C
LOAD
= 100pF ns
20 200
ns0t
CSH
CONDITIONS
CS to SCLK Rise Hold
240t
DV
CS Fall to Output Enable
Figure 2, C
LOAD
= 100pF ns240t
TR
CS Rise to Output Disable
t
SDV
CS Fall to SSTRB Output Enable (Note 5)
Figure 2, external clock mode only, C
LOAD
= 100pF
ns240t
STR
CS Rise to SSTRB Output Disable (Note 5)
Figure 11, internal clock mode only ns0t
SCK
SSTRB Rise to SCLK Rise (Note 5)
ns200t
CH
SCLK Pulse Width High
ns200t
CL
SCLK Pulse Width Low
C
LOAD
= 100pF ns240t
SSTRB
SCLK Fall to SSTRB
ns0t
DH
DIN to SCLK Hold
µs1t
ACQ
Track/Hold Acquisition Time
ns100t
DS
DIN to SCLK Setup
UNITSMIN TYP MAXSYMBOLPARAMETER
TIMING CHARACTERISTICS (Figures 8 and 9)
(VDD= +4.5V to +5.5V, TA= T
MIN
to T
MAX
, unless otherwise noted.)
Note 1: Relative accuracy is the analog value’s deviation (at any code) from its theoretical value after the full-scale range is calibrated. Note 2: V
REFIN
= 4.096V, offset nulled.
Note 3: On-channel grounded; sine wave applied to all off-channels. Note 4: Conversion time is defined as the number of clock cycles multiplied by the clock period; clock has 50% duty cycle. Note 5: Guaranteed by design. Not subject to production testing. Note 6: Common-mode range for the analog inputs is from AGND to V
DD
.
Note 7: External load should not change during the conversion for specified accuracy. Note 8: External reference at 4.096V, full-scale input, 500kHz external clock. Note 9: Measured as
| V
FS
(4.5V) - VFS(5.5V) |.
Note 10: 1µF at REFOUT; internal reference settling to 0.5LSB.
ns
20 240
t
DO
SCLK Fall to Output Data Valid
Figure 1, C
LOAD
= 100pF
MAX111_C/E MAX111_M
External reference 20 Internal reference (Note 10)
µs
24
t
WAKE
Wakeup Time
ms
MAX1112/MAX1113
+5V, Low-Power, Multi-Channel, Serial 8-Bit ADCs
6 _______________________________________________________________________________________
__________________________________________Typical Operating Characteristics
(VDD= +5.0V; f
SCLK
= 500kHz; external clock (50% duty cycle); RL= ∞; TA = +25°C, unless otherwise noted.)
180
100
-60 140
SUPPLY CURRENT vs. TEMPERATURE
120
MAX1112/13-01
TEMPERATURE (°C)
SUPPLY CURRENT (µA)
-20 20 60 100
160
140
OUTPUT CODE = FULL SCALE C
LOAD
= 10pF
VDD = 5.5V
VDD = 4.5V
10
0
-60 140
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE
2
8
MAX1112/13-02
TEMPERATURE (°C)
SHUTDOWN SUPPLY CURRENT (µA)
-20 20 60 100
6
4
SHDN = DGND
0.3
-0.3 0 256
DIFFERENTIAL NONLINEARITY
vs. CODE
-0.2
0.2
0.1
MAX1112/13-03
DIGITAL CODE
DNL (LSB)
64 128 192
0
-0.1
0.6
0
-60 140
OFFSET ERROR vs. TEMPERATURE
0.1
0.2
0.5
MAX1112/13-04
TEMPERATURE (°C)
OFFSET ERROR (LSB)
-20 20 60
100
0.4
0.3
0.20
-0.20 0 256
INTEGRAL NONLINEARITY
vs. CODE
-0.10
-0.15
0.15
0.10
0.05
MAX1112/13-05
DIGITAL CODE
INL (LSB)
64 128 192
0
-0.05
20
-100 025
FFT PLOT
-80
-20
0
MAX1112/13-06
FREQUENCY (kHz)
AMPLITUDE (dB)
5 101520
-60
-40
f
CH_
= 10.034kHz, 4Vp-p
f
SAMPLE
= 50ksps
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