LINEAR TECHNOLOGY LTC3568 Technical data

LTC3568

1.8A, 4MHz, Synchronous

Step-Down DC/DC Converter

FEATURES

■

Uses Tiny Capacitors and Inductor

■

High Frequency Operation: Up to 4MHz

■

Low R

■

High Effi ciency: Up to 96%

■

Stable with Ceramic Capacitors

■

Current Mode Operation for Excellent Line

Internal Switches: 0.110Ω

DS(ON)

and Load Transient Response

■

Short-Circuit Protected

■

Low Dropout Operation: 100% Duty Cycle

■

Low Shutdown Current: IQ ≤ 1μA

■

Low Quiescent Current: 60μA

■

Output Voltages from 0.8V to 5V

■

Selectable Burst Mode® Operation

■

Sychronizable to External Clock

■

Small 3mm × 3mm, 10-Lead DFN Package

APPLICATIONS

■

Notebook Computers

■

Digital Cameras

■

Cellular Phones

■

Handheld Instruments

■

Board Mounted Power Supplies

DESCRIPTION

The LTC®3568 is a constant frequency, synchronous
step- down DC/DC converter. Intended for medium power
applications, it operates from a 2.5V to 5.5V input voltage
range and has a user confi gurable operating frequency
up to 4MHz, allowing the use of tiny, low cost capacitors
and inductors 2mm or less in height. The output voltage
is adjustable from 0.8V to 5V. Internal sychronous 0.11Ω
power switches with 2.4A peak current ratings provide
high effi ciency. The LTC3568’s current mode architecture
and external compensation allow the transient response
to be optimized over a wide range of loads and output
capacitors.

The LTC3568 can be confi gured for automatic power sav­ing Burst Mode operation to reduce gate charge losses
when the load current drops below the level required for
continuous operation. For reduced noise and RF interfer­ence, the SYNC/MODE pin can be confi gured to skip pulses
or provide forced continuous operation.

To further maximize battery life, the P-channel MOSFET
is turned on continuously in dropout (100% duty cycle)
with a low quiescent current of 60μA. In shutdown, the
device draws <1μA.

, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. Burst
Mode is a registered trademark of Linear Technology Corporation. All other trademarks are
the property of their respective owners. Protected by U.S. Patents including 5481178,
6580258, 6304066, 6127815, 6611131.

TYPICAL APPLICATION

V

2.5V TO 5.5V

SYNC/MODEV

IN

PGOOD

I

TH

SHDN/R

13k

1000pF

NOTE: IN DROPOUT, THE OUTPUT TRACKS
THE INPUT VOLTAGE

324k

T

Figure 1. Step-Down 1.8A Regulator

LTC3568

PV

IN

SV

IN

SW

V

FB

PGNDSGND

IN

22μF

L1

2μH

887k

412k

3568 F01

V

OUT

2.5V/1.8A

22μF + 10μF

EFFICIENCY (%)

Effi ciency vs Load Current

100

95

90

85

80

75

70

1 100 100001000

EFFICIENCY

POWER LOSS

10

LOAD CURRENT (mA)

VIN = 3.3V

= 2.5V

V

OUT

= 1MHz

f

O

Burst Mode
OPERATION

3568 TA01

1000

POWER LOSS (mW)

100

10

1

3568f

1

LTC3568

ABSOLUTE MAXIMUM RATINGS

PACKAGE/ORDER INFORMATION

(Note 1)

PVIN, SVIN Voltages .................................... –0.3V to 6V

, ITH, SHDN/RT Voltages ......... –0.3V to (VIN + 0.3V)

V

FB

SYNC/MODE Voltage .................... –0.3V to (V

SW Voltage ................................. –0.3V to (V

+ 0.3V)

IN

+ 0.3V)

IN

PGOOD Voltage ........................................... –0.3V to 6V

SHDN/R

SYNC/MODE

SGND

SW

PGND

TOP VIEW

10

9

8

7

6

I

TH

V

FB

PGOOD

SV

IN

PV

IN

1

T

2

11

3

4

5

Operating Ambient Temperature Range

(Note 2) ...............................................–40°C to 85°C

Junction Temperature (Notes 5, 8) ...................... 125°C

Storage Temperature Range ................... –65°C to 125°C

10-LEAD (3mm × 3mm) PLASTIC DFN

T

JMAX

EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB

DD PACKAGE

= 125°C, θJA = 43°C/W, θJC = 3°C/W

ORDER PART NUMBER DD PART MARKING

LTC3568EDD LCSG

Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/

Consult LTC Marketing for parts specifi ed with wider operating temperature ranges.

ELECTRICAL CHARACTERISTICS

The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at TA = 25°C. VIN = 3.3V, RT = 324k unless otherwise specifi ed. (Note 2)

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

V

IN

I

FB

V

FB

ΔV

LINEREG

ΔV

LOADREG

g

m(EA)

I

S

V

SHDN/RT

f

OSC

f

SYNC

I

LIM

R

DS(ON)

I

SW(LKG)

V

UVLO

Operating Voltage Range 2.25 5.5 V

Feedback Pin Input Current (Note 3) ±0.1 μA

Feedback Voltage (Note 3)

●

0.784 0.8 0.816 V

Reference Voltage Line Regulation VIN = 2.25V to 5V 0.04 0.2 %/V

Output Voltage Load Regulation ITH = 0.36, (Note 3)

I

= 0.84, (Note 3)

TH

●

●

0.02

–0.02

0.2

–0.2

%
%

Error Amplifi er Transconductance ITH Pin Load = ±5μA (Note 3) 800 μS

Input DC Supply Current (Note 4)
Active Mode
Sleep Mode
Shutdown

Shutdown Threshold High
Active Oscillator Resistor

Oscillator Frequency RT = 324k

V

= 0.75V, SYNC/MODE = 3.3V

FB

V

SYNC/MODE

V

SHDN/RT

= 3.3V, VFB = 1V

= 3.3V

(Note 7)

240

62

0.1

VIN – 0.6

324k

350
100

1

VIN – 0.4

1M

0.85 1 1.15
4

μA
μA
μA

Ω

MHz
MHz

Synchronization Frequency (Note 7) 0.4 4 MHz

Peak Switch Current Limit ITH = 1.3 2.4 3 4 A

Top Switch On-Resistance (Note 6) VIN = 3.3V 0.11 0.15

Bottom Switch On-Resistance (Note 6) V

Switch Leakage Current VIN = 6V, V

= 3.3V 0.11 0.15

IN

= 0V, VFB = 0V 0.01 1 μA

ITH/RUN

Ω

Ω

Undervoltage Lockout Threshold VIN Ramping Down 2 2.25 V

V

2

3568f

LTC3568

ELECTRICAL CHARACTERISTICS

The ● denotes the specifi cations which apply over the full operating
temperature range, otherwise specifi cations are at T

PGOOD Power Good Threshold VFB Ramping Up, SHDN/RT = 1V

RPGOOD Power Good Pull-Down On-Resistance 118 200

= 25°C. VIN = 3.3V, RT = 324k unless otherwise specifi ed. (Note 2)

A

6.8

V

Ramping Down, SHDN/RT = 1V

FB

–7.6

%
%

Ω

Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.

Note 2: The LTC3568 is guaranteed to meet specifi ed performance from
0°C to 85°C. Specifi cations over the –40°C to 85°C operating ambient
termperature range are assured by design, characterization and correlation
with statistical process controls.

Note 3: The LTC3568 is tested in a feedback loop which servos V
midpoint for the error amplifi er (V

= 0.6V).

ITH

to the

FB

Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.

Note 5: T

is calculated from the ambient TA and power dissipation PD

J

according to the following formula:

= TA + (PD • 43°C/W)

T

J

Note 6: Switch on-resistance is guaranteed by correlation to wafer level
measurements.

Note 7: 4MHz operation is guaranteed by design but not production tested
and is subject to duty cycle limitations (see Applications Information).

Note 8: This IC includes overtemperature protection that is intended
to protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specifi ed maximum operating junction
temperature may impair device reliability.

TYPICAL PERFORMANCE CHARACTERISTICS

Burst Mode Operation Pulse Skipping Mode Forced Continuous Mode

V

OUT

10mV/

DIV

S

2V/DIV

V

OUT

10mV/

DIV

S

W

2V/DIV

W

V

OUT

10mV/

DIV

S

2V/DIV

W

500mA/

DIV

I

L

VIN = 3.3V
V
I

LOAD

OUT

= 2.5V

= 100mA

10μs/DIV

3568 G01

200mA/

DIV

I

L

Effi ciency vs Load Current Effi ciency vs V

100

Burst Mode

OPERATION

95

90

85

EFFICIENCY (%)

80

PULSE SKIP

75

70

1 100 1000 10000

FORCED CONTINUOUS

VIN = 3.3V
V

OUT

CIRCUIT OF FIGURE 7

10

LOAD CURRENT (mA)

= 2.5V

3568 G04

100

95

90

85

80

75

EFFICIENCY (%)

70

65

60

2.5 3.5 4.5 5.53.0 4.0 5.0 6.0

VIN = 3.3V

= 2.5V

V

OUT

= 100mA

I

LOAD

I

= 500mA

OUT

I

= 1.8A

OUT

V

= 2.5V

OUT

CIRCUIT OF FIGURE 7

2μs/DIV

IN

VIN (V)

3568 G02

3568 G05

500mA/

DIV

V

OUT

100mV/

DIV

1A/
DIV

I

L

VIN = 3.3V

= 2.5V

V

OUT

= 100mA

I

LOAD

Load Step

I

L

VIN = 3.3V

= 2.5V

V

OUT

= 180mA TO 1.8A

I

LOAD

2μs/DIV

50μs/DIV

3568 G03

3568 G06

3568f

3

LTC3568

TYPICAL PERFORMANCE CHARACTERISTICS

Load Regulation Line Regulation Frequency vs V

0.6

0.5

0.4

0.3
PULSE SKIP

0.2

0.1

ERROR (%)

0

OUT

CONTINUOUS

V

–0.1

–0.2

–0.3

–0.4

1 10 100 1000 10000

Burst Mode
OPERATION

FORCED

LOAD CURRENT (mA)

VIN = 3.3V
V

= 1.8V

OUT

3568 G07

0.20
V

= 1.8V

OUT

0.15

0.10

I

= 1.8A

0.05

0

ERROR (%)

–0.05

OUT

V

–0.10

–0.15

–0.20

2.0 3.0 4.0 5.02.5 3.5 4.5 5.5 6.0

OUT

VIN (V)

I

OUT

= 500mA

3568 G08

10

V

OUT

8

I

OUT

= 25°C

T

A

6

4

2

0

–2

–4

FREQUENCY VARIATION (%)

–6

–8

–10

2 3 4 5 6

Frequency Variation
vs Temperature Effi ciency vs Frequency

10

8

6

4

2

0

–2

–4

REFERENCE VARIATION (%)

–6

–8

–10

–50 –25 0 25 50 75 100 125

TEMPERATURE (°C)

3568 G10

100

95

EFFICIENCY (%)

90

85

0

12

FREQUENCY (MHz)

IN

= 1.8V

= 1.25A

VIN (V)

VIN = 3.3V

= 2.5V

V

OUT

= 500mA

I

OUT

= 25°C

T

A

34

3568 G11

3568 G09

4

R

vs V

DS(ON)

120

TA = 25°C

115

110

(mΩ)

105

DS(ON)

R

100

95

90

2.5 3 3.5 4 4.5 5 5.5 6

IN

SYNCHRONOUS SWITCH

MAIN SWITCH

VIN (V)

3568 G12

R

vs Temperature

DS(ON)

160

150

140

130

120

110

DS(ON)

R

100

VIN = 3.3V

90

80

70

60

–50 –25 0 25 50 75 100 125

TEMPERATURE (°C)

VIN = 2.5V

VIN = 5V

MAIN SWITCH
SYNCHRONOUS SWITCH

3568 G13

3568f

PIN FUNCTIONS

LTC3568

SHDN/RT (Pin 1): Combination Shutdown and Timing
Resistor Pin. The oscillator frequency is programmed by
connecting a resistor from this pin to ground. Forcing
this pin to SV

causes the device to be shut down. In

IN

shutdown all functions are disabled.

SYNC/MODE (Pin 2): Combination Mode Selection and
Oscillator Synchronization Pin. This pin controls the op­eration of the device. When tied to SV

or SGND, Burst

IN

Mode operation or pulse skipping mode is selected,
respectively. If this pin is held at half of SV

, the forced

IN

continuous mode is selected. The oscillation frequency
can be syncronized to an external oscillator applied to
this pin. When synchronized to an external clock pulse
skip mode is selected.

SGND (Pin 3): The Signal Ground Pin. All small signal
components and compensation components should be con­nected to this ground (see Board Layout Considerations).

SW (Pin 4): The Switch Node Connection to the Inductor.
This pin swings from PV

to PGND.

IN

PGND (Pin 5): Main Power Ground Pin. Connect to the
(–) terminal of C

(Pin 6): Main Supply Pin. Must be closely decoupled

PV

IN

, and (–) terminal of CIN.

OUT

to PGND.

(Pin 7): The Signal Power Pin. All active circuitry

SV

IN

is powered from this pin. Must be closely decoupled to
SGND. SV

must be greater than or equal to PVIN.

IN

PGOOD (Pin 8): The Power Good Pin. This common drain
logic output is pulled to SGND when the output voltage is
not within ±7.5% of regulation.

(Pin 9): Receives the feedback voltage from the ex-

V

FB

ternal resistive divider across the output. Nominal voltage
for this pin is 0.8V.

(Pin 10): Error Amplifi er Compensation Point. The cur-

I

TH

rent comparator threshold increases with this control volt­age. Nominal voltage range for this pin is 0V to 1.5V.

Exposed Pad (Pin 11): Thermal Ground. Connect to SGND
and solder to the PCB for rated thermal performance.

BLOCK DIAGRAM

9

V

FB

0.74V

0.86V

8

PGOOD

0.8V

SV

IN

7

VOLTAGE

REFERENCE

+

–

+

–

+

–

SGND

3

ERROR
AMPLIFIER

I

TH

10

PMOS CURRENT

SLOPE

COMPENSATION

NMOS

REVERSE

COMPARATOR

+

–

+

–

–

+

I

TH

LIMIT

BCLAMP

–

+

V

B

BURST
COMPARATOR
HYSTERESIS = 80mV

OSCILLATOR

1

SHDN/R

T

LOGIC

2

SYNC/MODE

COMPARATOR

COMPARATOR

PV

IN

6

SW

4

5

PGND

3568 BD

3568f

5